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1 /*
2  * Copyright 2002 Andi Kleen, SuSE Labs.
3  * Thanks to Ben LaHaise for precious feedback.
4  */
5 #include <linux/highmem.h>
6 #include <linux/bootmem.h>
7 #include <linux/module.h>
8 #include <linux/sched.h>
9 #include <linux/mm.h>
10 #include <linux/interrupt.h>
11 #include <linux/seq_file.h>
12 #include <linux/debugfs.h>
13 #include <linux/pfn.h>
14 #include <linux/percpu.h>
15 #include <linux/gfp.h>
16 #include <linux/pci.h>
17
18 #include <asm/e820.h>
19 #include <asm/processor.h>
20 #include <asm/tlbflush.h>
21 #include <asm/sections.h>
22 #include <asm/setup.h>
23 #include <asm/uaccess.h>
24 #include <asm/pgalloc.h>
25 #include <asm/proto.h>
26 #include <asm/pat.h>
27
28 /*
29  * The current flushing context - we pass it instead of 5 arguments:
30  */
31 struct cpa_data {
32         unsigned long   *vaddr;
33         pgd_t           *pgd;
34         pgprot_t        mask_set;
35         pgprot_t        mask_clr;
36         int             numpages;
37         int             flags;
38         unsigned long   pfn;
39         unsigned        force_split : 1;
40         int             curpage;
41         struct page     **pages;
42 };
43
44 /*
45  * Serialize cpa() (for !DEBUG_PAGEALLOC which uses large identity mappings)
46  * using cpa_lock. So that we don't allow any other cpu, with stale large tlb
47  * entries change the page attribute in parallel to some other cpu
48  * splitting a large page entry along with changing the attribute.
49  */
50 static DEFINE_SPINLOCK(cpa_lock);
51
52 #define CPA_FLUSHTLB 1
53 #define CPA_ARRAY 2
54 #define CPA_PAGES_ARRAY 4
55
56 #ifdef CONFIG_PROC_FS
57 static unsigned long direct_pages_count[PG_LEVEL_NUM];
58
59 void update_page_count(int level, unsigned long pages)
60 {
61         /* Protect against CPA */
62         spin_lock(&pgd_lock);
63         direct_pages_count[level] += pages;
64         spin_unlock(&pgd_lock);
65 }
66
67 static void split_page_count(int level)
68 {
69         direct_pages_count[level]--;
70         direct_pages_count[level - 1] += PTRS_PER_PTE;
71 }
72
73 void arch_report_meminfo(struct seq_file *m)
74 {
75         seq_printf(m, "DirectMap4k:    %8lu kB\n",
76                         direct_pages_count[PG_LEVEL_4K] << 2);
77 #if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
78         seq_printf(m, "DirectMap2M:    %8lu kB\n",
79                         direct_pages_count[PG_LEVEL_2M] << 11);
80 #else
81         seq_printf(m, "DirectMap4M:    %8lu kB\n",
82                         direct_pages_count[PG_LEVEL_2M] << 12);
83 #endif
84         if (direct_gbpages)
85                 seq_printf(m, "DirectMap1G:    %8lu kB\n",
86                         direct_pages_count[PG_LEVEL_1G] << 20);
87 }
88 #else
89 static inline void split_page_count(int level) { }
90 #endif
91
92 #ifdef CONFIG_X86_64
93
94 static inline unsigned long highmap_start_pfn(void)
95 {
96         return __pa_symbol(_text) >> PAGE_SHIFT;
97 }
98
99 static inline unsigned long highmap_end_pfn(void)
100 {
101         return __pa_symbol(roundup(_brk_end, PMD_SIZE)) >> PAGE_SHIFT;
102 }
103
104 #endif
105
106 #ifdef CONFIG_DEBUG_PAGEALLOC
107 # define debug_pagealloc 1
108 #else
109 # define debug_pagealloc 0
110 #endif
111
112 static inline int
113 within(unsigned long addr, unsigned long start, unsigned long end)
114 {
115         return addr >= start && addr < end;
116 }
117
118 /*
119  * Flushing functions
120  */
121
122 /**
123  * clflush_cache_range - flush a cache range with clflush
124  * @vaddr:      virtual start address
125  * @size:       number of bytes to flush
126  *
127  * clflushopt is an unordered instruction which needs fencing with mfence or
128  * sfence to avoid ordering issues.
129  */
130 void clflush_cache_range(void *vaddr, unsigned int size)
131 {
132         unsigned long clflush_mask = boot_cpu_data.x86_clflush_size - 1;
133         void *vend = vaddr + size;
134         void *p;
135
136         mb();
137
138         for (p = (void *)((unsigned long)vaddr & ~clflush_mask);
139              p < vend; p += boot_cpu_data.x86_clflush_size)
140                 clflushopt(p);
141
142         mb();
143 }
144 EXPORT_SYMBOL_GPL(clflush_cache_range);
145
146 static void __cpa_flush_all(void *arg)
147 {
148         unsigned long cache = (unsigned long)arg;
149
150         /*
151          * Flush all to work around Errata in early athlons regarding
152          * large page flushing.
153          */
154         __flush_tlb_all();
155
156         if (cache && boot_cpu_data.x86 >= 4)
157                 wbinvd();
158 }
159
160 static void cpa_flush_all(unsigned long cache)
161 {
162         BUG_ON(irqs_disabled());
163
164         on_each_cpu(__cpa_flush_all, (void *) cache, 1);
165 }
166
167 static void __cpa_flush_range(void *arg)
168 {
169         /*
170          * We could optimize that further and do individual per page
171          * tlb invalidates for a low number of pages. Caveat: we must
172          * flush the high aliases on 64bit as well.
173          */
174         __flush_tlb_all();
175 }
176
177 static void cpa_flush_range(unsigned long start, int numpages, int cache)
178 {
179         unsigned int i, level;
180         unsigned long addr;
181
182         BUG_ON(irqs_disabled());
183         WARN_ON(PAGE_ALIGN(start) != start);
184
185         on_each_cpu(__cpa_flush_range, NULL, 1);
186
187         if (!cache)
188                 return;
189
190         /*
191          * We only need to flush on one CPU,
192          * clflush is a MESI-coherent instruction that
193          * will cause all other CPUs to flush the same
194          * cachelines:
195          */
196         for (i = 0, addr = start; i < numpages; i++, addr += PAGE_SIZE) {
197                 pte_t *pte = lookup_address(addr, &level);
198
199                 /*
200                  * Only flush present addresses:
201                  */
202                 if (pte && (pte_val(*pte) & _PAGE_PRESENT))
203                         clflush_cache_range((void *) addr, PAGE_SIZE);
204         }
205 }
206
207 static void cpa_flush_array(unsigned long *start, int numpages, int cache,
208                             int in_flags, struct page **pages)
209 {
210         unsigned int i, level;
211         unsigned long do_wbinvd = cache && numpages >= 1024; /* 4M threshold */
212
213         BUG_ON(irqs_disabled());
214
215         on_each_cpu(__cpa_flush_all, (void *) do_wbinvd, 1);
216
217         if (!cache || do_wbinvd)
218                 return;
219
220         /*
221          * We only need to flush on one CPU,
222          * clflush is a MESI-coherent instruction that
223          * will cause all other CPUs to flush the same
224          * cachelines:
225          */
226         for (i = 0; i < numpages; i++) {
227                 unsigned long addr;
228                 pte_t *pte;
229
230                 if (in_flags & CPA_PAGES_ARRAY)
231                         addr = (unsigned long)page_address(pages[i]);
232                 else
233                         addr = start[i];
234
235                 pte = lookup_address(addr, &level);
236
237                 /*
238                  * Only flush present addresses:
239                  */
240                 if (pte && (pte_val(*pte) & _PAGE_PRESENT))
241                         clflush_cache_range((void *)addr, PAGE_SIZE);
242         }
243 }
244
245 /*
246  * Certain areas of memory on x86 require very specific protection flags,
247  * for example the BIOS area or kernel text. Callers don't always get this
248  * right (again, ioremap() on BIOS memory is not uncommon) so this function
249  * checks and fixes these known static required protection bits.
250  */
251 static inline pgprot_t static_protections(pgprot_t prot, unsigned long address,
252                                    unsigned long pfn)
253 {
254         pgprot_t forbidden = __pgprot(0);
255
256         /*
257          * The BIOS area between 640k and 1Mb needs to be executable for
258          * PCI BIOS based config access (CONFIG_PCI_GOBIOS) support.
259          */
260 #ifdef CONFIG_PCI_BIOS
261         if (pcibios_enabled && within(pfn, BIOS_BEGIN >> PAGE_SHIFT, BIOS_END >> PAGE_SHIFT))
262                 pgprot_val(forbidden) |= _PAGE_NX;
263 #endif
264
265         /*
266          * The kernel text needs to be executable for obvious reasons
267          * Does not cover __inittext since that is gone later on. On
268          * 64bit we do not enforce !NX on the low mapping
269          */
270         if (within(address, (unsigned long)_text, (unsigned long)_etext))
271                 pgprot_val(forbidden) |= _PAGE_NX;
272
273         /*
274          * The .rodata section needs to be read-only. Using the pfn
275          * catches all aliases.
276          */
277         if (within(pfn, __pa_symbol(__start_rodata) >> PAGE_SHIFT,
278                    __pa_symbol(__end_rodata) >> PAGE_SHIFT))
279                 pgprot_val(forbidden) |= _PAGE_RW;
280
281 #if defined(CONFIG_X86_64) && defined(CONFIG_DEBUG_RODATA)
282         /*
283          * Once the kernel maps the text as RO (kernel_set_to_readonly is set),
284          * kernel text mappings for the large page aligned text, rodata sections
285          * will be always read-only. For the kernel identity mappings covering
286          * the holes caused by this alignment can be anything that user asks.
287          *
288          * This will preserve the large page mappings for kernel text/data
289          * at no extra cost.
290          */
291         if (kernel_set_to_readonly &&
292             within(address, (unsigned long)_text,
293                    (unsigned long)__end_rodata_hpage_align)) {
294                 unsigned int level;
295
296                 /*
297                  * Don't enforce the !RW mapping for the kernel text mapping,
298                  * if the current mapping is already using small page mapping.
299                  * No need to work hard to preserve large page mappings in this
300                  * case.
301                  *
302                  * This also fixes the Linux Xen paravirt guest boot failure
303                  * (because of unexpected read-only mappings for kernel identity
304                  * mappings). In this paravirt guest case, the kernel text
305                  * mapping and the kernel identity mapping share the same
306                  * page-table pages. Thus we can't really use different
307                  * protections for the kernel text and identity mappings. Also,
308                  * these shared mappings are made of small page mappings.
309                  * Thus this don't enforce !RW mapping for small page kernel
310                  * text mapping logic will help Linux Xen parvirt guest boot
311                  * as well.
312                  */
313                 if (lookup_address(address, &level) && (level != PG_LEVEL_4K))
314                         pgprot_val(forbidden) |= _PAGE_RW;
315         }
316 #endif
317
318         prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden));
319
320         return prot;
321 }
322
323 /*
324  * Lookup the page table entry for a virtual address in a specific pgd.
325  * Return a pointer to the entry and the level of the mapping.
326  */
327 pte_t *lookup_address_in_pgd(pgd_t *pgd, unsigned long address,
328                              unsigned int *level)
329 {
330         pud_t *pud;
331         pmd_t *pmd;
332
333         *level = PG_LEVEL_NONE;
334
335         if (pgd_none(*pgd))
336                 return NULL;
337
338         pud = pud_offset(pgd, address);
339         if (pud_none(*pud))
340                 return NULL;
341
342         *level = PG_LEVEL_1G;
343         if (pud_large(*pud) || !pud_present(*pud))
344                 return (pte_t *)pud;
345
346         pmd = pmd_offset(pud, address);
347         if (pmd_none(*pmd))
348                 return NULL;
349
350         *level = PG_LEVEL_2M;
351         if (pmd_large(*pmd) || !pmd_present(*pmd))
352                 return (pte_t *)pmd;
353
354         *level = PG_LEVEL_4K;
355
356         return pte_offset_kernel(pmd, address);
357 }
358
359 /*
360  * Lookup the page table entry for a virtual address. Return a pointer
361  * to the entry and the level of the mapping.
362  *
363  * Note: We return pud and pmd either when the entry is marked large
364  * or when the present bit is not set. Otherwise we would return a
365  * pointer to a nonexisting mapping.
366  */
367 pte_t *lookup_address(unsigned long address, unsigned int *level)
368 {
369         return lookup_address_in_pgd(pgd_offset_k(address), address, level);
370 }
371 EXPORT_SYMBOL_GPL(lookup_address);
372
373 static pte_t *_lookup_address_cpa(struct cpa_data *cpa, unsigned long address,
374                                   unsigned int *level)
375 {
376         if (cpa->pgd)
377                 return lookup_address_in_pgd(cpa->pgd + pgd_index(address),
378                                                address, level);
379
380         return lookup_address(address, level);
381 }
382
383 /*
384  * Lookup the PMD entry for a virtual address. Return a pointer to the entry
385  * or NULL if not present.
386  */
387 pmd_t *lookup_pmd_address(unsigned long address)
388 {
389         pgd_t *pgd;
390         pud_t *pud;
391
392         pgd = pgd_offset_k(address);
393         if (pgd_none(*pgd))
394                 return NULL;
395
396         pud = pud_offset(pgd, address);
397         if (pud_none(*pud) || pud_large(*pud) || !pud_present(*pud))
398                 return NULL;
399
400         return pmd_offset(pud, address);
401 }
402
403 /*
404  * This is necessary because __pa() does not work on some
405  * kinds of memory, like vmalloc() or the alloc_remap()
406  * areas on 32-bit NUMA systems.  The percpu areas can
407  * end up in this kind of memory, for instance.
408  *
409  * This could be optimized, but it is only intended to be
410  * used at inititalization time, and keeping it
411  * unoptimized should increase the testing coverage for
412  * the more obscure platforms.
413  */
414 phys_addr_t slow_virt_to_phys(void *__virt_addr)
415 {
416         unsigned long virt_addr = (unsigned long)__virt_addr;
417         phys_addr_t phys_addr;
418         unsigned long offset;
419         enum pg_level level;
420         unsigned long pmask;
421         pte_t *pte;
422
423         pte = lookup_address(virt_addr, &level);
424         BUG_ON(!pte);
425         pmask = page_level_mask(level);
426         offset = virt_addr & ~pmask;
427         phys_addr = (phys_addr_t)pte_pfn(*pte) << PAGE_SHIFT;
428         return (phys_addr | offset);
429 }
430 EXPORT_SYMBOL_GPL(slow_virt_to_phys);
431
432 /*
433  * Set the new pmd in all the pgds we know about:
434  */
435 static void __set_pmd_pte(pte_t *kpte, unsigned long address, pte_t pte)
436 {
437         /* change init_mm */
438         set_pte_atomic(kpte, pte);
439 #ifdef CONFIG_X86_32
440         if (!SHARED_KERNEL_PMD) {
441                 struct page *page;
442
443                 list_for_each_entry(page, &pgd_list, lru) {
444                         pgd_t *pgd;
445                         pud_t *pud;
446                         pmd_t *pmd;
447
448                         pgd = (pgd_t *)page_address(page) + pgd_index(address);
449                         pud = pud_offset(pgd, address);
450                         pmd = pmd_offset(pud, address);
451                         set_pte_atomic((pte_t *)pmd, pte);
452                 }
453         }
454 #endif
455 }
456
457 static int
458 try_preserve_large_page(pte_t *kpte, unsigned long address,
459                         struct cpa_data *cpa)
460 {
461         unsigned long nextpage_addr, numpages, pmask, psize, addr, pfn;
462         pte_t new_pte, old_pte, *tmp;
463         pgprot_t old_prot, new_prot, req_prot;
464         int i, do_split = 1;
465         enum pg_level level;
466
467         if (cpa->force_split)
468                 return 1;
469
470         spin_lock(&pgd_lock);
471         /*
472          * Check for races, another CPU might have split this page
473          * up already:
474          */
475         tmp = _lookup_address_cpa(cpa, address, &level);
476         if (tmp != kpte)
477                 goto out_unlock;
478
479         switch (level) {
480         case PG_LEVEL_2M:
481 #ifdef CONFIG_X86_64
482         case PG_LEVEL_1G:
483 #endif
484                 psize = page_level_size(level);
485                 pmask = page_level_mask(level);
486                 break;
487         default:
488                 do_split = -EINVAL;
489                 goto out_unlock;
490         }
491
492         /*
493          * Calculate the number of pages, which fit into this large
494          * page starting at address:
495          */
496         nextpage_addr = (address + psize) & pmask;
497         numpages = (nextpage_addr - address) >> PAGE_SHIFT;
498         if (numpages < cpa->numpages)
499                 cpa->numpages = numpages;
500
501         /*
502          * We are safe now. Check whether the new pgprot is the same:
503          * Convert protection attributes to 4k-format, as cpa->mask* are set
504          * up accordingly.
505          */
506         old_pte = *kpte;
507         old_prot = req_prot = pgprot_large_2_4k(pte_pgprot(old_pte));
508
509         pgprot_val(req_prot) &= ~pgprot_val(cpa->mask_clr);
510         pgprot_val(req_prot) |= pgprot_val(cpa->mask_set);
511
512         /*
513          * req_prot is in format of 4k pages. It must be converted to large
514          * page format: the caching mode includes the PAT bit located at
515          * different bit positions in the two formats.
516          */
517         req_prot = pgprot_4k_2_large(req_prot);
518
519         /*
520          * Set the PSE and GLOBAL flags only if the PRESENT flag is
521          * set otherwise pmd_present/pmd_huge will return true even on
522          * a non present pmd. The canon_pgprot will clear _PAGE_GLOBAL
523          * for the ancient hardware that doesn't support it.
524          */
525         if (pgprot_val(req_prot) & _PAGE_PRESENT)
526                 pgprot_val(req_prot) |= _PAGE_PSE | _PAGE_GLOBAL;
527         else
528                 pgprot_val(req_prot) &= ~(_PAGE_PSE | _PAGE_GLOBAL);
529
530         req_prot = canon_pgprot(req_prot);
531
532         /*
533          * old_pte points to the large page base address. So we need
534          * to add the offset of the virtual address:
535          */
536         pfn = pte_pfn(old_pte) + ((address & (psize - 1)) >> PAGE_SHIFT);
537         cpa->pfn = pfn;
538
539         new_prot = static_protections(req_prot, address, pfn);
540
541         /*
542          * We need to check the full range, whether
543          * static_protection() requires a different pgprot for one of
544          * the pages in the range we try to preserve:
545          */
546         addr = address & pmask;
547         pfn = pte_pfn(old_pte);
548         for (i = 0; i < (psize >> PAGE_SHIFT); i++, addr += PAGE_SIZE, pfn++) {
549                 pgprot_t chk_prot = static_protections(req_prot, addr, pfn);
550
551                 if (pgprot_val(chk_prot) != pgprot_val(new_prot))
552                         goto out_unlock;
553         }
554
555         /*
556          * If there are no changes, return. maxpages has been updated
557          * above:
558          */
559         if (pgprot_val(new_prot) == pgprot_val(old_prot)) {
560                 do_split = 0;
561                 goto out_unlock;
562         }
563
564         /*
565          * We need to change the attributes. Check, whether we can
566          * change the large page in one go. We request a split, when
567          * the address is not aligned and the number of pages is
568          * smaller than the number of pages in the large page. Note
569          * that we limited the number of possible pages already to
570          * the number of pages in the large page.
571          */
572         if (address == (address & pmask) && cpa->numpages == (psize >> PAGE_SHIFT)) {
573                 /*
574                  * The address is aligned and the number of pages
575                  * covers the full page.
576                  */
577                 new_pte = pfn_pte(pte_pfn(old_pte), new_prot);
578                 __set_pmd_pte(kpte, address, new_pte);
579                 cpa->flags |= CPA_FLUSHTLB;
580                 do_split = 0;
581         }
582
583 out_unlock:
584         spin_unlock(&pgd_lock);
585
586         return do_split;
587 }
588
589 static int
590 __split_large_page(struct cpa_data *cpa, pte_t *kpte, unsigned long address,
591                    struct page *base)
592 {
593         pte_t *pbase = (pte_t *)page_address(base);
594         unsigned long pfn, pfninc = 1;
595         unsigned int i, level;
596         pte_t *tmp;
597         pgprot_t ref_prot;
598
599         spin_lock(&pgd_lock);
600         /*
601          * Check for races, another CPU might have split this page
602          * up for us already:
603          */
604         tmp = _lookup_address_cpa(cpa, address, &level);
605         if (tmp != kpte) {
606                 spin_unlock(&pgd_lock);
607                 return 1;
608         }
609
610         paravirt_alloc_pte(&init_mm, page_to_pfn(base));
611         ref_prot = pte_pgprot(pte_clrhuge(*kpte));
612
613         /* promote PAT bit to correct position */
614         if (level == PG_LEVEL_2M)
615                 ref_prot = pgprot_large_2_4k(ref_prot);
616
617 #ifdef CONFIG_X86_64
618         if (level == PG_LEVEL_1G) {
619                 pfninc = PMD_PAGE_SIZE >> PAGE_SHIFT;
620                 /*
621                  * Set the PSE flags only if the PRESENT flag is set
622                  * otherwise pmd_present/pmd_huge will return true
623                  * even on a non present pmd.
624                  */
625                 if (pgprot_val(ref_prot) & _PAGE_PRESENT)
626                         pgprot_val(ref_prot) |= _PAGE_PSE;
627                 else
628                         pgprot_val(ref_prot) &= ~_PAGE_PSE;
629         }
630 #endif
631
632         /*
633          * Set the GLOBAL flags only if the PRESENT flag is set
634          * otherwise pmd/pte_present will return true even on a non
635          * present pmd/pte. The canon_pgprot will clear _PAGE_GLOBAL
636          * for the ancient hardware that doesn't support it.
637          */
638         if (pgprot_val(ref_prot) & _PAGE_PRESENT)
639                 pgprot_val(ref_prot) |= _PAGE_GLOBAL;
640         else
641                 pgprot_val(ref_prot) &= ~_PAGE_GLOBAL;
642
643         /*
644          * Get the target pfn from the original entry:
645          */
646         pfn = pte_pfn(*kpte);
647         for (i = 0; i < PTRS_PER_PTE; i++, pfn += pfninc)
648                 set_pte(&pbase[i], pfn_pte(pfn, canon_pgprot(ref_prot)));
649
650         if (pfn_range_is_mapped(PFN_DOWN(__pa(address)),
651                                 PFN_DOWN(__pa(address)) + 1))
652                 split_page_count(level);
653
654         /*
655          * Install the new, split up pagetable.
656          *
657          * We use the standard kernel pagetable protections for the new
658          * pagetable protections, the actual ptes set above control the
659          * primary protection behavior:
660          */
661         __set_pmd_pte(kpte, address, mk_pte(base, __pgprot(_KERNPG_TABLE)));
662
663         /*
664          * Intel Atom errata AAH41 workaround.
665          *
666          * The real fix should be in hw or in a microcode update, but
667          * we also probabilistically try to reduce the window of having
668          * a large TLB mixed with 4K TLBs while instruction fetches are
669          * going on.
670          */
671         __flush_tlb_all();
672         spin_unlock(&pgd_lock);
673
674         return 0;
675 }
676
677 static int split_large_page(struct cpa_data *cpa, pte_t *kpte,
678                             unsigned long address)
679 {
680         struct page *base;
681
682         if (!debug_pagealloc)
683                 spin_unlock(&cpa_lock);
684         base = alloc_pages(GFP_KERNEL | __GFP_NOTRACK, 0);
685         if (!debug_pagealloc)
686                 spin_lock(&cpa_lock);
687         if (!base)
688                 return -ENOMEM;
689
690         if (__split_large_page(cpa, kpte, address, base))
691                 __free_page(base);
692
693         return 0;
694 }
695
696 static bool try_to_free_pte_page(pte_t *pte)
697 {
698         int i;
699
700         for (i = 0; i < PTRS_PER_PTE; i++)
701                 if (!pte_none(pte[i]))
702                         return false;
703
704         free_page((unsigned long)pte);
705         return true;
706 }
707
708 static bool try_to_free_pmd_page(pmd_t *pmd)
709 {
710         int i;
711
712         for (i = 0; i < PTRS_PER_PMD; i++)
713                 if (!pmd_none(pmd[i]))
714                         return false;
715
716         free_page((unsigned long)pmd);
717         return true;
718 }
719
720 static bool try_to_free_pud_page(pud_t *pud)
721 {
722         int i;
723
724         for (i = 0; i < PTRS_PER_PUD; i++)
725                 if (!pud_none(pud[i]))
726                         return false;
727
728         free_page((unsigned long)pud);
729         return true;
730 }
731
732 static bool unmap_pte_range(pmd_t *pmd, unsigned long start, unsigned long end)
733 {
734         pte_t *pte = pte_offset_kernel(pmd, start);
735
736         while (start < end) {
737                 set_pte(pte, __pte(0));
738
739                 start += PAGE_SIZE;
740                 pte++;
741         }
742
743         if (try_to_free_pte_page((pte_t *)pmd_page_vaddr(*pmd))) {
744                 pmd_clear(pmd);
745                 return true;
746         }
747         return false;
748 }
749
750 static void __unmap_pmd_range(pud_t *pud, pmd_t *pmd,
751                               unsigned long start, unsigned long end)
752 {
753         if (unmap_pte_range(pmd, start, end))
754                 if (try_to_free_pmd_page((pmd_t *)pud_page_vaddr(*pud)))
755                         pud_clear(pud);
756 }
757
758 static void unmap_pmd_range(pud_t *pud, unsigned long start, unsigned long end)
759 {
760         pmd_t *pmd = pmd_offset(pud, start);
761
762         /*
763          * Not on a 2MB page boundary?
764          */
765         if (start & (PMD_SIZE - 1)) {
766                 unsigned long next_page = (start + PMD_SIZE) & PMD_MASK;
767                 unsigned long pre_end = min_t(unsigned long, end, next_page);
768
769                 __unmap_pmd_range(pud, pmd, start, pre_end);
770
771                 start = pre_end;
772                 pmd++;
773         }
774
775         /*
776          * Try to unmap in 2M chunks.
777          */
778         while (end - start >= PMD_SIZE) {
779                 if (pmd_large(*pmd))
780                         pmd_clear(pmd);
781                 else
782                         __unmap_pmd_range(pud, pmd, start, start + PMD_SIZE);
783
784                 start += PMD_SIZE;
785                 pmd++;
786         }
787
788         /*
789          * 4K leftovers?
790          */
791         if (start < end)
792                 return __unmap_pmd_range(pud, pmd, start, end);
793
794         /*
795          * Try again to free the PMD page if haven't succeeded above.
796          */
797         if (!pud_none(*pud))
798                 if (try_to_free_pmd_page((pmd_t *)pud_page_vaddr(*pud)))
799                         pud_clear(pud);
800 }
801
802 static void unmap_pud_range(pgd_t *pgd, unsigned long start, unsigned long end)
803 {
804         pud_t *pud = pud_offset(pgd, start);
805
806         /*
807          * Not on a GB page boundary?
808          */
809         if (start & (PUD_SIZE - 1)) {
810                 unsigned long next_page = (start + PUD_SIZE) & PUD_MASK;
811                 unsigned long pre_end   = min_t(unsigned long, end, next_page);
812
813                 unmap_pmd_range(pud, start, pre_end);
814
815                 start = pre_end;
816                 pud++;
817         }
818
819         /*
820          * Try to unmap in 1G chunks?
821          */
822         while (end - start >= PUD_SIZE) {
823
824                 if (pud_large(*pud))
825                         pud_clear(pud);
826                 else
827                         unmap_pmd_range(pud, start, start + PUD_SIZE);
828
829                 start += PUD_SIZE;
830                 pud++;
831         }
832
833         /*
834          * 2M leftovers?
835          */
836         if (start < end)
837                 unmap_pmd_range(pud, start, end);
838
839         /*
840          * No need to try to free the PUD page because we'll free it in
841          * populate_pgd's error path
842          */
843 }
844
845 static void unmap_pgd_range(pgd_t *root, unsigned long addr, unsigned long end)
846 {
847         pgd_t *pgd_entry = root + pgd_index(addr);
848
849         unmap_pud_range(pgd_entry, addr, end);
850
851         if (try_to_free_pud_page((pud_t *)pgd_page_vaddr(*pgd_entry)))
852                 pgd_clear(pgd_entry);
853 }
854
855 static int alloc_pte_page(pmd_t *pmd)
856 {
857         pte_t *pte = (pte_t *)get_zeroed_page(GFP_KERNEL | __GFP_NOTRACK);
858         if (!pte)
859                 return -1;
860
861         set_pmd(pmd, __pmd(__pa(pte) | _KERNPG_TABLE));
862         return 0;
863 }
864
865 static int alloc_pmd_page(pud_t *pud)
866 {
867         pmd_t *pmd = (pmd_t *)get_zeroed_page(GFP_KERNEL | __GFP_NOTRACK);
868         if (!pmd)
869                 return -1;
870
871         set_pud(pud, __pud(__pa(pmd) | _KERNPG_TABLE));
872         return 0;
873 }
874
875 static void populate_pte(struct cpa_data *cpa,
876                          unsigned long start, unsigned long end,
877                          unsigned num_pages, pmd_t *pmd, pgprot_t pgprot)
878 {
879         pte_t *pte;
880
881         pte = pte_offset_kernel(pmd, start);
882
883         while (num_pages-- && start < end) {
884
885                 /* deal with the NX bit */
886                 if (!(pgprot_val(pgprot) & _PAGE_NX))
887                         cpa->pfn &= ~_PAGE_NX;
888
889                 set_pte(pte, pfn_pte(cpa->pfn >> PAGE_SHIFT, pgprot));
890
891                 start    += PAGE_SIZE;
892                 cpa->pfn += PAGE_SIZE;
893                 pte++;
894         }
895 }
896
897 static int populate_pmd(struct cpa_data *cpa,
898                         unsigned long start, unsigned long end,
899                         unsigned num_pages, pud_t *pud, pgprot_t pgprot)
900 {
901         unsigned int cur_pages = 0;
902         pmd_t *pmd;
903         pgprot_t pmd_pgprot;
904
905         /*
906          * Not on a 2M boundary?
907          */
908         if (start & (PMD_SIZE - 1)) {
909                 unsigned long pre_end = start + (num_pages << PAGE_SHIFT);
910                 unsigned long next_page = (start + PMD_SIZE) & PMD_MASK;
911
912                 pre_end   = min_t(unsigned long, pre_end, next_page);
913                 cur_pages = (pre_end - start) >> PAGE_SHIFT;
914                 cur_pages = min_t(unsigned int, num_pages, cur_pages);
915
916                 /*
917                  * Need a PTE page?
918                  */
919                 pmd = pmd_offset(pud, start);
920                 if (pmd_none(*pmd))
921                         if (alloc_pte_page(pmd))
922                                 return -1;
923
924                 populate_pte(cpa, start, pre_end, cur_pages, pmd, pgprot);
925
926                 start = pre_end;
927         }
928
929         /*
930          * We mapped them all?
931          */
932         if (num_pages == cur_pages)
933                 return cur_pages;
934
935         pmd_pgprot = pgprot_4k_2_large(pgprot);
936
937         while (end - start >= PMD_SIZE) {
938
939                 /*
940                  * We cannot use a 1G page so allocate a PMD page if needed.
941                  */
942                 if (pud_none(*pud))
943                         if (alloc_pmd_page(pud))
944                                 return -1;
945
946                 pmd = pmd_offset(pud, start);
947
948                 set_pmd(pmd, __pmd(cpa->pfn | _PAGE_PSE |
949                                    massage_pgprot(pmd_pgprot)));
950
951                 start     += PMD_SIZE;
952                 cpa->pfn  += PMD_SIZE;
953                 cur_pages += PMD_SIZE >> PAGE_SHIFT;
954         }
955
956         /*
957          * Map trailing 4K pages.
958          */
959         if (start < end) {
960                 pmd = pmd_offset(pud, start);
961                 if (pmd_none(*pmd))
962                         if (alloc_pte_page(pmd))
963                                 return -1;
964
965                 populate_pte(cpa, start, end, num_pages - cur_pages,
966                              pmd, pgprot);
967         }
968         return num_pages;
969 }
970
971 static int populate_pud(struct cpa_data *cpa, unsigned long start, pgd_t *pgd,
972                         pgprot_t pgprot)
973 {
974         pud_t *pud;
975         unsigned long end;
976         int cur_pages = 0;
977         pgprot_t pud_pgprot;
978
979         end = start + (cpa->numpages << PAGE_SHIFT);
980
981         /*
982          * Not on a Gb page boundary? => map everything up to it with
983          * smaller pages.
984          */
985         if (start & (PUD_SIZE - 1)) {
986                 unsigned long pre_end;
987                 unsigned long next_page = (start + PUD_SIZE) & PUD_MASK;
988
989                 pre_end   = min_t(unsigned long, end, next_page);
990                 cur_pages = (pre_end - start) >> PAGE_SHIFT;
991                 cur_pages = min_t(int, (int)cpa->numpages, cur_pages);
992
993                 pud = pud_offset(pgd, start);
994
995                 /*
996                  * Need a PMD page?
997                  */
998                 if (pud_none(*pud))
999                         if (alloc_pmd_page(pud))
1000                                 return -1;
1001
1002                 cur_pages = populate_pmd(cpa, start, pre_end, cur_pages,
1003                                          pud, pgprot);
1004                 if (cur_pages < 0)
1005                         return cur_pages;
1006
1007                 start = pre_end;
1008         }
1009
1010         /* We mapped them all? */
1011         if (cpa->numpages == cur_pages)
1012                 return cur_pages;
1013
1014         pud = pud_offset(pgd, start);
1015         pud_pgprot = pgprot_4k_2_large(pgprot);
1016
1017         /*
1018          * Map everything starting from the Gb boundary, possibly with 1G pages
1019          */
1020         while (end - start >= PUD_SIZE) {
1021                 set_pud(pud, __pud(cpa->pfn | _PAGE_PSE |
1022                                    massage_pgprot(pud_pgprot)));
1023
1024                 start     += PUD_SIZE;
1025                 cpa->pfn  += PUD_SIZE;
1026                 cur_pages += PUD_SIZE >> PAGE_SHIFT;
1027                 pud++;
1028         }
1029
1030         /* Map trailing leftover */
1031         if (start < end) {
1032                 int tmp;
1033
1034                 pud = pud_offset(pgd, start);
1035                 if (pud_none(*pud))
1036                         if (alloc_pmd_page(pud))
1037                                 return -1;
1038
1039                 tmp = populate_pmd(cpa, start, end, cpa->numpages - cur_pages,
1040                                    pud, pgprot);
1041                 if (tmp < 0)
1042                         return cur_pages;
1043
1044                 cur_pages += tmp;
1045         }
1046         return cur_pages;
1047 }
1048
1049 /*
1050  * Restrictions for kernel page table do not necessarily apply when mapping in
1051  * an alternate PGD.
1052  */
1053 static int populate_pgd(struct cpa_data *cpa, unsigned long addr)
1054 {
1055         pgprot_t pgprot = __pgprot(_KERNPG_TABLE);
1056         pud_t *pud = NULL;      /* shut up gcc */
1057         pgd_t *pgd_entry;
1058         int ret;
1059
1060         pgd_entry = cpa->pgd + pgd_index(addr);
1061
1062         /*
1063          * Allocate a PUD page and hand it down for mapping.
1064          */
1065         if (pgd_none(*pgd_entry)) {
1066                 pud = (pud_t *)get_zeroed_page(GFP_KERNEL | __GFP_NOTRACK);
1067                 if (!pud)
1068                         return -1;
1069
1070                 set_pgd(pgd_entry, __pgd(__pa(pud) | _KERNPG_TABLE));
1071         }
1072
1073         pgprot_val(pgprot) &= ~pgprot_val(cpa->mask_clr);
1074         pgprot_val(pgprot) |=  pgprot_val(cpa->mask_set);
1075
1076         ret = populate_pud(cpa, addr, pgd_entry, pgprot);
1077         if (ret < 0) {
1078                 unmap_pgd_range(cpa->pgd, addr,
1079                                 addr + (cpa->numpages << PAGE_SHIFT));
1080                 return ret;
1081         }
1082
1083         cpa->numpages = ret;
1084         return 0;
1085 }
1086
1087 static int __cpa_process_fault(struct cpa_data *cpa, unsigned long vaddr,
1088                                int primary)
1089 {
1090         if (cpa->pgd)
1091                 return populate_pgd(cpa, vaddr);
1092
1093         /*
1094          * Ignore all non primary paths.
1095          */
1096         if (!primary)
1097                 return 0;
1098
1099         /*
1100          * Ignore the NULL PTE for kernel identity mapping, as it is expected
1101          * to have holes.
1102          * Also set numpages to '1' indicating that we processed cpa req for
1103          * one virtual address page and its pfn. TBD: numpages can be set based
1104          * on the initial value and the level returned by lookup_address().
1105          */
1106         if (within(vaddr, PAGE_OFFSET,
1107                    PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT))) {
1108                 cpa->numpages = 1;
1109                 cpa->pfn = __pa(vaddr) >> PAGE_SHIFT;
1110                 return 0;
1111         } else {
1112                 WARN(1, KERN_WARNING "CPA: called for zero pte. "
1113                         "vaddr = %lx cpa->vaddr = %lx\n", vaddr,
1114                         *cpa->vaddr);
1115
1116                 return -EFAULT;
1117         }
1118 }
1119
1120 static int __change_page_attr(struct cpa_data *cpa, int primary)
1121 {
1122         unsigned long address;
1123         int do_split, err;
1124         unsigned int level;
1125         pte_t *kpte, old_pte;
1126
1127         if (cpa->flags & CPA_PAGES_ARRAY) {
1128                 struct page *page = cpa->pages[cpa->curpage];
1129                 if (unlikely(PageHighMem(page)))
1130                         return 0;
1131                 address = (unsigned long)page_address(page);
1132         } else if (cpa->flags & CPA_ARRAY)
1133                 address = cpa->vaddr[cpa->curpage];
1134         else
1135                 address = *cpa->vaddr;
1136 repeat:
1137         kpte = _lookup_address_cpa(cpa, address, &level);
1138         if (!kpte)
1139                 return __cpa_process_fault(cpa, address, primary);
1140
1141         old_pte = *kpte;
1142         if (!pte_val(old_pte))
1143                 return __cpa_process_fault(cpa, address, primary);
1144
1145         if (level == PG_LEVEL_4K) {
1146                 pte_t new_pte;
1147                 pgprot_t new_prot = pte_pgprot(old_pte);
1148                 unsigned long pfn = pte_pfn(old_pte);
1149
1150                 pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr);
1151                 pgprot_val(new_prot) |= pgprot_val(cpa->mask_set);
1152
1153                 new_prot = static_protections(new_prot, address, pfn);
1154
1155                 /*
1156                  * Set the GLOBAL flags only if the PRESENT flag is
1157                  * set otherwise pte_present will return true even on
1158                  * a non present pte. The canon_pgprot will clear
1159                  * _PAGE_GLOBAL for the ancient hardware that doesn't
1160                  * support it.
1161                  */
1162                 if (pgprot_val(new_prot) & _PAGE_PRESENT)
1163                         pgprot_val(new_prot) |= _PAGE_GLOBAL;
1164                 else
1165                         pgprot_val(new_prot) &= ~_PAGE_GLOBAL;
1166
1167                 /*
1168                  * We need to keep the pfn from the existing PTE,
1169                  * after all we're only going to change it's attributes
1170                  * not the memory it points to
1171                  */
1172                 new_pte = pfn_pte(pfn, canon_pgprot(new_prot));
1173                 cpa->pfn = pfn;
1174                 /*
1175                  * Do we really change anything ?
1176                  */
1177                 if (pte_val(old_pte) != pte_val(new_pte)) {
1178                         set_pte_atomic(kpte, new_pte);
1179                         cpa->flags |= CPA_FLUSHTLB;
1180                 }
1181                 cpa->numpages = 1;
1182                 return 0;
1183         }
1184
1185         /*
1186          * Check, whether we can keep the large page intact
1187          * and just change the pte:
1188          */
1189         do_split = try_preserve_large_page(kpte, address, cpa);
1190         /*
1191          * When the range fits into the existing large page,
1192          * return. cp->numpages and cpa->tlbflush have been updated in
1193          * try_large_page:
1194          */
1195         if (do_split <= 0)
1196                 return do_split;
1197
1198         /*
1199          * We have to split the large page:
1200          */
1201         err = split_large_page(cpa, kpte, address);
1202         if (!err) {
1203                 /*
1204                  * Do a global flush tlb after splitting the large page
1205                  * and before we do the actual change page attribute in the PTE.
1206                  *
1207                  * With out this, we violate the TLB application note, that says
1208                  * "The TLBs may contain both ordinary and large-page
1209                  *  translations for a 4-KByte range of linear addresses. This
1210                  *  may occur if software modifies the paging structures so that
1211                  *  the page size used for the address range changes. If the two
1212                  *  translations differ with respect to page frame or attributes
1213                  *  (e.g., permissions), processor behavior is undefined and may
1214                  *  be implementation-specific."
1215                  *
1216                  * We do this global tlb flush inside the cpa_lock, so that we
1217                  * don't allow any other cpu, with stale tlb entries change the
1218                  * page attribute in parallel, that also falls into the
1219                  * just split large page entry.
1220                  */
1221                 flush_tlb_all();
1222                 goto repeat;
1223         }
1224
1225         return err;
1226 }
1227
1228 static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias);
1229
1230 static int cpa_process_alias(struct cpa_data *cpa)
1231 {
1232         struct cpa_data alias_cpa;
1233         unsigned long laddr = (unsigned long)__va(cpa->pfn << PAGE_SHIFT);
1234         unsigned long vaddr;
1235         int ret;
1236
1237         if (!pfn_range_is_mapped(cpa->pfn, cpa->pfn + 1))
1238                 return 0;
1239
1240         /*
1241          * No need to redo, when the primary call touched the direct
1242          * mapping already:
1243          */
1244         if (cpa->flags & CPA_PAGES_ARRAY) {
1245                 struct page *page = cpa->pages[cpa->curpage];
1246                 if (unlikely(PageHighMem(page)))
1247                         return 0;
1248                 vaddr = (unsigned long)page_address(page);
1249         } else if (cpa->flags & CPA_ARRAY)
1250                 vaddr = cpa->vaddr[cpa->curpage];
1251         else
1252                 vaddr = *cpa->vaddr;
1253
1254         if (!(within(vaddr, PAGE_OFFSET,
1255                     PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT)))) {
1256
1257                 alias_cpa = *cpa;
1258                 alias_cpa.vaddr = &laddr;
1259                 alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
1260
1261                 ret = __change_page_attr_set_clr(&alias_cpa, 0);
1262                 if (ret)
1263                         return ret;
1264         }
1265
1266 #ifdef CONFIG_X86_64
1267         /*
1268          * If the primary call didn't touch the high mapping already
1269          * and the physical address is inside the kernel map, we need
1270          * to touch the high mapped kernel as well:
1271          */
1272         if (!within(vaddr, (unsigned long)_text, _brk_end) &&
1273             within(cpa->pfn, highmap_start_pfn(), highmap_end_pfn())) {
1274                 unsigned long temp_cpa_vaddr = (cpa->pfn << PAGE_SHIFT) +
1275                                                __START_KERNEL_map - phys_base;
1276                 alias_cpa = *cpa;
1277                 alias_cpa.vaddr = &temp_cpa_vaddr;
1278                 alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
1279
1280                 /*
1281                  * The high mapping range is imprecise, so ignore the
1282                  * return value.
1283                  */
1284                 __change_page_attr_set_clr(&alias_cpa, 0);
1285         }
1286 #endif
1287
1288         return 0;
1289 }
1290
1291 static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias)
1292 {
1293         int ret, numpages = cpa->numpages;
1294
1295         while (numpages) {
1296                 /*
1297                  * Store the remaining nr of pages for the large page
1298                  * preservation check.
1299                  */
1300                 cpa->numpages = numpages;
1301                 /* for array changes, we can't use large page */
1302                 if (cpa->flags & (CPA_ARRAY | CPA_PAGES_ARRAY))
1303                         cpa->numpages = 1;
1304
1305                 if (!debug_pagealloc)
1306                         spin_lock(&cpa_lock);
1307                 ret = __change_page_attr(cpa, checkalias);
1308                 if (!debug_pagealloc)
1309                         spin_unlock(&cpa_lock);
1310                 if (ret)
1311                         return ret;
1312
1313                 if (checkalias) {
1314                         ret = cpa_process_alias(cpa);
1315                         if (ret)
1316                                 return ret;
1317                 }
1318
1319                 /*
1320                  * Adjust the number of pages with the result of the
1321                  * CPA operation. Either a large page has been
1322                  * preserved or a single page update happened.
1323                  */
1324                 BUG_ON(cpa->numpages > numpages);
1325                 numpages -= cpa->numpages;
1326                 if (cpa->flags & (CPA_PAGES_ARRAY | CPA_ARRAY))
1327                         cpa->curpage++;
1328                 else
1329                         *cpa->vaddr += cpa->numpages * PAGE_SIZE;
1330
1331         }
1332         return 0;
1333 }
1334
1335 static int change_page_attr_set_clr(unsigned long *addr, int numpages,
1336                                     pgprot_t mask_set, pgprot_t mask_clr,
1337                                     int force_split, int in_flag,
1338                                     struct page **pages)
1339 {
1340         struct cpa_data cpa;
1341         int ret, cache, checkalias;
1342         unsigned long baddr = 0;
1343
1344         memset(&cpa, 0, sizeof(cpa));
1345
1346         /*
1347          * Check, if we are requested to change a not supported
1348          * feature:
1349          */
1350         mask_set = canon_pgprot(mask_set);
1351         mask_clr = canon_pgprot(mask_clr);
1352         if (!pgprot_val(mask_set) && !pgprot_val(mask_clr) && !force_split)
1353                 return 0;
1354
1355         /* Ensure we are PAGE_SIZE aligned */
1356         if (in_flag & CPA_ARRAY) {
1357                 int i;
1358                 for (i = 0; i < numpages; i++) {
1359                         if (addr[i] & ~PAGE_MASK) {
1360                                 addr[i] &= PAGE_MASK;
1361                                 WARN_ON_ONCE(1);
1362                         }
1363                 }
1364         } else if (!(in_flag & CPA_PAGES_ARRAY)) {
1365                 /*
1366                  * in_flag of CPA_PAGES_ARRAY implies it is aligned.
1367                  * No need to cehck in that case
1368                  */
1369                 if (*addr & ~PAGE_MASK) {
1370                         *addr &= PAGE_MASK;
1371                         /*
1372                          * People should not be passing in unaligned addresses:
1373                          */
1374                         WARN_ON_ONCE(1);
1375                 }
1376                 /*
1377                  * Save address for cache flush. *addr is modified in the call
1378                  * to __change_page_attr_set_clr() below.
1379                  */
1380                 baddr = *addr;
1381         }
1382
1383         /* Must avoid aliasing mappings in the highmem code */
1384         kmap_flush_unused();
1385
1386         vm_unmap_aliases();
1387
1388         cpa.vaddr = addr;
1389         cpa.pages = pages;
1390         cpa.numpages = numpages;
1391         cpa.mask_set = mask_set;
1392         cpa.mask_clr = mask_clr;
1393         cpa.flags = 0;
1394         cpa.curpage = 0;
1395         cpa.force_split = force_split;
1396
1397         if (in_flag & (CPA_ARRAY | CPA_PAGES_ARRAY))
1398                 cpa.flags |= in_flag;
1399
1400         /* No alias checking for _NX bit modifications */
1401         checkalias = (pgprot_val(mask_set) | pgprot_val(mask_clr)) != _PAGE_NX;
1402
1403         ret = __change_page_attr_set_clr(&cpa, checkalias);
1404
1405         /*
1406          * Check whether we really changed something:
1407          */
1408         if (!(cpa.flags & CPA_FLUSHTLB))
1409                 goto out;
1410
1411         /*
1412          * No need to flush, when we did not set any of the caching
1413          * attributes:
1414          */
1415         cache = !!pgprot2cachemode(mask_set);
1416
1417         /*
1418          * On success we use CLFLUSH, when the CPU supports it to
1419          * avoid the WBINVD. If the CPU does not support it and in the
1420          * error case we fall back to cpa_flush_all (which uses
1421          * WBINVD):
1422          */
1423         if (!ret && cpu_has_clflush) {
1424                 if (cpa.flags & (CPA_PAGES_ARRAY | CPA_ARRAY)) {
1425                         cpa_flush_array(addr, numpages, cache,
1426                                         cpa.flags, pages);
1427                 } else
1428                         cpa_flush_range(baddr, numpages, cache);
1429         } else
1430                 cpa_flush_all(cache);
1431
1432 out:
1433         return ret;
1434 }
1435
1436 static inline int change_page_attr_set(unsigned long *addr, int numpages,
1437                                        pgprot_t mask, int array)
1438 {
1439         return change_page_attr_set_clr(addr, numpages, mask, __pgprot(0), 0,
1440                 (array ? CPA_ARRAY : 0), NULL);
1441 }
1442
1443 static inline int change_page_attr_clear(unsigned long *addr, int numpages,
1444                                          pgprot_t mask, int array)
1445 {
1446         return change_page_attr_set_clr(addr, numpages, __pgprot(0), mask, 0,
1447                 (array ? CPA_ARRAY : 0), NULL);
1448 }
1449
1450 static inline int cpa_set_pages_array(struct page **pages, int numpages,
1451                                        pgprot_t mask)
1452 {
1453         return change_page_attr_set_clr(NULL, numpages, mask, __pgprot(0), 0,
1454                 CPA_PAGES_ARRAY, pages);
1455 }
1456
1457 static inline int cpa_clear_pages_array(struct page **pages, int numpages,
1458                                          pgprot_t mask)
1459 {
1460         return change_page_attr_set_clr(NULL, numpages, __pgprot(0), mask, 0,
1461                 CPA_PAGES_ARRAY, pages);
1462 }
1463
1464 int _set_memory_uc(unsigned long addr, int numpages)
1465 {
1466         /*
1467          * for now UC MINUS. see comments in ioremap_nocache()
1468          * If you really need strong UC use ioremap_uc(), but note
1469          * that you cannot override IO areas with set_memory_*() as
1470          * these helpers cannot work with IO memory.
1471          */
1472         return change_page_attr_set(&addr, numpages,
1473                                     cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS),
1474                                     0);
1475 }
1476
1477 int set_memory_uc(unsigned long addr, int numpages)
1478 {
1479         int ret;
1480
1481         /*
1482          * for now UC MINUS. see comments in ioremap_nocache()
1483          */
1484         ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
1485                               _PAGE_CACHE_MODE_UC_MINUS, NULL);
1486         if (ret)
1487                 goto out_err;
1488
1489         ret = _set_memory_uc(addr, numpages);
1490         if (ret)
1491                 goto out_free;
1492
1493         return 0;
1494
1495 out_free:
1496         free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1497 out_err:
1498         return ret;
1499 }
1500 EXPORT_SYMBOL(set_memory_uc);
1501
1502 static int _set_memory_array(unsigned long *addr, int addrinarray,
1503                 enum page_cache_mode new_type)
1504 {
1505         int i, j;
1506         int ret;
1507
1508         /*
1509          * for now UC MINUS. see comments in ioremap_nocache()
1510          */
1511         for (i = 0; i < addrinarray; i++) {
1512                 ret = reserve_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE,
1513                                         new_type, NULL);
1514                 if (ret)
1515                         goto out_free;
1516         }
1517
1518         ret = change_page_attr_set(addr, addrinarray,
1519                                    cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS),
1520                                    1);
1521
1522         if (!ret && new_type == _PAGE_CACHE_MODE_WC)
1523                 ret = change_page_attr_set_clr(addr, addrinarray,
1524                                                cachemode2pgprot(
1525                                                 _PAGE_CACHE_MODE_WC),
1526                                                __pgprot(_PAGE_CACHE_MASK),
1527                                                0, CPA_ARRAY, NULL);
1528         if (ret)
1529                 goto out_free;
1530
1531         return 0;
1532
1533 out_free:
1534         for (j = 0; j < i; j++)
1535                 free_memtype(__pa(addr[j]), __pa(addr[j]) + PAGE_SIZE);
1536
1537         return ret;
1538 }
1539
1540 int set_memory_array_uc(unsigned long *addr, int addrinarray)
1541 {
1542         return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_UC_MINUS);
1543 }
1544 EXPORT_SYMBOL(set_memory_array_uc);
1545
1546 int set_memory_array_wc(unsigned long *addr, int addrinarray)
1547 {
1548         return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_WC);
1549 }
1550 EXPORT_SYMBOL(set_memory_array_wc);
1551
1552 int _set_memory_wc(unsigned long addr, int numpages)
1553 {
1554         int ret;
1555         unsigned long addr_copy = addr;
1556
1557         ret = change_page_attr_set(&addr, numpages,
1558                                    cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS),
1559                                    0);
1560         if (!ret) {
1561                 ret = change_page_attr_set_clr(&addr_copy, numpages,
1562                                                cachemode2pgprot(
1563                                                 _PAGE_CACHE_MODE_WC),
1564                                                __pgprot(_PAGE_CACHE_MASK),
1565                                                0, 0, NULL);
1566         }
1567         return ret;
1568 }
1569
1570 int set_memory_wc(unsigned long addr, int numpages)
1571 {
1572         int ret;
1573
1574         if (!pat_enabled())
1575                 return set_memory_uc(addr, numpages);
1576
1577         ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
1578                 _PAGE_CACHE_MODE_WC, NULL);
1579         if (ret)
1580                 goto out_err;
1581
1582         ret = _set_memory_wc(addr, numpages);
1583         if (ret)
1584                 goto out_free;
1585
1586         return 0;
1587
1588 out_free:
1589         free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1590 out_err:
1591         return ret;
1592 }
1593 EXPORT_SYMBOL(set_memory_wc);
1594
1595 int _set_memory_wb(unsigned long addr, int numpages)
1596 {
1597         /* WB cache mode is hard wired to all cache attribute bits being 0 */
1598         return change_page_attr_clear(&addr, numpages,
1599                                       __pgprot(_PAGE_CACHE_MASK), 0);
1600 }
1601
1602 int set_memory_wb(unsigned long addr, int numpages)
1603 {
1604         int ret;
1605
1606         ret = _set_memory_wb(addr, numpages);
1607         if (ret)
1608                 return ret;
1609
1610         free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1611         return 0;
1612 }
1613 EXPORT_SYMBOL(set_memory_wb);
1614
1615 int set_memory_array_wb(unsigned long *addr, int addrinarray)
1616 {
1617         int i;
1618         int ret;
1619
1620         /* WB cache mode is hard wired to all cache attribute bits being 0 */
1621         ret = change_page_attr_clear(addr, addrinarray,
1622                                       __pgprot(_PAGE_CACHE_MASK), 1);
1623         if (ret)
1624                 return ret;
1625
1626         for (i = 0; i < addrinarray; i++)
1627                 free_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE);
1628
1629         return 0;
1630 }
1631 EXPORT_SYMBOL(set_memory_array_wb);
1632
1633 int set_memory_x(unsigned long addr, int numpages)
1634 {
1635         if (!(__supported_pte_mask & _PAGE_NX))
1636                 return 0;
1637
1638         return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_NX), 0);
1639 }
1640 EXPORT_SYMBOL(set_memory_x);
1641
1642 int set_memory_nx(unsigned long addr, int numpages)
1643 {
1644         if (!(__supported_pte_mask & _PAGE_NX))
1645                 return 0;
1646
1647         return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_NX), 0);
1648 }
1649 EXPORT_SYMBOL(set_memory_nx);
1650
1651 int set_memory_ro(unsigned long addr, int numpages)
1652 {
1653         return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_RW), 0);
1654 }
1655
1656 int set_memory_rw(unsigned long addr, int numpages)
1657 {
1658         return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_RW), 0);
1659 }
1660
1661 int set_memory_np(unsigned long addr, int numpages)
1662 {
1663         return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_PRESENT), 0);
1664 }
1665
1666 int set_memory_4k(unsigned long addr, int numpages)
1667 {
1668         return change_page_attr_set_clr(&addr, numpages, __pgprot(0),
1669                                         __pgprot(0), 1, 0, NULL);
1670 }
1671
1672 int set_pages_uc(struct page *page, int numpages)
1673 {
1674         unsigned long addr = (unsigned long)page_address(page);
1675
1676         return set_memory_uc(addr, numpages);
1677 }
1678 EXPORT_SYMBOL(set_pages_uc);
1679
1680 static int _set_pages_array(struct page **pages, int addrinarray,
1681                 enum page_cache_mode new_type)
1682 {
1683         unsigned long start;
1684         unsigned long end;
1685         int i;
1686         int free_idx;
1687         int ret;
1688
1689         for (i = 0; i < addrinarray; i++) {
1690                 if (PageHighMem(pages[i]))
1691                         continue;
1692                 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
1693                 end = start + PAGE_SIZE;
1694                 if (reserve_memtype(start, end, new_type, NULL))
1695                         goto err_out;
1696         }
1697
1698         ret = cpa_set_pages_array(pages, addrinarray,
1699                         cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS));
1700         if (!ret && new_type == _PAGE_CACHE_MODE_WC)
1701                 ret = change_page_attr_set_clr(NULL, addrinarray,
1702                                                cachemode2pgprot(
1703                                                 _PAGE_CACHE_MODE_WC),
1704                                                __pgprot(_PAGE_CACHE_MASK),
1705                                                0, CPA_PAGES_ARRAY, pages);
1706         if (ret)
1707                 goto err_out;
1708         return 0; /* Success */
1709 err_out:
1710         free_idx = i;
1711         for (i = 0; i < free_idx; i++) {
1712                 if (PageHighMem(pages[i]))
1713                         continue;
1714                 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
1715                 end = start + PAGE_SIZE;
1716                 free_memtype(start, end);
1717         }
1718         return -EINVAL;
1719 }
1720
1721 int set_pages_array_uc(struct page **pages, int addrinarray)
1722 {
1723         return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_UC_MINUS);
1724 }
1725 EXPORT_SYMBOL(set_pages_array_uc);
1726
1727 int set_pages_array_wc(struct page **pages, int addrinarray)
1728 {
1729         return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_WC);
1730 }
1731 EXPORT_SYMBOL(set_pages_array_wc);
1732
1733 int set_pages_wb(struct page *page, int numpages)
1734 {
1735         unsigned long addr = (unsigned long)page_address(page);
1736
1737         return set_memory_wb(addr, numpages);
1738 }
1739 EXPORT_SYMBOL(set_pages_wb);
1740
1741 int set_pages_array_wb(struct page **pages, int addrinarray)
1742 {
1743         int retval;
1744         unsigned long start;
1745         unsigned long end;
1746         int i;
1747
1748         /* WB cache mode is hard wired to all cache attribute bits being 0 */
1749         retval = cpa_clear_pages_array(pages, addrinarray,
1750                         __pgprot(_PAGE_CACHE_MASK));
1751         if (retval)
1752                 return retval;
1753
1754         for (i = 0; i < addrinarray; i++) {
1755                 if (PageHighMem(pages[i]))
1756                         continue;
1757                 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
1758                 end = start + PAGE_SIZE;
1759                 free_memtype(start, end);
1760         }
1761
1762         return 0;
1763 }
1764 EXPORT_SYMBOL(set_pages_array_wb);
1765
1766 int set_pages_x(struct page *page, int numpages)
1767 {
1768         unsigned long addr = (unsigned long)page_address(page);
1769
1770         return set_memory_x(addr, numpages);
1771 }
1772 EXPORT_SYMBOL(set_pages_x);
1773
1774 int set_pages_nx(struct page *page, int numpages)
1775 {
1776         unsigned long addr = (unsigned long)page_address(page);
1777
1778         return set_memory_nx(addr, numpages);
1779 }
1780 EXPORT_SYMBOL(set_pages_nx);
1781
1782 int set_pages_ro(struct page *page, int numpages)
1783 {
1784         unsigned long addr = (unsigned long)page_address(page);
1785
1786         return set_memory_ro(addr, numpages);
1787 }
1788
1789 int set_pages_rw(struct page *page, int numpages)
1790 {
1791         unsigned long addr = (unsigned long)page_address(page);
1792
1793         return set_memory_rw(addr, numpages);
1794 }
1795
1796 #ifdef CONFIG_DEBUG_PAGEALLOC
1797
1798 static int __set_pages_p(struct page *page, int numpages)
1799 {
1800         unsigned long tempaddr = (unsigned long) page_address(page);
1801         struct cpa_data cpa = { .vaddr = &tempaddr,
1802                                 .pgd = NULL,
1803                                 .numpages = numpages,
1804                                 .mask_set = __pgprot(_PAGE_PRESENT | _PAGE_RW),
1805                                 .mask_clr = __pgprot(0),
1806                                 .flags = 0};
1807
1808         /*
1809          * No alias checking needed for setting present flag. otherwise,
1810          * we may need to break large pages for 64-bit kernel text
1811          * mappings (this adds to complexity if we want to do this from
1812          * atomic context especially). Let's keep it simple!
1813          */
1814         return __change_page_attr_set_clr(&cpa, 0);
1815 }
1816
1817 static int __set_pages_np(struct page *page, int numpages)
1818 {
1819         unsigned long tempaddr = (unsigned long) page_address(page);
1820         struct cpa_data cpa = { .vaddr = &tempaddr,
1821                                 .pgd = NULL,
1822                                 .numpages = numpages,
1823                                 .mask_set = __pgprot(0),
1824                                 .mask_clr = __pgprot(_PAGE_PRESENT | _PAGE_RW),
1825                                 .flags = 0};
1826
1827         /*
1828          * No alias checking needed for setting not present flag. otherwise,
1829          * we may need to break large pages for 64-bit kernel text
1830          * mappings (this adds to complexity if we want to do this from
1831          * atomic context especially). Let's keep it simple!
1832          */
1833         return __change_page_attr_set_clr(&cpa, 0);
1834 }
1835
1836 void __kernel_map_pages(struct page *page, int numpages, int enable)
1837 {
1838         if (PageHighMem(page))
1839                 return;
1840         if (!enable) {
1841                 debug_check_no_locks_freed(page_address(page),
1842                                            numpages * PAGE_SIZE);
1843         }
1844
1845         /*
1846          * The return value is ignored as the calls cannot fail.
1847          * Large pages for identity mappings are not used at boot time
1848          * and hence no memory allocations during large page split.
1849          */
1850         if (enable)
1851                 __set_pages_p(page, numpages);
1852         else
1853                 __set_pages_np(page, numpages);
1854
1855         /*
1856          * We should perform an IPI and flush all tlbs,
1857          * but that can deadlock->flush only current cpu:
1858          */
1859         __flush_tlb_all();
1860
1861         arch_flush_lazy_mmu_mode();
1862 }
1863
1864 #ifdef CONFIG_HIBERNATION
1865
1866 bool kernel_page_present(struct page *page)
1867 {
1868         unsigned int level;
1869         pte_t *pte;
1870
1871         if (PageHighMem(page))
1872                 return false;
1873
1874         pte = lookup_address((unsigned long)page_address(page), &level);
1875         return (pte_val(*pte) & _PAGE_PRESENT);
1876 }
1877
1878 #endif /* CONFIG_HIBERNATION */
1879
1880 #endif /* CONFIG_DEBUG_PAGEALLOC */
1881
1882 int kernel_map_pages_in_pgd(pgd_t *pgd, u64 pfn, unsigned long address,
1883                             unsigned numpages, unsigned long page_flags)
1884 {
1885         int retval = -EINVAL;
1886
1887         struct cpa_data cpa = {
1888                 .vaddr = &address,
1889                 .pfn = pfn,
1890                 .pgd = pgd,
1891                 .numpages = numpages,
1892                 .mask_set = __pgprot(0),
1893                 .mask_clr = __pgprot(0),
1894                 .flags = 0,
1895         };
1896
1897         if (!(__supported_pte_mask & _PAGE_NX))
1898                 goto out;
1899
1900         if (!(page_flags & _PAGE_NX))
1901                 cpa.mask_clr = __pgprot(_PAGE_NX);
1902
1903         cpa.mask_set = __pgprot(_PAGE_PRESENT | page_flags);
1904
1905         retval = __change_page_attr_set_clr(&cpa, 0);
1906         __flush_tlb_all();
1907
1908 out:
1909         return retval;
1910 }
1911
1912 void kernel_unmap_pages_in_pgd(pgd_t *root, unsigned long address,
1913                                unsigned numpages)
1914 {
1915         unmap_pgd_range(root, address, address + (numpages << PAGE_SHIFT));
1916 }
1917
1918 /*
1919  * The testcases use internal knowledge of the implementation that shouldn't
1920  * be exposed to the rest of the kernel. Include these directly here.
1921  */
1922 #ifdef CONFIG_CPA_DEBUG
1923 #include "pageattr-test.c"
1924 #endif