drivers/iio/accel/bmc150-accel.c

   1 /*
   2  * 3-axis accelerometer driver supporting following Bosch-Sensortec chips:
   3  *  - BMC150
   4  *  - BMI055
   5  *  - BMA255
   6  *  - BMA250E
   7  *  - BMA222E
   8  *  - BMA280
   9  *
  10  * Copyright (c) 2014, Intel Corporation.
  11  *
  12  * This program is free software; you can redistribute it and/or modify it
  13  * under the terms and conditions of the GNU General Public License,
  14  * version 2, as published by the Free Software Foundation.
  15  *
  16  * This program is distributed in the hope it will be useful, but WITHOUT
  17  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  18  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  19  * more details.
  20  */
  21
  22 #include <linux/module.h>
  23 #include <linux/i2c.h>
  24 #include <linux/interrupt.h>
  25 #include <linux/delay.h>
  26 #include <linux/slab.h>
  27 #include <linux/acpi.h>
  28 #include <linux/gpio/consumer.h>
  29 #include <linux/pm.h>
  30 #include <linux/pm_runtime.h>
  31 #include <linux/iio/iio.h>
  32 #include <linux/iio/sysfs.h>
  33 #include <linux/iio/buffer.h>
  34 #include <linux/iio/events.h>
  35 #include <linux/iio/trigger.h>
  36 #include <linux/iio/trigger_consumer.h>
  37 #include <linux/iio/triggered_buffer.h>
  38
  39 #define BMC150_ACCEL_DRV_NAME                   "bmc150_accel"
  40 #define BMC150_ACCEL_IRQ_NAME                   "bmc150_accel_event"
  41 #define BMC150_ACCEL_GPIO_NAME                  "bmc150_accel_int"
  42
  43 #define BMC150_ACCEL_REG_CHIP_ID                0x00
  44
  45 #define BMC150_ACCEL_REG_INT_STATUS_2           0x0B
  46 #define BMC150_ACCEL_ANY_MOTION_MASK            0x07
  47 #define BMC150_ACCEL_ANY_MOTION_BIT_SIGN        BIT(3)
  48
  49 #define BMC150_ACCEL_REG_PMU_LPW                0x11
  50 #define BMC150_ACCEL_PMU_MODE_MASK              0xE0
  51 #define BMC150_ACCEL_PMU_MODE_SHIFT             5
  52 #define BMC150_ACCEL_PMU_BIT_SLEEP_DUR_MASK     0x17
  53 #define BMC150_ACCEL_PMU_BIT_SLEEP_DUR_SHIFT    1
  54
  55 #define BMC150_ACCEL_REG_PMU_RANGE              0x0F
  56
  57 #define BMC150_ACCEL_DEF_RANGE_2G               0x03
  58 #define BMC150_ACCEL_DEF_RANGE_4G               0x05
  59 #define BMC150_ACCEL_DEF_RANGE_8G               0x08
  60 #define BMC150_ACCEL_DEF_RANGE_16G              0x0C
  61
  62 /* Default BW: 125Hz */
  63 #define BMC150_ACCEL_REG_PMU_BW         0x10
  64 #define BMC150_ACCEL_DEF_BW                     125
  65
  66 #define BMC150_ACCEL_REG_INT_MAP_0              0x19
  67 #define BMC150_ACCEL_INT_MAP_0_BIT_SLOPE        BIT(2)
  68
  69 #define BMC150_ACCEL_REG_INT_MAP_1              0x1A
  70 #define BMC150_ACCEL_INT_MAP_1_BIT_DATA BIT(0)
  71
  72 #define BMC150_ACCEL_REG_INT_RST_LATCH          0x21
  73 #define BMC150_ACCEL_INT_MODE_LATCH_RESET       0x80
  74 #define BMC150_ACCEL_INT_MODE_LATCH_INT 0x0F
  75 #define BMC150_ACCEL_INT_MODE_NON_LATCH_INT     0x00
  76
  77 #define BMC150_ACCEL_REG_INT_EN_0               0x16
  78 #define BMC150_ACCEL_INT_EN_BIT_SLP_X           BIT(0)
  79 #define BMC150_ACCEL_INT_EN_BIT_SLP_Y           BIT(1)
  80 #define BMC150_ACCEL_INT_EN_BIT_SLP_Z           BIT(2)
  81
  82 #define BMC150_ACCEL_REG_INT_EN_1               0x17
  83 #define BMC150_ACCEL_INT_EN_BIT_DATA_EN BIT(4)
  84
  85 #define BMC150_ACCEL_REG_INT_OUT_CTRL           0x20
  86 #define BMC150_ACCEL_INT_OUT_CTRL_INT1_LVL      BIT(0)
  87
  88 #define BMC150_ACCEL_REG_INT_5                  0x27
  89 #define BMC150_ACCEL_SLOPE_DUR_MASK             0x03
  90
  91 #define BMC150_ACCEL_REG_INT_6                  0x28
  92 #define BMC150_ACCEL_SLOPE_THRES_MASK           0xFF
  93
  94 /* Slope duration in terms of number of samples */
  95 #define BMC150_ACCEL_DEF_SLOPE_DURATION 2
  96 /* in terms of multiples of g's/LSB, based on range */
  97 #define BMC150_ACCEL_DEF_SLOPE_THRESHOLD        5
  98
  99 #define BMC150_ACCEL_REG_XOUT_L         0x02
 100
 101 #define BMC150_ACCEL_MAX_STARTUP_TIME_MS        100
 102
 103 /* Sleep Duration values */
 104 #define BMC150_ACCEL_SLEEP_500_MICRO            0x05
 105 #define BMC150_ACCEL_SLEEP_1_MS         0x06
 106 #define BMC150_ACCEL_SLEEP_2_MS         0x07
 107 #define BMC150_ACCEL_SLEEP_4_MS         0x08
 108 #define BMC150_ACCEL_SLEEP_6_MS         0x09
 109 #define BMC150_ACCEL_SLEEP_10_MS                0x0A
 110 #define BMC150_ACCEL_SLEEP_25_MS                0x0B
 111 #define BMC150_ACCEL_SLEEP_50_MS                0x0C
 112 #define BMC150_ACCEL_SLEEP_100_MS               0x0D
 113 #define BMC150_ACCEL_SLEEP_500_MS               0x0E
 114 #define BMC150_ACCEL_SLEEP_1_SEC                0x0F
 115
 116 #define BMC150_ACCEL_REG_TEMP                   0x08
 117 #define BMC150_ACCEL_TEMP_CENTER_VAL            24
 118
 119 #define BMC150_ACCEL_AXIS_TO_REG(axis)  (BMC150_ACCEL_REG_XOUT_L + (axis * 2))
 120 #define BMC150_AUTO_SUSPEND_DELAY_MS            2000
 121
 122 enum bmc150_accel_axis {
 123         AXIS_X,
 124         AXIS_Y,
 125         AXIS_Z,
 126 };
 127
 128 enum bmc150_power_modes {
 129         BMC150_ACCEL_SLEEP_MODE_NORMAL,
 130         BMC150_ACCEL_SLEEP_MODE_DEEP_SUSPEND,
 131         BMC150_ACCEL_SLEEP_MODE_LPM,
 132         BMC150_ACCEL_SLEEP_MODE_SUSPEND = 0x04,
 133 };
 134
 135 struct bmc150_scale_info {
 136         int scale;
 137         u8 reg_range;
 138 };
 139
 140 struct bmc150_accel_chip_info {
 141         u8 chip_id;
 142         const struct iio_chan_spec *channels;
 143         int num_channels;
 144         const struct bmc150_scale_info scale_table[4];
 145 };
 146
 147 struct bmc150_accel_data {
 148         struct i2c_client *client;
 149         struct iio_trigger *dready_trig;
 150         struct iio_trigger *motion_trig;
 151         struct mutex mutex;
 152         s16 buffer[8];
 153         u8 bw_bits;
 154         u32 slope_dur;
 155         u32 slope_thres;
 156         u32 range;
 157         int ev_enable_state;
 158         bool dready_trigger_on;
 159         bool motion_trigger_on;
 160         int64_t timestamp;
 161         const struct bmc150_accel_chip_info *chip_info;
 162 };
 163
 164 static const struct {
 165         int val;
 166         int val2;
 167         u8 bw_bits;
 168 } bmc150_accel_samp_freq_table[] = { {7, 810000, 0x08},
 169                                      {15, 630000, 0x09},
 170                                      {31, 250000, 0x0A},
 171                                      {62, 500000, 0x0B},
 172                                      {125, 0, 0x0C},
 173                                      {250, 0, 0x0D},
 174                                      {500, 0, 0x0E},
 175                                      {1000, 0, 0x0F} };
 176
 177 static const struct {
 178         int bw_bits;
 179         int msec;
 180 } bmc150_accel_sample_upd_time[] = { {0x08, 64},
 181                                      {0x09, 32},
 182                                      {0x0A, 16},
 183                                      {0x0B, 8},
 184                                      {0x0C, 4},
 185                                      {0x0D, 2},
 186                                      {0x0E, 1},
 187                                      {0x0F, 1} };
 188
 189 static const struct {
 190         int sleep_dur;
 191         u8 reg_value;
 192 } bmc150_accel_sleep_value_table[] = { {0, 0},
 193                                        {500, BMC150_ACCEL_SLEEP_500_MICRO},
 194                                        {1000, BMC150_ACCEL_SLEEP_1_MS},
 195                                        {2000, BMC150_ACCEL_SLEEP_2_MS},
 196                                        {4000, BMC150_ACCEL_SLEEP_4_MS},
 197                                        {6000, BMC150_ACCEL_SLEEP_6_MS},
 198                                        {10000, BMC150_ACCEL_SLEEP_10_MS},
 199                                        {25000, BMC150_ACCEL_SLEEP_25_MS},
 200                                        {50000, BMC150_ACCEL_SLEEP_50_MS},
 201                                        {100000, BMC150_ACCEL_SLEEP_100_MS},
 202                                        {500000, BMC150_ACCEL_SLEEP_500_MS},
 203                                        {1000000, BMC150_ACCEL_SLEEP_1_SEC} };
 204
 205
 206 static int bmc150_accel_set_mode(struct bmc150_accel_data *data,
 207                                  enum bmc150_power_modes mode,
 208                                  int dur_us)
 209 {
 210         int i;
 211         int ret;
 212         u8 lpw_bits;
 213         int dur_val = -1;
 214
 215         if (dur_us > 0) {
 216                 for (i = 0; i < ARRAY_SIZE(bmc150_accel_sleep_value_table);
 217                                                                          ++i) {
 218                         if (bmc150_accel_sleep_value_table[i].sleep_dur ==
 219                                                                         dur_us)
 220                                 dur_val =
 221                                 bmc150_accel_sleep_value_table[i].reg_value;
 222                 }
 223         } else
 224                 dur_val = 0;
 225
 226         if (dur_val < 0)
 227                 return -EINVAL;
 228
 229         lpw_bits = mode << BMC150_ACCEL_PMU_MODE_SHIFT;
 230         lpw_bits |= (dur_val << BMC150_ACCEL_PMU_BIT_SLEEP_DUR_SHIFT);
 231
 232         dev_dbg(&data->client->dev, "Set Mode bits %x\n", lpw_bits);
 233
 234         ret = i2c_smbus_write_byte_data(data->client,
 235                                         BMC150_ACCEL_REG_PMU_LPW, lpw_bits);
 236         if (ret < 0) {
 237                 dev_err(&data->client->dev, "Error writing reg_pmu_lpw\n");
 238                 return ret;
 239         }
 240
 241         return 0;
 242 }
 243
 244 static int bmc150_accel_set_bw(struct bmc150_accel_data *data, int val,
 245                                int val2)
 246 {
 247         int i;
 248         int ret;
 249
 250         for (i = 0; i < ARRAY_SIZE(bmc150_accel_samp_freq_table); ++i) {
 251                 if (bmc150_accel_samp_freq_table[i].val == val &&
 252                                 bmc150_accel_samp_freq_table[i].val2 == val2) {
 253                         ret = i2c_smbus_write_byte_data(
 254                                 data->client,
 255                                 BMC150_ACCEL_REG_PMU_BW,
 256                                 bmc150_accel_samp_freq_table[i].bw_bits);
 257                         if (ret < 0)
 258                                 return ret;
 259
 260                         data->bw_bits =
 261                                 bmc150_accel_samp_freq_table[i].bw_bits;
 262                         return 0;
 263                 }
 264         }
 265
 266         return -EINVAL;
 267 }
 268
 269 static int bmc150_accel_chip_init(struct bmc150_accel_data *data)
 270 {
 271         int ret;
 272
 273         ret = i2c_smbus_read_byte_data(data->client, BMC150_ACCEL_REG_CHIP_ID);
 274         if (ret < 0) {
 275                 dev_err(&data->client->dev,
 276                         "Error: Reading chip id\n");
 277                 return ret;
 278         }
 279
 280         dev_dbg(&data->client->dev, "Chip Id %x\n", ret);
 281         if (ret != data->chip_info->chip_id) {
 282                 dev_err(&data->client->dev, "Invalid chip %x\n", ret);
 283                 return -ENODEV;
 284         }
 285
 286         ret = bmc150_accel_set_mode(data, BMC150_ACCEL_SLEEP_MODE_NORMAL, 0);
 287         if (ret < 0)
 288                 return ret;
 289
 290         /* Set Bandwidth */
 291         ret = bmc150_accel_set_bw(data, BMC150_ACCEL_DEF_BW, 0);
 292         if (ret < 0)
 293                 return ret;
 294
 295         /* Set Default Range */
 296         ret = i2c_smbus_write_byte_data(data->client,
 297                                         BMC150_ACCEL_REG_PMU_RANGE,
 298                                         BMC150_ACCEL_DEF_RANGE_4G);
 299         if (ret < 0) {
 300                 dev_err(&data->client->dev,
 301                                         "Error writing reg_pmu_range\n");
 302                 return ret;
 303         }
 304
 305         data->range = BMC150_ACCEL_DEF_RANGE_4G;
 306
 307         /* Set default slope duration */
 308         ret = i2c_smbus_read_byte_data(data->client, BMC150_ACCEL_REG_INT_5);
 309         if (ret < 0) {
 310                 dev_err(&data->client->dev, "Error reading reg_int_5\n");
 311                 return ret;
 312         }
 313         data->slope_dur |= BMC150_ACCEL_DEF_SLOPE_DURATION;
 314         ret = i2c_smbus_write_byte_data(data->client,
 315                                         BMC150_ACCEL_REG_INT_5,
 316                                         data->slope_dur);
 317         if (ret < 0) {
 318                 dev_err(&data->client->dev, "Error writing reg_int_5\n");
 319                 return ret;
 320         }
 321         dev_dbg(&data->client->dev, "slope_dur %x\n", data->slope_dur);
 322
 323         /* Set default slope thresholds */
 324         ret = i2c_smbus_write_byte_data(data->client,
 325                                         BMC150_ACCEL_REG_INT_6,
 326                                         BMC150_ACCEL_DEF_SLOPE_THRESHOLD);
 327         if (ret < 0) {
 328                 dev_err(&data->client->dev, "Error writing reg_int_6\n");
 329                 return ret;
 330         }
 331         data->slope_thres = BMC150_ACCEL_DEF_SLOPE_THRESHOLD;
 332         dev_dbg(&data->client->dev, "slope_thres %x\n", data->slope_thres);
 333
 334         /* Set default as latched interrupts */
 335         ret = i2c_smbus_write_byte_data(data->client,
 336                                         BMC150_ACCEL_REG_INT_RST_LATCH,
 337                                         BMC150_ACCEL_INT_MODE_LATCH_INT |
 338                                         BMC150_ACCEL_INT_MODE_LATCH_RESET);
 339         if (ret < 0) {
 340                 dev_err(&data->client->dev,
 341                         "Error writing reg_int_rst_latch\n");
 342                 return ret;
 343         }
 344
 345         return 0;
 346 }
 347
 348 static int bmc150_accel_setup_any_motion_interrupt(
 349                                         struct bmc150_accel_data *data,
 350                                         bool status)
 351 {
 352         int ret;
 353
 354         /* Enable/Disable INT1 mapping */
 355         ret = i2c_smbus_read_byte_data(data->client,
 356                                        BMC150_ACCEL_REG_INT_MAP_0);
 357         if (ret < 0) {
 358                 dev_err(&data->client->dev, "Error reading reg_int_map_0\n");
 359                 return ret;
 360         }
 361         if (status)
 362                 ret |= BMC150_ACCEL_INT_MAP_0_BIT_SLOPE;
 363         else
 364                 ret &= ~BMC150_ACCEL_INT_MAP_0_BIT_SLOPE;
 365
 366         ret = i2c_smbus_write_byte_data(data->client,
 367                                         BMC150_ACCEL_REG_INT_MAP_0,
 368                                         ret);
 369         if (ret < 0) {
 370                 dev_err(&data->client->dev, "Error writing reg_int_map_0\n");
 371                 return ret;
 372         }
 373
 374         if (status) {
 375                 /* Set slope duration (no of samples) */
 376                 ret = i2c_smbus_write_byte_data(data->client,
 377                                                 BMC150_ACCEL_REG_INT_5,
 378                                                 data->slope_dur);
 379                 if (ret < 0) {
 380                         dev_err(&data->client->dev, "Error write reg_int_5\n");
 381                         return ret;
 382                 }
 383
 384                 /* Set slope thresholds */
 385                 ret = i2c_smbus_write_byte_data(data->client,
 386                                                 BMC150_ACCEL_REG_INT_6,
 387                                                 data->slope_thres);
 388                 if (ret < 0) {
 389                         dev_err(&data->client->dev, "Error write reg_int_6\n");
 390                         return ret;
 391                 }
 392
 393                 /*
 394                  * New data interrupt is always non-latched,
 395                  * which will have higher priority, so no need
 396                  * to set latched mode, we will be flooded anyway with INTR
 397                  */
 398                 if (!data->dready_trigger_on) {
 399                         ret = i2c_smbus_write_byte_data(data->client,
 400                                         BMC150_ACCEL_REG_INT_RST_LATCH,
 401                                         BMC150_ACCEL_INT_MODE_LATCH_INT |
 402                                         BMC150_ACCEL_INT_MODE_LATCH_RESET);
 403                         if (ret < 0) {
 404                                 dev_err(&data->client->dev,
 405                                         "Error writing reg_int_rst_latch\n");
 406                                 return ret;
 407                         }
 408                 }
 409
 410                 ret = i2c_smbus_write_byte_data(data->client,
 411                                                 BMC150_ACCEL_REG_INT_EN_0,
 412                                                 BMC150_ACCEL_INT_EN_BIT_SLP_X |
 413                                                 BMC150_ACCEL_INT_EN_BIT_SLP_Y |
 414                                                 BMC150_ACCEL_INT_EN_BIT_SLP_Z);
 415         } else
 416                 ret = i2c_smbus_write_byte_data(data->client,
 417                                                 BMC150_ACCEL_REG_INT_EN_0,
 418                                                 0);
 419
 420         if (ret < 0) {
 421                 dev_err(&data->client->dev, "Error writing reg_int_en_0\n");
 422                 return ret;
 423         }
 424
 425         return 0;
 426 }
 427
 428 static int bmc150_accel_setup_new_data_interrupt(struct bmc150_accel_data *data,
 429                                            bool status)
 430 {
 431         int ret;
 432
 433         /* Enable/Disable INT1 mapping */
 434         ret = i2c_smbus_read_byte_data(data->client,
 435                                        BMC150_ACCEL_REG_INT_MAP_1);
 436         if (ret < 0) {
 437                 dev_err(&data->client->dev, "Error reading reg_int_map_1\n");
 438                 return ret;
 439         }
 440         if (status)
 441                 ret |= BMC150_ACCEL_INT_MAP_1_BIT_DATA;
 442         else
 443                 ret &= ~BMC150_ACCEL_INT_MAP_1_BIT_DATA;
 444
 445         ret = i2c_smbus_write_byte_data(data->client,
 446                                         BMC150_ACCEL_REG_INT_MAP_1,
 447                                         ret);
 448         if (ret < 0) {
 449                 dev_err(&data->client->dev, "Error writing reg_int_map_1\n");
 450                 return ret;
 451         }
 452
 453         if (status) {
 454                 /*
 455                  * Set non latched mode interrupt and clear any latched
 456                  * interrupt
 457                  */
 458                 ret = i2c_smbus_write_byte_data(data->client,
 459                                         BMC150_ACCEL_REG_INT_RST_LATCH,
 460                                         BMC150_ACCEL_INT_MODE_NON_LATCH_INT |
 461                                         BMC150_ACCEL_INT_MODE_LATCH_RESET);
 462                 if (ret < 0) {
 463                         dev_err(&data->client->dev,
 464                                 "Error writing reg_int_rst_latch\n");
 465                         return ret;
 466                 }
 467
 468                 ret = i2c_smbus_write_byte_data(data->client,
 469                                         BMC150_ACCEL_REG_INT_EN_1,
 470                                         BMC150_ACCEL_INT_EN_BIT_DATA_EN);
 471
 472         } else {
 473                 /* Restore default interrupt mode */
 474                 ret = i2c_smbus_write_byte_data(data->client,
 475                                         BMC150_ACCEL_REG_INT_RST_LATCH,
 476                                         BMC150_ACCEL_INT_MODE_LATCH_INT |
 477                                         BMC150_ACCEL_INT_MODE_LATCH_RESET);
 478                 if (ret < 0) {
 479                         dev_err(&data->client->dev,
 480                                 "Error writing reg_int_rst_latch\n");
 481                         return ret;
 482                 }
 483
 484                 ret = i2c_smbus_write_byte_data(data->client,
 485                                                 BMC150_ACCEL_REG_INT_EN_1,
 486                                                 0);
 487         }
 488
 489         if (ret < 0) {
 490                 dev_err(&data->client->dev, "Error writing reg_int_en_1\n");
 491                 return ret;
 492         }
 493
 494         return 0;
 495 }
 496
 497 static int bmc150_accel_get_bw(struct bmc150_accel_data *data, int *val,
 498                                int *val2)
 499 {
 500         int i;
 501
 502         for (i = 0; i < ARRAY_SIZE(bmc150_accel_samp_freq_table); ++i) {
 503                 if (bmc150_accel_samp_freq_table[i].bw_bits == data->bw_bits) {
 504                         *val = bmc150_accel_samp_freq_table[i].val;
 505                         *val2 = bmc150_accel_samp_freq_table[i].val2;
 506                         return IIO_VAL_INT_PLUS_MICRO;
 507                 }
 508         }
 509
 510         return -EINVAL;
 511 }
 512
 513 #ifdef CONFIG_PM_RUNTIME
 514 static int bmc150_accel_get_startup_times(struct bmc150_accel_data *data)
 515 {
 516         int i;
 517
 518         for (i = 0; i < ARRAY_SIZE(bmc150_accel_sample_upd_time); ++i) {
 519                 if (bmc150_accel_sample_upd_time[i].bw_bits == data->bw_bits)
 520                         return bmc150_accel_sample_upd_time[i].msec;
 521         }
 522
 523         return BMC150_ACCEL_MAX_STARTUP_TIME_MS;
 524 }
 525
 526 static int bmc150_accel_set_power_state(struct bmc150_accel_data *data, bool on)
 527 {
 528         int ret;
 529
 530         if (on)
 531                 ret = pm_runtime_get_sync(&data->client->dev);
 532         else {
 533                 pm_runtime_mark_last_busy(&data->client->dev);
 534                 ret = pm_runtime_put_autosuspend(&data->client->dev);
 535         }
 536         if (ret < 0) {
 537                 dev_err(&data->client->dev,
 538                         "Failed: bmc150_accel_set_power_state for %d\n", on);
 539                 return ret;
 540         }
 541
 542         return 0;
 543 }
 544 #else
 545 static int bmc150_accel_set_power_state(struct bmc150_accel_data *data, bool on)
 546 {
 547         return 0;
 548 }
 549 #endif
 550
 551 static int bmc150_accel_set_scale(struct bmc150_accel_data *data, int val)
 552 {
 553         int ret, i;
 554
 555         for (i = 0; i < ARRAY_SIZE(data->chip_info->scale_table); ++i) {
 556                 if (data->chip_info->scale_table[i].scale == val) {
 557                         ret = i2c_smbus_write_byte_data(
 558                                      data->client,
 559                                      BMC150_ACCEL_REG_PMU_RANGE,
 560                                      data->chip_info->scale_table[i].reg_range);
 561                         if (ret < 0) {
 562                                 dev_err(&data->client->dev,
 563                                         "Error writing pmu_range\n");
 564                                 return ret;
 565                         }
 566
 567                         data->range = data->chip_info->scale_table[i].reg_range;
 568                         return 0;
 569                 }
 570         }
 571
 572         return -EINVAL;
 573 }
 574
 575 static int bmc150_accel_get_temp(struct bmc150_accel_data *data, int *val)
 576 {
 577         int ret;
 578
 579         mutex_lock(&data->mutex);
 580
 581         ret = i2c_smbus_read_byte_data(data->client, BMC150_ACCEL_REG_TEMP);
 582         if (ret < 0) {
 583                 dev_err(&data->client->dev, "Error reading reg_temp\n");
 584                 mutex_unlock(&data->mutex);
 585                 return ret;
 586         }
 587         *val = sign_extend32(ret, 7);
 588
 589         mutex_unlock(&data->mutex);
 590
 591         return IIO_VAL_INT;
 592 }
 593
 594 static int bmc150_accel_get_axis(struct bmc150_accel_data *data,
 595                                  struct iio_chan_spec const *chan,
 596                                  int *val)
 597 {
 598         int ret;
 599         int axis = chan->scan_index;
 600
 601         mutex_lock(&data->mutex);
 602         ret = bmc150_accel_set_power_state(data, true);
 603         if (ret < 0) {
 604                 mutex_unlock(&data->mutex);
 605                 return ret;
 606         }
 607
 608         ret = i2c_smbus_read_word_data(data->client,
 609                                        BMC150_ACCEL_AXIS_TO_REG(axis));
 610         if (ret < 0) {
 611                 dev_err(&data->client->dev, "Error reading axis %d\n", axis);
 612                 bmc150_accel_set_power_state(data, false);
 613                 mutex_unlock(&data->mutex);
 614                 return ret;
 615         }
 616         *val = sign_extend32(ret >> chan->scan_type.shift,
 617                              chan->scan_type.realbits - 1);
 618         ret = bmc150_accel_set_power_state(data, false);
 619         mutex_unlock(&data->mutex);
 620         if (ret < 0)
 621                 return ret;
 622
 623         return IIO_VAL_INT;
 624 }
 625
 626 static int bmc150_accel_read_raw(struct iio_dev *indio_dev,
 627                                  struct iio_chan_spec const *chan,
 628                                  int *val, int *val2, long mask)
 629 {
 630         struct bmc150_accel_data *data = iio_priv(indio_dev);
 631         int ret;
 632
 633         switch (mask) {
 634         case IIO_CHAN_INFO_RAW:
 635                 switch (chan->type) {
 636                 case IIO_TEMP:
 637                         return bmc150_accel_get_temp(data, val);
 638                 case IIO_ACCEL:
 639                         if (iio_buffer_enabled(indio_dev))
 640                                 return -EBUSY;
 641                         else
 642                                 return bmc150_accel_get_axis(data, chan, val);
 643                 default:
 644                         return -EINVAL;
 645                 }
 646         case IIO_CHAN_INFO_OFFSET:
 647                 if (chan->type == IIO_TEMP) {
 648                         *val = BMC150_ACCEL_TEMP_CENTER_VAL;
 649                         return IIO_VAL_INT;
 650                 } else
 651                         return -EINVAL;
 652         case IIO_CHAN_INFO_SCALE:
 653                 *val = 0;
 654                 switch (chan->type) {
 655                 case IIO_TEMP:
 656                         *val2 = 500000;
 657                         return IIO_VAL_INT_PLUS_MICRO;
 658                 case IIO_ACCEL:
 659                 {
 660                         int i;
 661                         const struct bmc150_scale_info *si;
 662                         int st_size = ARRAY_SIZE(data->chip_info->scale_table);
 663
 664                         for (i = 0; i < st_size; ++i) {
 665                                 si = &data->chip_info->scale_table[i];
 666                                 if (si->reg_range == data->range) {
 667                                         *val2 = si->scale;
 668                                         return IIO_VAL_INT_PLUS_MICRO;
 669                                 }
 670                         }
 671                         return -EINVAL;
 672                 }
 673                 default:
 674                         return -EINVAL;
 675                 }
 676         case IIO_CHAN_INFO_SAMP_FREQ:
 677                 mutex_lock(&data->mutex);
 678                 ret = bmc150_accel_get_bw(data, val, val2);
 679                 mutex_unlock(&data->mutex);
 680                 return ret;
 681         default:
 682                 return -EINVAL;
 683         }
 684 }
 685
 686 static int bmc150_accel_write_raw(struct iio_dev *indio_dev,
 687                                   struct iio_chan_spec const *chan,
 688                                   int val, int val2, long mask)
 689 {
 690         struct bmc150_accel_data *data = iio_priv(indio_dev);
 691         int ret;
 692
 693         switch (mask) {
 694         case IIO_CHAN_INFO_SAMP_FREQ:
 695                 mutex_lock(&data->mutex);
 696                 ret = bmc150_accel_set_bw(data, val, val2);
 697                 mutex_unlock(&data->mutex);
 698                 break;
 699         case IIO_CHAN_INFO_SCALE:
 700                 if (val)
 701                         return -EINVAL;
 702
 703                 mutex_lock(&data->mutex);
 704                 ret = bmc150_accel_set_scale(data, val2);
 705                 mutex_unlock(&data->mutex);
 706                 return ret;
 707         default:
 708                 ret = -EINVAL;
 709         }
 710
 711         return ret;
 712 }
 713
 714 static int bmc150_accel_read_event(struct iio_dev *indio_dev,
 715                                    const struct iio_chan_spec *chan,
 716                                    enum iio_event_type type,
 717                                    enum iio_event_direction dir,
 718                                    enum iio_event_info info,
 719                                    int *val, int *val2)
 720 {
 721         struct bmc150_accel_data *data = iio_priv(indio_dev);
 722
 723         *val2 = 0;
 724         switch (info) {
 725         case IIO_EV_INFO_VALUE:
 726                 *val = data->slope_thres;
 727                 break;
 728         case IIO_EV_INFO_PERIOD:
 729                 *val = data->slope_dur & BMC150_ACCEL_SLOPE_DUR_MASK;
 730                 break;
 731         default:
 732                 return -EINVAL;
 733         }
 734
 735         return IIO_VAL_INT;
 736 }
 737
 738 static int bmc150_accel_write_event(struct iio_dev *indio_dev,
 739                                     const struct iio_chan_spec *chan,
 740                                     enum iio_event_type type,
 741                                     enum iio_event_direction dir,
 742                                     enum iio_event_info info,
 743                                     int val, int val2)
 744 {
 745         struct bmc150_accel_data *data = iio_priv(indio_dev);
 746
 747         if (data->ev_enable_state)
 748                 return -EBUSY;
 749
 750         switch (info) {
 751         case IIO_EV_INFO_VALUE:
 752                 data->slope_thres = val;
 753                 break;
 754         case IIO_EV_INFO_PERIOD:
 755                 data->slope_dur &= ~BMC150_ACCEL_SLOPE_DUR_MASK;
 756                 data->slope_dur |= val & BMC150_ACCEL_SLOPE_DUR_MASK;
 757                 break;
 758         default:
 759                 return -EINVAL;
 760         }
 761
 762         return 0;
 763 }
 764
 765 static int bmc150_accel_read_event_config(struct iio_dev *indio_dev,
 766                                           const struct iio_chan_spec *chan,
 767                                           enum iio_event_type type,
 768                                           enum iio_event_direction dir)
 769 {
 770
 771         struct bmc150_accel_data *data = iio_priv(indio_dev);
 772
 773         return data->ev_enable_state;
 774 }
 775
 776 static int bmc150_accel_write_event_config(struct iio_dev *indio_dev,
 777                                            const struct iio_chan_spec *chan,
 778                                            enum iio_event_type type,
 779                                            enum iio_event_direction dir,
 780                                            int state)
 781 {
 782         struct bmc150_accel_data *data = iio_priv(indio_dev);
 783         int ret;
 784
 785         if (state && data->ev_enable_state)
 786                 return 0;
 787
 788         mutex_lock(&data->mutex);
 789
 790         if (!state && data->motion_trigger_on) {
 791                 data->ev_enable_state = 0;
 792                 mutex_unlock(&data->mutex);
 793                 return 0;
 794         }
 795
 796         /*
 797          * We will expect the enable and disable to do operation in
 798          * in reverse order. This will happen here anyway as our
 799          * resume operation uses sync mode runtime pm calls, the
 800          * suspend operation will be delayed by autosuspend delay
 801          * So the disable operation will still happen in reverse of
 802          * enable operation. When runtime pm is disabled the mode
 803          * is always on so sequence doesn't matter
 804          */
 805
 806         ret = bmc150_accel_set_power_state(data, state);
 807         if (ret < 0) {
 808                 mutex_unlock(&data->mutex);
 809                 return ret;
 810         }
 811
 812         ret =  bmc150_accel_setup_any_motion_interrupt(data, state);
 813         if (ret < 0) {
 814                 mutex_unlock(&data->mutex);
 815                 return ret;
 816         }
 817
 818         data->ev_enable_state = state;
 819         mutex_unlock(&data->mutex);
 820
 821         return 0;
 822 }
 823
 824 static int bmc150_accel_validate_trigger(struct iio_dev *indio_dev,
 825                                    struct iio_trigger *trig)
 826 {
 827         struct bmc150_accel_data *data = iio_priv(indio_dev);
 828
 829         if (data->dready_trig != trig && data->motion_trig != trig)
 830                 return -EINVAL;
 831
 832         return 0;
 833 }
 834
 835 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL(
 836                 "7.810000 15.630000 31.250000 62.500000 125 250 500 1000");
 837
 838 static struct attribute *bmc150_accel_attributes[] = {
 839         &iio_const_attr_sampling_frequency_available.dev_attr.attr,
 840         NULL,
 841 };
 842
 843 static const struct attribute_group bmc150_accel_attrs_group = {
 844         .attrs = bmc150_accel_attributes,
 845 };
 846
 847 static const struct iio_event_spec bmc150_accel_event = {
 848                 .type = IIO_EV_TYPE_ROC,
 849                 .dir = IIO_EV_DIR_RISING | IIO_EV_DIR_FALLING,
 850                 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
 851                                  BIT(IIO_EV_INFO_ENABLE) |
 852                                  BIT(IIO_EV_INFO_PERIOD)
 853 };
 854
 855 #define BMC150_ACCEL_CHANNEL(_axis, bits) {                             \
 856         .type = IIO_ACCEL,                                              \
 857         .modified = 1,                                                  \
 858         .channel2 = IIO_MOD_##_axis,                                    \
 859         .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),                   \
 860         .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) |          \
 861                                 BIT(IIO_CHAN_INFO_SAMP_FREQ),           \
 862         .scan_index = AXIS_##_axis,                                     \
 863         .scan_type = {                                                  \
 864                 .sign = 's',                                            \
 865                 .realbits = (bits),                                     \
 866                 .storagebits = 16,                                      \
 867                 .shift = 16 - (bits),                                   \
 868         },                                                              \
 869         .event_spec = &bmc150_accel_event,                              \
 870         .num_event_specs = 1                                            \
 871 }
 872
 873 #define BMC150_ACCEL_CHANNELS(bits) {                                   \
 874         {                                                               \
 875                 .type = IIO_TEMP,                                       \
 876                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |          \
 877                                       BIT(IIO_CHAN_INFO_SCALE) |        \
 878                                       BIT(IIO_CHAN_INFO_OFFSET),        \
 879                 .scan_index = -1,                                       \
 880         },                                                              \
 881         BMC150_ACCEL_CHANNEL(X, bits),                                  \
 882         BMC150_ACCEL_CHANNEL(Y, bits),                                  \
 883         BMC150_ACCEL_CHANNEL(Z, bits),                                  \
 884         IIO_CHAN_SOFT_TIMESTAMP(3),                                     \
 885 }
 886
 887 static const struct iio_chan_spec bma222e_accel_channels[] =
 888         BMC150_ACCEL_CHANNELS(8);
 889 static const struct iio_chan_spec bma250e_accel_channels[] =
 890         BMC150_ACCEL_CHANNELS(10);
 891 static const struct iio_chan_spec bmc150_accel_channels[] =
 892         BMC150_ACCEL_CHANNELS(12);
 893 static const struct iio_chan_spec bma280_accel_channels[] =
 894         BMC150_ACCEL_CHANNELS(14);
 895
 896 enum {
 897         bmc150,
 898         bmi055,
 899         bma255,
 900         bma250e,
 901         bma222e,
 902         bma280,
 903 };
 904
 905 static const struct bmc150_accel_chip_info bmc150_accel_chip_info_tbl[] = {
 906         [bmc150] = {
 907                 .chip_id = 0xFA,
 908                 .channels = bmc150_accel_channels,
 909                 .num_channels = ARRAY_SIZE(bmc150_accel_channels),
 910                 .scale_table = { {9610, BMC150_ACCEL_DEF_RANGE_2G},
 911                                  {19122, BMC150_ACCEL_DEF_RANGE_4G},
 912                                  {38344, BMC150_ACCEL_DEF_RANGE_8G},
 913                                  {76590, BMC150_ACCEL_DEF_RANGE_16G} },
 914         },
 915         [bmi055] = {
 916                 .chip_id = 0xFA,
 917                 .channels = bmc150_accel_channels,
 918                 .num_channels = ARRAY_SIZE(bmc150_accel_channels),
 919                 .scale_table = { {9610, BMC150_ACCEL_DEF_RANGE_2G},
 920                                  {19122, BMC150_ACCEL_DEF_RANGE_4G},
 921                                  {38344, BMC150_ACCEL_DEF_RANGE_8G},
 922                                  {76590, BMC150_ACCEL_DEF_RANGE_16G} },
 923         },
 924         [bma255] = {
 925                 .chip_id = 0xFA,
 926                 .channels = bmc150_accel_channels,
 927                 .num_channels = ARRAY_SIZE(bmc150_accel_channels),
 928                 .scale_table = { {9610, BMC150_ACCEL_DEF_RANGE_2G},
 929                                  {19122, BMC150_ACCEL_DEF_RANGE_4G},
 930                                  {38344, BMC150_ACCEL_DEF_RANGE_8G},
 931                                  {76590, BMC150_ACCEL_DEF_RANGE_16G} },
 932         },
 933         [bma250e] = {
 934                 .chip_id = 0xF9,
 935                 .channels = bma250e_accel_channels,
 936                 .num_channels = ARRAY_SIZE(bma250e_accel_channels),
 937                 .scale_table = { {38344, BMC150_ACCEL_DEF_RANGE_2G},
 938                                  {76590, BMC150_ACCEL_DEF_RANGE_4G},
 939                                  {153277, BMC150_ACCEL_DEF_RANGE_8G},
 940                                  {306457, BMC150_ACCEL_DEF_RANGE_16G} },
 941         },
 942         [bma222e] = {
 943                 .chip_id = 0xF8,
 944                 .channels = bma222e_accel_channels,
 945                 .num_channels = ARRAY_SIZE(bma222e_accel_channels),
 946                 .scale_table = { {153277, BMC150_ACCEL_DEF_RANGE_2G},
 947                                  {306457, BMC150_ACCEL_DEF_RANGE_4G},
 948                                  {612915, BMC150_ACCEL_DEF_RANGE_8G},
 949                                  {1225831, BMC150_ACCEL_DEF_RANGE_16G} },
 950         },
 951         [bma280] = {
 952                 .chip_id = 0xFB,
 953                 .channels = bma280_accel_channels,
 954                 .num_channels = ARRAY_SIZE(bma280_accel_channels),
 955                 .scale_table = { {2392, BMC150_ACCEL_DEF_RANGE_2G},
 956                                  {4785, BMC150_ACCEL_DEF_RANGE_4G},
 957                                  {9581, BMC150_ACCEL_DEF_RANGE_8G},
 958                                  {19152, BMC150_ACCEL_DEF_RANGE_16G} },
 959         },
 960 };
 961
 962 static const struct iio_info bmc150_accel_info = {
 963         .attrs                  = &bmc150_accel_attrs_group,
 964         .read_raw               = bmc150_accel_read_raw,
 965         .write_raw              = bmc150_accel_write_raw,
 966         .read_event_value       = bmc150_accel_read_event,
 967         .write_event_value      = bmc150_accel_write_event,
 968         .write_event_config     = bmc150_accel_write_event_config,
 969         .read_event_config      = bmc150_accel_read_event_config,
 970         .validate_trigger       = bmc150_accel_validate_trigger,
 971         .driver_module          = THIS_MODULE,
 972 };
 973
 974 static irqreturn_t bmc150_accel_trigger_handler(int irq, void *p)
 975 {
 976         struct iio_poll_func *pf = p;
 977         struct iio_dev *indio_dev = pf->indio_dev;
 978         struct bmc150_accel_data *data = iio_priv(indio_dev);
 979         int bit, ret, i = 0;
 980
 981         mutex_lock(&data->mutex);
 982         for_each_set_bit(bit, indio_dev->buffer->scan_mask,
 983                          indio_dev->masklength) {
 984                 ret = i2c_smbus_read_word_data(data->client,
 985                                                BMC150_ACCEL_AXIS_TO_REG(bit));
 986                 if (ret < 0) {
 987                         mutex_unlock(&data->mutex);
 988                         goto err_read;
 989                 }
 990                 data->buffer[i++] = ret;
 991         }
 992         mutex_unlock(&data->mutex);
 993
 994         iio_push_to_buffers_with_timestamp(indio_dev, data->buffer,
 995                                            data->timestamp);
 996 err_read:
 997         iio_trigger_notify_done(indio_dev->trig);
 998
 999         return IRQ_HANDLED;
1000 }
1001
1002 static int bmc150_accel_trig_try_reen(struct iio_trigger *trig)
1003 {
1004         struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
1005         struct bmc150_accel_data *data = iio_priv(indio_dev);
1006         int ret;
1007
1008         /* new data interrupts don't need ack */
1009         if (data->dready_trigger_on)
1010                 return 0;
1011
1012         mutex_lock(&data->mutex);
1013         /* clear any latched interrupt */
1014         ret = i2c_smbus_write_byte_data(data->client,
1015                                         BMC150_ACCEL_REG_INT_RST_LATCH,
1016                                         BMC150_ACCEL_INT_MODE_LATCH_INT |
1017                                         BMC150_ACCEL_INT_MODE_LATCH_RESET);
1018         mutex_unlock(&data->mutex);
1019         if (ret < 0) {
1020                 dev_err(&data->client->dev,
1021                         "Error writing reg_int_rst_latch\n");
1022                 return ret;
1023         }
1024
1025         return 0;
1026 }
1027
1028 static int bmc150_accel_data_rdy_trigger_set_state(struct iio_trigger *trig,
1029                                                    bool state)
1030 {
1031         struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
1032         struct bmc150_accel_data *data = iio_priv(indio_dev);
1033         int ret;
1034
1035         mutex_lock(&data->mutex);
1036
1037         if (!state && data->ev_enable_state && data->motion_trigger_on) {
1038                 data->motion_trigger_on = false;
1039                 mutex_unlock(&data->mutex);
1040                 return 0;
1041         }
1042
1043         /*
1044          * Refer to comment in bmc150_accel_write_event_config for
1045          * enable/disable operation order
1046          */
1047         ret = bmc150_accel_set_power_state(data, state);
1048         if (ret < 0) {
1049                 mutex_unlock(&data->mutex);
1050                 return ret;
1051         }
1052         if (data->motion_trig == trig)
1053                 ret =  bmc150_accel_setup_any_motion_interrupt(data, state);
1054         else
1055                 ret = bmc150_accel_setup_new_data_interrupt(data, state);
1056         if (ret < 0) {
1057                 mutex_unlock(&data->mutex);
1058                 return ret;
1059         }
1060         if (data->motion_trig == trig)
1061                 data->motion_trigger_on = state;
1062         else
1063                 data->dready_trigger_on = state;
1064
1065         mutex_unlock(&data->mutex);
1066
1067         return ret;
1068 }
1069
1070 static const struct iio_trigger_ops bmc150_accel_trigger_ops = {
1071         .set_trigger_state = bmc150_accel_data_rdy_trigger_set_state,
1072         .try_reenable = bmc150_accel_trig_try_reen,
1073         .owner = THIS_MODULE,
1074 };
1075
1076 static irqreturn_t bmc150_accel_event_handler(int irq, void *private)
1077 {
1078         struct iio_dev *indio_dev = private;
1079         struct bmc150_accel_data *data = iio_priv(indio_dev);
1080         int ret;
1081         int dir;
1082
1083         ret = i2c_smbus_read_byte_data(data->client,
1084                                        BMC150_ACCEL_REG_INT_STATUS_2);
1085         if (ret < 0) {
1086                 dev_err(&data->client->dev, "Error reading reg_int_status_2\n");
1087                 goto ack_intr_status;
1088         }
1089
1090         if (ret & BMC150_ACCEL_ANY_MOTION_BIT_SIGN)
1091                 dir = IIO_EV_DIR_FALLING;
1092         else
1093                 dir = IIO_EV_DIR_RISING;
1094
1095         if (ret & BMC150_ACCEL_ANY_MOTION_MASK)
1096                 iio_push_event(indio_dev, IIO_MOD_EVENT_CODE(IIO_ACCEL,
1097                                                         0,
1098                                                         IIO_MOD_X_OR_Y_OR_Z,
1099                                                         IIO_EV_TYPE_ROC,
1100                                                         IIO_EV_DIR_EITHER),
1101                                                         data->timestamp);
1102 ack_intr_status:
1103         if (!data->dready_trigger_on)
1104                 ret = i2c_smbus_write_byte_data(data->client,
1105                                         BMC150_ACCEL_REG_INT_RST_LATCH,
1106                                         BMC150_ACCEL_INT_MODE_LATCH_INT |
1107                                         BMC150_ACCEL_INT_MODE_LATCH_RESET);
1108
1109         return IRQ_HANDLED;
1110 }
1111
1112 static irqreturn_t bmc150_accel_data_rdy_trig_poll(int irq, void *private)
1113 {
1114         struct iio_dev *indio_dev = private;
1115         struct bmc150_accel_data *data = iio_priv(indio_dev);
1116
1117         data->timestamp = iio_get_time_ns();
1118
1119         if (data->dready_trigger_on)
1120                 iio_trigger_poll(data->dready_trig);
1121         else if (data->motion_trigger_on)
1122                 iio_trigger_poll(data->motion_trig);
1123
1124         if (data->ev_enable_state)
1125                 return IRQ_WAKE_THREAD;
1126         else
1127                 return IRQ_HANDLED;
1128 }
1129
1130 static const char *bmc150_accel_match_acpi_device(struct device *dev, int *data)
1131 {
1132         const struct acpi_device_id *id;
1133
1134         id = acpi_match_device(dev->driver->acpi_match_table, dev);
1135
1136         if (!id)
1137                 return NULL;
1138
1139         *data = (int) id->driver_data;
1140
1141         return dev_name(dev);
1142 }
1143
1144 static int bmc150_accel_gpio_probe(struct i2c_client *client,
1145                                         struct bmc150_accel_data *data)
1146 {
1147         struct device *dev;
1148         struct gpio_desc *gpio;
1149         int ret;
1150
1151         if (!client)
1152                 return -EINVAL;
1153
1154         dev = &client->dev;
1155
1156         /* data ready gpio interrupt pin */
1157         gpio = devm_gpiod_get_index(dev, BMC150_ACCEL_GPIO_NAME, 0);
1158         if (IS_ERR(gpio)) {
1159                 dev_err(dev, "Failed: gpio get index\n");
1160                 return PTR_ERR(gpio);
1161         }
1162
1163         ret = gpiod_direction_input(gpio);
1164         if (ret)
1165                 return ret;
1166
1167         ret = gpiod_to_irq(gpio);
1168
1169         dev_dbg(dev, "GPIO resource, no:%d irq:%d\n", desc_to_gpio(gpio), ret);
1170
1171         return ret;
1172 }
1173
1174 static int bmc150_accel_probe(struct i2c_client *client,
1175                               const struct i2c_device_id *id)
1176 {
1177         struct bmc150_accel_data *data;
1178         struct iio_dev *indio_dev;
1179         int ret;
1180         const char *name = NULL;
1181         int chip_id = 0;
1182
1183         indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
1184         if (!indio_dev)
1185                 return -ENOMEM;
1186
1187         data = iio_priv(indio_dev);
1188         i2c_set_clientdata(client, indio_dev);
1189         data->client = client;
1190
1191         if (id) {
1192                 name = id->name;
1193                 chip_id = id->driver_data;
1194         }
1195
1196         if (ACPI_HANDLE(&client->dev))
1197                 name = bmc150_accel_match_acpi_device(&client->dev, &chip_id);
1198
1199         data->chip_info = &bmc150_accel_chip_info_tbl[chip_id];
1200
1201         ret = bmc150_accel_chip_init(data);
1202         if (ret < 0)
1203                 return ret;
1204
1205         mutex_init(&data->mutex);
1206
1207         indio_dev->dev.parent = &client->dev;
1208         indio_dev->channels = data->chip_info->channels;
1209         indio_dev->num_channels = data->chip_info->num_channels;
1210         indio_dev->name = name;
1211         indio_dev->modes = INDIO_DIRECT_MODE;
1212         indio_dev->info = &bmc150_accel_info;
1213
1214         if (client->irq < 0)
1215                 client->irq = bmc150_accel_gpio_probe(client, data);
1216
1217         if (client->irq >= 0) {
1218                 ret = devm_request_threaded_irq(
1219                                                 &client->dev, client->irq,
1220                                                 bmc150_accel_data_rdy_trig_poll,
1221                                                 bmc150_accel_event_handler,
1222                                                 IRQF_TRIGGER_RISING,
1223                                                 BMC150_ACCEL_IRQ_NAME,
1224                                                 indio_dev);
1225                 if (ret)
1226                         return ret;
1227
1228                 data->dready_trig = devm_iio_trigger_alloc(&client->dev,
1229                                                            "%s-dev%d",
1230                                                            indio_dev->name,
1231                                                            indio_dev->id);
1232                 if (!data->dready_trig)
1233                         return -ENOMEM;
1234
1235                 data->motion_trig = devm_iio_trigger_alloc(&client->dev,
1236                                                           "%s-any-motion-dev%d",
1237                                                           indio_dev->name,
1238                                                           indio_dev->id);
1239                 if (!data->motion_trig)
1240                         return -ENOMEM;
1241
1242                 data->dready_trig->dev.parent = &client->dev;
1243                 data->dready_trig->ops = &bmc150_accel_trigger_ops;
1244                 iio_trigger_set_drvdata(data->dready_trig, indio_dev);
1245                 ret = iio_trigger_register(data->dready_trig);
1246                 if (ret)
1247                         return ret;
1248
1249                 data->motion_trig->dev.parent = &client->dev;
1250                 data->motion_trig->ops = &bmc150_accel_trigger_ops;
1251                 iio_trigger_set_drvdata(data->motion_trig, indio_dev);
1252                 ret = iio_trigger_register(data->motion_trig);
1253                 if (ret) {
1254                         data->motion_trig = NULL;
1255                         goto err_trigger_unregister;
1256                 }
1257
1258                 ret = iio_triggered_buffer_setup(indio_dev,
1259                                                  &iio_pollfunc_store_time,
1260                                                  bmc150_accel_trigger_handler,
1261                                                  NULL);
1262                 if (ret < 0) {
1263                         dev_err(&client->dev,
1264                                 "Failed: iio triggered buffer setup\n");
1265                         goto err_trigger_unregister;
1266                 }
1267         }
1268
1269         ret = iio_device_register(indio_dev);
1270         if (ret < 0) {
1271                 dev_err(&client->dev, "Unable to register iio device\n");
1272                 goto err_buffer_cleanup;
1273         }
1274
1275         ret = pm_runtime_set_active(&client->dev);
1276         if (ret)
1277                 goto err_iio_unregister;
1278
1279         pm_runtime_enable(&client->dev);
1280         pm_runtime_set_autosuspend_delay(&client->dev,
1281                                          BMC150_AUTO_SUSPEND_DELAY_MS);
1282         pm_runtime_use_autosuspend(&client->dev);
1283
1284         return 0;
1285
1286 err_iio_unregister:
1287         iio_device_unregister(indio_dev);
1288 err_buffer_cleanup:
1289         if (data->dready_trig)
1290                 iio_triggered_buffer_cleanup(indio_dev);
1291 err_trigger_unregister:
1292         if (data->dready_trig)
1293                 iio_trigger_unregister(data->dready_trig);
1294         if (data->motion_trig)
1295                 iio_trigger_unregister(data->motion_trig);
1296
1297         return ret;
1298 }
1299
1300 static int bmc150_accel_remove(struct i2c_client *client)
1301 {
1302         struct iio_dev *indio_dev = i2c_get_clientdata(client);
1303         struct bmc150_accel_data *data = iio_priv(indio_dev);
1304
1305         pm_runtime_disable(&client->dev);
1306         pm_runtime_set_suspended(&client->dev);
1307         pm_runtime_put_noidle(&client->dev);
1308
1309         iio_device_unregister(indio_dev);
1310
1311         if (data->dready_trig) {
1312                 iio_triggered_buffer_cleanup(indio_dev);
1313                 iio_trigger_unregister(data->dready_trig);
1314                 iio_trigger_unregister(data->motion_trig);
1315         }
1316
1317         mutex_lock(&data->mutex);
1318         bmc150_accel_set_mode(data, BMC150_ACCEL_SLEEP_MODE_DEEP_SUSPEND, 0);
1319         mutex_unlock(&data->mutex);
1320
1321         return 0;
1322 }
1323
1324 #ifdef CONFIG_PM_SLEEP
1325 static int bmc150_accel_suspend(struct device *dev)
1326 {
1327         struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1328         struct bmc150_accel_data *data = iio_priv(indio_dev);
1329
1330         mutex_lock(&data->mutex);
1331         bmc150_accel_set_mode(data, BMC150_ACCEL_SLEEP_MODE_SUSPEND, 0);
1332         mutex_unlock(&data->mutex);
1333
1334         return 0;
1335 }
1336
1337 static int bmc150_accel_resume(struct device *dev)
1338 {
1339         struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1340         struct bmc150_accel_data *data = iio_priv(indio_dev);
1341
1342         mutex_lock(&data->mutex);
1343         if (data->dready_trigger_on || data->motion_trigger_on ||
1344                                                         data->ev_enable_state)
1345                 bmc150_accel_set_mode(data, BMC150_ACCEL_SLEEP_MODE_NORMAL, 0);
1346         mutex_unlock(&data->mutex);
1347
1348         return 0;
1349 }
1350 #endif
1351
1352 #ifdef CONFIG_PM_RUNTIME
1353 static int bmc150_accel_runtime_suspend(struct device *dev)
1354 {
1355         struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1356         struct bmc150_accel_data *data = iio_priv(indio_dev);
1357
1358         dev_dbg(&data->client->dev,  __func__);
1359
1360         return bmc150_accel_set_mode(data, BMC150_ACCEL_SLEEP_MODE_SUSPEND, 0);
1361 }
1362
1363 static int bmc150_accel_runtime_resume(struct device *dev)
1364 {
1365         struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1366         struct bmc150_accel_data *data = iio_priv(indio_dev);
1367         int ret;
1368         int sleep_val;
1369
1370         dev_dbg(&data->client->dev,  __func__);
1371
1372         ret = bmc150_accel_set_mode(data, BMC150_ACCEL_SLEEP_MODE_NORMAL, 0);
1373         if (ret < 0)
1374                 return ret;
1375
1376         sleep_val = bmc150_accel_get_startup_times(data);
1377         if (sleep_val < 20)
1378                 usleep_range(sleep_val * 1000, 20000);
1379         else
1380                 msleep_interruptible(sleep_val);
1381
1382         return 0;
1383 }
1384 #endif
1385
1386 static const struct dev_pm_ops bmc150_accel_pm_ops = {
1387         SET_SYSTEM_SLEEP_PM_OPS(bmc150_accel_suspend, bmc150_accel_resume)
1388         SET_RUNTIME_PM_OPS(bmc150_accel_runtime_suspend,
1389                            bmc150_accel_runtime_resume, NULL)
1390 };
1391
1392 static const struct acpi_device_id bmc150_accel_acpi_match[] = {
1393         {"BSBA0150",    bmc150},
1394         {"BMC150A",     bmc150},
1395         {"BMI055A",     bmi055},
1396         {"BMA0255",     bma255},
1397         {"BMA250E",     bma250e},
1398         {"BMA222E",     bma222e},
1399         {"BMA0280",     bma280},
1400         { },
1401 };
1402 MODULE_DEVICE_TABLE(acpi, bmc150_accel_acpi_match);
1403
1404 static const struct i2c_device_id bmc150_accel_id[] = {
1405         {"bmc150_accel",        bmc150},
1406         {"bmi055_accel",        bmi055},
1407         {"bma255",              bma255},
1408         {"bma250e",             bma250e},
1409         {"bma222e",             bma222e},
1410         {"bma280",              bma280},
1411         {}
1412 };
1413
1414 MODULE_DEVICE_TABLE(i2c, bmc150_accel_id);
1415
1416 static struct i2c_driver bmc150_accel_driver = {
1417         .driver = {
1418                 .name   = BMC150_ACCEL_DRV_NAME,
1419                 .acpi_match_table = ACPI_PTR(bmc150_accel_acpi_match),
1420                 .pm     = &bmc150_accel_pm_ops,
1421         },
1422         .probe          = bmc150_accel_probe,
1423         .remove         = bmc150_accel_remove,
1424         .id_table       = bmc150_accel_id,
1425 };
1426 module_i2c_driver(bmc150_accel_driver);
1427
1428 MODULE_AUTHOR("Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>");
1429 MODULE_LICENSE("GPL v2");
1430 MODULE_DESCRIPTION("BMC150 accelerometer driver");