drivers/net/ethernet/intel/ixgbe/ixgbe_main.c

   1 /*******************************************************************************
   2
   3   Intel 10 Gigabit PCI Express Linux driver
   4   Copyright(c) 1999 - 2015 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   Linux NICS <linux.nics@intel.com>
  24   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  25   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  26
  27 *******************************************************************************/
  28
  29 #include <linux/types.h>
  30 #include <linux/module.h>
  31 #include <linux/pci.h>
  32 #include <linux/netdevice.h>
  33 #include <linux/vmalloc.h>
  34 #include <linux/string.h>
  35 #include <linux/in.h>
  36 #include <linux/interrupt.h>
  37 #include <linux/ip.h>
  38 #include <linux/tcp.h>
  39 #include <linux/sctp.h>
  40 #include <linux/pkt_sched.h>
  41 #include <linux/ipv6.h>
  42 #include <linux/slab.h>
  43 #include <net/checksum.h>
  44 #include <net/ip6_checksum.h>
  45 #include <linux/etherdevice.h>
  46 #include <linux/ethtool.h>
  47 #include <linux/if.h>
  48 #include <linux/if_vlan.h>
  49 #include <linux/if_macvlan.h>
  50 #include <linux/if_bridge.h>
  51 #include <linux/prefetch.h>
  52 #include <scsi/fc/fc_fcoe.h>
  53 #include <net/vxlan.h>
  54
  55 #ifdef CONFIG_OF
  56 #include <linux/of_net.h>
  57 #endif
  58
  59 #ifdef CONFIG_SPARC
  60 #include <asm/idprom.h>
  61 #include <asm/prom.h>
  62 #endif
  63
  64 #include "ixgbe.h"
  65 #include "ixgbe_common.h"
  66 #include "ixgbe_dcb_82599.h"
  67 #include "ixgbe_sriov.h"
  68 #ifdef CONFIG_IXGBE_VXLAN
  69 #include <net/vxlan.h>
  70 #endif
  71
  72 char ixgbe_driver_name[] = "ixgbe";
  73 static const char ixgbe_driver_string[] =
  74                               "Intel(R) 10 Gigabit PCI Express Network Driver";
  75 #ifdef IXGBE_FCOE
  76 char ixgbe_default_device_descr[] =
  77                               "Intel(R) 10 Gigabit Network Connection";
  78 #else
  79 static char ixgbe_default_device_descr[] =
  80                               "Intel(R) 10 Gigabit Network Connection";
  81 #endif
  82 #define DRV_VERSION "4.2.1-k"
  83 const char ixgbe_driver_version[] = DRV_VERSION;
  84 static const char ixgbe_copyright[] =
  85                                 "Copyright (c) 1999-2015 Intel Corporation.";
  86
  87 static const char ixgbe_overheat_msg[] = "Network adapter has been stopped because it has over heated. Restart the computer. If the problem persists, power off the system and replace the adapter";
  88
  89 static const struct ixgbe_info *ixgbe_info_tbl[] = {
  90         [board_82598]           = &ixgbe_82598_info,
  91         [board_82599]           = &ixgbe_82599_info,
  92         [board_X540]            = &ixgbe_X540_info,
  93         [board_X550]            = &ixgbe_X550_info,
  94         [board_X550EM_x]        = &ixgbe_X550EM_x_info,
  95 };
  96
  97 /* ixgbe_pci_tbl - PCI Device ID Table
  98  *
  99  * Wildcard entries (PCI_ANY_ID) should come last
 100  * Last entry must be all 0s
 101  *
 102  * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
 103  *   Class, Class Mask, private data (not used) }
 104  */
 105 static const struct pci_device_id ixgbe_pci_tbl[] = {
 106         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598), board_82598 },
 107         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT), board_82598 },
 108         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT), board_82598 },
 109         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT), board_82598 },
 110         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT2), board_82598 },
 111         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4), board_82598 },
 112         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT), board_82598 },
 113         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT), board_82598 },
 114         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM), board_82598 },
 115         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_XF_LR), board_82598 },
 116         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM), board_82598 },
 117         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_BX), board_82598 },
 118         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4), board_82599 },
 119         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_XAUI_LOM), board_82599 },
 120         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KR), board_82599 },
 121         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP), board_82599 },
 122         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_EM), board_82599 },
 123         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4_MEZZ), board_82599 },
 124         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_CX4), board_82599 },
 125         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_BACKPLANE_FCOE), board_82599 },
 126         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_FCOE), board_82599 },
 127         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_T3_LOM), board_82599 },
 128         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_COMBO_BACKPLANE), board_82599 },
 129         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T), board_X540 },
 130         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF2), board_82599 },
 131         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_LS), board_82599 },
 132         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_QSFP_SF_QP), board_82599 },
 133         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599EN_SFP), board_82599 },
 134         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF_QP), board_82599 },
 135         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T1), board_X540 },
 136         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T), board_X550},
 137         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KX4), board_X550EM_x},
 138         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KR), board_X550EM_x},
 139         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_10G_T), board_X550EM_x},
 140         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_SFP), board_X550EM_x},
 141         /* required last entry */
 142         {0, }
 143 };
 144 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
 145
 146 #ifdef CONFIG_IXGBE_DCA
 147 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
 148                             void *p);
 149 static struct notifier_block dca_notifier = {
 150         .notifier_call = ixgbe_notify_dca,
 151         .next          = NULL,
 152         .priority      = 0
 153 };
 154 #endif
 155
 156 #ifdef CONFIG_PCI_IOV
 157 static unsigned int max_vfs;
 158 module_param(max_vfs, uint, 0);
 159 MODULE_PARM_DESC(max_vfs,
 160                  "Maximum number of virtual functions to allocate per physical function - default is zero and maximum value is 63. (Deprecated)");
 161 #endif /* CONFIG_PCI_IOV */
 162
 163 static unsigned int allow_unsupported_sfp;
 164 module_param(allow_unsupported_sfp, uint, 0);
 165 MODULE_PARM_DESC(allow_unsupported_sfp,
 166                  "Allow unsupported and untested SFP+ modules on 82599-based adapters");
 167
 168 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
 169 static int debug = -1;
 170 module_param(debug, int, 0);
 171 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
 172
 173 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
 174 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
 175 MODULE_LICENSE("GPL");
 176 MODULE_VERSION(DRV_VERSION);
 177
 178 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev);
 179
 180 static int ixgbe_read_pci_cfg_word_parent(struct ixgbe_adapter *adapter,
 181                                           u32 reg, u16 *value)
 182 {
 183         struct pci_dev *parent_dev;
 184         struct pci_bus *parent_bus;
 185
 186         parent_bus = adapter->pdev->bus->parent;
 187         if (!parent_bus)
 188                 return -1;
 189
 190         parent_dev = parent_bus->self;
 191         if (!parent_dev)
 192                 return -1;
 193
 194         if (!pci_is_pcie(parent_dev))
 195                 return -1;
 196
 197         pcie_capability_read_word(parent_dev, reg, value);
 198         if (*value == IXGBE_FAILED_READ_CFG_WORD &&
 199             ixgbe_check_cfg_remove(&adapter->hw, parent_dev))
 200                 return -1;
 201         return 0;
 202 }
 203
 204 static s32 ixgbe_get_parent_bus_info(struct ixgbe_adapter *adapter)
 205 {
 206         struct ixgbe_hw *hw = &adapter->hw;
 207         u16 link_status = 0;
 208         int err;
 209
 210         hw->bus.type = ixgbe_bus_type_pci_express;
 211
 212         /* Get the negotiated link width and speed from PCI config space of the
 213          * parent, as this device is behind a switch
 214          */
 215         err = ixgbe_read_pci_cfg_word_parent(adapter, 18, &link_status);
 216
 217         /* assume caller will handle error case */
 218         if (err)
 219                 return err;
 220
 221         hw->bus.width = ixgbe_convert_bus_width(link_status);
 222         hw->bus.speed = ixgbe_convert_bus_speed(link_status);
 223
 224         return 0;
 225 }
 226
 227 /**
 228  * ixgbe_check_from_parent - Determine whether PCIe info should come from parent
 229  * @hw: hw specific details
 230  *
 231  * This function is used by probe to determine whether a device's PCI-Express
 232  * bandwidth details should be gathered from the parent bus instead of from the
 233  * device. Used to ensure that various locations all have the correct device ID
 234  * checks.
 235  */
 236 static inline bool ixgbe_pcie_from_parent(struct ixgbe_hw *hw)
 237 {
 238         switch (hw->device_id) {
 239         case IXGBE_DEV_ID_82599_SFP_SF_QP:
 240         case IXGBE_DEV_ID_82599_QSFP_SF_QP:
 241                 return true;
 242         default:
 243                 return false;
 244         }
 245 }
 246
 247 static void ixgbe_check_minimum_link(struct ixgbe_adapter *adapter,
 248                                      int expected_gts)
 249 {
 250         struct ixgbe_hw *hw = &adapter->hw;
 251         int max_gts = 0;
 252         enum pci_bus_speed speed = PCI_SPEED_UNKNOWN;
 253         enum pcie_link_width width = PCIE_LNK_WIDTH_UNKNOWN;
 254         struct pci_dev *pdev;
 255
 256         /* Some devices are not connected over PCIe and thus do not negotiate
 257          * speed. These devices do not have valid bus info, and thus any report
 258          * we generate may not be correct.
 259          */
 260         if (hw->bus.type == ixgbe_bus_type_internal)
 261                 return;
 262
 263         /* determine whether to use the parent device */
 264         if (ixgbe_pcie_from_parent(&adapter->hw))
 265                 pdev = adapter->pdev->bus->parent->self;
 266         else
 267                 pdev = adapter->pdev;
 268
 269         if (pcie_get_minimum_link(pdev, &speed, &width) ||
 270             speed == PCI_SPEED_UNKNOWN || width == PCIE_LNK_WIDTH_UNKNOWN) {
 271                 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
 272                 return;
 273         }
 274
 275         switch (speed) {
 276         case PCIE_SPEED_2_5GT:
 277                 /* 8b/10b encoding reduces max throughput by 20% */
 278                 max_gts = 2 * width;
 279                 break;
 280         case PCIE_SPEED_5_0GT:
 281                 /* 8b/10b encoding reduces max throughput by 20% */
 282                 max_gts = 4 * width;
 283                 break;
 284         case PCIE_SPEED_8_0GT:
 285                 /* 128b/130b encoding reduces throughput by less than 2% */
 286                 max_gts = 8 * width;
 287                 break;
 288         default:
 289                 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
 290                 return;
 291         }
 292
 293         e_dev_info("PCI Express bandwidth of %dGT/s available\n",
 294                    max_gts);
 295         e_dev_info("(Speed:%s, Width: x%d, Encoding Loss:%s)\n",
 296                    (speed == PCIE_SPEED_8_0GT ? "8.0GT/s" :
 297                     speed == PCIE_SPEED_5_0GT ? "5.0GT/s" :
 298                     speed == PCIE_SPEED_2_5GT ? "2.5GT/s" :
 299                     "Unknown"),
 300                    width,
 301                    (speed == PCIE_SPEED_2_5GT ? "20%" :
 302                     speed == PCIE_SPEED_5_0GT ? "20%" :
 303                     speed == PCIE_SPEED_8_0GT ? "<2%" :
 304                     "Unknown"));
 305
 306         if (max_gts < expected_gts) {
 307                 e_dev_warn("This is not sufficient for optimal performance of this card.\n");
 308                 e_dev_warn("For optimal performance, at least %dGT/s of bandwidth is required.\n",
 309                         expected_gts);
 310                 e_dev_warn("A slot with more lanes and/or higher speed is suggested.\n");
 311         }
 312 }
 313
 314 static void ixgbe_service_event_schedule(struct ixgbe_adapter *adapter)
 315 {
 316         if (!test_bit(__IXGBE_DOWN, &adapter->state) &&
 317             !test_bit(__IXGBE_REMOVING, &adapter->state) &&
 318             !test_and_set_bit(__IXGBE_SERVICE_SCHED, &adapter->state))
 319                 schedule_work(&adapter->service_task);
 320 }
 321
 322 static void ixgbe_remove_adapter(struct ixgbe_hw *hw)
 323 {
 324         struct ixgbe_adapter *adapter = hw->back;
 325
 326         if (!hw->hw_addr)
 327                 return;
 328         hw->hw_addr = NULL;
 329         e_dev_err("Adapter removed\n");
 330         if (test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
 331                 ixgbe_service_event_schedule(adapter);
 332 }
 333
 334 static void ixgbe_check_remove(struct ixgbe_hw *hw, u32 reg)
 335 {
 336         u32 value;
 337
 338         /* The following check not only optimizes a bit by not
 339          * performing a read on the status register when the
 340          * register just read was a status register read that
 341          * returned IXGBE_FAILED_READ_REG. It also blocks any
 342          * potential recursion.
 343          */
 344         if (reg == IXGBE_STATUS) {
 345                 ixgbe_remove_adapter(hw);
 346                 return;
 347         }
 348         value = ixgbe_read_reg(hw, IXGBE_STATUS);
 349         if (value == IXGBE_FAILED_READ_REG)
 350                 ixgbe_remove_adapter(hw);
 351 }
 352
 353 /**
 354  * ixgbe_read_reg - Read from device register
 355  * @hw: hw specific details
 356  * @reg: offset of register to read
 357  *
 358  * Returns : value read or IXGBE_FAILED_READ_REG if removed
 359  *
 360  * This function is used to read device registers. It checks for device
 361  * removal by confirming any read that returns all ones by checking the
 362  * status register value for all ones. This function avoids reading from
 363  * the hardware if a removal was previously detected in which case it
 364  * returns IXGBE_FAILED_READ_REG (all ones).
 365  */
 366 u32 ixgbe_read_reg(struct ixgbe_hw *hw, u32 reg)
 367 {
 368         u8 __iomem *reg_addr = ACCESS_ONCE(hw->hw_addr);
 369         u32 value;
 370
 371         if (ixgbe_removed(reg_addr))
 372                 return IXGBE_FAILED_READ_REG;
 373         value = readl(reg_addr + reg);
 374         if (unlikely(value == IXGBE_FAILED_READ_REG))
 375                 ixgbe_check_remove(hw, reg);
 376         return value;
 377 }
 378
 379 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev)
 380 {
 381         u16 value;
 382
 383         pci_read_config_word(pdev, PCI_VENDOR_ID, &value);
 384         if (value == IXGBE_FAILED_READ_CFG_WORD) {
 385                 ixgbe_remove_adapter(hw);
 386                 return true;
 387         }
 388         return false;
 389 }
 390
 391 u16 ixgbe_read_pci_cfg_word(struct ixgbe_hw *hw, u32 reg)
 392 {
 393         struct ixgbe_adapter *adapter = hw->back;
 394         u16 value;
 395
 396         if (ixgbe_removed(hw->hw_addr))
 397                 return IXGBE_FAILED_READ_CFG_WORD;
 398         pci_read_config_word(adapter->pdev, reg, &value);
 399         if (value == IXGBE_FAILED_READ_CFG_WORD &&
 400             ixgbe_check_cfg_remove(hw, adapter->pdev))
 401                 return IXGBE_FAILED_READ_CFG_WORD;
 402         return value;
 403 }
 404
 405 #ifdef CONFIG_PCI_IOV
 406 static u32 ixgbe_read_pci_cfg_dword(struct ixgbe_hw *hw, u32 reg)
 407 {
 408         struct ixgbe_adapter *adapter = hw->back;
 409         u32 value;
 410
 411         if (ixgbe_removed(hw->hw_addr))
 412                 return IXGBE_FAILED_READ_CFG_DWORD;
 413         pci_read_config_dword(adapter->pdev, reg, &value);
 414         if (value == IXGBE_FAILED_READ_CFG_DWORD &&
 415             ixgbe_check_cfg_remove(hw, adapter->pdev))
 416                 return IXGBE_FAILED_READ_CFG_DWORD;
 417         return value;
 418 }
 419 #endif /* CONFIG_PCI_IOV */
 420
 421 void ixgbe_write_pci_cfg_word(struct ixgbe_hw *hw, u32 reg, u16 value)
 422 {
 423         struct ixgbe_adapter *adapter = hw->back;
 424
 425         if (ixgbe_removed(hw->hw_addr))
 426                 return;
 427         pci_write_config_word(adapter->pdev, reg, value);
 428 }
 429
 430 static void ixgbe_service_event_complete(struct ixgbe_adapter *adapter)
 431 {
 432         BUG_ON(!test_bit(__IXGBE_SERVICE_SCHED, &adapter->state));
 433
 434         /* flush memory to make sure state is correct before next watchdog */
 435         smp_mb__before_atomic();
 436         clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
 437 }
 438
 439 struct ixgbe_reg_info {
 440         u32 ofs;
 441         char *name;
 442 };
 443
 444 static const struct ixgbe_reg_info ixgbe_reg_info_tbl[] = {
 445
 446         /* General Registers */
 447         {IXGBE_CTRL, "CTRL"},
 448         {IXGBE_STATUS, "STATUS"},
 449         {IXGBE_CTRL_EXT, "CTRL_EXT"},
 450
 451         /* Interrupt Registers */
 452         {IXGBE_EICR, "EICR"},
 453
 454         /* RX Registers */
 455         {IXGBE_SRRCTL(0), "SRRCTL"},
 456         {IXGBE_DCA_RXCTRL(0), "DRXCTL"},
 457         {IXGBE_RDLEN(0), "RDLEN"},
 458         {IXGBE_RDH(0), "RDH"},
 459         {IXGBE_RDT(0), "RDT"},
 460         {IXGBE_RXDCTL(0), "RXDCTL"},
 461         {IXGBE_RDBAL(0), "RDBAL"},
 462         {IXGBE_RDBAH(0), "RDBAH"},
 463
 464         /* TX Registers */
 465         {IXGBE_TDBAL(0), "TDBAL"},
 466         {IXGBE_TDBAH(0), "TDBAH"},
 467         {IXGBE_TDLEN(0), "TDLEN"},
 468         {IXGBE_TDH(0), "TDH"},
 469         {IXGBE_TDT(0), "TDT"},
 470         {IXGBE_TXDCTL(0), "TXDCTL"},
 471
 472         /* List Terminator */
 473         { .name = NULL }
 474 };
 475
 476
 477 /*
 478  * ixgbe_regdump - register printout routine
 479  */
 480 static void ixgbe_regdump(struct ixgbe_hw *hw, struct ixgbe_reg_info *reginfo)
 481 {
 482         int i = 0, j = 0;
 483         char rname[16];
 484         u32 regs[64];
 485
 486         switch (reginfo->ofs) {
 487         case IXGBE_SRRCTL(0):
 488                 for (i = 0; i < 64; i++)
 489                         regs[i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
 490                 break;
 491         case IXGBE_DCA_RXCTRL(0):
 492                 for (i = 0; i < 64; i++)
 493                         regs[i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
 494                 break;
 495         case IXGBE_RDLEN(0):
 496                 for (i = 0; i < 64; i++)
 497                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
 498                 break;
 499         case IXGBE_RDH(0):
 500                 for (i = 0; i < 64; i++)
 501                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
 502                 break;
 503         case IXGBE_RDT(0):
 504                 for (i = 0; i < 64; i++)
 505                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
 506                 break;
 507         case IXGBE_RXDCTL(0):
 508                 for (i = 0; i < 64; i++)
 509                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
 510                 break;
 511         case IXGBE_RDBAL(0):
 512                 for (i = 0; i < 64; i++)
 513                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
 514                 break;
 515         case IXGBE_RDBAH(0):
 516                 for (i = 0; i < 64; i++)
 517                         regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
 518                 break;
 519         case IXGBE_TDBAL(0):
 520                 for (i = 0; i < 64; i++)
 521                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
 522                 break;
 523         case IXGBE_TDBAH(0):
 524                 for (i = 0; i < 64; i++)
 525                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
 526                 break;
 527         case IXGBE_TDLEN(0):
 528                 for (i = 0; i < 64; i++)
 529                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
 530                 break;
 531         case IXGBE_TDH(0):
 532                 for (i = 0; i < 64; i++)
 533                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
 534                 break;
 535         case IXGBE_TDT(0):
 536                 for (i = 0; i < 64; i++)
 537                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
 538                 break;
 539         case IXGBE_TXDCTL(0):
 540                 for (i = 0; i < 64; i++)
 541                         regs[i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
 542                 break;
 543         default:
 544                 pr_info("%-15s %08x\n", reginfo->name,
 545                         IXGBE_READ_REG(hw, reginfo->ofs));
 546                 return;
 547         }
 548
 549         for (i = 0; i < 8; i++) {
 550                 snprintf(rname, 16, "%s[%d-%d]", reginfo->name, i*8, i*8+7);
 551                 pr_err("%-15s", rname);
 552                 for (j = 0; j < 8; j++)
 553                         pr_cont(" %08x", regs[i*8+j]);
 554                 pr_cont("\n");
 555         }
 556
 557 }
 558
 559 /*
 560  * ixgbe_dump - Print registers, tx-rings and rx-rings
 561  */
 562 static void ixgbe_dump(struct ixgbe_adapter *adapter)
 563 {
 564         struct net_device *netdev = adapter->netdev;
 565         struct ixgbe_hw *hw = &adapter->hw;
 566         struct ixgbe_reg_info *reginfo;
 567         int n = 0;
 568         struct ixgbe_ring *tx_ring;
 569         struct ixgbe_tx_buffer *tx_buffer;
 570         union ixgbe_adv_tx_desc *tx_desc;
 571         struct my_u0 { u64 a; u64 b; } *u0;
 572         struct ixgbe_ring *rx_ring;
 573         union ixgbe_adv_rx_desc *rx_desc;
 574         struct ixgbe_rx_buffer *rx_buffer_info;
 575         u32 staterr;
 576         int i = 0;
 577
 578         if (!netif_msg_hw(adapter))
 579                 return;
 580
 581         /* Print netdevice Info */
 582         if (netdev) {
 583                 dev_info(&adapter->pdev->dev, "Net device Info\n");
 584                 pr_info("Device Name     state            "
 585                         "trans_start      last_rx\n");
 586                 pr_info("%-15s %016lX %016lX %016lX\n",
 587                         netdev->name,
 588                         netdev->state,
 589                         netdev->trans_start,
 590                         netdev->last_rx);
 591         }
 592
 593         /* Print Registers */
 594         dev_info(&adapter->pdev->dev, "Register Dump\n");
 595         pr_info(" Register Name   Value\n");
 596         for (reginfo = (struct ixgbe_reg_info *)ixgbe_reg_info_tbl;
 597              reginfo->name; reginfo++) {
 598                 ixgbe_regdump(hw, reginfo);
 599         }
 600
 601         /* Print TX Ring Summary */
 602         if (!netdev || !netif_running(netdev))
 603                 return;
 604
 605         dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
 606         pr_info(" %s     %s              %s        %s\n",
 607                 "Queue [NTU] [NTC] [bi(ntc)->dma  ]",
 608                 "leng", "ntw", "timestamp");
 609         for (n = 0; n < adapter->num_tx_queues; n++) {
 610                 tx_ring = adapter->tx_ring[n];
 611                 tx_buffer = &tx_ring->tx_buffer_info[tx_ring->next_to_clean];
 612                 pr_info(" %5d %5X %5X %016llX %08X %p %016llX\n",
 613                            n, tx_ring->next_to_use, tx_ring->next_to_clean,
 614                            (u64)dma_unmap_addr(tx_buffer, dma),
 615                            dma_unmap_len(tx_buffer, len),
 616                            tx_buffer->next_to_watch,
 617                            (u64)tx_buffer->time_stamp);
 618         }
 619
 620         /* Print TX Rings */
 621         if (!netif_msg_tx_done(adapter))
 622                 goto rx_ring_summary;
 623
 624         dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
 625
 626         /* Transmit Descriptor Formats
 627          *
 628          * 82598 Advanced Transmit Descriptor
 629          *   +--------------------------------------------------------------+
 630          * 0 |         Buffer Address [63:0]                                |
 631          *   +--------------------------------------------------------------+
 632          * 8 |  PAYLEN  | POPTS  | IDX | STA | DCMD  |DTYP |  RSV |  DTALEN |
 633          *   +--------------------------------------------------------------+
 634          *   63       46 45    40 39 36 35 32 31   24 23 20 19              0
 635          *
 636          * 82598 Advanced Transmit Descriptor (Write-Back Format)
 637          *   +--------------------------------------------------------------+
 638          * 0 |                          RSV [63:0]                          |
 639          *   +--------------------------------------------------------------+
 640          * 8 |            RSV           |  STA  |          NXTSEQ           |
 641          *   +--------------------------------------------------------------+
 642          *   63                       36 35   32 31                         0
 643          *
 644          * 82599+ Advanced Transmit Descriptor
 645          *   +--------------------------------------------------------------+
 646          * 0 |         Buffer Address [63:0]                                |
 647          *   +--------------------------------------------------------------+
 648          * 8 |PAYLEN  |POPTS|CC|IDX  |STA  |DCMD  |DTYP |MAC  |RSV  |DTALEN |
 649          *   +--------------------------------------------------------------+
 650          *   63     46 45 40 39 38 36 35 32 31  24 23 20 19 18 17 16 15     0
 651          *
 652          * 82599+ Advanced Transmit Descriptor (Write-Back Format)
 653          *   +--------------------------------------------------------------+
 654          * 0 |                          RSV [63:0]                          |
 655          *   +--------------------------------------------------------------+
 656          * 8 |            RSV           |  STA  |           RSV             |
 657          *   +--------------------------------------------------------------+
 658          *   63                       36 35   32 31                         0
 659          */
 660
 661         for (n = 0; n < adapter->num_tx_queues; n++) {
 662                 tx_ring = adapter->tx_ring[n];
 663                 pr_info("------------------------------------\n");
 664                 pr_info("TX QUEUE INDEX = %d\n", tx_ring->queue_index);
 665                 pr_info("------------------------------------\n");
 666                 pr_info("%s%s    %s              %s        %s          %s\n",
 667                         "T [desc]     [address 63:0  ] ",
 668                         "[PlPOIdStDDt Ln] [bi->dma       ] ",
 669                         "leng", "ntw", "timestamp", "bi->skb");
 670
 671                 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
 672                         tx_desc = IXGBE_TX_DESC(tx_ring, i);
 673                         tx_buffer = &tx_ring->tx_buffer_info[i];
 674                         u0 = (struct my_u0 *)tx_desc;
 675                         if (dma_unmap_len(tx_buffer, len) > 0) {
 676                                 pr_info("T [0x%03X]    %016llX %016llX %016llX %08X %p %016llX %p",
 677                                         i,
 678                                         le64_to_cpu(u0->a),
 679                                         le64_to_cpu(u0->b),
 680                                         (u64)dma_unmap_addr(tx_buffer, dma),
 681                                         dma_unmap_len(tx_buffer, len),
 682                                         tx_buffer->next_to_watch,
 683                                         (u64)tx_buffer->time_stamp,
 684                                         tx_buffer->skb);
 685                                 if (i == tx_ring->next_to_use &&
 686                                         i == tx_ring->next_to_clean)
 687                                         pr_cont(" NTC/U\n");
 688                                 else if (i == tx_ring->next_to_use)
 689                                         pr_cont(" NTU\n");
 690                                 else if (i == tx_ring->next_to_clean)
 691                                         pr_cont(" NTC\n");
 692                                 else
 693                                         pr_cont("\n");
 694
 695                                 if (netif_msg_pktdata(adapter) &&
 696                                     tx_buffer->skb)
 697                                         print_hex_dump(KERN_INFO, "",
 698                                                 DUMP_PREFIX_ADDRESS, 16, 1,
 699                                                 tx_buffer->skb->data,
 700                                                 dma_unmap_len(tx_buffer, len),
 701                                                 true);
 702                         }
 703                 }
 704         }
 705
 706         /* Print RX Rings Summary */
 707 rx_ring_summary:
 708         dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
 709         pr_info("Queue [NTU] [NTC]\n");
 710         for (n = 0; n < adapter->num_rx_queues; n++) {
 711                 rx_ring = adapter->rx_ring[n];
 712                 pr_info("%5d %5X %5X\n",
 713                         n, rx_ring->next_to_use, rx_ring->next_to_clean);
 714         }
 715
 716         /* Print RX Rings */
 717         if (!netif_msg_rx_status(adapter))
 718                 return;
 719
 720         dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
 721
 722         /* Receive Descriptor Formats
 723          *
 724          * 82598 Advanced Receive Descriptor (Read) Format
 725          *    63                                           1        0
 726          *    +-----------------------------------------------------+
 727          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 728          *    +----------------------------------------------+------+
 729          *  8 |       Header Buffer Address [63:1]           |  DD  |
 730          *    +-----------------------------------------------------+
 731          *
 732          *
 733          * 82598 Advanced Receive Descriptor (Write-Back) Format
 734          *
 735          *   63       48 47    32 31  30      21 20 16 15   4 3     0
 736          *   +------------------------------------------------------+
 737          * 0 |       RSS Hash /  |SPH| HDR_LEN  | RSV |Packet|  RSS |
 738          *   | Packet   | IP     |   |          |     | Type | Type |
 739          *   | Checksum | Ident  |   |          |     |      |      |
 740          *   +------------------------------------------------------+
 741          * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 742          *   +------------------------------------------------------+
 743          *   63       48 47    32 31            20 19               0
 744          *
 745          * 82599+ Advanced Receive Descriptor (Read) Format
 746          *    63                                           1        0
 747          *    +-----------------------------------------------------+
 748          *  0 |       Packet Buffer Address [63:1]           |A0/NSE|
 749          *    +----------------------------------------------+------+
 750          *  8 |       Header Buffer Address [63:1]           |  DD  |
 751          *    +-----------------------------------------------------+
 752          *
 753          *
 754          * 82599+ Advanced Receive Descriptor (Write-Back) Format
 755          *
 756          *   63       48 47    32 31  30      21 20 17 16   4 3     0
 757          *   +------------------------------------------------------+
 758          * 0 |RSS / Frag Checksum|SPH| HDR_LEN  |RSC- |Packet|  RSS |
 759          *   |/ RTT / PCoE_PARAM |   |          | CNT | Type | Type |
 760          *   |/ Flow Dir Flt ID  |   |          |     |      |      |
 761          *   +------------------------------------------------------+
 762          * 8 | VLAN Tag | Length |Extended Error| Xtnd Status/NEXTP |
 763          *   +------------------------------------------------------+
 764          *   63       48 47    32 31          20 19                 0
 765          */
 766
 767         for (n = 0; n < adapter->num_rx_queues; n++) {
 768                 rx_ring = adapter->rx_ring[n];
 769                 pr_info("------------------------------------\n");
 770                 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
 771                 pr_info("------------------------------------\n");
 772                 pr_info("%s%s%s",
 773                         "R  [desc]      [ PktBuf     A0] ",
 774                         "[  HeadBuf   DD] [bi->dma       ] [bi->skb       ] ",
 775                         "<-- Adv Rx Read format\n");
 776                 pr_info("%s%s%s",
 777                         "RWB[desc]      [PcsmIpSHl PtRs] ",
 778                         "[vl er S cks ln] ---------------- [bi->skb       ] ",
 779                         "<-- Adv Rx Write-Back format\n");
 780
 781                 for (i = 0; i < rx_ring->count; i++) {
 782                         rx_buffer_info = &rx_ring->rx_buffer_info[i];
 783                         rx_desc = IXGBE_RX_DESC(rx_ring, i);
 784                         u0 = (struct my_u0 *)rx_desc;
 785                         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 786                         if (staterr & IXGBE_RXD_STAT_DD) {
 787                                 /* Descriptor Done */
 788                                 pr_info("RWB[0x%03X]     %016llX "
 789                                         "%016llX ---------------- %p", i,
 790                                         le64_to_cpu(u0->a),
 791                                         le64_to_cpu(u0->b),
 792                                         rx_buffer_info->skb);
 793                         } else {
 794                                 pr_info("R  [0x%03X]     %016llX "
 795                                         "%016llX %016llX %p", i,
 796                                         le64_to_cpu(u0->a),
 797                                         le64_to_cpu(u0->b),
 798                                         (u64)rx_buffer_info->dma,
 799                                         rx_buffer_info->skb);
 800
 801                                 if (netif_msg_pktdata(adapter) &&
 802                                     rx_buffer_info->dma) {
 803                                         print_hex_dump(KERN_INFO, "",
 804                                            DUMP_PREFIX_ADDRESS, 16, 1,
 805                                            page_address(rx_buffer_info->page) +
 806                                                     rx_buffer_info->page_offset,
 807                                            ixgbe_rx_bufsz(rx_ring), true);
 808                                 }
 809                         }
 810
 811                         if (i == rx_ring->next_to_use)
 812                                 pr_cont(" NTU\n");
 813                         else if (i == rx_ring->next_to_clean)
 814                                 pr_cont(" NTC\n");
 815                         else
 816                                 pr_cont("\n");
 817
 818                 }
 819         }
 820 }
 821
 822 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
 823 {
 824         u32 ctrl_ext;
 825
 826         /* Let firmware take over control of h/w */
 827         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 828         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 829                         ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
 830 }
 831
 832 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
 833 {
 834         u32 ctrl_ext;
 835
 836         /* Let firmware know the driver has taken over */
 837         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 838         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 839                         ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
 840 }
 841
 842 /**
 843  * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
 844  * @adapter: pointer to adapter struct
 845  * @direction: 0 for Rx, 1 for Tx, -1 for other causes
 846  * @queue: queue to map the corresponding interrupt to
 847  * @msix_vector: the vector to map to the corresponding queue
 848  *
 849  */
 850 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, s8 direction,
 851                            u8 queue, u8 msix_vector)
 852 {
 853         u32 ivar, index;
 854         struct ixgbe_hw *hw = &adapter->hw;
 855         switch (hw->mac.type) {
 856         case ixgbe_mac_82598EB:
 857                 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 858                 if (direction == -1)
 859                         direction = 0;
 860                 index = (((direction * 64) + queue) >> 2) & 0x1F;
 861                 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index));
 862                 ivar &= ~(0xFF << (8 * (queue & 0x3)));
 863                 ivar |= (msix_vector << (8 * (queue & 0x3)));
 864                 IXGBE_WRITE_REG(hw, IXGBE_IVAR(index), ivar);
 865                 break;
 866         case ixgbe_mac_82599EB:
 867         case ixgbe_mac_X540:
 868         case ixgbe_mac_X550:
 869         case ixgbe_mac_X550EM_x:
 870                 if (direction == -1) {
 871                         /* other causes */
 872                         msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 873                         index = ((queue & 1) * 8);
 874                         ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR_MISC);
 875                         ivar &= ~(0xFF << index);
 876                         ivar |= (msix_vector << index);
 877                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR_MISC, ivar);
 878                         break;
 879                 } else {
 880                         /* tx or rx causes */
 881                         msix_vector |= IXGBE_IVAR_ALLOC_VAL;
 882                         index = ((16 * (queue & 1)) + (8 * direction));
 883                         ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(queue >> 1));
 884                         ivar &= ~(0xFF << index);
 885                         ivar |= (msix_vector << index);
 886                         IXGBE_WRITE_REG(hw, IXGBE_IVAR(queue >> 1), ivar);
 887                         break;
 888                 }
 889         default:
 890                 break;
 891         }
 892 }
 893
 894 static inline void ixgbe_irq_rearm_queues(struct ixgbe_adapter *adapter,
 895                                           u64 qmask)
 896 {
 897         u32 mask;
 898
 899         switch (adapter->hw.mac.type) {
 900         case ixgbe_mac_82598EB:
 901                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
 902                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
 903                 break;
 904         case ixgbe_mac_82599EB:
 905         case ixgbe_mac_X540:
 906         case ixgbe_mac_X550:
 907         case ixgbe_mac_X550EM_x:
 908                 mask = (qmask & 0xFFFFFFFF);
 909                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask);
 910                 mask = (qmask >> 32);
 911                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(1), mask);
 912                 break;
 913         default:
 914                 break;
 915         }
 916 }
 917
 918 void ixgbe_unmap_and_free_tx_resource(struct ixgbe_ring *ring,
 919                                       struct ixgbe_tx_buffer *tx_buffer)
 920 {
 921         if (tx_buffer->skb) {
 922                 dev_kfree_skb_any(tx_buffer->skb);
 923                 if (dma_unmap_len(tx_buffer, len))
 924                         dma_unmap_single(ring->dev,
 925                                          dma_unmap_addr(tx_buffer, dma),
 926                                          dma_unmap_len(tx_buffer, len),
 927                                          DMA_TO_DEVICE);
 928         } else if (dma_unmap_len(tx_buffer, len)) {
 929                 dma_unmap_page(ring->dev,
 930                                dma_unmap_addr(tx_buffer, dma),
 931                                dma_unmap_len(tx_buffer, len),
 932                                DMA_TO_DEVICE);
 933         }
 934         tx_buffer->next_to_watch = NULL;
 935         tx_buffer->skb = NULL;
 936         dma_unmap_len_set(tx_buffer, len, 0);
 937         /* tx_buffer must be completely set up in the transmit path */
 938 }
 939
 940 static void ixgbe_update_xoff_rx_lfc(struct ixgbe_adapter *adapter)
 941 {
 942         struct ixgbe_hw *hw = &adapter->hw;
 943         struct ixgbe_hw_stats *hwstats = &adapter->stats;
 944         int i;
 945         u32 data;
 946
 947         if ((hw->fc.current_mode != ixgbe_fc_full) &&
 948             (hw->fc.current_mode != ixgbe_fc_rx_pause))
 949                 return;
 950
 951         switch (hw->mac.type) {
 952         case ixgbe_mac_82598EB:
 953                 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
 954                 break;
 955         default:
 956                 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT);
 957         }
 958         hwstats->lxoffrxc += data;
 959
 960         /* refill credits (no tx hang) if we received xoff */
 961         if (!data)
 962                 return;
 963
 964         for (i = 0; i < adapter->num_tx_queues; i++)
 965                 clear_bit(__IXGBE_HANG_CHECK_ARMED,
 966                           &adapter->tx_ring[i]->state);
 967 }
 968
 969 static void ixgbe_update_xoff_received(struct ixgbe_adapter *adapter)
 970 {
 971         struct ixgbe_hw *hw = &adapter->hw;
 972         struct ixgbe_hw_stats *hwstats = &adapter->stats;
 973         u32 xoff[8] = {0};
 974         u8 tc;
 975         int i;
 976         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
 977
 978         if (adapter->ixgbe_ieee_pfc)
 979                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
 980
 981         if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED) || !pfc_en) {
 982                 ixgbe_update_xoff_rx_lfc(adapter);
 983                 return;
 984         }
 985
 986         /* update stats for each tc, only valid with PFC enabled */
 987         for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
 988                 u32 pxoffrxc;
 989
 990                 switch (hw->mac.type) {
 991                 case ixgbe_mac_82598EB:
 992                         pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXC(i));
 993                         break;
 994                 default:
 995                         pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXCNT(i));
 996                 }
 997                 hwstats->pxoffrxc[i] += pxoffrxc;
 998                 /* Get the TC for given UP */
 999                 tc = netdev_get_prio_tc_map(adapter->netdev, i);
1000                 xoff[tc] += pxoffrxc;
1001         }
1002
1003         /* disarm tx queues that have received xoff frames */
1004         for (i = 0; i < adapter->num_tx_queues; i++) {
1005                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
1006
1007                 tc = tx_ring->dcb_tc;
1008                 if (xoff[tc])
1009                         clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
1010         }
1011 }
1012
1013 static u64 ixgbe_get_tx_completed(struct ixgbe_ring *ring)
1014 {
1015         return ring->stats.packets;
1016 }
1017
1018 static u64 ixgbe_get_tx_pending(struct ixgbe_ring *ring)
1019 {
1020         struct ixgbe_adapter *adapter;
1021         struct ixgbe_hw *hw;
1022         u32 head, tail;
1023
1024         if (ring->l2_accel_priv)
1025                 adapter = ring->l2_accel_priv->real_adapter;
1026         else
1027                 adapter = netdev_priv(ring->netdev);
1028
1029         hw = &adapter->hw;
1030         head = IXGBE_READ_REG(hw, IXGBE_TDH(ring->reg_idx));
1031         tail = IXGBE_READ_REG(hw, IXGBE_TDT(ring->reg_idx));
1032
1033         if (head != tail)
1034                 return (head < tail) ?
1035                         tail - head : (tail + ring->count - head);
1036
1037         return 0;
1038 }
1039
1040 static inline bool ixgbe_check_tx_hang(struct ixgbe_ring *tx_ring)
1041 {
1042         u32 tx_done = ixgbe_get_tx_completed(tx_ring);
1043         u32 tx_done_old = tx_ring->tx_stats.tx_done_old;
1044         u32 tx_pending = ixgbe_get_tx_pending(tx_ring);
1045
1046         clear_check_for_tx_hang(tx_ring);
1047
1048         /*
1049          * Check for a hung queue, but be thorough. This verifies
1050          * that a transmit has been completed since the previous
1051          * check AND there is at least one packet pending. The
1052          * ARMED bit is set to indicate a potential hang. The
1053          * bit is cleared if a pause frame is received to remove
1054          * false hang detection due to PFC or 802.3x frames. By
1055          * requiring this to fail twice we avoid races with
1056          * pfc clearing the ARMED bit and conditions where we
1057          * run the check_tx_hang logic with a transmit completion
1058          * pending but without time to complete it yet.
1059          */
1060         if (tx_done_old == tx_done && tx_pending)
1061                 /* make sure it is true for two checks in a row */
1062                 return test_and_set_bit(__IXGBE_HANG_CHECK_ARMED,
1063                                         &tx_ring->state);
1064         /* update completed stats and continue */
1065         tx_ring->tx_stats.tx_done_old = tx_done;
1066         /* reset the countdown */
1067         clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
1068
1069         return false;
1070 }
1071
1072 /**
1073  * ixgbe_tx_timeout_reset - initiate reset due to Tx timeout
1074  * @adapter: driver private struct
1075  **/
1076 static void ixgbe_tx_timeout_reset(struct ixgbe_adapter *adapter)
1077 {
1078
1079         /* Do the reset outside of interrupt context */
1080         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
1081                 adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
1082                 e_warn(drv, "initiating reset due to tx timeout\n");
1083                 ixgbe_service_event_schedule(adapter);
1084         }
1085 }
1086
1087 /**
1088  * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
1089  * @q_vector: structure containing interrupt and ring information
1090  * @tx_ring: tx ring to clean
1091  **/
1092 static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector *q_vector,
1093                                struct ixgbe_ring *tx_ring)
1094 {
1095         struct ixgbe_adapter *adapter = q_vector->adapter;
1096         struct ixgbe_tx_buffer *tx_buffer;
1097         union ixgbe_adv_tx_desc *tx_desc;
1098         unsigned int total_bytes = 0, total_packets = 0;
1099         unsigned int budget = q_vector->tx.work_limit;
1100         unsigned int i = tx_ring->next_to_clean;
1101
1102         if (test_bit(__IXGBE_DOWN, &adapter->state))
1103                 return true;
1104
1105         tx_buffer = &tx_ring->tx_buffer_info[i];
1106         tx_desc = IXGBE_TX_DESC(tx_ring, i);
1107         i -= tx_ring->count;
1108
1109         do {
1110                 union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
1111
1112                 /* if next_to_watch is not set then there is no work pending */
1113                 if (!eop_desc)
1114                         break;
1115
1116                 /* prevent any other reads prior to eop_desc */
1117                 read_barrier_depends();
1118
1119                 /* if DD is not set pending work has not been completed */
1120                 if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
1121                         break;
1122
1123                 /* clear next_to_watch to prevent false hangs */
1124                 tx_buffer->next_to_watch = NULL;
1125
1126                 /* update the statistics for this packet */
1127                 total_bytes += tx_buffer->bytecount;
1128                 total_packets += tx_buffer->gso_segs;
1129
1130                 /* free the skb */
1131                 dev_consume_skb_any(tx_buffer->skb);
1132
1133                 /* unmap skb header data */
1134                 dma_unmap_single(tx_ring->dev,
1135                                  dma_unmap_addr(tx_buffer, dma),
1136                                  dma_unmap_len(tx_buffer, len),
1137                                  DMA_TO_DEVICE);
1138
1139                 /* clear tx_buffer data */
1140                 tx_buffer->skb = NULL;
1141                 dma_unmap_len_set(tx_buffer, len, 0);
1142
1143                 /* unmap remaining buffers */
1144                 while (tx_desc != eop_desc) {
1145                         tx_buffer++;
1146                         tx_desc++;
1147                         i++;
1148                         if (unlikely(!i)) {
1149                                 i -= tx_ring->count;
1150                                 tx_buffer = tx_ring->tx_buffer_info;
1151                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1152                         }
1153
1154                         /* unmap any remaining paged data */
1155                         if (dma_unmap_len(tx_buffer, len)) {
1156                                 dma_unmap_page(tx_ring->dev,
1157                                                dma_unmap_addr(tx_buffer, dma),
1158                                                dma_unmap_len(tx_buffer, len),
1159                                                DMA_TO_DEVICE);
1160                                 dma_unmap_len_set(tx_buffer, len, 0);
1161                         }
1162                 }
1163
1164                 /* move us one more past the eop_desc for start of next pkt */
1165                 tx_buffer++;
1166                 tx_desc++;
1167                 i++;
1168                 if (unlikely(!i)) {
1169                         i -= tx_ring->count;
1170                         tx_buffer = tx_ring->tx_buffer_info;
1171                         tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1172                 }
1173
1174                 /* issue prefetch for next Tx descriptor */
1175                 prefetch(tx_desc);
1176
1177                 /* update budget accounting */
1178                 budget--;
1179         } while (likely(budget));
1180
1181         i += tx_ring->count;
1182         tx_ring->next_to_clean = i;
1183         u64_stats_update_begin(&tx_ring->syncp);
1184         tx_ring->stats.bytes += total_bytes;
1185         tx_ring->stats.packets += total_packets;
1186         u64_stats_update_end(&tx_ring->syncp);
1187         q_vector->tx.total_bytes += total_bytes;
1188         q_vector->tx.total_packets += total_packets;
1189
1190         if (check_for_tx_hang(tx_ring) && ixgbe_check_tx_hang(tx_ring)) {
1191                 /* schedule immediate reset if we believe we hung */
1192                 struct ixgbe_hw *hw = &adapter->hw;
1193                 e_err(drv, "Detected Tx Unit Hang\n"
1194                         "  Tx Queue             <%d>\n"
1195                         "  TDH, TDT             <%x>, <%x>\n"
1196                         "  next_to_use          <%x>\n"
1197                         "  next_to_clean        <%x>\n"
1198                         "tx_buffer_info[next_to_clean]\n"
1199                         "  time_stamp           <%lx>\n"
1200                         "  jiffies              <%lx>\n",
1201                         tx_ring->queue_index,
1202                         IXGBE_READ_REG(hw, IXGBE_TDH(tx_ring->reg_idx)),
1203                         IXGBE_READ_REG(hw, IXGBE_TDT(tx_ring->reg_idx)),
1204                         tx_ring->next_to_use, i,
1205                         tx_ring->tx_buffer_info[i].time_stamp, jiffies);
1206
1207                 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
1208
1209                 e_info(probe,
1210                        "tx hang %d detected on queue %d, resetting adapter\n",
1211                         adapter->tx_timeout_count + 1, tx_ring->queue_index);
1212
1213                 /* schedule immediate reset if we believe we hung */
1214                 ixgbe_tx_timeout_reset(adapter);
1215
1216                 /* the adapter is about to reset, no point in enabling stuff */
1217                 return true;
1218         }
1219
1220         netdev_tx_completed_queue(txring_txq(tx_ring),
1221                                   total_packets, total_bytes);
1222
1223 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
1224         if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
1225                      (ixgbe_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
1226                 /* Make sure that anybody stopping the queue after this
1227                  * sees the new next_to_clean.
1228                  */
1229                 smp_mb();
1230                 if (__netif_subqueue_stopped(tx_ring->netdev,
1231                                              tx_ring->queue_index)
1232                     && !test_bit(__IXGBE_DOWN, &adapter->state)) {
1233                         netif_wake_subqueue(tx_ring->netdev,
1234                                             tx_ring->queue_index);
1235                         ++tx_ring->tx_stats.restart_queue;
1236                 }
1237         }
1238
1239         return !!budget;
1240 }
1241
1242 #ifdef CONFIG_IXGBE_DCA
1243 static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
1244                                 struct ixgbe_ring *tx_ring,
1245                                 int cpu)
1246 {
1247         struct ixgbe_hw *hw = &adapter->hw;
1248         u32 txctrl = 0;
1249         u16 reg_offset;
1250
1251         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1252                 txctrl = dca3_get_tag(tx_ring->dev, cpu);
1253
1254         switch (hw->mac.type) {
1255         case ixgbe_mac_82598EB:
1256                 reg_offset = IXGBE_DCA_TXCTRL(tx_ring->reg_idx);
1257                 break;
1258         case ixgbe_mac_82599EB:
1259         case ixgbe_mac_X540:
1260                 reg_offset = IXGBE_DCA_TXCTRL_82599(tx_ring->reg_idx);
1261                 txctrl <<= IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599;
1262                 break;
1263         default:
1264                 /* for unknown hardware do not write register */
1265                 return;
1266         }
1267
1268         /*
1269          * We can enable relaxed ordering for reads, but not writes when
1270          * DCA is enabled.  This is due to a known issue in some chipsets
1271          * which will cause the DCA tag to be cleared.
1272          */
1273         txctrl |= IXGBE_DCA_TXCTRL_DESC_RRO_EN |
1274                   IXGBE_DCA_TXCTRL_DATA_RRO_EN |
1275                   IXGBE_DCA_TXCTRL_DESC_DCA_EN;
1276
1277         IXGBE_WRITE_REG(hw, reg_offset, txctrl);
1278 }
1279
1280 static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
1281                                 struct ixgbe_ring *rx_ring,
1282                                 int cpu)
1283 {
1284         struct ixgbe_hw *hw = &adapter->hw;
1285         u32 rxctrl = 0;
1286         u8 reg_idx = rx_ring->reg_idx;
1287
1288         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1289                 rxctrl = dca3_get_tag(rx_ring->dev, cpu);
1290
1291         switch (hw->mac.type) {
1292         case ixgbe_mac_82599EB:
1293         case ixgbe_mac_X540:
1294                 rxctrl <<= IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599;
1295                 break;
1296         default:
1297                 break;
1298         }
1299
1300         /*
1301          * We can enable relaxed ordering for reads, but not writes when
1302          * DCA is enabled.  This is due to a known issue in some chipsets
1303          * which will cause the DCA tag to be cleared.
1304          */
1305         rxctrl |= IXGBE_DCA_RXCTRL_DESC_RRO_EN |
1306                   IXGBE_DCA_RXCTRL_DATA_DCA_EN |
1307                   IXGBE_DCA_RXCTRL_DESC_DCA_EN;
1308
1309         IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(reg_idx), rxctrl);
1310 }
1311
1312 static void ixgbe_update_dca(struct ixgbe_q_vector *q_vector)
1313 {
1314         struct ixgbe_adapter *adapter = q_vector->adapter;
1315         struct ixgbe_ring *ring;
1316         int cpu = get_cpu();
1317
1318         if (q_vector->cpu == cpu)
1319                 goto out_no_update;
1320
1321         ixgbe_for_each_ring(ring, q_vector->tx)
1322                 ixgbe_update_tx_dca(adapter, ring, cpu);
1323
1324         ixgbe_for_each_ring(ring, q_vector->rx)
1325                 ixgbe_update_rx_dca(adapter, ring, cpu);
1326
1327         q_vector->cpu = cpu;
1328 out_no_update:
1329         put_cpu();
1330 }
1331
1332 static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
1333 {
1334         int i;
1335
1336         /* always use CB2 mode, difference is masked in the CB driver */
1337         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1338                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1339                                 IXGBE_DCA_CTRL_DCA_MODE_CB2);
1340         else
1341                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1342                                 IXGBE_DCA_CTRL_DCA_DISABLE);
1343
1344         for (i = 0; i < adapter->num_q_vectors; i++) {
1345                 adapter->q_vector[i]->cpu = -1;
1346                 ixgbe_update_dca(adapter->q_vector[i]);
1347         }
1348 }
1349
1350 static int __ixgbe_notify_dca(struct device *dev, void *data)
1351 {
1352         struct ixgbe_adapter *adapter = dev_get_drvdata(dev);
1353         unsigned long event = *(unsigned long *)data;
1354
1355         if (!(adapter->flags & IXGBE_FLAG_DCA_CAPABLE))
1356                 return 0;
1357
1358         switch (event) {
1359         case DCA_PROVIDER_ADD:
1360                 /* if we're already enabled, don't do it again */
1361                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1362                         break;
1363                 if (dca_add_requester(dev) == 0) {
1364                         adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
1365                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1366                                         IXGBE_DCA_CTRL_DCA_MODE_CB2);
1367                         break;
1368                 }
1369                 /* Fall Through since DCA is disabled. */
1370         case DCA_PROVIDER_REMOVE:
1371                 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
1372                         dca_remove_requester(dev);
1373                         adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
1374                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1375                                         IXGBE_DCA_CTRL_DCA_DISABLE);
1376                 }
1377                 break;
1378         }
1379
1380         return 0;
1381 }
1382
1383 #endif /* CONFIG_IXGBE_DCA */
1384
1385 #define IXGBE_RSS_L4_TYPES_MASK \
1386         ((1ul << IXGBE_RXDADV_RSSTYPE_IPV4_TCP) | \
1387          (1ul << IXGBE_RXDADV_RSSTYPE_IPV4_UDP) | \
1388          (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_TCP) | \
1389          (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_UDP))
1390
1391 static inline void ixgbe_rx_hash(struct ixgbe_ring *ring,
1392                                  union ixgbe_adv_rx_desc *rx_desc,
1393                                  struct sk_buff *skb)
1394 {
1395         u16 rss_type;
1396
1397         if (!(ring->netdev->features & NETIF_F_RXHASH))
1398                 return;
1399
1400         rss_type = le16_to_cpu(rx_desc->wb.lower.lo_dword.hs_rss.pkt_info) &
1401                    IXGBE_RXDADV_RSSTYPE_MASK;
1402
1403         if (!rss_type)
1404                 return;
1405
1406         skb_set_hash(skb, le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
1407                      (IXGBE_RSS_L4_TYPES_MASK & (1ul << rss_type)) ?
1408                      PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3);
1409 }
1410
1411 #ifdef IXGBE_FCOE
1412 /**
1413  * ixgbe_rx_is_fcoe - check the rx desc for incoming pkt type
1414  * @ring: structure containing ring specific data
1415  * @rx_desc: advanced rx descriptor
1416  *
1417  * Returns : true if it is FCoE pkt
1418  */
1419 static inline bool ixgbe_rx_is_fcoe(struct ixgbe_ring *ring,
1420                                     union ixgbe_adv_rx_desc *rx_desc)
1421 {
1422         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1423
1424         return test_bit(__IXGBE_RX_FCOE, &ring->state) &&
1425                ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_ETQF_MASK)) ==
1426                 (cpu_to_le16(IXGBE_ETQF_FILTER_FCOE <<
1427                              IXGBE_RXDADV_PKTTYPE_ETQF_SHIFT)));
1428 }
1429
1430 #endif /* IXGBE_FCOE */
1431 /**
1432  * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
1433  * @ring: structure containing ring specific data
1434  * @rx_desc: current Rx descriptor being processed
1435  * @skb: skb currently being received and modified
1436  **/
1437 static inline void ixgbe_rx_checksum(struct ixgbe_ring *ring,
1438                                      union ixgbe_adv_rx_desc *rx_desc,
1439                                      struct sk_buff *skb)
1440 {
1441         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1442         __le16 hdr_info = rx_desc->wb.lower.lo_dword.hs_rss.hdr_info;
1443         bool encap_pkt = false;
1444
1445         skb_checksum_none_assert(skb);
1446
1447         /* Rx csum disabled */
1448         if (!(ring->netdev->features & NETIF_F_RXCSUM))
1449                 return;
1450
1451         if ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_VXLAN)) &&
1452             (hdr_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_TUNNEL >> 16))) {
1453                 encap_pkt = true;
1454                 skb->encapsulation = 1;
1455         }
1456
1457         /* if IP and error */
1458         if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_IPCS) &&
1459             ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_IPE)) {
1460                 ring->rx_stats.csum_err++;
1461                 return;
1462         }
1463
1464         if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_L4CS))
1465                 return;
1466
1467         if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_TCPE)) {
1468                 /*
1469                  * 82599 errata, UDP frames with a 0 checksum can be marked as
1470                  * checksum errors.
1471                  */
1472                 if ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_UDP)) &&
1473                     test_bit(__IXGBE_RX_CSUM_UDP_ZERO_ERR, &ring->state))
1474                         return;
1475
1476                 ring->rx_stats.csum_err++;
1477                 return;
1478         }
1479
1480         /* It must be a TCP or UDP packet with a valid checksum */
1481         skb->ip_summed = CHECKSUM_UNNECESSARY;
1482         if (encap_pkt) {
1483                 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_OUTERIPCS))
1484                         return;
1485
1486                 if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_OUTERIPER)) {
1487                         ring->rx_stats.csum_err++;
1488                         return;
1489                 }
1490                 /* If we checked the outer header let the stack know */
1491                 skb->csum_level = 1;
1492         }
1493 }
1494
1495 static bool ixgbe_alloc_mapped_page(struct ixgbe_ring *rx_ring,
1496                                     struct ixgbe_rx_buffer *bi)
1497 {
1498         struct page *page = bi->page;
1499         dma_addr_t dma;
1500
1501         /* since we are recycling buffers we should seldom need to alloc */
1502         if (likely(page))
1503                 return true;
1504
1505         /* alloc new page for storage */
1506         page = dev_alloc_pages(ixgbe_rx_pg_order(rx_ring));
1507         if (unlikely(!page)) {
1508                 rx_ring->rx_stats.alloc_rx_page_failed++;
1509                 return false;
1510         }
1511
1512         /* map page for use */
1513         dma = dma_map_page(rx_ring->dev, page, 0,
1514                            ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
1515
1516         /*
1517          * if mapping failed free memory back to system since
1518          * there isn't much point in holding memory we can't use
1519          */
1520         if (dma_mapping_error(rx_ring->dev, dma)) {
1521                 __free_pages(page, ixgbe_rx_pg_order(rx_ring));
1522
1523                 rx_ring->rx_stats.alloc_rx_page_failed++;
1524                 return false;
1525         }
1526
1527         bi->dma = dma;
1528         bi->page = page;
1529         bi->page_offset = 0;
1530
1531         return true;
1532 }
1533
1534 /**
1535  * ixgbe_alloc_rx_buffers - Replace used receive buffers
1536  * @rx_ring: ring to place buffers on
1537  * @cleaned_count: number of buffers to replace
1538  **/
1539 void ixgbe_alloc_rx_buffers(struct ixgbe_ring *rx_ring, u16 cleaned_count)
1540 {
1541         union ixgbe_adv_rx_desc *rx_desc;
1542         struct ixgbe_rx_buffer *bi;
1543         u16 i = rx_ring->next_to_use;
1544
1545         /* nothing to do */
1546         if (!cleaned_count)
1547                 return;
1548
1549         rx_desc = IXGBE_RX_DESC(rx_ring, i);
1550         bi = &rx_ring->rx_buffer_info[i];
1551         i -= rx_ring->count;
1552
1553         do {
1554                 if (!ixgbe_alloc_mapped_page(rx_ring, bi))
1555                         break;
1556
1557                 /*
1558                  * Refresh the desc even if buffer_addrs didn't change
1559                  * because each write-back erases this info.
1560                  */
1561                 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
1562
1563                 rx_desc++;
1564                 bi++;
1565                 i++;
1566                 if (unlikely(!i)) {
1567                         rx_desc = IXGBE_RX_DESC(rx_ring, 0);
1568                         bi = rx_ring->rx_buffer_info;
1569                         i -= rx_ring->count;
1570                 }
1571
1572                 /* clear the status bits for the next_to_use descriptor */
1573                 rx_desc->wb.upper.status_error = 0;
1574
1575                 cleaned_count--;
1576         } while (cleaned_count);
1577
1578         i += rx_ring->count;
1579
1580         if (rx_ring->next_to_use != i) {
1581                 rx_ring->next_to_use = i;
1582
1583                 /* update next to alloc since we have filled the ring */
1584                 rx_ring->next_to_alloc = i;
1585
1586                 /* Force memory writes to complete before letting h/w
1587                  * know there are new descriptors to fetch.  (Only
1588                  * applicable for weak-ordered memory model archs,
1589                  * such as IA-64).
1590                  */
1591                 wmb();
1592                 writel(i, rx_ring->tail);
1593         }
1594 }
1595
1596 static void ixgbe_set_rsc_gso_size(struct ixgbe_ring *ring,
1597                                    struct sk_buff *skb)
1598 {
1599         u16 hdr_len = skb_headlen(skb);
1600
1601         /* set gso_size to avoid messing up TCP MSS */
1602         skb_shinfo(skb)->gso_size = DIV_ROUND_UP((skb->len - hdr_len),
1603                                                  IXGBE_CB(skb)->append_cnt);
1604         skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
1605 }
1606
1607 static void ixgbe_update_rsc_stats(struct ixgbe_ring *rx_ring,
1608                                    struct sk_buff *skb)
1609 {
1610         /* if append_cnt is 0 then frame is not RSC */
1611         if (!IXGBE_CB(skb)->append_cnt)
1612                 return;
1613
1614         rx_ring->rx_stats.rsc_count += IXGBE_CB(skb)->append_cnt;
1615         rx_ring->rx_stats.rsc_flush++;
1616
1617         ixgbe_set_rsc_gso_size(rx_ring, skb);
1618
1619         /* gso_size is computed using append_cnt so always clear it last */
1620         IXGBE_CB(skb)->append_cnt = 0;
1621 }
1622
1623 /**
1624  * ixgbe_process_skb_fields - Populate skb header fields from Rx descriptor
1625  * @rx_ring: rx descriptor ring packet is being transacted on
1626  * @rx_desc: pointer to the EOP Rx descriptor
1627  * @skb: pointer to current skb being populated
1628  *
1629  * This function checks the ring, descriptor, and packet information in
1630  * order to populate the hash, checksum, VLAN, timestamp, protocol, and
1631  * other fields within the skb.
1632  **/
1633 static void ixgbe_process_skb_fields(struct ixgbe_ring *rx_ring,
1634                                      union ixgbe_adv_rx_desc *rx_desc,
1635                                      struct sk_buff *skb)
1636 {
1637         struct net_device *dev = rx_ring->netdev;
1638
1639         ixgbe_update_rsc_stats(rx_ring, skb);
1640
1641         ixgbe_rx_hash(rx_ring, rx_desc, skb);
1642
1643         ixgbe_rx_checksum(rx_ring, rx_desc, skb);
1644
1645         if (unlikely(ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_STAT_TS)))
1646                 ixgbe_ptp_rx_hwtstamp(rx_ring->q_vector->adapter, skb);
1647
1648         if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
1649             ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) {
1650                 u16 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
1651                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
1652         }
1653
1654         skb_record_rx_queue(skb, rx_ring->queue_index);
1655
1656         skb->protocol = eth_type_trans(skb, dev);
1657 }
1658
1659 static void ixgbe_rx_skb(struct ixgbe_q_vector *q_vector,
1660                          struct sk_buff *skb)
1661 {
1662         if (ixgbe_qv_busy_polling(q_vector))
1663                 netif_receive_skb(skb);
1664         else
1665                 napi_gro_receive(&q_vector->napi, skb);
1666 }
1667
1668 /**
1669  * ixgbe_is_non_eop - process handling of non-EOP buffers
1670  * @rx_ring: Rx ring being processed
1671  * @rx_desc: Rx descriptor for current buffer
1672  * @skb: Current socket buffer containing buffer in progress
1673  *
1674  * This function updates next to clean.  If the buffer is an EOP buffer
1675  * this function exits returning false, otherwise it will place the
1676  * sk_buff in the next buffer to be chained and return true indicating
1677  * that this is in fact a non-EOP buffer.
1678  **/
1679 static bool ixgbe_is_non_eop(struct ixgbe_ring *rx_ring,
1680                              union ixgbe_adv_rx_desc *rx_desc,
1681                              struct sk_buff *skb)
1682 {
1683         u32 ntc = rx_ring->next_to_clean + 1;
1684
1685         /* fetch, update, and store next to clean */
1686         ntc = (ntc < rx_ring->count) ? ntc : 0;
1687         rx_ring->next_to_clean = ntc;
1688
1689         prefetch(IXGBE_RX_DESC(rx_ring, ntc));
1690
1691         /* update RSC append count if present */
1692         if (ring_is_rsc_enabled(rx_ring)) {
1693                 __le32 rsc_enabled = rx_desc->wb.lower.lo_dword.data &
1694                                      cpu_to_le32(IXGBE_RXDADV_RSCCNT_MASK);
1695
1696                 if (unlikely(rsc_enabled)) {
1697                         u32 rsc_cnt = le32_to_cpu(rsc_enabled);
1698
1699                         rsc_cnt >>= IXGBE_RXDADV_RSCCNT_SHIFT;
1700                         IXGBE_CB(skb)->append_cnt += rsc_cnt - 1;
1701
1702                         /* update ntc based on RSC value */
1703                         ntc = le32_to_cpu(rx_desc->wb.upper.status_error);
1704                         ntc &= IXGBE_RXDADV_NEXTP_MASK;
1705                         ntc >>= IXGBE_RXDADV_NEXTP_SHIFT;
1706                 }
1707         }
1708
1709         /* if we are the last buffer then there is nothing else to do */
1710         if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
1711                 return false;
1712
1713         /* place skb in next buffer to be received */
1714         rx_ring->rx_buffer_info[ntc].skb = skb;
1715         rx_ring->rx_stats.non_eop_descs++;
1716
1717         return true;
1718 }
1719
1720 /**
1721  * ixgbe_pull_tail - ixgbe specific version of skb_pull_tail
1722  * @rx_ring: rx descriptor ring packet is being transacted on
1723  * @skb: pointer to current skb being adjusted
1724  *
1725  * This function is an ixgbe specific version of __pskb_pull_tail.  The
1726  * main difference between this version and the original function is that
1727  * this function can make several assumptions about the state of things
1728  * that allow for significant optimizations versus the standard function.
1729  * As a result we can do things like drop a frag and maintain an accurate
1730  * truesize for the skb.
1731  */
1732 static void ixgbe_pull_tail(struct ixgbe_ring *rx_ring,
1733                             struct sk_buff *skb)
1734 {
1735         struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1736         unsigned char *va;
1737         unsigned int pull_len;
1738
1739         /*
1740          * it is valid to use page_address instead of kmap since we are
1741          * working with pages allocated out of the lomem pool per
1742          * alloc_page(GFP_ATOMIC)
1743          */
1744         va = skb_frag_address(frag);
1745
1746         /*
1747          * we need the header to contain the greater of either ETH_HLEN or
1748          * 60 bytes if the skb->len is less than 60 for skb_pad.
1749          */
1750         pull_len = eth_get_headlen(va, IXGBE_RX_HDR_SIZE);
1751
1752         /* align pull length to size of long to optimize memcpy performance */
1753         skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
1754
1755         /* update all of the pointers */
1756         skb_frag_size_sub(frag, pull_len);
1757         frag->page_offset += pull_len;
1758         skb->data_len -= pull_len;
1759         skb->tail += pull_len;
1760 }
1761
1762 /**
1763  * ixgbe_dma_sync_frag - perform DMA sync for first frag of SKB
1764  * @rx_ring: rx descriptor ring packet is being transacted on
1765  * @skb: pointer to current skb being updated
1766  *
1767  * This function provides a basic DMA sync up for the first fragment of an
1768  * skb.  The reason for doing this is that the first fragment cannot be
1769  * unmapped until we have reached the end of packet descriptor for a buffer
1770  * chain.
1771  */
1772 static void ixgbe_dma_sync_frag(struct ixgbe_ring *rx_ring,
1773                                 struct sk_buff *skb)
1774 {
1775         /* if the page was released unmap it, else just sync our portion */
1776         if (unlikely(IXGBE_CB(skb)->page_released)) {
1777                 dma_unmap_page(rx_ring->dev, IXGBE_CB(skb)->dma,
1778                                ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
1779                 IXGBE_CB(skb)->page_released = false;
1780         } else {
1781                 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1782
1783                 dma_sync_single_range_for_cpu(rx_ring->dev,
1784                                               IXGBE_CB(skb)->dma,
1785                                               frag->page_offset,
1786                                               ixgbe_rx_bufsz(rx_ring),
1787                                               DMA_FROM_DEVICE);
1788         }
1789         IXGBE_CB(skb)->dma = 0;
1790 }
1791
1792 /**
1793  * ixgbe_cleanup_headers - Correct corrupted or empty headers
1794  * @rx_ring: rx descriptor ring packet is being transacted on
1795  * @rx_desc: pointer to the EOP Rx descriptor
1796  * @skb: pointer to current skb being fixed
1797  *
1798  * Check for corrupted packet headers caused by senders on the local L2
1799  * embedded NIC switch not setting up their Tx Descriptors right.  These
1800  * should be very rare.
1801  *
1802  * Also address the case where we are pulling data in on pages only
1803  * and as such no data is present in the skb header.
1804  *
1805  * In addition if skb is not at least 60 bytes we need to pad it so that
1806  * it is large enough to qualify as a valid Ethernet frame.
1807  *
1808  * Returns true if an error was encountered and skb was freed.
1809  **/
1810 static bool ixgbe_cleanup_headers(struct ixgbe_ring *rx_ring,
1811                                   union ixgbe_adv_rx_desc *rx_desc,
1812                                   struct sk_buff *skb)
1813 {
1814         struct net_device *netdev = rx_ring->netdev;
1815
1816         /* verify that the packet does not have any known errors */
1817         if (unlikely(ixgbe_test_staterr(rx_desc,
1818                                         IXGBE_RXDADV_ERR_FRAME_ERR_MASK) &&
1819             !(netdev->features & NETIF_F_RXALL))) {
1820                 dev_kfree_skb_any(skb);
1821                 return true;
1822         }
1823
1824         /* place header in linear portion of buffer */
1825         if (skb_is_nonlinear(skb))
1826                 ixgbe_pull_tail(rx_ring, skb);
1827
1828 #ifdef IXGBE_FCOE
1829         /* do not attempt to pad FCoE Frames as this will disrupt DDP */
1830         if (ixgbe_rx_is_fcoe(rx_ring, rx_desc))
1831                 return false;
1832
1833 #endif
1834         /* if eth_skb_pad returns an error the skb was freed */
1835         if (eth_skb_pad(skb))
1836                 return true;
1837
1838         return false;
1839 }
1840
1841 /**
1842  * ixgbe_reuse_rx_page - page flip buffer and store it back on the ring
1843  * @rx_ring: rx descriptor ring to store buffers on
1844  * @old_buff: donor buffer to have page reused
1845  *
1846  * Synchronizes page for reuse by the adapter
1847  **/
1848 static void ixgbe_reuse_rx_page(struct ixgbe_ring *rx_ring,
1849                                 struct ixgbe_rx_buffer *old_buff)
1850 {
1851         struct ixgbe_rx_buffer *new_buff;
1852         u16 nta = rx_ring->next_to_alloc;
1853
1854         new_buff = &rx_ring->rx_buffer_info[nta];
1855
1856         /* update, and store next to alloc */
1857         nta++;
1858         rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
1859
1860         /* transfer page from old buffer to new buffer */
1861         *new_buff = *old_buff;
1862
1863         /* sync the buffer for use by the device */
1864         dma_sync_single_range_for_device(rx_ring->dev, new_buff->dma,
1865                                          new_buff->page_offset,
1866                                          ixgbe_rx_bufsz(rx_ring),
1867                                          DMA_FROM_DEVICE);
1868 }
1869
1870 static inline bool ixgbe_page_is_reserved(struct page *page)
1871 {
1872         return (page_to_nid(page) != numa_mem_id()) || page_is_pfmemalloc(page);
1873 }
1874
1875 /**
1876  * ixgbe_add_rx_frag - Add contents of Rx buffer to sk_buff
1877  * @rx_ring: rx descriptor ring to transact packets on
1878  * @rx_buffer: buffer containing page to add
1879  * @rx_desc: descriptor containing length of buffer written by hardware
1880  * @skb: sk_buff to place the data into
1881  *
1882  * This function will add the data contained in rx_buffer->page to the skb.
1883  * This is done either through a direct copy if the data in the buffer is
1884  * less than the skb header size, otherwise it will just attach the page as
1885  * a frag to the skb.
1886  *
1887  * The function will then update the page offset if necessary and return
1888  * true if the buffer can be reused by the adapter.
1889  **/
1890 static bool ixgbe_add_rx_frag(struct ixgbe_ring *rx_ring,
1891                               struct ixgbe_rx_buffer *rx_buffer,
1892                               union ixgbe_adv_rx_desc *rx_desc,
1893                               struct sk_buff *skb)
1894 {
1895         struct page *page = rx_buffer->page;
1896         unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
1897 #if (PAGE_SIZE < 8192)
1898         unsigned int truesize = ixgbe_rx_bufsz(rx_ring);
1899 #else
1900         unsigned int truesize = ALIGN(size, L1_CACHE_BYTES);
1901         unsigned int last_offset = ixgbe_rx_pg_size(rx_ring) -
1902                                    ixgbe_rx_bufsz(rx_ring);
1903 #endif
1904
1905         if ((size <= IXGBE_RX_HDR_SIZE) && !skb_is_nonlinear(skb)) {
1906                 unsigned char *va = page_address(page) + rx_buffer->page_offset;
1907
1908                 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
1909
1910                 /* page is not reserved, we can reuse buffer as-is */
1911                 if (likely(!ixgbe_page_is_reserved(page)))
1912                         return true;
1913
1914                 /* this page cannot be reused so discard it */
1915                 __free_pages(page, ixgbe_rx_pg_order(rx_ring));
1916                 return false;
1917         }
1918
1919         skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
1920                         rx_buffer->page_offset, size, truesize);
1921
1922         /* avoid re-using remote pages */
1923         if (unlikely(ixgbe_page_is_reserved(page)))
1924                 return false;
1925
1926 #if (PAGE_SIZE < 8192)
1927         /* if we are only owner of page we can reuse it */
1928         if (unlikely(page_count(page) != 1))
1929                 return false;
1930
1931         /* flip page offset to other buffer */
1932         rx_buffer->page_offset ^= truesize;
1933 #else
1934         /* move offset up to the next cache line */
1935         rx_buffer->page_offset += truesize;
1936
1937         if (rx_buffer->page_offset > last_offset)
1938                 return false;
1939 #endif
1940
1941         /* Even if we own the page, we are not allowed to use atomic_set()
1942          * This would break get_page_unless_zero() users.
1943          */
1944         atomic_inc(&page->_count);
1945
1946         return true;
1947 }
1948
1949 static struct sk_buff *ixgbe_fetch_rx_buffer(struct ixgbe_ring *rx_ring,
1950                                              union ixgbe_adv_rx_desc *rx_desc)
1951 {
1952         struct ixgbe_rx_buffer *rx_buffer;
1953         struct sk_buff *skb;
1954         struct page *page;
1955
1956         rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
1957         page = rx_buffer->page;
1958         prefetchw(page);
1959
1960         skb = rx_buffer->skb;
1961
1962         if (likely(!skb)) {
1963                 void *page_addr = page_address(page) +
1964                                   rx_buffer->page_offset;
1965
1966                 /* prefetch first cache line of first page */
1967                 prefetch(page_addr);
1968 #if L1_CACHE_BYTES < 128
1969                 prefetch(page_addr + L1_CACHE_BYTES);
1970 #endif
1971
1972                 /* allocate a skb to store the frags */
1973                 skb = napi_alloc_skb(&rx_ring->q_vector->napi,
1974                                      IXGBE_RX_HDR_SIZE);
1975                 if (unlikely(!skb)) {
1976                         rx_ring->rx_stats.alloc_rx_buff_failed++;
1977                         return NULL;
1978                 }
1979
1980                 /*
1981                  * we will be copying header into skb->data in
1982                  * pskb_may_pull so it is in our interest to prefetch
1983                  * it now to avoid a possible cache miss
1984                  */
1985                 prefetchw(skb->data);
1986
1987                 /*
1988                  * Delay unmapping of the first packet. It carries the
1989                  * header information, HW may still access the header
1990                  * after the writeback.  Only unmap it when EOP is
1991                  * reached
1992                  */
1993                 if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
1994                         goto dma_sync;
1995
1996                 IXGBE_CB(skb)->dma = rx_buffer->dma;
1997         } else {
1998                 if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))
1999                         ixgbe_dma_sync_frag(rx_ring, skb);
2000
2001 dma_sync:
2002                 /* we are reusing so sync this buffer for CPU use */
2003                 dma_sync_single_range_for_cpu(rx_ring->dev,
2004                                               rx_buffer->dma,
2005                                               rx_buffer->page_offset,
2006                                               ixgbe_rx_bufsz(rx_ring),
2007                                               DMA_FROM_DEVICE);
2008
2009                 rx_buffer->skb = NULL;
2010         }
2011
2012         /* pull page into skb */
2013         if (ixgbe_add_rx_frag(rx_ring, rx_buffer, rx_desc, skb)) {
2014                 /* hand second half of page back to the ring */
2015                 ixgbe_reuse_rx_page(rx_ring, rx_buffer);
2016         } else if (IXGBE_CB(skb)->dma == rx_buffer->dma) {
2017                 /* the page has been released from the ring */
2018                 IXGBE_CB(skb)->page_released = true;
2019         } else {
2020                 /* we are not reusing the buffer so unmap it */
2021                 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
2022                                ixgbe_rx_pg_size(rx_ring),
2023                                DMA_FROM_DEVICE);
2024         }
2025
2026         /* clear contents of buffer_info */
2027         rx_buffer->page = NULL;
2028
2029         return skb;
2030 }
2031
2032 /**
2033  * ixgbe_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
2034  * @q_vector: structure containing interrupt and ring information
2035  * @rx_ring: rx descriptor ring to transact packets on
2036  * @budget: Total limit on number of packets to process
2037  *
2038  * This function provides a "bounce buffer" approach to Rx interrupt
2039  * processing.  The advantage to this is that on systems that have
2040  * expensive overhead for IOMMU access this provides a means of avoiding
2041  * it by maintaining the mapping of the page to the syste.
2042  *
2043  * Returns amount of work completed
2044  **/
2045 static int ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,
2046                                struct ixgbe_ring *rx_ring,
2047                                const int budget)
2048 {
2049         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
2050 #ifdef IXGBE_FCOE
2051         struct ixgbe_adapter *adapter = q_vector->adapter;
2052         int ddp_bytes;
2053         unsigned int mss = 0;
2054 #endif /* IXGBE_FCOE */
2055         u16 cleaned_count = ixgbe_desc_unused(rx_ring);
2056
2057         while (likely(total_rx_packets < budget)) {
2058                 union ixgbe_adv_rx_desc *rx_desc;
2059                 struct sk_buff *skb;
2060
2061                 /* return some buffers to hardware, one at a time is too slow */
2062                 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
2063                         ixgbe_alloc_rx_buffers(rx_ring, cleaned_count);
2064                         cleaned_count = 0;
2065                 }
2066
2067                 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ring->next_to_clean);
2068
2069                 if (!rx_desc->wb.upper.status_error)
2070                         break;
2071
2072                 /* This memory barrier is needed to keep us from reading
2073                  * any other fields out of the rx_desc until we know the
2074                  * descriptor has been written back
2075                  */
2076                 dma_rmb();
2077
2078                 /* retrieve a buffer from the ring */
2079                 skb = ixgbe_fetch_rx_buffer(rx_ring, rx_desc);
2080
2081                 /* exit if we failed to retrieve a buffer */
2082                 if (!skb)
2083                         break;
2084
2085                 cleaned_count++;
2086
2087                 /* place incomplete frames back on ring for completion */
2088                 if (ixgbe_is_non_eop(rx_ring, rx_desc, skb))
2089                         continue;
2090
2091                 /* verify the packet layout is correct */
2092                 if (ixgbe_cleanup_headers(rx_ring, rx_desc, skb))
2093                         continue;
2094
2095                 /* probably a little skewed due to removing CRC */
2096                 total_rx_bytes += skb->len;
2097
2098                 /* populate checksum, timestamp, VLAN, and protocol */
2099                 ixgbe_process_skb_fields(rx_ring, rx_desc, skb);
2100
2101 #ifdef IXGBE_FCOE
2102                 /* if ddp, not passing to ULD unless for FCP_RSP or error */
2103                 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc)) {
2104                         ddp_bytes = ixgbe_fcoe_ddp(adapter, rx_desc, skb);
2105                         /* include DDPed FCoE data */
2106                         if (ddp_bytes > 0) {
2107                                 if (!mss) {
2108                                         mss = rx_ring->netdev->mtu -
2109                                                 sizeof(struct fcoe_hdr) -
2110                                                 sizeof(struct fc_frame_header) -
2111                                                 sizeof(struct fcoe_crc_eof);
2112                                         if (mss > 512)
2113                                                 mss &= ~511;
2114                                 }
2115                                 total_rx_bytes += ddp_bytes;
2116                                 total_rx_packets += DIV_ROUND_UP(ddp_bytes,
2117                                                                  mss);
2118                         }
2119                         if (!ddp_bytes) {
2120                                 dev_kfree_skb_any(skb);
2121                                 continue;
2122                         }
2123                 }
2124
2125 #endif /* IXGBE_FCOE */
2126                 skb_mark_napi_id(skb, &q_vector->napi);
2127                 ixgbe_rx_skb(q_vector, skb);
2128
2129                 /* update budget accounting */
2130                 total_rx_packets++;
2131         }
2132
2133         u64_stats_update_begin(&rx_ring->syncp);
2134         rx_ring->stats.packets += total_rx_packets;
2135         rx_ring->stats.bytes += total_rx_bytes;
2136         u64_stats_update_end(&rx_ring->syncp);
2137         q_vector->rx.total_packets += total_rx_packets;
2138         q_vector->rx.total_bytes += total_rx_bytes;
2139
2140         return total_rx_packets;
2141 }
2142
2143 #ifdef CONFIG_NET_RX_BUSY_POLL
2144 /* must be called with local_bh_disable()d */
2145 static int ixgbe_low_latency_recv(struct napi_struct *napi)
2146 {
2147         struct ixgbe_q_vector *q_vector =
2148                         container_of(napi, struct ixgbe_q_vector, napi);
2149         struct ixgbe_adapter *adapter = q_vector->adapter;
2150         struct ixgbe_ring  *ring;
2151         int found = 0;
2152
2153         if (test_bit(__IXGBE_DOWN, &adapter->state))
2154                 return LL_FLUSH_FAILED;
2155
2156         if (!ixgbe_qv_lock_poll(q_vector))
2157                 return LL_FLUSH_BUSY;
2158
2159         ixgbe_for_each_ring(ring, q_vector->rx) {
2160                 found = ixgbe_clean_rx_irq(q_vector, ring, 4);
2161 #ifdef BP_EXTENDED_STATS
2162                 if (found)
2163                         ring->stats.cleaned += found;
2164                 else
2165                         ring->stats.misses++;
2166 #endif
2167                 if (found)
2168                         break;
2169         }
2170
2171         ixgbe_qv_unlock_poll(q_vector);
2172
2173         return found;
2174 }
2175 #endif  /* CONFIG_NET_RX_BUSY_POLL */
2176
2177 /**
2178  * ixgbe_configure_msix - Configure MSI-X hardware
2179  * @adapter: board private structure
2180  *
2181  * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
2182  * interrupts.
2183  **/
2184 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
2185 {
2186         struct ixgbe_q_vector *q_vector;
2187         int v_idx;
2188         u32 mask;
2189
2190         /* Populate MSIX to EITR Select */
2191         if (adapter->num_vfs > 32) {
2192                 u32 eitrsel = (1 << (adapter->num_vfs - 32)) - 1;
2193                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, eitrsel);
2194         }
2195
2196         /*
2197          * Populate the IVAR table and set the ITR values to the
2198          * corresponding register.
2199          */
2200         for (v_idx = 0; v_idx < adapter->num_q_vectors; v_idx++) {
2201                 struct ixgbe_ring *ring;
2202                 q_vector = adapter->q_vector[v_idx];
2203
2204                 ixgbe_for_each_ring(ring, q_vector->rx)
2205                         ixgbe_set_ivar(adapter, 0, ring->reg_idx, v_idx);
2206
2207                 ixgbe_for_each_ring(ring, q_vector->tx)
2208                         ixgbe_set_ivar(adapter, 1, ring->reg_idx, v_idx);
2209
2210                 ixgbe_write_eitr(q_vector);
2211         }
2212
2213         switch (adapter->hw.mac.type) {
2214         case ixgbe_mac_82598EB:
2215                 ixgbe_set_ivar(adapter, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX,
2216                                v_idx);
2217                 break;
2218         case ixgbe_mac_82599EB:
2219         case ixgbe_mac_X540:
2220         case ixgbe_mac_X550:
2221         case ixgbe_mac_X550EM_x:
2222                 ixgbe_set_ivar(adapter, -1, 1, v_idx);
2223                 break;
2224         default:
2225                 break;
2226         }
2227         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
2228
2229         /* set up to autoclear timer, and the vectors */
2230         mask = IXGBE_EIMS_ENABLE_MASK;
2231         mask &= ~(IXGBE_EIMS_OTHER |
2232                   IXGBE_EIMS_MAILBOX |
2233                   IXGBE_EIMS_LSC);
2234
2235         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
2236 }
2237
2238 enum latency_range {
2239         lowest_latency = 0,
2240         low_latency = 1,
2241         bulk_latency = 2,
2242         latency_invalid = 255
2243 };
2244
2245 /**
2246  * ixgbe_update_itr - update the dynamic ITR value based on statistics
2247  * @q_vector: structure containing interrupt and ring information
2248  * @ring_container: structure containing ring performance data
2249  *
2250  *      Stores a new ITR value based on packets and byte
2251  *      counts during the last interrupt.  The advantage of per interrupt
2252  *      computation is faster updates and more accurate ITR for the current
2253  *      traffic pattern.  Constants in this function were computed
2254  *      based on theoretical maximum wire speed and thresholds were set based
2255  *      on testing data as well as attempting to minimize response time
2256  *      while increasing bulk throughput.
2257  *      this functionality is controlled by the InterruptThrottleRate module
2258  *      parameter (see ixgbe_param.c)
2259  **/
2260 static void ixgbe_update_itr(struct ixgbe_q_vector *q_vector,
2261                              struct ixgbe_ring_container *ring_container)
2262 {
2263         int bytes = ring_container->total_bytes;
2264         int packets = ring_container->total_packets;
2265         u32 timepassed_us;
2266         u64 bytes_perint;
2267         u8 itr_setting = ring_container->itr;
2268
2269         if (packets == 0)
2270                 return;
2271
2272         /* simple throttlerate management
2273          *   0-10MB/s   lowest (100000 ints/s)
2274          *  10-20MB/s   low    (20000 ints/s)
2275          *  20-1249MB/s bulk   (12000 ints/s)
2276          */
2277         /* what was last interrupt timeslice? */
2278         timepassed_us = q_vector->itr >> 2;
2279         if (timepassed_us == 0)
2280                 return;
2281
2282         bytes_perint = bytes / timepassed_us; /* bytes/usec */
2283
2284         switch (itr_setting) {
2285         case lowest_latency:
2286                 if (bytes_perint > 10)
2287                         itr_setting = low_latency;
2288                 break;
2289         case low_latency:
2290                 if (bytes_perint > 20)
2291                         itr_setting = bulk_latency;
2292                 else if (bytes_perint <= 10)
2293                         itr_setting = lowest_latency;
2294                 break;
2295         case bulk_latency:
2296                 if (bytes_perint <= 20)
2297                         itr_setting = low_latency;
2298                 break;
2299         }
2300
2301         /* clear work counters since we have the values we need */
2302         ring_container->total_bytes = 0;
2303         ring_container->total_packets = 0;
2304
2305         /* write updated itr to ring container */
2306         ring_container->itr = itr_setting;
2307 }
2308
2309 /**
2310  * ixgbe_write_eitr - write EITR register in hardware specific way
2311  * @q_vector: structure containing interrupt and ring information
2312  *
2313  * This function is made to be called by ethtool and by the driver
2314  * when it needs to update EITR registers at runtime.  Hardware
2315  * specific quirks/differences are taken care of here.
2316  */
2317 void ixgbe_write_eitr(struct ixgbe_q_vector *q_vector)
2318 {
2319         struct ixgbe_adapter *adapter = q_vector->adapter;
2320         struct ixgbe_hw *hw = &adapter->hw;
2321         int v_idx = q_vector->v_idx;
2322         u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
2323
2324         switch (adapter->hw.mac.type) {
2325         case ixgbe_mac_82598EB:
2326                 /* must write high and low 16 bits to reset counter */
2327                 itr_reg |= (itr_reg << 16);
2328                 break;
2329         case ixgbe_mac_82599EB:
2330         case ixgbe_mac_X540:
2331         case ixgbe_mac_X550:
2332         case ixgbe_mac_X550EM_x:
2333                 /*
2334                  * set the WDIS bit to not clear the timer bits and cause an
2335                  * immediate assertion of the interrupt
2336                  */
2337                 itr_reg |= IXGBE_EITR_CNT_WDIS;
2338                 break;
2339         default:
2340                 break;
2341         }
2342         IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg);
2343 }
2344
2345 static void ixgbe_set_itr(struct ixgbe_q_vector *q_vector)
2346 {
2347         u32 new_itr = q_vector->itr;
2348         u8 current_itr;
2349
2350         ixgbe_update_itr(q_vector, &q_vector->tx);
2351         ixgbe_update_itr(q_vector, &q_vector->rx);
2352
2353         current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
2354
2355         switch (current_itr) {
2356         /* counts and packets in update_itr are dependent on these numbers */
2357         case lowest_latency:
2358                 new_itr = IXGBE_100K_ITR;
2359                 break;
2360         case low_latency:
2361                 new_itr = IXGBE_20K_ITR;
2362                 break;
2363         case bulk_latency:
2364                 new_itr = IXGBE_12K_ITR;
2365                 break;
2366         default:
2367                 break;
2368         }
2369
2370         if (new_itr != q_vector->itr) {
2371                 /* do an exponential smoothing */
2372                 new_itr = (10 * new_itr * q_vector->itr) /
2373                           ((9 * new_itr) + q_vector->itr);
2374
2375                 /* save the algorithm value here */
2376                 q_vector->itr = new_itr;
2377
2378                 ixgbe_write_eitr(q_vector);
2379         }
2380 }
2381
2382 /**
2383  * ixgbe_check_overtemp_subtask - check for over temperature
2384  * @adapter: pointer to adapter
2385  **/
2386 static void ixgbe_check_overtemp_subtask(struct ixgbe_adapter *adapter)
2387 {
2388         struct ixgbe_hw *hw = &adapter->hw;
2389         u32 eicr = adapter->interrupt_event;
2390
2391         if (test_bit(__IXGBE_DOWN, &adapter->state))
2392                 return;
2393
2394         if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) &&
2395             !(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_EVENT))
2396                 return;
2397
2398         adapter->flags2 &= ~IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2399
2400         switch (hw->device_id) {
2401         case IXGBE_DEV_ID_82599_T3_LOM:
2402                 /*
2403                  * Since the warning interrupt is for both ports
2404                  * we don't have to check if:
2405                  *  - This interrupt wasn't for our port.
2406                  *  - We may have missed the interrupt so always have to
2407                  *    check if we  got a LSC
2408                  */
2409                 if (!(eicr & IXGBE_EICR_GPI_SDP0_8259X) &&
2410                     !(eicr & IXGBE_EICR_LSC))
2411                         return;
2412
2413                 if (!(eicr & IXGBE_EICR_LSC) && hw->mac.ops.check_link) {
2414                         u32 speed;
2415                         bool link_up = false;
2416
2417                         hw->mac.ops.check_link(hw, &speed, &link_up, false);
2418
2419                         if (link_up)
2420                                 return;
2421                 }
2422
2423                 /* Check if this is not due to overtemp */
2424                 if (hw->phy.ops.check_overtemp(hw) != IXGBE_ERR_OVERTEMP)
2425                         return;
2426
2427                 break;
2428         default:
2429                 if (adapter->hw.mac.type >= ixgbe_mac_X540)
2430                         return;
2431                 if (!(eicr & IXGBE_EICR_GPI_SDP0(hw)))
2432                         return;
2433                 break;
2434         }
2435         e_crit(drv, "%s\n", ixgbe_overheat_msg);
2436
2437         adapter->interrupt_event = 0;
2438 }
2439
2440 static void ixgbe_check_fan_failure(struct ixgbe_adapter *adapter, u32 eicr)
2441 {
2442         struct ixgbe_hw *hw = &adapter->hw;
2443
2444         if ((adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) &&
2445             (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2446                 e_crit(probe, "Fan has stopped, replace the adapter\n");
2447                 /* write to clear the interrupt */
2448                 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2449         }
2450 }
2451
2452 static void ixgbe_check_overtemp_event(struct ixgbe_adapter *adapter, u32 eicr)
2453 {
2454         struct ixgbe_hw *hw = &adapter->hw;
2455
2456         if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE))
2457                 return;
2458
2459         switch (adapter->hw.mac.type) {
2460         case ixgbe_mac_82599EB:
2461                 /*
2462                  * Need to check link state so complete overtemp check
2463                  * on service task
2464                  */
2465                 if (((eicr & IXGBE_EICR_GPI_SDP0(hw)) ||
2466                      (eicr & IXGBE_EICR_LSC)) &&
2467                     (!test_bit(__IXGBE_DOWN, &adapter->state))) {
2468                         adapter->interrupt_event = eicr;
2469                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2470                         ixgbe_service_event_schedule(adapter);
2471                         return;
2472                 }
2473                 return;
2474         case ixgbe_mac_X540:
2475                 if (!(eicr & IXGBE_EICR_TS))
2476                         return;
2477                 break;
2478         default:
2479                 return;
2480         }
2481
2482         e_crit(drv, "%s\n", ixgbe_overheat_msg);
2483 }
2484
2485 static inline bool ixgbe_is_sfp(struct ixgbe_hw *hw)
2486 {
2487         switch (hw->mac.type) {
2488         case ixgbe_mac_82598EB:
2489                 if (hw->phy.type == ixgbe_phy_nl)
2490                         return true;
2491                 return false;
2492         case ixgbe_mac_82599EB:
2493         case ixgbe_mac_X550EM_x:
2494                 switch (hw->mac.ops.get_media_type(hw)) {
2495                 case ixgbe_media_type_fiber:
2496                 case ixgbe_media_type_fiber_qsfp:
2497                         return true;
2498                 default:
2499                         return false;
2500                 }
2501         default:
2502                 return false;
2503         }
2504 }
2505
2506 static void ixgbe_check_sfp_event(struct ixgbe_adapter *adapter, u32 eicr)
2507 {
2508         struct ixgbe_hw *hw = &adapter->hw;
2509         u32 eicr_mask = IXGBE_EICR_GPI_SDP2(hw);
2510
2511         if (!ixgbe_is_sfp(hw))
2512                 return;
2513
2514         /* Later MAC's use different SDP */
2515         if (hw->mac.type >= ixgbe_mac_X540)
2516                 eicr_mask = IXGBE_EICR_GPI_SDP0_X540;
2517
2518         if (eicr & eicr_mask) {
2519                 /* Clear the interrupt */
2520                 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr_mask);
2521                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2522                         adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
2523                         adapter->sfp_poll_time = 0;
2524                         ixgbe_service_event_schedule(adapter);
2525                 }
2526         }
2527
2528         if (adapter->hw.mac.type == ixgbe_mac_82599EB &&
2529             (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2530                 /* Clear the interrupt */
2531                 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2532                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2533                         adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
2534                         ixgbe_service_event_schedule(adapter);
2535                 }
2536         }
2537 }
2538
2539 static void ixgbe_check_lsc(struct ixgbe_adapter *adapter)
2540 {
2541         struct ixgbe_hw *hw = &adapter->hw;
2542
2543         adapter->lsc_int++;
2544         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
2545         adapter->link_check_timeout = jiffies;
2546         if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2547                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
2548                 IXGBE_WRITE_FLUSH(hw);
2549                 ixgbe_service_event_schedule(adapter);
2550         }
2551 }
2552
2553 static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter *adapter,
2554                                            u64 qmask)
2555 {
2556         u32 mask;
2557         struct ixgbe_hw *hw = &adapter->hw;
2558
2559         switch (hw->mac.type) {
2560         case ixgbe_mac_82598EB:
2561                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2562                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask);
2563                 break;
2564         case ixgbe_mac_82599EB:
2565         case ixgbe_mac_X540:
2566         case ixgbe_mac_X550:
2567         case ixgbe_mac_X550EM_x:
2568                 mask = (qmask & 0xFFFFFFFF);
2569                 if (mask)
2570                         IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask);
2571                 mask = (qmask >> 32);
2572                 if (mask)
2573                         IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask);
2574                 break;
2575         default:
2576                 break;
2577         }
2578         /* skip the flush */
2579 }
2580
2581 static inline void ixgbe_irq_disable_queues(struct ixgbe_adapter *adapter,
2582                                             u64 qmask)
2583 {
2584         u32 mask;
2585         struct ixgbe_hw *hw = &adapter->hw;
2586
2587         switch (hw->mac.type) {
2588         case ixgbe_mac_82598EB:
2589                 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2590                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, mask);
2591                 break;
2592         case ixgbe_mac_82599EB:
2593         case ixgbe_mac_X540:
2594         case ixgbe_mac_X550:
2595         case ixgbe_mac_X550EM_x:
2596                 mask = (qmask & 0xFFFFFFFF);
2597                 if (mask)
2598                         IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask);
2599                 mask = (qmask >> 32);
2600                 if (mask)
2601                         IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(1), mask);
2602                 break;
2603         default:
2604                 break;
2605         }
2606         /* skip the flush */
2607 }
2608
2609 /**
2610  * ixgbe_irq_enable - Enable default interrupt generation settings
2611  * @adapter: board private structure
2612  **/
2613 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter, bool queues,
2614                                     bool flush)
2615 {
2616         struct ixgbe_hw *hw = &adapter->hw;
2617         u32 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
2618
2619         /* don't reenable LSC while waiting for link */
2620         if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
2621                 mask &= ~IXGBE_EIMS_LSC;
2622
2623         if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE)
2624                 switch (adapter->hw.mac.type) {
2625                 case ixgbe_mac_82599EB:
2626                         mask |= IXGBE_EIMS_GPI_SDP0(hw);
2627                         break;
2628                 case ixgbe_mac_X540:
2629                 case ixgbe_mac_X550:
2630                 case ixgbe_mac_X550EM_x:
2631                         mask |= IXGBE_EIMS_TS;
2632                         break;
2633                 default:
2634                         break;
2635                 }
2636         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
2637                 mask |= IXGBE_EIMS_GPI_SDP1(hw);
2638         switch (adapter->hw.mac.type) {
2639         case ixgbe_mac_82599EB:
2640                 mask |= IXGBE_EIMS_GPI_SDP1(hw);
2641                 mask |= IXGBE_EIMS_GPI_SDP2(hw);
2642                 /* fall through */
2643         case ixgbe_mac_X540:
2644         case ixgbe_mac_X550:
2645         case ixgbe_mac_X550EM_x:
2646                 if (adapter->hw.device_id == IXGBE_DEV_ID_X550EM_X_SFP)
2647                         mask |= IXGBE_EIMS_GPI_SDP0(&adapter->hw);
2648                 if (adapter->hw.phy.type == ixgbe_phy_x550em_ext_t)
2649                         mask |= IXGBE_EICR_GPI_SDP0_X540;
2650                 mask |= IXGBE_EIMS_ECC;
2651                 mask |= IXGBE_EIMS_MAILBOX;
2652                 break;
2653         default:
2654                 break;
2655         }
2656
2657         if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) &&
2658             !(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
2659                 mask |= IXGBE_EIMS_FLOW_DIR;
2660
2661         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
2662         if (queues)
2663                 ixgbe_irq_enable_queues(adapter, ~0);
2664         if (flush)
2665                 IXGBE_WRITE_FLUSH(&adapter->hw);
2666 }
2667
2668 static irqreturn_t ixgbe_msix_other(int irq, void *data)
2669 {
2670         struct ixgbe_adapter *adapter = data;
2671         struct ixgbe_hw *hw = &adapter->hw;
2672         u32 eicr;
2673
2674         /*
2675          * Workaround for Silicon errata.  Use clear-by-write instead
2676          * of clear-by-read.  Reading with EICS will return the
2677          * interrupt causes without clearing, which later be done
2678          * with the write to EICR.
2679          */
2680         eicr = IXGBE_READ_REG(hw, IXGBE_EICS);
2681
2682         /* The lower 16bits of the EICR register are for the queue interrupts
2683          * which should be masked here in order to not accidentally clear them if
2684          * the bits are high when ixgbe_msix_other is called. There is a race
2685          * condition otherwise which results in possible performance loss
2686          * especially if the ixgbe_msix_other interrupt is triggering
2687          * consistently (as it would when PPS is turned on for the X540 device)
2688          */
2689         eicr &= 0xFFFF0000;
2690
2691         IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr);
2692
2693         if (eicr & IXGBE_EICR_LSC)
2694                 ixgbe_check_lsc(adapter);
2695
2696         if (eicr & IXGBE_EICR_MAILBOX)
2697                 ixgbe_msg_task(adapter);
2698
2699         switch (hw->mac.type) {
2700         case ixgbe_mac_82599EB:
2701         case ixgbe_mac_X540:
2702         case ixgbe_mac_X550:
2703         case ixgbe_mac_X550EM_x:
2704                 if (hw->phy.type == ixgbe_phy_x550em_ext_t &&
2705                     (eicr & IXGBE_EICR_GPI_SDP0_X540)) {
2706                         adapter->flags2 |= IXGBE_FLAG2_PHY_INTERRUPT;
2707                         ixgbe_service_event_schedule(adapter);
2708                         IXGBE_WRITE_REG(hw, IXGBE_EICR,
2709                                         IXGBE_EICR_GPI_SDP0_X540);
2710                 }
2711                 if (eicr & IXGBE_EICR_ECC) {
2712                         e_info(link, "Received ECC Err, initiating reset\n");
2713                         adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
2714                         ixgbe_service_event_schedule(adapter);
2715                         IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
2716                 }
2717                 /* Handle Flow Director Full threshold interrupt */
2718                 if (eicr & IXGBE_EICR_FLOW_DIR) {
2719                         int reinit_count = 0;
2720                         int i;
2721                         for (i = 0; i < adapter->num_tx_queues; i++) {
2722                                 struct ixgbe_ring *ring = adapter->tx_ring[i];
2723                                 if (test_and_clear_bit(__IXGBE_TX_FDIR_INIT_DONE,
2724                                                        &ring->state))
2725                                         reinit_count++;
2726                         }
2727                         if (reinit_count) {
2728                                 /* no more flow director interrupts until after init */
2729                                 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_FLOW_DIR);
2730                                 adapter->flags2 |= IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
2731                                 ixgbe_service_event_schedule(adapter);
2732                         }
2733                 }
2734                 ixgbe_check_sfp_event(adapter, eicr);
2735                 ixgbe_check_overtemp_event(adapter, eicr);
2736                 break;
2737         default:
2738                 break;
2739         }
2740
2741         ixgbe_check_fan_failure(adapter, eicr);
2742
2743         if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
2744                 ixgbe_ptp_check_pps_event(adapter, eicr);
2745
2746         /* re-enable the original interrupt state, no lsc, no queues */
2747         if (!test_bit(__IXGBE_DOWN, &adapter->state))
2748                 ixgbe_irq_enable(adapter, false, false);
2749
2750         return IRQ_HANDLED;
2751 }
2752
2753 static irqreturn_t ixgbe_msix_clean_rings(int irq, void *data)
2754 {
2755         struct ixgbe_q_vector *q_vector = data;
2756
2757         /* EIAM disabled interrupts (on this vector) for us */
2758
2759         if (q_vector->rx.ring || q_vector->tx.ring)
2760                 napi_schedule(&q_vector->napi);
2761
2762         return IRQ_HANDLED;
2763 }
2764
2765 /**
2766  * ixgbe_poll - NAPI Rx polling callback
2767  * @napi: structure for representing this polling device
2768  * @budget: how many packets driver is allowed to clean
2769  *
2770  * This function is used for legacy and MSI, NAPI mode
2771  **/
2772 int ixgbe_poll(struct napi_struct *napi, int budget)
2773 {
2774         struct ixgbe_q_vector *q_vector =
2775                                 container_of(napi, struct ixgbe_q_vector, napi);
2776         struct ixgbe_adapter *adapter = q_vector->adapter;
2777         struct ixgbe_ring *ring;
2778         int per_ring_budget;
2779         bool clean_complete = true;
2780
2781 #ifdef CONFIG_IXGBE_DCA
2782         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
2783                 ixgbe_update_dca(q_vector);
2784 #endif
2785
2786         ixgbe_for_each_ring(ring, q_vector->tx)
2787                 clean_complete &= !!ixgbe_clean_tx_irq(q_vector, ring);
2788
2789         if (!ixgbe_qv_lock_napi(q_vector))
2790                 return budget;
2791
2792         /* attempt to distribute budget to each queue fairly, but don't allow
2793          * the budget to go below 1 because we'll exit polling */
2794         if (q_vector->rx.count > 1)
2795                 per_ring_budget = max(budget/q_vector->rx.count, 1);
2796         else
2797                 per_ring_budget = budget;
2798
2799         ixgbe_for_each_ring(ring, q_vector->rx)
2800                 clean_complete &= (ixgbe_clean_rx_irq(q_vector, ring,
2801                                    per_ring_budget) < per_ring_budget);
2802
2803         ixgbe_qv_unlock_napi(q_vector);
2804         /* If all work not completed, return budget and keep polling */
2805         if (!clean_complete)
2806                 return budget;
2807
2808         /* all work done, exit the polling mode */
2809         napi_complete(napi);
2810         if (adapter->rx_itr_setting & 1)
2811                 ixgbe_set_itr(q_vector);
2812         if (!test_bit(__IXGBE_DOWN, &adapter->state))
2813                 ixgbe_irq_enable_queues(adapter, ((u64)1 << q_vector->v_idx));
2814
2815         return 0;
2816 }
2817
2818 /**
2819  * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
2820  * @adapter: board private structure
2821  *
2822  * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
2823  * interrupts from the kernel.
2824  **/
2825 static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
2826 {
2827         struct net_device *netdev = adapter->netdev;
2828         int vector, err;
2829         int ri = 0, ti = 0;
2830
2831         for (vector = 0; vector < adapter->num_q_vectors; vector++) {
2832                 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
2833                 struct msix_entry *entry = &adapter->msix_entries[vector];
2834
2835                 if (q_vector->tx.ring && q_vector->rx.ring) {
2836                         snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2837                                  "%s-%s-%d", netdev->name, "TxRx", ri++);
2838                         ti++;
2839                 } else if (q_vector->rx.ring) {
2840                         snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2841                                  "%s-%s-%d", netdev->name, "rx", ri++);
2842                 } else if (q_vector->tx.ring) {
2843                         snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2844                                  "%s-%s-%d", netdev->name, "tx", ti++);
2845                 } else {
2846                         /* skip this unused q_vector */
2847                         continue;
2848                 }
2849                 err = request_irq(entry->vector, &ixgbe_msix_clean_rings, 0,
2850                                   q_vector->name, q_vector);
2851                 if (err) {
2852                         e_err(probe, "request_irq failed for MSIX interrupt "
2853                               "Error: %d\n", err);
2854                         goto free_queue_irqs;
2855                 }
2856                 /* If Flow Director is enabled, set interrupt affinity */
2857                 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
2858                         /* assign the mask for this irq */
2859                         irq_set_affinity_hint(entry->vector,
2860                                               &q_vector->affinity_mask);
2861                 }
2862         }
2863
2864         err = request_irq(adapter->msix_entries[vector].vector,
2865                           ixgbe_msix_other, 0, netdev->name, adapter);
2866         if (err) {
2867                 e_err(probe, "request_irq for msix_other failed: %d\n", err);
2868                 goto free_queue_irqs;
2869         }
2870
2871         return 0;
2872
2873 free_queue_irqs:
2874         while (vector) {
2875                 vector--;
2876                 irq_set_affinity_hint(adapter->msix_entries[vector].vector,
2877                                       NULL);
2878                 free_irq(adapter->msix_entries[vector].vector,
2879                          adapter->q_vector[vector]);
2880         }
2881         adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
2882         pci_disable_msix(adapter->pdev);
2883         kfree(adapter->msix_entries);
2884         adapter->msix_entries = NULL;
2885         return err;
2886 }
2887
2888 /**
2889  * ixgbe_intr - legacy mode Interrupt Handler
2890  * @irq: interrupt number
2891  * @data: pointer to a network interface device structure
2892  **/
2893 static irqreturn_t ixgbe_intr(int irq, void *data)
2894 {
2895         struct ixgbe_adapter *adapter = data;
2896         struct ixgbe_hw *hw = &adapter->hw;
2897         struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
2898         u32 eicr;
2899
2900         /*
2901          * Workaround for silicon errata #26 on 82598.  Mask the interrupt
2902          * before the read of EICR.
2903          */
2904         IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK);
2905
2906         /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
2907          * therefore no explicit interrupt disable is necessary */
2908         eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
2909         if (!eicr) {
2910                 /*
2911                  * shared interrupt alert!
2912                  * make sure interrupts are enabled because the read will
2913                  * have disabled interrupts due to EIAM
2914                  * finish the workaround of silicon errata on 82598.  Unmask
2915                  * the interrupt that we masked before the EICR read.
2916                  */
2917                 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2918                         ixgbe_irq_enable(adapter, true, true);
2919                 return IRQ_NONE;        /* Not our interrupt */
2920         }
2921
2922         if (eicr & IXGBE_EICR_LSC)
2923                 ixgbe_check_lsc(adapter);
2924
2925         switch (hw->mac.type) {
2926         case ixgbe_mac_82599EB:
2927                 ixgbe_check_sfp_event(adapter, eicr);
2928                 /* Fall through */
2929         case ixgbe_mac_X540:
2930         case ixgbe_mac_X550:
2931         case ixgbe_mac_X550EM_x:
2932                 if (eicr & IXGBE_EICR_ECC) {
2933                         e_info(link, "Received ECC Err, initiating reset\n");
2934                         adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
2935                         ixgbe_service_event_schedule(adapter);
2936                         IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
2937                 }
2938                 ixgbe_check_overtemp_event(adapter, eicr);
2939                 break;
2940         default:
2941                 break;
2942         }
2943
2944         ixgbe_check_fan_failure(adapter, eicr);
2945         if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
2946                 ixgbe_ptp_check_pps_event(adapter, eicr);
2947
2948         /* would disable interrupts here but EIAM disabled it */
2949         napi_schedule(&q_vector->napi);
2950
2951         /*
2952          * re-enable link(maybe) and non-queue interrupts, no flush.
2953          * ixgbe_poll will re-enable the queue interrupts
2954          */
2955         if (!test_bit(__IXGBE_DOWN, &adapter->state))
2956                 ixgbe_irq_enable(adapter, false, false);
2957
2958         return IRQ_HANDLED;
2959 }
2960
2961 /**
2962  * ixgbe_request_irq - initialize interrupts
2963  * @adapter: board private structure
2964  *
2965  * Attempts to configure interrupts using the best available
2966  * capabilities of the hardware and kernel.
2967  **/
2968 static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
2969 {
2970         struct net_device *netdev = adapter->netdev;
2971         int err;
2972
2973         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
2974                 err = ixgbe_request_msix_irqs(adapter);
2975         else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED)
2976                 err = request_irq(adapter->pdev->irq, ixgbe_intr, 0,
2977                                   netdev->name, adapter);
2978         else
2979                 err = request_irq(adapter->pdev->irq, ixgbe_intr, IRQF_SHARED,
2980                                   netdev->name, adapter);
2981
2982         if (err)
2983                 e_err(probe, "request_irq failed, Error %d\n", err);
2984
2985         return err;
2986 }
2987
2988 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
2989 {
2990         int vector;
2991
2992         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
2993                 free_irq(adapter->pdev->irq, adapter);
2994                 return;
2995         }
2996
2997         for (vector = 0; vector < adapter->num_q_vectors; vector++) {
2998                 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
2999                 struct msix_entry *entry = &adapter->msix_entries[vector];
3000
3001                 /* free only the irqs that were actually requested */
3002                 if (!q_vector->rx.ring && !q_vector->tx.ring)
3003                         continue;
3004
3005                 /* clear the affinity_mask in the IRQ descriptor */
3006                 irq_set_affinity_hint(entry->vector, NULL);
3007
3008                 free_irq(entry->vector, q_vector);
3009         }
3010
3011         free_irq(adapter->msix_entries[vector++].vector, adapter);
3012 }
3013
3014 /**
3015  * ixgbe_irq_disable - Mask off interrupt generation on the NIC
3016  * @adapter: board private structure
3017  **/
3018 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
3019 {
3020         switch (adapter->hw.mac.type) {
3021         case ixgbe_mac_82598EB:
3022                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
3023                 break;
3024         case ixgbe_mac_82599EB:
3025         case ixgbe_mac_X540:
3026         case ixgbe_mac_X550:
3027         case ixgbe_mac_X550EM_x:
3028                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000);
3029                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0);
3030                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0);
3031                 break;
3032         default:
3033                 break;
3034         }
3035         IXGBE_WRITE_FLUSH(&adapter->hw);
3036         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3037                 int vector;
3038
3039                 for (vector = 0; vector < adapter->num_q_vectors; vector++)
3040                         synchronize_irq(adapter->msix_entries[vector].vector);
3041
3042                 synchronize_irq(adapter->msix_entries[vector++].vector);
3043         } else {
3044                 synchronize_irq(adapter->pdev->irq);
3045         }
3046 }
3047
3048 /**
3049  * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
3050  *
3051  **/
3052 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
3053 {
3054         struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
3055
3056         ixgbe_write_eitr(q_vector);
3057
3058         ixgbe_set_ivar(adapter, 0, 0, 0);
3059         ixgbe_set_ivar(adapter, 1, 0, 0);
3060
3061         e_info(hw, "Legacy interrupt IVAR setup done\n");
3062 }
3063
3064 /**
3065  * ixgbe_configure_tx_ring - Configure 8259x Tx ring after Reset
3066  * @adapter: board private structure
3067  * @ring: structure containing ring specific data
3068  *
3069  * Configure the Tx descriptor ring after a reset.
3070  **/
3071 void ixgbe_configure_tx_ring(struct ixgbe_adapter *adapter,
3072                              struct ixgbe_ring *ring)
3073 {
3074         struct ixgbe_hw *hw = &adapter->hw;
3075         u64 tdba = ring->dma;
3076         int wait_loop = 10;
3077         u32 txdctl = IXGBE_TXDCTL_ENABLE;
3078         u8 reg_idx = ring->reg_idx;
3079
3080         /* disable queue to avoid issues while updating state */
3081         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), 0);
3082         IXGBE_WRITE_FLUSH(hw);
3083
3084         IXGBE_WRITE_REG(hw, IXGBE_TDBAL(reg_idx),
3085                         (tdba & DMA_BIT_MASK(32)));
3086         IXGBE_WRITE_REG(hw, IXGBE_TDBAH(reg_idx), (tdba >> 32));
3087         IXGBE_WRITE_REG(hw, IXGBE_TDLEN(reg_idx),
3088                         ring->count * sizeof(union ixgbe_adv_tx_desc));
3089         IXGBE_WRITE_REG(hw, IXGBE_TDH(reg_idx), 0);
3090         IXGBE_WRITE_REG(hw, IXGBE_TDT(reg_idx), 0);
3091         ring->tail = adapter->io_addr + IXGBE_TDT(reg_idx);
3092
3093         /*
3094          * set WTHRESH to encourage burst writeback, it should not be set
3095          * higher than 1 when:
3096          * - ITR is 0 as it could cause false TX hangs
3097          * - ITR is set to > 100k int/sec and BQL is enabled
3098          *
3099          * In order to avoid issues WTHRESH + PTHRESH should always be equal
3100          * to or less than the number of on chip descriptors, which is
3101          * currently 40.
3102          */
3103         if (!ring->q_vector || (ring->q_vector->itr < IXGBE_100K_ITR))
3104                 txdctl |= (1 << 16);    /* WTHRESH = 1 */
3105         else
3106                 txdctl |= (8 << 16);    /* WTHRESH = 8 */
3107
3108         /*
3109          * Setting PTHRESH to 32 both improves performance
3110          * and avoids a TX hang with DFP enabled
3111          */
3112         txdctl |= (1 << 8) |    /* HTHRESH = 1 */
3113                    32;          /* PTHRESH = 32 */
3114
3115         /* reinitialize flowdirector state */
3116         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3117                 ring->atr_sample_rate = adapter->atr_sample_rate;
3118                 ring->atr_count = 0;
3119                 set_bit(__IXGBE_TX_FDIR_INIT_DONE, &ring->state);
3120         } else {
3121                 ring->atr_sample_rate = 0;
3122         }
3123
3124         /* initialize XPS */
3125         if (!test_and_set_bit(__IXGBE_TX_XPS_INIT_DONE, &ring->state)) {
3126                 struct ixgbe_q_vector *q_vector = ring->q_vector;
3127
3128                 if (q_vector)
3129                         netif_set_xps_queue(ring->netdev,
3130                                             &q_vector->affinity_mask,
3131                                             ring->queue_index);
3132         }
3133
3134         clear_bit(__IXGBE_HANG_CHECK_ARMED, &ring->state);
3135
3136         /* enable queue */
3137         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), txdctl);
3138
3139         /* TXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3140         if (hw->mac.type == ixgbe_mac_82598EB &&
3141             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3142                 return;
3143
3144         /* poll to verify queue is enabled */
3145         do {
3146                 usleep_range(1000, 2000);
3147                 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
3148         } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE));
3149         if (!wait_loop)
3150                 e_err(drv, "Could not enable Tx Queue %d\n", reg_idx);
3151 }
3152
3153 static void ixgbe_setup_mtqc(struct ixgbe_adapter *adapter)
3154 {
3155         struct ixgbe_hw *hw = &adapter->hw;
3156         u32 rttdcs, mtqc;
3157         u8 tcs = netdev_get_num_tc(adapter->netdev);
3158
3159         if (hw->mac.type == ixgbe_mac_82598EB)
3160                 return;
3161
3162         /* disable the arbiter while setting MTQC */
3163         rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS);
3164         rttdcs |= IXGBE_RTTDCS_ARBDIS;
3165         IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3166
3167         /* set transmit pool layout */
3168         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3169                 mtqc = IXGBE_MTQC_VT_ENA;
3170                 if (tcs > 4)
3171                         mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3172                 else if (tcs > 1)
3173                         mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3174                 else if (adapter->ring_feature[RING_F_RSS].indices == 4)
3175                         mtqc |= IXGBE_MTQC_32VF;
3176                 else
3177                         mtqc |= IXGBE_MTQC_64VF;
3178         } else {
3179                 if (tcs > 4)
3180                         mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3181                 else if (tcs > 1)
3182                         mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3183                 else
3184                         mtqc = IXGBE_MTQC_64Q_1PB;
3185         }
3186
3187         IXGBE_WRITE_REG(hw, IXGBE_MTQC, mtqc);
3188
3189         /* Enable Security TX Buffer IFG for multiple pb */
3190         if (tcs) {
3191                 u32 sectx = IXGBE_READ_REG(hw, IXGBE_SECTXMINIFG);
3192                 sectx |= IXGBE_SECTX_DCB;
3193                 IXGBE_WRITE_REG(hw, IXGBE_SECTXMINIFG, sectx);
3194         }
3195
3196         /* re-enable the arbiter */
3197         rttdcs &= ~IXGBE_RTTDCS_ARBDIS;
3198         IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3199 }
3200
3201 /**
3202  * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
3203  * @adapter: board private structure
3204  *
3205  * Configure the Tx unit of the MAC after a reset.
3206  **/
3207 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
3208 {
3209         struct ixgbe_hw *hw = &adapter->hw;
3210         u32 dmatxctl;
3211         u32 i;
3212
3213         ixgbe_setup_mtqc(adapter);
3214
3215         if (hw->mac.type != ixgbe_mac_82598EB) {
3216                 /* DMATXCTL.EN must be before Tx queues are enabled */
3217                 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
3218                 dmatxctl |= IXGBE_DMATXCTL_TE;
3219                 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl);
3220         }
3221
3222         /* Setup the HW Tx Head and Tail descriptor pointers */
3223         for (i = 0; i < adapter->num_tx_queues; i++)
3224                 ixgbe_configure_tx_ring(adapter, adapter->tx_ring[i]);
3225 }
3226
3227 static void ixgbe_enable_rx_drop(struct ixgbe_adapter *adapter,
3228                                  struct ixgbe_ring *ring)
3229 {
3230         struct ixgbe_hw *hw = &adapter->hw;
3231         u8 reg_idx = ring->reg_idx;
3232         u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3233
3234         srrctl |= IXGBE_SRRCTL_DROP_EN;
3235
3236         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3237 }
3238
3239 static void ixgbe_disable_rx_drop(struct ixgbe_adapter *adapter,
3240                                   struct ixgbe_ring *ring)
3241 {
3242         struct ixgbe_hw *hw = &adapter->hw;
3243         u8 reg_idx = ring->reg_idx;
3244         u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3245
3246         srrctl &= ~IXGBE_SRRCTL_DROP_EN;
3247
3248         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3249 }
3250
3251 #ifdef CONFIG_IXGBE_DCB
3252 void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3253 #else
3254 static void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3255 #endif
3256 {
3257         int i;
3258         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
3259
3260         if (adapter->ixgbe_ieee_pfc)
3261                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
3262
3263         /*
3264          * We should set the drop enable bit if:
3265          *  SR-IOV is enabled
3266          *   or
3267          *  Number of Rx queues > 1 and flow control is disabled
3268          *
3269          *  This allows us to avoid head of line blocking for security
3270          *  and performance reasons.
3271          */
3272         if (adapter->num_vfs || (adapter->num_rx_queues > 1 &&
3273             !(adapter->hw.fc.current_mode & ixgbe_fc_tx_pause) && !pfc_en)) {
3274                 for (i = 0; i < adapter->num_rx_queues; i++)
3275                         ixgbe_enable_rx_drop(adapter, adapter->rx_ring[i]);
3276         } else {
3277                 for (i = 0; i < adapter->num_rx_queues; i++)
3278                         ixgbe_disable_rx_drop(adapter, adapter->rx_ring[i]);
3279         }
3280 }
3281
3282 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
3283
3284 static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter,
3285                                    struct ixgbe_ring *rx_ring)
3286 {
3287         struct ixgbe_hw *hw = &adapter->hw;
3288         u32 srrctl;
3289         u8 reg_idx = rx_ring->reg_idx;
3290
3291         if (hw->mac.type == ixgbe_mac_82598EB) {
3292                 u16 mask = adapter->ring_feature[RING_F_RSS].mask;
3293
3294                 /*
3295                  * if VMDq is not active we must program one srrctl register
3296                  * per RSS queue since we have enabled RDRXCTL.MVMEN
3297                  */
3298                 reg_idx &= mask;
3299         }
3300
3301         /* configure header buffer length, needed for RSC */
3302         srrctl = IXGBE_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
3303
3304         /* configure the packet buffer length */
3305         srrctl |= ixgbe_rx_bufsz(rx_ring) >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3306
3307         /* configure descriptor type */
3308         srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
3309
3310         IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3311 }
3312
3313 /**
3314  * Return a number of entries in the RSS indirection table
3315  *
3316  * @adapter: device handle
3317  *
3318  *  - 82598/82599/X540:     128
3319  *  - X550(non-SRIOV mode): 512
3320  *  - X550(SRIOV mode):     64
3321  */
3322 u32 ixgbe_rss_indir_tbl_entries(struct ixgbe_adapter *adapter)
3323 {
3324         if (adapter->hw.mac.type < ixgbe_mac_X550)
3325                 return 128;
3326         else if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
3327                 return 64;
3328         else
3329                 return 512;
3330 }
3331
3332 /**
3333  * Write the RETA table to HW
3334  *
3335  * @adapter: device handle
3336  *
3337  * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3338  */
3339 void ixgbe_store_reta(struct ixgbe_adapter *adapter)
3340 {
3341         u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3342         struct ixgbe_hw *hw = &adapter->hw;
3343         u32 reta = 0;
3344         u32 indices_multi;
3345         u8 *indir_tbl = adapter->rss_indir_tbl;
3346
3347         /* Fill out the redirection table as follows:
3348          *  - 82598:      8 bit wide entries containing pair of 4 bit RSS
3349          *    indices.
3350          *  - 82599/X540: 8 bit wide entries containing 4 bit RSS index
3351          *  - X550:       8 bit wide entries containing 6 bit RSS index
3352          */
3353         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
3354                 indices_multi = 0x11;
3355         else
3356                 indices_multi = 0x1;
3357
3358         /* Write redirection table to HW */
3359         for (i = 0; i < reta_entries; i++) {
3360                 reta |= indices_multi * indir_tbl[i] << (i & 0x3) * 8;
3361                 if ((i & 3) == 3) {
3362                         if (i < 128)
3363                                 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
3364                         else
3365                                 IXGBE_WRITE_REG(hw, IXGBE_ERETA((i >> 2) - 32),
3366                                                 reta);
3367                         reta = 0;
3368                 }
3369         }
3370 }
3371
3372 /**
3373  * Write the RETA table to HW (for x550 devices in SRIOV mode)
3374  *
3375  * @adapter: device handle
3376  *
3377  * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3378  */
3379 static void ixgbe_store_vfreta(struct ixgbe_adapter *adapter)
3380 {
3381         u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3382         struct ixgbe_hw *hw = &adapter->hw;
3383         u32 vfreta = 0;
3384         unsigned int pf_pool = adapter->num_vfs;
3385
3386         /* Write redirection table to HW */
3387         for (i = 0; i < reta_entries; i++) {
3388                 vfreta |= (u32)adapter->rss_indir_tbl[i] << (i & 0x3) * 8;
3389                 if ((i & 3) == 3) {
3390                         IXGBE_WRITE_REG(hw, IXGBE_PFVFRETA(i >> 2, pf_pool),
3391                                         vfreta);
3392                         vfreta = 0;
3393                 }
3394         }
3395 }
3396
3397 static void ixgbe_setup_reta(struct ixgbe_adapter *adapter)
3398 {
3399         struct ixgbe_hw *hw = &adapter->hw;
3400         u32 i, j;
3401         u32 reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3402         u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3403
3404         /* Program table for at least 2 queues w/ SR-IOV so that VFs can
3405          * make full use of any rings they may have.  We will use the
3406          * PSRTYPE register to control how many rings we use within the PF.
3407          */
3408         if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) && (rss_i < 2))
3409                 rss_i = 2;
3410
3411         /* Fill out hash function seeds */
3412         for (i = 0; i < 10; i++)
3413                 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), adapter->rss_key[i]);
3414
3415         /* Fill out redirection table */
3416         memset(adapter->rss_indir_tbl, 0, sizeof(adapter->rss_indir_tbl));
3417
3418         for (i = 0, j = 0; i < reta_entries; i++, j++) {
3419                 if (j == rss_i)
3420                         j = 0;
3421
3422                 adapter->rss_indir_tbl[i] = j;
3423         }
3424
3425         ixgbe_store_reta(adapter);
3426 }
3427
3428 static void ixgbe_setup_vfreta(struct ixgbe_adapter *adapter)
3429 {
3430         struct ixgbe_hw *hw = &adapter->hw;
3431         u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3432         unsigned int pf_pool = adapter->num_vfs;
3433         int i, j;
3434
3435         /* Fill out hash function seeds */
3436         for (i = 0; i < 10; i++)
3437                 IXGBE_WRITE_REG(hw, IXGBE_PFVFRSSRK(i, pf_pool),
3438                                 adapter->rss_key[i]);
3439
3440         /* Fill out the redirection table */
3441         for (i = 0, j = 0; i < 64; i++, j++) {
3442                 if (j == rss_i)
3443                         j = 0;
3444
3445                 adapter->rss_indir_tbl[i] = j;
3446         }
3447
3448         ixgbe_store_vfreta(adapter);
3449 }
3450
3451 static void ixgbe_setup_mrqc(struct ixgbe_adapter *adapter)
3452 {
3453         struct ixgbe_hw *hw = &adapter->hw;
3454         u32 mrqc = 0, rss_field = 0, vfmrqc = 0;
3455         u32 rxcsum;
3456
3457         /* Disable indicating checksum in descriptor, enables RSS hash */
3458         rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
3459         rxcsum |= IXGBE_RXCSUM_PCSD;
3460         IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
3461
3462         if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
3463                 if (adapter->ring_feature[RING_F_RSS].mask)
3464                         mrqc = IXGBE_MRQC_RSSEN;
3465         } else {
3466                 u8 tcs = netdev_get_num_tc(adapter->netdev);
3467
3468                 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3469                         if (tcs > 4)
3470                                 mrqc = IXGBE_MRQC_VMDQRT8TCEN;  /* 8 TCs */
3471                         else if (tcs > 1)
3472                                 mrqc = IXGBE_MRQC_VMDQRT4TCEN;  /* 4 TCs */
3473                         else if (adapter->ring_feature[RING_F_RSS].indices == 4)
3474                                 mrqc = IXGBE_MRQC_VMDQRSS32EN;
3475                         else
3476                                 mrqc = IXGBE_MRQC_VMDQRSS64EN;
3477                 } else {
3478                         if (tcs > 4)
3479                                 mrqc = IXGBE_MRQC_RTRSS8TCEN;
3480                         else if (tcs > 1)
3481                                 mrqc = IXGBE_MRQC_RTRSS4TCEN;
3482                         else
3483                                 mrqc = IXGBE_MRQC_RSSEN;
3484                 }
3485         }
3486
3487         /* Perform hash on these packet types */
3488         rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4 |
3489                      IXGBE_MRQC_RSS_FIELD_IPV4_TCP |
3490                      IXGBE_MRQC_RSS_FIELD_IPV6 |
3491                      IXGBE_MRQC_RSS_FIELD_IPV6_TCP;
3492
3493         if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
3494                 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP;
3495         if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
3496                 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
3497
3498         netdev_rss_key_fill(adapter->rss_key, sizeof(adapter->rss_key));
3499         if ((hw->mac.type >= ixgbe_mac_X550) &&
3500             (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) {
3501                 unsigned int pf_pool = adapter->num_vfs;
3502
3503                 /* Enable VF RSS mode */
3504                 mrqc |= IXGBE_MRQC_MULTIPLE_RSS;
3505                 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3506
3507                 /* Setup RSS through the VF registers */
3508                 ixgbe_setup_vfreta(adapter);
3509                 vfmrqc = IXGBE_MRQC_RSSEN;
3510                 vfmrqc |= rss_field;
3511                 IXGBE_WRITE_REG(hw, IXGBE_PFVFMRQC(pf_pool), vfmrqc);
3512         } else {
3513                 ixgbe_setup_reta(adapter);
3514                 mrqc |= rss_field;
3515                 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3516         }
3517 }
3518
3519 /**
3520  * ixgbe_configure_rscctl - enable RSC for the indicated ring
3521  * @adapter:    address of board private structure
3522  * @index:      index of ring to set
3523  **/
3524 static void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter,
3525                                    struct ixgbe_ring *ring)
3526 {
3527         struct ixgbe_hw *hw = &adapter->hw;
3528         u32 rscctrl;
3529         u8 reg_idx = ring->reg_idx;
3530
3531         if (!ring_is_rsc_enabled(ring))
3532                 return;
3533
3534         rscctrl = IXGBE_READ_REG(hw, IXGBE_RSCCTL(reg_idx));
3535         rscctrl |= IXGBE_RSCCTL_RSCEN;
3536         /*
3537          * we must limit the number of descriptors so that the
3538          * total size of max desc * buf_len is not greater
3539          * than 65536
3540          */
3541         rscctrl |= IXGBE_RSCCTL_MAXDESC_16;
3542         IXGBE_WRITE_REG(hw, IXGBE_RSCCTL(reg_idx), rscctrl);
3543 }
3544
3545 #define IXGBE_MAX_RX_DESC_POLL 10
3546 static void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter *adapter,
3547                                        struct ixgbe_ring *ring)
3548 {
3549         struct ixgbe_hw *hw = &adapter->hw;
3550         int wait_loop = IXGBE_MAX_RX_DESC_POLL;
3551         u32 rxdctl;
3552         u8 reg_idx = ring->reg_idx;
3553
3554         if (ixgbe_removed(hw->hw_addr))
3555                 return;
3556         /* RXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3557         if (hw->mac.type == ixgbe_mac_82598EB &&
3558             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3559                 return;
3560
3561         do {
3562                 usleep_range(1000, 2000);
3563                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3564         } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE));
3565
3566         if (!wait_loop) {
3567                 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not set within "
3568                       "the polling period\n", reg_idx);
3569         }
3570 }
3571
3572 void ixgbe_disable_rx_queue(struct ixgbe_adapter *adapter,
3573                             struct ixgbe_ring *ring)
3574 {
3575         struct ixgbe_hw *hw = &adapter->hw;
3576         int wait_loop = IXGBE_MAX_RX_DESC_POLL;
3577         u32 rxdctl;
3578         u8 reg_idx = ring->reg_idx;
3579
3580         if (ixgbe_removed(hw->hw_addr))
3581                 return;
3582         rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3583         rxdctl &= ~IXGBE_RXDCTL_ENABLE;
3584
3585         /* write value back with RXDCTL.ENABLE bit cleared */
3586         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
3587
3588         if (hw->mac.type == ixgbe_mac_82598EB &&
3589             !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3590                 return;
3591
3592         /* the hardware may take up to 100us to really disable the rx queue */
3593         do {
3594                 udelay(10);
3595                 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3596         } while (--wait_loop && (rxdctl & IXGBE_RXDCTL_ENABLE));
3597
3598         if (!wait_loop) {
3599                 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not cleared within "
3600                       "the polling period\n", reg_idx);
3601         }
3602 }
3603
3604 void ixgbe_configure_rx_ring(struct ixgbe_adapter *adapter,
3605                              struct ixgbe_ring *ring)
3606 {
3607         struct ixgbe_hw *hw = &adapter->hw;
3608         u64 rdba = ring->dma;
3609         u32 rxdctl;
3610         u8 reg_idx = ring->reg_idx;
3611
3612         /* disable queue to avoid issues while updating state */
3613         rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3614         ixgbe_disable_rx_queue(adapter, ring);
3615
3616         IXGBE_WRITE_REG(hw, IXGBE_RDBAL(reg_idx), (rdba & DMA_BIT_MASK(32)));
3617         IXGBE_WRITE_REG(hw, IXGBE_RDBAH(reg_idx), (rdba >> 32));
3618         IXGBE_WRITE_REG(hw, IXGBE_RDLEN(reg_idx),
3619                         ring->count * sizeof(union ixgbe_adv_rx_desc));
3620         IXGBE_WRITE_REG(hw, IXGBE_RDH(reg_idx), 0);
3621         IXGBE_WRITE_REG(hw, IXGBE_RDT(reg_idx), 0);
3622         ring->tail = adapter->io_addr + IXGBE_RDT(reg_idx);
3623
3624         ixgbe_configure_srrctl(adapter, ring);
3625         ixgbe_configure_rscctl(adapter, ring);
3626
3627         if (hw->mac.type == ixgbe_mac_82598EB) {
3628                 /*
3629                  * enable cache line friendly hardware writes:
3630                  * PTHRESH=32 descriptors (half the internal cache),
3631                  * this also removes ugly rx_no_buffer_count increment
3632                  * HTHRESH=4 descriptors (to minimize latency on fetch)
3633                  * WTHRESH=8 burst writeback up to two cache lines
3634                  */
3635                 rxdctl &= ~0x3FFFFF;
3636                 rxdctl |=  0x080420;
3637         }
3638
3639         /* enable receive descriptor ring */
3640         rxdctl |= IXGBE_RXDCTL_ENABLE;
3641         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
3642
3643         ixgbe_rx_desc_queue_enable(adapter, ring);
3644         ixgbe_alloc_rx_buffers(ring, ixgbe_desc_unused(ring));
3645 }
3646
3647 static void ixgbe_setup_psrtype(struct ixgbe_adapter *adapter)
3648 {
3649         struct ixgbe_hw *hw = &adapter->hw;
3650         int rss_i = adapter->ring_feature[RING_F_RSS].indices;
3651         u16 pool;
3652
3653         /* PSRTYPE must be initialized in non 82598 adapters */
3654         u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
3655                       IXGBE_PSRTYPE_UDPHDR |
3656                       IXGBE_PSRTYPE_IPV4HDR |
3657                       IXGBE_PSRTYPE_L2HDR |
3658                       IXGBE_PSRTYPE_IPV6HDR;
3659
3660         if (hw->mac.type == ixgbe_mac_82598EB)
3661                 return;
3662
3663         if (rss_i > 3)
3664                 psrtype |= 2 << 29;
3665         else if (rss_i > 1)
3666                 psrtype |= 1 << 29;
3667
3668         for_each_set_bit(pool, &adapter->fwd_bitmask, 32)
3669                 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype);
3670 }
3671
3672 static void ixgbe_configure_virtualization(struct ixgbe_adapter *adapter)
3673 {
3674         struct ixgbe_hw *hw = &adapter->hw;
3675         u32 reg_offset, vf_shift;
3676         u32 gcr_ext, vmdctl;
3677         int i;
3678
3679         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
3680                 return;
3681
3682         vmdctl = IXGBE_READ_REG(hw, IXGBE_VT_CTL);
3683         vmdctl |= IXGBE_VMD_CTL_VMDQ_EN;
3684         vmdctl &= ~IXGBE_VT_CTL_POOL_MASK;
3685         vmdctl |= VMDQ_P(0) << IXGBE_VT_CTL_POOL_SHIFT;
3686         vmdctl |= IXGBE_VT_CTL_REPLEN;
3687         IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vmdctl);
3688
3689         vf_shift = VMDQ_P(0) % 32;
3690         reg_offset = (VMDQ_P(0) >= 32) ? 1 : 0;
3691
3692         /* Enable only the PF's pool for Tx/Rx */
3693         IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset), (~0) << vf_shift);
3694         IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset ^ 1), reg_offset - 1);
3695         IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset), (~0) << vf_shift);
3696         IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset ^ 1), reg_offset - 1);
3697         if (adapter->bridge_mode == BRIDGE_MODE_VEB)
3698                 IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN);
3699
3700         /* Map PF MAC address in RAR Entry 0 to first pool following VFs */
3701         hw->mac.ops.set_vmdq(hw, 0, VMDQ_P(0));
3702
3703         /*
3704          * Set up VF register offsets for selected VT Mode,
3705          * i.e. 32 or 64 VFs for SR-IOV
3706          */
3707         switch (adapter->ring_feature[RING_F_VMDQ].mask) {
3708         case IXGBE_82599_VMDQ_8Q_MASK:
3709                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_16;
3710                 break;
3711         case IXGBE_82599_VMDQ_4Q_MASK:
3712                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_32;
3713                 break;
3714         default:
3715                 gcr_ext = IXGBE_GCR_EXT_VT_MODE_64;
3716                 break;
3717         }
3718
3719         IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr_ext);
3720
3721
3722         /* Enable MAC Anti-Spoofing */
3723         hw->mac.ops.set_mac_anti_spoofing(hw, (adapter->num_vfs != 0),
3724                                           adapter->num_vfs);
3725
3726         /* Ensure LLDP is set for Ethertype Antispoofing if we will be
3727          * calling set_ethertype_anti_spoofing for each VF in loop below
3728          */
3729         if (hw->mac.ops.set_ethertype_anti_spoofing)
3730                 IXGBE_WRITE_REG(hw, IXGBE_ETQF(IXGBE_ETQF_FILTER_LLDP),
3731                                 (IXGBE_ETQF_FILTER_EN    | /* enable filter */
3732                                  IXGBE_ETQF_TX_ANTISPOOF | /* tx antispoof */
3733                                  IXGBE_ETH_P_LLDP));       /* LLDP eth type */
3734
3735         /* For VFs that have spoof checking turned off */
3736         for (i = 0; i < adapter->num_vfs; i++) {
3737                 if (!adapter->vfinfo[i].spoofchk_enabled)
3738                         ixgbe_ndo_set_vf_spoofchk(adapter->netdev, i, false);
3739
3740                 /* enable ethertype anti spoofing if hw supports it */
3741                 if (hw->mac.ops.set_ethertype_anti_spoofing)
3742                         hw->mac.ops.set_ethertype_anti_spoofing(hw, true, i);
3743
3744                 /* Enable/Disable RSS query feature  */
3745                 ixgbe_ndo_set_vf_rss_query_en(adapter->netdev, i,
3746                                           adapter->vfinfo[i].rss_query_enabled);
3747         }
3748 }
3749
3750 static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter *adapter)
3751 {
3752         struct ixgbe_hw *hw = &adapter->hw;
3753         struct net_device *netdev = adapter->netdev;
3754         int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
3755         struct ixgbe_ring *rx_ring;
3756         int i;
3757         u32 mhadd, hlreg0;
3758
3759 #ifdef IXGBE_FCOE
3760         /* adjust max frame to be able to do baby jumbo for FCoE */
3761         if ((adapter->flags & IXGBE_FLAG_FCOE_ENABLED) &&
3762             (max_frame < IXGBE_FCOE_JUMBO_FRAME_SIZE))
3763                 max_frame = IXGBE_FCOE_JUMBO_FRAME_SIZE;
3764
3765 #endif /* IXGBE_FCOE */
3766
3767         /* adjust max frame to be at least the size of a standard frame */
3768         if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
3769                 max_frame = (ETH_FRAME_LEN + ETH_FCS_LEN);
3770
3771         mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
3772         if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
3773                 mhadd &= ~IXGBE_MHADD_MFS_MASK;
3774                 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
3775
3776                 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
3777         }
3778
3779         hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
3780         /* set jumbo enable since MHADD.MFS is keeping size locked at max_frame */
3781         hlreg0 |= IXGBE_HLREG0_JUMBOEN;
3782         IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
3783
3784         /*
3785          * Setup the HW Rx Head and Tail Descriptor Pointers and
3786          * the Base and Length of the Rx Descriptor Ring
3787          */
3788         for (i = 0; i < adapter->num_rx_queues; i++) {
3789                 rx_ring = adapter->rx_ring[i];
3790                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
3791                         set_ring_rsc_enabled(rx_ring);
3792                 else
3793                         clear_ring_rsc_enabled(rx_ring);
3794         }
3795 }
3796
3797 static void ixgbe_setup_rdrxctl(struct ixgbe_adapter *adapter)
3798 {
3799         struct ixgbe_hw *hw = &adapter->hw;
3800         u32 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
3801
3802         switch (hw->mac.type) {
3803         case ixgbe_mac_82598EB:
3804                 /*
3805                  * For VMDq support of different descriptor types or
3806                  * buffer sizes through the use of multiple SRRCTL
3807                  * registers, RDRXCTL.MVMEN must be set to 1
3808                  *
3809                  * also, the manual doesn't mention it clearly but DCA hints
3810                  * will only use queue 0's tags unless this bit is set.  Side
3811                  * effects of setting this bit are only that SRRCTL must be
3812                  * fully programmed [0..15]
3813                  */
3814                 rdrxctl |= IXGBE_RDRXCTL_MVMEN;
3815                 break;
3816         case ixgbe_mac_X550:
3817         case ixgbe_mac_X550EM_x:
3818                 if (adapter->num_vfs)
3819                         rdrxctl |= IXGBE_RDRXCTL_PSP;
3820                 /* fall through for older HW */
3821         case ixgbe_mac_82599EB:
3822         case ixgbe_mac_X540:
3823                 /* Disable RSC for ACK packets */
3824                 IXGBE_WRITE_REG(hw, IXGBE_RSCDBU,
3825                    (IXGBE_RSCDBU_RSCACKDIS | IXGBE_READ_REG(hw, IXGBE_RSCDBU)));
3826                 rdrxctl &= ~IXGBE_RDRXCTL_RSCFRSTSIZE;
3827                 /* hardware requires some bits to be set by default */
3828                 rdrxctl |= (IXGBE_RDRXCTL_RSCACKC | IXGBE_RDRXCTL_FCOE_WRFIX);
3829                 rdrxctl |= IXGBE_RDRXCTL_CRCSTRIP;
3830                 break;
3831         default:
3832                 /* We should do nothing since we don't know this hardware */
3833                 return;
3834         }
3835
3836         IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
3837 }
3838
3839 /**
3840  * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
3841  * @adapter: board private structure
3842  *
3843  * Configure the Rx unit of the MAC after a reset.
3844  **/
3845 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
3846 {
3847         struct ixgbe_hw *hw = &adapter->hw;
3848         int i;
3849         u32 rxctrl, rfctl;
3850
3851         /* disable receives while setting up the descriptors */
3852         hw->mac.ops.disable_rx(hw);
3853
3854         ixgbe_setup_psrtype(adapter);
3855         ixgbe_setup_rdrxctl(adapter);
3856
3857         /* RSC Setup */
3858         rfctl = IXGBE_READ_REG(hw, IXGBE_RFCTL);
3859         rfctl &= ~IXGBE_RFCTL_RSC_DIS;
3860         if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED))
3861                 rfctl |= IXGBE_RFCTL_RSC_DIS;
3862         IXGBE_WRITE_REG(hw, IXGBE_RFCTL, rfctl);
3863
3864         /* Program registers for the distribution of queues */
3865         ixgbe_setup_mrqc(adapter);
3866
3867         /* set_rx_buffer_len must be called before ring initialization */
3868         ixgbe_set_rx_buffer_len(adapter);
3869
3870         /*
3871          * Setup the HW Rx Head and Tail Descriptor Pointers and
3872          * the Base and Length of the Rx Descriptor Ring
3873          */
3874         for (i = 0; i < adapter->num_rx_queues; i++)
3875                 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[i]);
3876
3877         rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
3878         /* disable drop enable for 82598 parts */
3879         if (hw->mac.type == ixgbe_mac_82598EB)
3880                 rxctrl |= IXGBE_RXCTRL_DMBYPS;
3881
3882         /* enable all receives */
3883         rxctrl |= IXGBE_RXCTRL_RXEN;
3884         hw->mac.ops.enable_rx_dma(hw, rxctrl);
3885 }
3886
3887 static int ixgbe_vlan_rx_add_vid(struct net_device *netdev,
3888                                  __be16 proto, u16 vid)
3889 {
3890         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3891         struct ixgbe_hw *hw = &adapter->hw;
3892
3893         /* add VID to filter table */
3894         hw->mac.ops.set_vfta(&adapter->hw, vid, VMDQ_P(0), true);
3895         set_bit(vid, adapter->active_vlans);
3896
3897         return 0;
3898 }
3899
3900 static int ixgbe_vlan_rx_kill_vid(struct net_device *netdev,
3901                                   __be16 proto, u16 vid)
3902 {
3903         struct ixgbe_adapter *adapter = netdev_priv(netdev);
3904         struct ixgbe_hw *hw = &adapter->hw;
3905
3906         /* remove VID from filter table */
3907         hw->mac.ops.set_vfta(&adapter->hw, vid, VMDQ_P(0), false);
3908         clear_bit(vid, adapter->active_vlans);
3909
3910         return 0;
3911 }
3912
3913 /**
3914  * ixgbe_vlan_strip_disable - helper to disable hw vlan stripping
3915  * @adapter: driver data
3916  */
3917 static void ixgbe_vlan_strip_disable(struct ixgbe_adapter *adapter)
3918 {
3919         struct ixgbe_hw *hw = &adapter->hw;
3920         u32 vlnctrl;
3921         int i, j;
3922
3923         switch (hw->mac.type) {
3924         case ixgbe_mac_82598EB:
3925                 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
3926                 vlnctrl &= ~IXGBE_VLNCTRL_VME;
3927                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
3928                 break;
3929         case ixgbe_mac_82599EB:
3930         case ixgbe_mac_X540:
3931         case ixgbe_mac_X550:
3932         case ixgbe_mac_X550EM_x:
3933                 for (i = 0; i < adapter->num_rx_queues; i++) {
3934                         struct ixgbe_ring *ring = adapter->rx_ring[i];
3935
3936                         if (ring->l2_accel_priv)
3937                                 continue;
3938                         j = ring->reg_idx;
3939                         vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
3940                         vlnctrl &= ~IXGBE_RXDCTL_VME;
3941                         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
3942                 }
3943                 break;
3944         default:
3945                 break;
3946         }
3947 }
3948
3949 /**
3950  * ixgbe_vlan_strip_enable - helper to enable hw vlan stripping
3951  * @adapter: driver data
3952  */
3953 static void ixgbe_vlan_strip_enable(struct ixgbe_adapter *adapter)
3954 {
3955         struct ixgbe_hw *hw = &adapter->hw;
3956         u32 vlnctrl;
3957         int i, j;
3958
3959         switch (hw->mac.type) {
3960         case ixgbe_mac_82598EB:
3961                 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
3962                 vlnctrl |= IXGBE_VLNCTRL_VME;
3963                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
3964                 break;
3965         case ixgbe_mac_82599EB:
3966         case ixgbe_mac_X540:
3967         case ixgbe_mac_X550:
3968         case ixgbe_mac_X550EM_x:
3969                 for (i = 0; i < adapter->num_rx_queues; i++) {
3970                         struct ixgbe_ring *ring = adapter->rx_ring[i];
3971
3972                         if (ring->l2_accel_priv)
3973                                 continue;
3974                         j = ring->reg_idx;
3975                         vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
3976                         vlnctrl |= IXGBE_RXDCTL_VME;
3977                         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
3978                 }
3979                 break;
3980         default:
3981                 break;
3982         }
3983 }
3984
3985 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
3986 {
3987         u16 vid;
3988
3989         ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
3990
3991         for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
3992                 ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
3993 }
3994
3995 /**
3996  * ixgbe_write_mc_addr_list - write multicast addresses to MTA
3997  * @netdev: network interface device structure
3998  *
3999  * Writes multicast address list to the MTA hash table.
4000  * Returns: -ENOMEM on failure
4001  *                0 on no addresses written
4002  *                X on writing X addresses to MTA
4003  **/
4004 static int ixgbe_write_mc_addr_list(struct net_device *netdev)
4005 {
4006         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4007         struct ixgbe_hw *hw = &adapter->hw;
4008
4009         if (!netif_running(netdev))
4010                 return 0;
4011
4012         if (hw->mac.ops.update_mc_addr_list)
4013                 hw->mac.ops.update_mc_addr_list(hw, netdev);
4014         else
4015                 return -ENOMEM;
4016
4017 #ifdef CONFIG_PCI_IOV
4018         ixgbe_restore_vf_multicasts(adapter);
4019 #endif
4020
4021         return netdev_mc_count(netdev);
4022 }
4023
4024 #ifdef CONFIG_PCI_IOV
4025 void ixgbe_full_sync_mac_table(struct ixgbe_adapter *adapter)
4026 {
4027         struct ixgbe_hw *hw = &adapter->hw;
4028         int i;
4029         for (i = 0; i < hw->mac.num_rar_entries; i++) {
4030                 if (adapter->mac_table[i].state & IXGBE_MAC_STATE_IN_USE)
4031                         hw->mac.ops.set_rar(hw, i, adapter->mac_table[i].addr,
4032                                             adapter->mac_table[i].queue,
4033                                             IXGBE_RAH_AV);
4034                 else
4035                         hw->mac.ops.clear_rar(hw, i);
4036
4037                 adapter->mac_table[i].state &= ~(IXGBE_MAC_STATE_MODIFIED);
4038         }
4039 }
4040 #endif
4041
4042 static void ixgbe_sync_mac_table(struct ixgbe_adapter *adapter)
4043 {
4044         struct ixgbe_hw *hw = &adapter->hw;
4045         int i;
4046         for (i = 0; i < hw->mac.num_rar_entries; i++) {
4047                 if (adapter->mac_table[i].state & IXGBE_MAC_STATE_MODIFIED) {
4048                         if (adapter->mac_table[i].state &
4049                             IXGBE_MAC_STATE_IN_USE)
4050                                 hw->mac.ops.set_rar(hw, i,
4051                                                 adapter->mac_table[i].addr,
4052                                                 adapter->mac_table[i].queue,
4053                                                 IXGBE_RAH_AV);
4054                         else
4055                                 hw->mac.ops.clear_rar(hw, i);
4056
4057                         adapter->mac_table[i].state &=
4058                                                 ~(IXGBE_MAC_STATE_MODIFIED);
4059                 }
4060         }
4061 }
4062
4063 static void ixgbe_flush_sw_mac_table(struct ixgbe_adapter *adapter)
4064 {
4065         int i;
4066         struct ixgbe_hw *hw = &adapter->hw;
4067
4068         for (i = 0; i < hw->mac.num_rar_entries; i++) {
4069                 adapter->mac_table[i].state |= IXGBE_MAC_STATE_MODIFIED;
4070                 adapter->mac_table[i].state &= ~IXGBE_MAC_STATE_IN_USE;
4071                 eth_zero_addr(adapter->mac_table[i].addr);
4072                 adapter->mac_table[i].queue = 0;
4073         }
4074         ixgbe_sync_mac_table(adapter);
4075 }
4076
4077 static int ixgbe_available_rars(struct ixgbe_adapter *adapter)
4078 {
4079         struct ixgbe_hw *hw = &adapter->hw;
4080         int i, count = 0;
4081
4082         for (i = 0; i < hw->mac.num_rar_entries; i++) {
4083                 if (adapter->mac_table[i].state == 0)
4084                         count++;
4085         }
4086         return count;
4087 }
4088
4089 /* this function destroys the first RAR entry */
4090 static void ixgbe_mac_set_default_filter(struct ixgbe_adapter *adapter,
4091                                          u8 *addr)
4092 {
4093         struct ixgbe_hw *hw = &adapter->hw;
4094
4095         memcpy(&adapter->mac_table[0].addr, addr, ETH_ALEN);
4096         adapter->mac_table[0].queue = VMDQ_P(0);
4097         adapter->mac_table[0].state = (IXGBE_MAC_STATE_DEFAULT |
4098                                        IXGBE_MAC_STATE_IN_USE);
4099         hw->mac.ops.set_rar(hw, 0, adapter->mac_table[0].addr,
4100                             adapter->mac_table[0].queue,
4101                             IXGBE_RAH_AV);
4102 }
4103
4104 int ixgbe_add_mac_filter(struct ixgbe_adapter *adapter, u8 *addr, u16 queue)
4105 {
4106         struct ixgbe_hw *hw = &adapter->hw;
4107         int i;
4108
4109         if (is_zero_ether_addr(addr))
4110                 return -EINVAL;
4111
4112         for (i = 0; i < hw->mac.num_rar_entries; i++) {
4113                 if (adapter->mac_table[i].state & IXGBE_MAC_STATE_IN_USE)
4114                         continue;
4115                 adapter->mac_table[i].state |= (IXGBE_MAC_STATE_MODIFIED |
4116                                                 IXGBE_MAC_STATE_IN_USE);
4117                 ether_addr_copy(adapter->mac_table[i].addr, addr);
4118                 adapter->mac_table[i].queue = queue;
4119                 ixgbe_sync_mac_table(adapter);
4120                 return i;
4121         }
4122         return -ENOMEM;
4123 }
4124
4125 int ixgbe_del_mac_filter(struct ixgbe_adapter *adapter, u8 *addr, u16 queue)
4126 {
4127         /* search table for addr, if found, set to 0 and sync */
4128         int i;
4129         struct ixgbe_hw *hw = &adapter->hw;
4130
4131         if (is_zero_ether_addr(addr))
4132                 return -EINVAL;
4133
4134         for (i = 0; i < hw->mac.num_rar_entries; i++) {
4135                 if (ether_addr_equal(addr, adapter->mac_table[i].addr) &&
4136                     adapter->mac_table[i].queue == queue) {
4137                         adapter->mac_table[i].state |= IXGBE_MAC_STATE_MODIFIED;
4138                         adapter->mac_table[i].state &= ~IXGBE_MAC_STATE_IN_USE;
4139                         eth_zero_addr(adapter->mac_table[i].addr);
4140                         adapter->mac_table[i].queue = 0;
4141                         ixgbe_sync_mac_table(adapter);
4142                         return 0;
4143                 }
4144         }
4145         return -ENOMEM;
4146 }
4147 /**
4148  * ixgbe_write_uc_addr_list - write unicast addresses to RAR table
4149  * @netdev: network interface device structure
4150  *
4151  * Writes unicast address list to the RAR table.
4152  * Returns: -ENOMEM on failure/insufficient address space
4153  *                0 on no addresses written
4154  *                X on writing X addresses to the RAR table
4155  **/
4156 static int ixgbe_write_uc_addr_list(struct net_device *netdev, int vfn)
4157 {
4158         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4159         int count = 0;
4160
4161         /* return ENOMEM indicating insufficient memory for addresses */
4162         if (netdev_uc_count(netdev) > ixgbe_available_rars(adapter))
4163                 return -ENOMEM;
4164
4165         if (!netdev_uc_empty(netdev)) {
4166                 struct netdev_hw_addr *ha;
4167                 netdev_for_each_uc_addr(ha, netdev) {
4168                         ixgbe_del_mac_filter(adapter, ha->addr, vfn);
4169                         ixgbe_add_mac_filter(adapter, ha->addr, vfn);
4170                         count++;
4171                 }
4172         }
4173         return count;
4174 }
4175
4176 /**
4177  * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
4178  * @netdev: network interface device structure
4179  *
4180  * The set_rx_method entry point is called whenever the unicast/multicast
4181  * address list or the network interface flags are updated.  This routine is
4182  * responsible for configuring the hardware for proper unicast, multicast and
4183  * promiscuous mode.
4184  **/
4185 void ixgbe_set_rx_mode(struct net_device *netdev)
4186 {
4187         struct ixgbe_adapter *adapter = netdev_priv(netdev);
4188         struct ixgbe_hw *hw = &adapter->hw;
4189         u32 fctrl, vmolr = IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE;
4190         u32 vlnctrl;
4191         int count;
4192
4193         /* Check for Promiscuous and All Multicast modes */
4194         fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
4195         vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4196
4197         /* set all bits that we expect to always be set */
4198         fctrl &= ~IXGBE_FCTRL_SBP; /* disable store-bad-packets */
4199         fctrl |= IXGBE_FCTRL_BAM;
4200         fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
4201         fctrl |= IXGBE_FCTRL_PMCF;
4202
4203         /* clear the bits we are changing the status of */
4204         fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4205         vlnctrl &= ~(IXGBE_VLNCTRL_VFE | IXGBE_VLNCTRL_CFIEN);
4206         if (netdev->flags & IFF_PROMISC) {
4207                 hw->addr_ctrl.user_set_promisc = true;
4208                 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4209                 vmolr |= IXGBE_VMOLR_MPE;
4210                 /* Only disable hardware filter vlans in promiscuous mode
4211                  * if SR-IOV and VMDQ are disabled - otherwise ensure
4212                  * that hardware VLAN filters remain enabled.
4213                  */
4214                 if (adapter->flags & (IXGBE_FLAG_VMDQ_ENABLED |
4215                                       IXGBE_FLAG_SRIOV_ENABLED))
4216                         vlnctrl |= (IXGBE_VLNCTRL_VFE | IXGBE_VLNCTRL_CFIEN);
4217         } else {
4218                 if (netdev->flags & IFF_ALLMULTI) {
4219                         fctrl |= IXGBE_FCTRL_MPE;
4220                         vmolr |= IXGBE_VMOLR_MPE;
4221                 }
4222                 vlnctrl |= IXGBE_VLNCTRL_VFE;
4223                 hw->addr_ctrl.user_set_promisc = false;
4224         }
4225
4226         /*
4227          * Write addresses to available RAR registers, if there is not
4228          * sufficient space to store all the addresses then enable
4229          * unicast promiscuous mode
4230          */
4231         count = ixgbe_write_uc_addr_list(netdev, VMDQ_P(0));
4232         if (count < 0) {
4233                 fctrl |= IXGBE_FCTRL_UPE;
4234                 vmolr |= IXGBE_VMOLR_ROPE;
4235         }
4236
4237         /* Write addresses to the MTA, if the attempt fails
4238          * then we should just turn on promiscuous mode so
4239          * that we can at least receive multicast traffic
4240          */
4241         count = ixgbe_write_mc_addr_list(netdev);
4242         if (count < 0) {
4243                 fctrl |= IXGBE_FCTRL_MPE;
4244                 vmolr |= IXGBE_VMOLR_MPE;
4245         } else if (count) {
4246                 vmolr |= IXGBE_VMOLR_ROMPE;
4247         }
4248
4249         if (hw->mac.type != ixgbe_mac_82598EB) {
4250                 vmolr |= IXGBE_READ_REG(hw, IXGBE_VMOLR(VMDQ_P(0))) &
4251                          ~(IXGBE_VMOLR_MPE | IXGBE_VMOLR_ROMPE |
4252                            IXGBE_VMOLR_ROPE);
4253                 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(VMDQ_P(0)), vmolr);
4254         }
4255
4256         /* This is useful for sniffing bad packets. */
4257         if (adapter->netdev->features & NETIF_F_RXALL) {
4258                 /* UPE and MPE will be handled by normal PROMISC logic
4259                  * in e1000e_set_rx_mode */
4260                 fctrl |= (IXGBE_FCTRL_SBP | /* Receive bad packets */
4261                           IXGBE_FCTRL_BAM | /* RX All Bcast Pkts */
4262                           IXGBE_FCTRL_PMCF); /* RX All MAC Ctrl Pkts */
4263
4264                 fctrl &= ~(IXGBE_FCTRL_DPF);
4265                 /* NOTE:  VLAN filtering is disabled by setting PROMISC */
4266         }
4267
4268         IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4269         IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
4270
4271         if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX)
4272                 ixgbe_vlan_strip_enable(adapter);
4273         else
4274                 ixgbe_vlan_strip_disable(adapter);
4275 }
4276
4277 static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
4278 {
4279         int q_idx;
4280
4281         for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++) {
4282                 ixgbe_qv_init_lock(adapter->q_vector[q_idx]);
4283                 napi_enable(&adapter->q_vector[q_idx]->napi);
4284         }
4285 }
4286
4287 static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
4288 {
4289         int q_idx;
4290
4291         for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++) {
4292                 napi_disable(&adapter->q_vector[q_idx]->napi);
4293                 while (!ixgbe_qv_disable(adapter->q_vector[q_idx])) {
4294                         pr_info("QV %d locked\n", q_idx);
4295                         usleep_range(1000, 20000);
4296                 }
4297         }
4298 }
4299
4300 static void ixgbe_clear_vxlan_port(struct ixgbe_adapter *adapter)
4301 {
4302         switch (adapter->hw.mac.type) {
4303         case ixgbe_mac_X550:
4304         case ixgbe_mac_X550EM_x:
4305                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_VXLANCTRL, 0);
4306 #ifdef CONFIG_IXGBE_VXLAN
4307                 adapter->vxlan_port = 0;
4308 #endif
4309                 break;
4310         default:
4311                 break;
4312         }
4313 }
4314
4315 #ifdef CONFIG_IXGBE_DCB
4316 /**
4317  * ixgbe_configure_dcb - Configure DCB hardware
4318  * @adapter: ixgbe adapter struct
4319  *
4320  * This is called by the driver on open to configure the DCB hardware.
4321  * This is also called by the gennetlink interface when reconfiguring
4322  * the DCB state.
4323  */
4324 static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter)
4325 {
4326         struct ixgbe_hw *hw = &adapter->hw;
4327         int max_frame = adapter->netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
4328
4329         if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED)) {
4330                 if (hw->mac.type == ixgbe_mac_82598EB)
4331                         netif_set_gso_max_size(adapter->netdev, 65536);
4332                 return;
4333         }
4334
4335         if (hw->mac.type == ixgbe_mac_82598EB)
4336                 netif_set_gso_max_size(adapter->netdev, 32768);
4337
4338 #ifdef IXGBE_FCOE
4339         if (adapter->netdev->features & NETIF_F_FCOE_MTU)
4340                 max_frame = max(max_frame, IXGBE_FCOE_JUMBO_FRAME_SIZE);
4341 #endif
4342
4343         /* reconfigure the hardware */
4344         if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE) {
4345                 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
4346                                                 DCB_TX_CONFIG);
4347                 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
4348                                                 DCB_RX_CONFIG);
4349                 ixgbe_dcb_hw_config(hw, &adapter->dcb_cfg);
4350         } else if (adapter->ixgbe_ieee_ets && adapter->ixgbe_ieee_pfc) {
4351                 ixgbe_dcb_hw_ets(&adapter->hw,
4352                                  adapter->ixgbe_ieee_ets,
4353                                  max_frame);
4354                 ixgbe_dcb_hw_pfc_config(&adapter->hw,
4355                                         adapter->ixgbe_ieee_pfc->pfc_en,
4356                                         adapter->ixgbe_ieee_ets->prio_tc);
4357         }
4358
4359         /* Enable RSS Hash per TC */
4360         if (hw->mac.type != ixgbe_mac_82598EB) {
4361                 u32 msb = 0;
4362                 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices - 1;
4363
4364                 while (rss_i) {
4365                         msb++;
4366                         rss_i >>= 1;
4367                 }
4368
4369                 /* write msb to all 8 TCs in one write */
4370                 IXGBE_WRITE_REG(hw, IXGBE_RQTC, msb * 0x11111111);
4371         }
4372 }
4373 #endif
4374
4375 /* Additional bittime to account for IXGBE framing */
4376 #define IXGBE_ETH_FRAMING 20
4377
4378 /**
4379  * ixgbe_hpbthresh - calculate high water mark for flow control
4380  *
4381  * @adapter: board private structure to calculate for
4382  * @pb: packet buffer to calculate
4383  */
4384 static int ixgbe_hpbthresh(struct ixgbe_adapter *adapter, int pb)
4385 {
4386         struct ixgbe_hw *hw = &adapter->hw;
4387         struct net_device *dev = adapter->netdev;
4388         int link, tc, kb, marker;
4389         u32 dv_id, rx_pba;
4390
4391         /* Calculate max LAN frame size */
4392         tc = link = dev->mtu + ETH_HLEN + ETH_FCS_LEN + IXGBE_ETH_FRAMING;
4393
4394 #ifdef IXGBE_FCOE
4395         /* FCoE traffic class uses FCOE jumbo frames */
4396         if ((dev->features & NETIF_F_FCOE_MTU) &&
4397             (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
4398             (pb == ixgbe_fcoe_get_tc(adapter)))
4399                 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
4400 #endif
4401
4402         /* Calculate delay value for device */
4403         switch (hw->mac.type) {
4404         case ixgbe_mac_X540:
4405         case ixgbe_mac_X550:
4406         case ixgbe_mac_X550EM_x:
4407                 dv_id = IXGBE_DV_X540(link, tc);
4408                 break;
4409         default:
4410                 dv_id = IXGBE_DV(link, tc);
4411                 break;
4412         }
4413
4414         /* Loopback switch introduces additional latency */
4415         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
4416                 dv_id += IXGBE_B2BT(tc);
4417
4418         /* Delay value is calculated in bit times convert to KB */
4419         kb = IXGBE_BT2KB(dv_id);
4420         rx_pba = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(pb)) >> 10;
4421
4422         marker = rx_pba - kb;
4423
4424         /* It is possible that the packet buffer is not large enough
4425          * to provide required headroom. In this case throw an error
4426          * to user and a do the best we can.
4427          */
4428         if (marker < 0) {
4429                 e_warn(drv, "Packet Buffer(%i) can not provide enough"
4430                             "headroom to support flow control."
4431                             "Decrease MTU or number of traffic classes\n", pb);
4432                 marker = tc + 1;
4433         }
4434
4435         return marker;
4436 }
4437
4438 /**
4439  * ixgbe_lpbthresh - calculate low water mark for for flow control
4440  *
4441  * @adapter: board private structure to calculate for
4442  * @pb: packet buffer to calculate
4443  */
4444 static int ixgbe_lpbthresh(struct ixgbe_adapter *adapter, int pb)
4445 {
4446         struct ixgbe_hw *hw = &adapter->hw;
4447         struct net_device *dev = adapter->netdev;
4448         int tc;
4449         u32 dv_id;
4450
4451         /* Calculate max LAN frame size */
4452         tc = dev->mtu + ETH_HLEN + ETH_FCS_LEN;
4453
4454 #ifdef IXGBE_FCOE
4455         /* FCoE traffic class uses FCOE jumbo frames */
4456         if ((dev->features & NETIF_F_FCOE_MTU) &&
4457             (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
4458             (pb == netdev_get_prio_tc_map(dev, adapter->fcoe.up)))
4459                 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
4460 #endif
4461
4462         /* Calculate delay value for device */
4463         switch (hw->mac.type) {
4464         case ixgbe_mac_X540:
4465         case ixgbe_mac_X550:
4466         case ixgbe_mac_X550EM_x:
4467                 dv_id = IXGBE_LOW_DV_X540(tc);
4468                 break;
4469         default:
4470                 dv_id = IXGBE_LOW_DV(tc);
4471                 break;
4472         }
4473
4474         /* Delay value is calculated in bit times convert to KB */
4475         return IXGBE_BT2KB(dv_id);
4476 }
4477
4478 /*
4479  * ixgbe_pbthresh_setup - calculate and setup high low water marks
4480  */
4481 static void ixgbe_pbthresh_setup(struct ixgbe_adapter *adapter)
4482 {
4483         struct ixgbe_hw *hw = &adapter->hw;
4484         int num_tc = netdev_get_num_tc(adapter->netdev);
4485         int i;
4486
4487         if (!num_tc)
4488                 num_tc = 1;
4489
4490         for (i = 0; i < num_tc; i++) {
4491                 hw->fc.high_water[i] = ixgbe_hpbthresh(adapter, i);
4492                 hw->fc.low_water[i] = ixgbe_lpbthresh(adapter, i);
4493
4494                 /* Low water marks must not be larger than high water marks */
4495                 if (hw->fc.low_water[i] > hw->fc.high_water[i])
4496                         hw->fc.low_water[i] = 0;
4497         }
4498
4499         for (; i < MAX_TRAFFIC_CLASS; i++)
4500                 hw->fc.high_water[i] = 0;
4501 }
4502
4503 static void ixgbe_configure_pb(struct ixgbe_adapter *adapter)
4504 {
4505         struct ixgbe_hw *hw = &adapter->hw;
4506         int hdrm;
4507         u8 tc = netdev_get_num_tc(adapter->netdev);
4508
4509         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE ||
4510             adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
4511                 hdrm = 32 << adapter->fdir_pballoc;
4512         else
4513                 hdrm = 0;
4514
4515         hw->mac.ops.set_rxpba(hw, tc, hdrm, PBA_STRATEGY_EQUAL);
4516         ixgbe_pbthresh_setup(adapter);
4517 }
4518
4519 static void ixgbe_fdir_filter_restore(struct ixgbe_adapter *adapter)
4520 {
4521         struct ixgbe_hw *hw = &adapter->hw;
4522         struct hlist_node *node2;
4523         struct ixgbe_fdir_filter *filter;
4524
4525         spin_lock(&adapter->fdir_perfect_lock);
4526
4527         if (!hlist_empty(&adapter->fdir_filter_list))
4528                 ixgbe_fdir_set_input_mask_82599(hw, &adapter->fdir_mask);
4529
4530         hlist_for_each_entry_safe(filter, node2,
4531                                   &adapter->fdir_filter_list, fdir_node) {
4532                 ixgbe_fdir_write_perfect_filter_82599(hw,
4533                                 &filter->filter,
4534                                 filter->sw_idx,
4535                                 (filter->action == IXGBE_FDIR_DROP_QUEUE) ?
4536                                 IXGBE_FDIR_DROP_QUEUE :
4537                                 adapter->rx_ring[filter->action]->reg_idx);
4538         }
4539
4540         spin_unlock(&adapter->fdir_perfect_lock);
4541 }
4542
4543 static void ixgbe_macvlan_set_rx_mode(struct net_device *dev, unsigned int pool,
4544                                       struct ixgbe_adapter *adapter)
4545 {
4546         struct ixgbe_hw *hw = &adapter->hw;
4547         u32 vmolr;
4548
4549         /* No unicast promiscuous support for VMDQ devices. */
4550         vmolr = IXGBE_READ_REG(hw, IXGBE_VMOLR(pool));
4551         vmolr |= (IXGBE_VMOLR_ROMPE | IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE);
4552
4553         /* clear the affected bit */
4554         vmolr &= ~IXGBE_VMOLR_MPE;
4555
4556         if (dev->flags & IFF_ALLMULTI) {
4557                 vmolr |= IXGBE_VMOLR_MPE;
4558         } else {
4559                 vmolr |= IXGBE_VMOLR_ROMPE;
4560                 hw->mac.ops.update_mc_addr_list(hw, dev);
4561         }
4562         ixgbe_write_uc_addr_list(adapter->netdev, pool);
4563         IXGBE_WRITE_REG(hw, IXGBE_VMOLR(pool), vmolr);
4564 }
4565
4566 static void ixgbe_fwd_psrtype(struct ixgbe_fwd_adapter *vadapter)
4567 {
4568         struct ixgbe_adapter *adapter = vadapter->real_adapter;
4569         int rss_i = adapter->num_rx_queues_per_pool;
4570         struct ixgbe_hw *hw = &adapter->hw;
4571         u16 pool = vadapter->pool;
4572         u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
4573                       IXGBE_PSRTYPE_UDPHDR |
4574                       IXGBE_PSRTYPE_IPV4HDR |
4575                       IXGBE_PSRTYPE_L2HDR |
4576                       IXGBE_PSRTYPE_IPV6HDR;
4577
4578         if (hw->mac.type == ixgbe_mac_82598EB)
4579                 return;
4580
4581         if (rss_i > 3)
4582                 psrtype |= 2 << 29;
4583         else if (rss_i > 1)
4584                 psrtype |= 1 << 29;
4585
4586         IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype);
4587 }
4588
4589 /**
4590  * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
4591  * @rx_ring: ring to free buffers from
4592  **/
4593 static void ixgbe_clean_rx_ring(struct ixgbe_ring *rx_ring)
4594 {
4595         struct device *dev = rx_ring->dev;
4596         unsigned long size;
4597         u16 i;
4598
4599         /* ring already cleared, nothing to do */
4600         if (!rx_ring->rx_buffer_info)
4601                 return;
4602
4603         /* Free all the Rx ring sk_buffs */
4604         for (i = 0; i < rx_ring->count; i++) {
4605                 struct ixgbe_rx_buffer *rx_buffer = &rx_ring->rx_buffer_info[i];
4606
4607                 if (rx_buffer->skb) {
4608                         struct sk_buff *skb = rx_buffer->skb;
4609                         if (IXGBE_CB(skb)->page_released)
4610                                 dma_unmap_page(dev,
4611                                                IXGBE_CB(skb)->dma,
4612                                                ixgbe_rx_bufsz(rx_ring),
4613                                                DMA_FROM_DEVICE);
4614                         dev_kfree_skb(skb);
4615                         rx_buffer->skb = NULL;
4616                 }
4617
4618                 if (!rx_buffer->page)
4619                         continue;
4620
4621                 dma_unmap_page(dev, rx_buffer->dma,
4622                                ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
4623                 __free_pages(rx_buffer->page, ixgbe_rx_pg_order(rx_ring));
4624
4625                 rx_buffer->page = NULL;
4626         }
4627
4628         size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
4629         memset(rx_ring->rx_buffer_info, 0, size);
4630
4631         /* Zero out the descriptor ring */
4632         memset(rx_ring->desc, 0, rx_ring->size);
4633
4634         rx_ring->next_to_alloc = 0;
4635         rx_ring->next_to_clean = 0;
4636         rx_ring->next_to_use = 0;
4637 }
4638
4639 static void ixgbe_disable_fwd_ring(struct ixgbe_fwd_adapter *vadapter,
4640                                    struct ixgbe_ring *rx_ring)
4641 {
4642         struct ixgbe_adapter *adapter = vadapter->real_adapter;
4643         int index = rx_ring->queue_index + vadapter->rx_base_queue;
4644
4645         /* shutdown specific queue receive and wait for dma to settle */
4646         ixgbe_disable_rx_queue(adapter, rx_ring);
4647         usleep_range(10000, 20000);
4648         ixgbe_irq_disable_queues(adapter, ((u64)1 << index));
4649         ixgbe_clean_rx_ring(rx_ring);
4650         rx_ring->l2_accel_priv = NULL;
4651 }
4652
4653 static int ixgbe_fwd_ring_down(struct net_device *vdev,
4654                                struct ixgbe_fwd_adapter *accel)
4655 {
4656         struct ixgbe_adapter *adapter = accel->real_adapter;
4657         unsigned int rxbase = accel->rx_base_queue;
4658         unsigned int txbase = accel->tx_base_queue;
4659         int i;
4660
4661         netif_tx_stop_all_queues(vdev);
4662
4663         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4664                 ixgbe_disable_fwd_ring(accel, adapter->rx_ring[rxbase + i]);
4665                 adapter->rx_ring[rxbase + i]->netdev = adapter->netdev;
4666         }
4667
4668         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4669                 adapter->tx_ring[txbase + i]->l2_accel_priv = NULL;
4670                 adapter->tx_ring[txbase + i]->netdev = adapter->netdev;
4671         }
4672
4673
4674         return 0;
4675 }
4676
4677 static int ixgbe_fwd_ring_up(struct net_device *vdev,
4678                              struct ixgbe_fwd_adapter *accel)
4679 {
4680         struct ixgbe_adapter *adapter = accel->real_adapter;
4681         unsigned int rxbase, txbase, queues;
4682         int i, baseq, err = 0;
4683
4684         if (!test_bit(accel->pool, &adapter->fwd_bitmask))
4685                 return 0;
4686
4687         baseq = accel->pool * adapter->num_rx_queues_per_pool;
4688         netdev_dbg(vdev, "pool %i:%i queues %i:%i VSI bitmask %lx\n",
4689                    accel->pool, adapter->num_rx_pools,
4690                    baseq, baseq + adapter->num_rx_queues_per_pool,
4691                    adapter->fwd_bitmask);
4692
4693         accel->netdev = vdev;
4694         accel->rx_base_queue = rxbase = baseq;
4695         accel->tx_base_queue = txbase = baseq;
4696
4697         for (i = 0; i < adapter->num_rx_queues_per_pool; i++)
4698                 ixgbe_disable_fwd_ring(accel, adapter->rx_ring[rxbase + i]);
4699
4700         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4701                 adapter->rx_ring[rxbase + i]->netdev = vdev;
4702                 adapter->rx_ring[rxbase + i]->l2_accel_priv = accel;
4703                 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[rxbase + i]);
4704         }
4705
4706         for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4707                 adapter->tx_ring[txbase + i]->netdev = vdev;
4708                 adapter->tx_ring[txbase + i]->l2_accel_priv = accel;
4709         }
4710
4711         queues = min_t(unsigned int,
4712                        adapter->num_rx_queues_per_pool, vdev->num_tx_queues);
4713         err = netif_set_real_num_tx_queues(vdev, queues);
4714         if (err)
4715                 goto fwd_queue_err;
4716
4717         err = netif_set_real_num_rx_queues(vdev, queues);
4718         if (err)
4719                 goto fwd_queue_err;
4720
4721         if (is_valid_ether_addr(vdev->dev_addr))
4722                 ixgbe_add_mac_filter(adapter, vdev->dev_addr, accel->pool);
4723
4724         ixgbe_fwd_psrtype(accel);
4725         ixgbe_macvlan_set_rx_mode(vdev, accel->pool, adapter);
4726         return err;
4727 fwd_queue_err:
4728         ixgbe_fwd_ring_down(vdev, accel);
4729         return err;
4730 }
4731
4732 static void ixgbe_configure_dfwd(struct ixgbe_adapter *adapter)
4733 {
4734         struct net_device *upper;
4735         struct list_head *iter;
4736         int err;
4737
4738         netdev_for_each_all_upper_dev_rcu(adapter->netdev, upper, iter) {
4739                 if (netif_is_macvlan(upper)) {
4740                         struct macvlan_dev *dfwd = netdev_priv(upper);
4741                         struct ixgbe_fwd_adapter *vadapter = dfwd->fwd_priv;
4742
4743                         if (dfwd->fwd_priv) {
4744                                 err = ixgbe_fwd_ring_up(upper, vadapter);
4745                                 if (err)
4746                                         continue;
4747                         }
4748                 }
4749         }
4750 }
4751
4752 static void ixgbe_configure(struct ixgbe_adapter *adapter)
4753 {
4754         struct ixgbe_hw *hw = &adapter->hw;
4755
4756         ixgbe_configure_pb(adapter);
4757 #ifdef CONFIG_IXGBE_DCB
4758         ixgbe_configure_dcb(adapter);
4759 #endif
4760         /*
4761          * We must restore virtualization before VLANs or else
4762          * the VLVF registers will not be populated
4763          */
4764         ixgbe_configure_virtualization(adapter);
4765
4766         ixgbe_set_rx_mode(adapter->netdev);
4767         ixgbe_restore_vlan(adapter);
4768
4769         switch (hw->mac.type) {
4770         case ixgbe_mac_82599EB:
4771         case ixgbe_mac_X540:
4772                 hw->mac.ops.disable_rx_buff(hw);
4773                 break;
4774         default:
4775                 break;
4776         }
4777
4778         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
4779                 ixgbe_init_fdir_signature_82599(&adapter->hw,
4780                                                 adapter->fdir_pballoc);
4781         } else if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) {
4782                 ixgbe_init_fdir_perfect_82599(&adapter->hw,
4783                                               adapter->fdir_pballoc);
4784                 ixgbe_fdir_filter_restore(adapter);
4785         }
4786
4787         switch (hw->mac.type) {
4788         case ixgbe_mac_82599EB:
4789         case ixgbe_mac_X540:
4790                 hw->mac.ops.enable_rx_buff(hw);
4791                 break;
4792         default:
4793                 break;
4794         }
4795
4796 #ifdef CONFIG_IXGBE_DCA
4797         /* configure DCA */
4798         if (adapter->flags & IXGBE_FLAG_DCA_CAPABLE)
4799                 ixgbe_setup_dca(adapter);
4800 #endif /* CONFIG_IXGBE_DCA */
4801
4802 #ifdef IXGBE_FCOE
4803         /* configure FCoE L2 filters, redirection table, and Rx control */
4804         ixgbe_configure_fcoe(adapter);
4805
4806 #endif /* IXGBE_FCOE */
4807         ixgbe_configure_tx(adapter);
4808         ixgbe_configure_rx(adapter);
4809         ixgbe_configure_dfwd(adapter);
4810 }
4811
4812 /**
4813  * ixgbe_sfp_link_config - set up SFP+ link
4814  * @adapter: pointer to private adapter struct
4815  **/
4816 static void ixgbe_sfp_link_config(struct ixgbe_adapter *adapter)
4817 {
4818         /*
4819          * We are assuming the worst case scenario here, and that
4820          * is that an SFP was inserted/removed after the reset
4821          * but before SFP detection was enabled.  As such the best
4822          * solution is to just start searching as soon as we start
4823          */
4824         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
4825                 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
4826
4827         adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
4828         adapter->sfp_poll_time = 0;
4829 }
4830
4831 /**
4832  * ixgbe_non_sfp_link_config - set up non-SFP+ link
4833  * @hw: pointer to private hardware struct
4834  *
4835  * Returns 0 on success, negative on failure
4836  **/
4837 static int ixgbe_non_sfp_link_config(struct ixgbe_hw *hw)
4838 {
4839         u32 speed;
4840         bool autoneg, link_up = false;
4841         int ret = IXGBE_ERR_LINK_SETUP;
4842
4843         if (hw->mac.ops.check_link)
4844                 ret = hw->mac.ops.check_link(hw, &speed, &link_up, false);
4845
4846         if (ret)
4847                 return ret;
4848
4849         speed = hw->phy.autoneg_advertised;
4850         if ((!speed) && (hw->mac.ops.get_link_capabilities))
4851                 ret = hw->mac.ops.get_link_capabilities(hw, &speed,
4852                                                         &autoneg);
4853         if (ret)
4854                 return ret;
4855
4856         if (hw->mac.ops.setup_link)
4857                 ret = hw->mac.ops.setup_link(hw, speed, link_up);
4858
4859         return ret;
4860 }
4861
4862 static void ixgbe_setup_gpie(struct ixgbe_adapter *adapter)
4863 {
4864         struct ixgbe_hw *hw = &adapter->hw;
4865         u32 gpie = 0;
4866
4867         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
4868                 gpie = IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_PBA_SUPPORT |
4869                        IXGBE_GPIE_OCD;
4870                 gpie |= IXGBE_GPIE_EIAME;
4871                 /*
4872                  * use EIAM to auto-mask when MSI-X interrupt is asserted
4873                  * this saves a register write for every interrupt
4874                  */
4875                 switch (hw->mac.type) {
4876                 case ixgbe_mac_82598EB:
4877                         IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
4878                         break;
4879                 case ixgbe_mac_82599EB:
4880                 case ixgbe_mac_X540:
4881                 case ixgbe_mac_X550:
4882                 case ixgbe_mac_X550EM_x:
4883                 default:
4884                         IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
4885                         IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
4886                         break;
4887                 }
4888         } else {
4889                 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
4890                  * specifically only auto mask tx and rx interrupts */
4891                 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
4892         }
4893
4894         /* XXX: to interrupt immediately for EICS writes, enable this */
4895         /* gpie |= IXGBE_GPIE_EIMEN; */
4896
4897         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
4898                 gpie &= ~IXGBE_GPIE_VTMODE_MASK;
4899
4900                 switch (adapter->ring_feature[RING_F_VMDQ].mask) {
4901                 case IXGBE_82599_VMDQ_8Q_MASK:
4902                         gpie |= IXGBE_GPIE_VTMODE_16;
4903                         break;
4904                 case IXGBE_82599_VMDQ_4Q_MASK:
4905                         gpie |= IXGBE_GPIE_VTMODE_32;
4906                         break;
4907                 default:
4908                         gpie |= IXGBE_GPIE_VTMODE_64;
4909                         break;
4910                 }
4911         }
4912
4913         /* Enable Thermal over heat sensor interrupt */
4914         if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) {
4915                 switch (adapter->hw.mac.type) {
4916                 case ixgbe_mac_82599EB:
4917                         gpie |= IXGBE_SDP0_GPIEN_8259X;
4918                         break;
4919                 default:
4920                         break;
4921                 }
4922         }
4923
4924         /* Enable fan failure interrupt */
4925         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
4926                 gpie |= IXGBE_SDP1_GPIEN(hw);
4927
4928         switch (hw->mac.type) {
4929         case ixgbe_mac_82599EB:
4930                 gpie |= IXGBE_SDP1_GPIEN_8259X | IXGBE_SDP2_GPIEN_8259X;
4931                 break;
4932         case ixgbe_mac_X550EM_x:
4933                 gpie |= IXGBE_SDP0_GPIEN_X540;
4934                 break;
4935         default:
4936                 break;
4937         }
4938
4939         IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
4940 }
4941
4942 static void ixgbe_up_complete(struct ixgbe_adapter *adapter)
4943 {
4944         struct ixgbe_hw *hw = &adapter->hw;
4945         int err;
4946         u32 ctrl_ext;
4947
4948         ixgbe_get_hw_control(adapter);
4949         ixgbe_setup_gpie(adapter);
4950
4951         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
4952                 ixgbe_configure_msix(adapter);
4953         else
4954                 ixgbe_configure_msi_and_legacy(adapter);
4955
4956         /* enable the optics for 82599 SFP+ fiber */
4957         if (hw->mac.ops.enable_tx_laser)
4958                 hw->mac.ops.enable_tx_laser(hw);
4959
4960         if (hw->phy.ops.set_phy_power)
4961                 hw->phy.ops.set_phy_power(hw, true);
4962
4963         smp_mb__before_atomic();
4964         clear_bit(__IXGBE_DOWN, &adapter->state);
4965         ixgbe_napi_enable_all(adapter);
4966
4967         if (ixgbe_is_sfp(hw)) {
4968                 ixgbe_sfp_link_config(adapter);
4969         } else {
4970                 err = ixgbe_non_sfp_link_config(hw);
4971                 if (err)
4972                         e_err(probe, "link_config FAILED %d\n", err);
4973         }
4974
4975         /* clear any pending interrupts, may auto mask */
4976         IXGBE_READ_REG(hw, IXGBE_EICR);
4977         ixgbe_irq_enable(adapter, true, true);
4978
4979         /*
4980          * If this adapter has a fan, check to see if we had a failure
4981          * before we enabled the interrupt.
4982          */
4983         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
4984                 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
4985                 if (esdp & IXGBE_ESDP_SDP1)
4986                         e_crit(drv, "Fan has stopped, replace the adapter\n");
4987         }
4988
4989         /* bring the link up in the watchdog, this could race with our first
4990          * link up interrupt but shouldn't be a problem */
4991         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
4992         adapter->link_check_timeout = jiffies;
4993         mod_timer(&adapter->service_timer, jiffies);
4994
4995         /* Set PF Reset Done bit so PF/VF Mail Ops can work */
4996         ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
4997         ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD;
4998         IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);
4999 }
5000
5001 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
5002 {
5003         WARN_ON(in_interrupt());
5004         /* put off any impending NetWatchDogTimeout */
5005         adapter->netdev->trans_start = jiffies;
5006
5007         while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
5008                 usleep_range(1000, 2000);
5009         ixgbe_down(adapter);
5010         /*
5011          * If SR-IOV enabled then wait a bit before bringing the adapter
5012          * back up to give the VFs time to respond to the reset.  The
5013          * two second wait is based upon the watchdog timer cycle in
5014          * the VF driver.
5015          */
5016         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
5017                 msleep(2000);
5018         ixgbe_up(adapter);
5019         clear_bit(__IXGBE_RESETTING, &adapter->state);
5020 }
5021
5022 void ixgbe_up(struct ixgbe_adapter *adapter)
5023 {
5024         /* hardware has been reset, we need to reload some things */
5025         ixgbe_configure(adapter);
5026
5027         ixgbe_up_complete(adapter);
5028 }
5029
5030 void ixgbe_reset(struct ixgbe_adapter *adapter)
5031 {
5032         struct ixgbe_hw *hw = &adapter->hw;
5033         struct net_device *netdev = adapter->netdev;
5034         int err;
5035         u8 old_addr[ETH_ALEN];
5036
5037         if (ixgbe_removed(hw->hw_addr))
5038                 return;
5039         /* lock SFP init bit to prevent race conditions with the watchdog */
5040         while (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
5041                 usleep_range(1000, 2000);
5042
5043         /* clear all SFP and link config related flags while holding SFP_INIT */
5044         adapter->flags2 &= ~(IXGBE_FLAG2_SEARCH_FOR_SFP |
5045                              IXGBE_FLAG2_SFP_NEEDS_RESET);
5046         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
5047
5048         err = hw->mac.ops.init_hw(hw);
5049         switch (err) {
5050         case 0:
5051         case IXGBE_ERR_SFP_NOT_PRESENT:
5052         case IXGBE_ERR_SFP_NOT_SUPPORTED:
5053                 break;
5054         case IXGBE_ERR_MASTER_REQUESTS_PENDING:
5055                 e_dev_err("master disable timed out\n");
5056                 break;
5057         case IXGBE_ERR_EEPROM_VERSION:
5058                 /* We are running on a pre-production device, log a warning */
5059                 e_dev_warn("This device is a pre-production adapter/LOM. "
5060                            "Please be aware there may be issues associated with "
5061                            "your hardware.  If you are experiencing problems "
5062                            "please contact your Intel or hardware "
5063                            "representative who provided you with this "
5064                            "hardware.\n");
5065                 break;
5066         default:
5067                 e_dev_err("Hardware Error: %d\n", err);
5068         }
5069
5070         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
5071         /* do not flush user set addresses */
5072         memcpy(old_addr, &adapter->mac_table[0].addr, netdev->addr_len);
5073         ixgbe_flush_sw_mac_table(adapter);
5074         ixgbe_mac_set_default_filter(adapter, old_addr);
5075
5076         /* update SAN MAC vmdq pool selection */
5077         if (hw->mac.san_mac_rar_index)
5078                 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
5079
5080         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
5081                 ixgbe_ptp_reset(adapter);
5082
5083         if (hw->phy.ops.set_phy_power) {
5084                 if (!netif_running(adapter->netdev) && !adapter->wol)
5085                         hw->phy.ops.set_phy_power(hw, false);
5086                 else
5087                         hw->phy.ops.set_phy_power(hw, true);
5088         }
5089 }
5090
5091 /**
5092  * ixgbe_clean_tx_ring - Free Tx Buffers
5093  * @tx_ring: ring to be cleaned
5094  **/
5095 static void ixgbe_clean_tx_ring(struct ixgbe_ring *tx_ring)
5096 {
5097         struct ixgbe_tx_buffer *tx_buffer_info;
5098         unsigned long size;
5099         u16 i;
5100
5101         /* ring already cleared, nothing to do */
5102         if (!tx_ring->tx_buffer_info)
5103                 return;
5104
5105         /* Free all the Tx ring sk_buffs */
5106         for (i = 0; i < tx_ring->count; i++) {
5107                 tx_buffer_info = &tx_ring->tx_buffer_info[i];
5108                 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
5109         }
5110
5111         netdev_tx_reset_queue(txring_txq(tx_ring));
5112
5113         size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
5114         memset(tx_ring->tx_buffer_info, 0, size);
5115
5116         /* Zero out the descriptor ring */
5117         memset(tx_ring->desc, 0, tx_ring->size);
5118
5119         tx_ring->next_to_use = 0;
5120         tx_ring->next_to_clean = 0;
5121 }
5122
5123 /**
5124  * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
5125  * @adapter: board private structure
5126  **/
5127 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
5128 {
5129         int i;
5130
5131         for (i = 0; i < adapter->num_rx_queues; i++)
5132                 ixgbe_clean_rx_ring(adapter->rx_ring[i]);
5133 }
5134
5135 /**
5136  * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
5137  * @adapter: board private structure
5138  **/
5139 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
5140 {
5141         int i;
5142
5143         for (i = 0; i < adapter->num_tx_queues; i++)
5144                 ixgbe_clean_tx_ring(adapter->tx_ring[i]);
5145 }
5146
5147 static void ixgbe_fdir_filter_exit(struct ixgbe_adapter *adapter)
5148 {
5149         struct hlist_node *node2;
5150         struct ixgbe_fdir_filter *filter;
5151
5152         spin_lock(&adapter->fdir_perfect_lock);
5153
5154         hlist_for_each_entry_safe(filter, node2,
5155                                   &adapter->fdir_filter_list, fdir_node) {
5156                 hlist_del(&filter->fdir_node);
5157                 kfree(filter);
5158         }
5159         adapter->fdir_filter_count = 0;
5160
5161         spin_unlock(&adapter->fdir_perfect_lock);
5162 }
5163
5164 void ixgbe_down(struct ixgbe_adapter *adapter)
5165 {
5166         struct net_device *netdev = adapter->netdev;
5167         struct ixgbe_hw *hw = &adapter->hw;
5168         struct net_device *upper;
5169         struct list_head *iter;
5170         int i;
5171
5172         /* signal that we are down to the interrupt handler */
5173         if (test_and_set_bit(__IXGBE_DOWN, &adapter->state))
5174                 return; /* do nothing if already down */
5175
5176         /* disable receives */
5177         hw->mac.ops.disable_rx(hw);
5178
5179         /* disable all enabled rx queues */
5180         for (i = 0; i < adapter->num_rx_queues; i++)
5181                 /* this call also flushes the previous write */
5182                 ixgbe_disable_rx_queue(adapter, adapter->rx_ring[i]);
5183
5184         usleep_range(10000, 20000);
5185
5186         netif_tx_stop_all_queues(netdev);
5187
5188         /* call carrier off first to avoid false dev_watchdog timeouts */
5189         netif_carrier_off(netdev);
5190         netif_tx_disable(netdev);
5191
5192         /* disable any upper devices */
5193         netdev_for_each_all_upper_dev_rcu(adapter->netdev, upper, iter) {
5194                 if (netif_is_macvlan(upper)) {
5195                         struct macvlan_dev *vlan = netdev_priv(upper);
5196
5197                         if (vlan->fwd_priv) {
5198                                 netif_tx_stop_all_queues(upper);
5199                                 netif_carrier_off(upper);
5200                                 netif_tx_disable(upper);
5201                         }
5202                 }
5203         }
5204
5205         ixgbe_irq_disable(adapter);
5206
5207         ixgbe_napi_disable_all(adapter);
5208
5209         adapter->flags2 &= ~(IXGBE_FLAG2_FDIR_REQUIRES_REINIT |
5210                              IXGBE_FLAG2_RESET_REQUESTED);
5211         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
5212
5213         del_timer_sync(&adapter->service_timer);
5214
5215         if (adapter->num_vfs) {
5216                 /* Clear EITR Select mapping */
5217                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, 0);
5218
5219                 /* Mark all the VFs as inactive */
5220                 for (i = 0 ; i < adapter->num_vfs; i++)
5221                         adapter->vfinfo[i].clear_to_send = false;
5222
5223                 /* ping all the active vfs to let them know we are going down */
5224                 ixgbe_ping_all_vfs(adapter);
5225
5226                 /* Disable all VFTE/VFRE TX/RX */
5227                 ixgbe_disable_tx_rx(adapter);
5228         }
5229
5230         /* disable transmits in the hardware now that interrupts are off */
5231         for (i = 0; i < adapter->num_tx_queues; i++) {
5232                 u8 reg_idx = adapter->tx_ring[i]->reg_idx;
5233                 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
5234         }
5235
5236         /* Disable the Tx DMA engine on 82599 and later MAC */
5237         switch (hw->mac.type) {
5238         case ixgbe_mac_82599EB:
5239         case ixgbe_mac_X540:
5240         case ixgbe_mac_X550:
5241         case ixgbe_mac_X550EM_x:
5242                 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL,
5243                                 (IXGBE_READ_REG(hw, IXGBE_DMATXCTL) &
5244                                  ~IXGBE_DMATXCTL_TE));
5245                 break;
5246         default:
5247                 break;
5248         }
5249
5250         if (!pci_channel_offline(adapter->pdev))
5251                 ixgbe_reset(adapter);
5252
5253         /* power down the optics for 82599 SFP+ fiber */
5254         if (hw->mac.ops.disable_tx_laser)
5255                 hw->mac.ops.disable_tx_laser(hw);
5256
5257         ixgbe_clean_all_tx_rings(adapter);
5258         ixgbe_clean_all_rx_rings(adapter);
5259 }
5260
5261 /**
5262  * ixgbe_tx_timeout - Respond to a Tx Hang
5263  * @netdev: network interface device structure
5264  **/
5265 static void ixgbe_tx_timeout(struct net_device *netdev)
5266 {
5267         struct ixgbe_adapter *adapter = netdev_priv(netdev);
5268
5269         /* Do the reset outside of interrupt context */
5270         ixgbe_tx_timeout_reset(adapter);
5271 }
5272
5273 /**
5274  * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
5275  * @adapter: board private structure to initialize
5276  *
5277  * ixgbe_sw_init initializes the Adapter private data structure.
5278  * Fields are initialized based on PCI device information and
5279  * OS network device settings (MTU size).
5280  **/
5281 static int ixgbe_sw_init(struct ixgbe_adapter *adapter)
5282 {
5283         struct ixgbe_hw *hw = &adapter->hw;
5284         struct pci_dev *pdev = adapter->pdev;
5285         unsigned int rss, fdir;
5286         u32 fwsm;
5287 #ifdef CONFIG_IXGBE_DCB
5288         int j;
5289         struct tc_configuration *tc;
5290 #endif
5291
5292         /* PCI config space info */
5293
5294         hw->vendor_id = pdev->vendor;
5295         hw->device_id = pdev->device;
5296         hw->revision_id = pdev->revision;
5297         hw->subsystem_vendor_id = pdev->subsystem_vendor;
5298         hw->subsystem_device_id = pdev->subsystem_device;
5299
5300         /* Set common capability flags and settings */
5301         rss = min_t(int, ixgbe_max_rss_indices(adapter), num_online_cpus());
5302         adapter->ring_feature[RING_F_RSS].limit = rss;
5303         adapter->flags2 |= IXGBE_FLAG2_RSC_CAPABLE;
5304         adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
5305         adapter->max_q_vectors = MAX_Q_VECTORS_82599;
5306         adapter->atr_sample_rate = 20;
5307         fdir = min_t(int, IXGBE_MAX_FDIR_INDICES, num_online_cpus());
5308         adapter->ring_feature[RING_F_FDIR].limit = fdir;
5309         adapter->fdir_pballoc = IXGBE_FDIR_PBALLOC_64K;
5310 #ifdef CONFIG_IXGBE_DCA
5311         adapter->flags |= IXGBE_FLAG_DCA_CAPABLE;
5312 #endif
5313 #ifdef IXGBE_FCOE
5314         adapter->flags |= IXGBE_FLAG_FCOE_CAPABLE;
5315         adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
5316 #ifdef CONFIG_IXGBE_DCB
5317         /* Default traffic class to use for FCoE */
5318         adapter->fcoe.up = IXGBE_FCOE_DEFTC;
5319 #endif /* CONFIG_IXGBE_DCB */
5320 #endif /* IXGBE_FCOE */
5321
5322         adapter->mac_table = kzalloc(sizeof(struct ixgbe_mac_addr) *
5323                                      hw->mac.num_rar_entries,
5324                                      GFP_ATOMIC);
5325
5326         /* Set MAC specific capability flags and exceptions */
5327         switch (hw->mac.type) {
5328         case ixgbe_mac_82598EB:
5329                 adapter->flags2 &= ~IXGBE_FLAG2_RSC_CAPABLE;
5330                 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
5331
5332                 if (hw->device_id == IXGBE_DEV_ID_82598AT)
5333                         adapter->flags |= IXGBE_FLAG_FAN_FAIL_CAPABLE;
5334
5335                 adapter->max_q_vectors = MAX_Q_VECTORS_82598;
5336                 adapter->ring_feature[RING_F_FDIR].limit = 0;
5337                 adapter->atr_sample_rate = 0;
5338                 adapter->fdir_pballoc = 0;
5339 #ifdef IXGBE_FCOE
5340                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
5341                 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
5342 #ifdef CONFIG_IXGBE_DCB
5343                 adapter->fcoe.up = 0;
5344 #endif /* IXGBE_DCB */
5345 #endif /* IXGBE_FCOE */
5346                 break;
5347         case ixgbe_mac_82599EB:
5348                 if (hw->device_id == IXGBE_DEV_ID_82599_T3_LOM)
5349                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
5350                 break;
5351         case ixgbe_mac_X540:
5352                 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM(hw));
5353                 if (fwsm & IXGBE_FWSM_TS_ENABLED)
5354                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
5355                 break;
5356         case ixgbe_mac_X550EM_x:
5357         case ixgbe_mac_X550:
5358 #ifdef CONFIG_IXGBE_DCA
5359                 adapter->flags &= ~IXGBE_FLAG_DCA_CAPABLE;
5360 #endif
5361 #ifdef CONFIG_IXGBE_VXLAN
5362                 adapter->flags |= IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE;
5363 #endif
5364                 break;
5365         default:
5366                 break;
5367         }
5368
5369 #ifdef IXGBE_FCOE
5370         /* FCoE support exists, always init the FCoE lock */
5371         spin_lock_init(&adapter->fcoe.lock);
5372
5373 #endif
5374         /* n-tuple support exists, always init our spinlock */
5375         spin_lock_init(&adapter->fdir_perfect_lock);
5376
5377 #ifdef CONFIG_IXGBE_DCB
5378         switch (hw->mac.type) {
5379         case ixgbe_mac_X540:
5380         case ixgbe_mac_X550:
5381         case ixgbe_mac_X550EM_x:
5382                 adapter->dcb_cfg.num_tcs.pg_tcs = X540_TRAFFIC_CLASS;
5383                 adapter->dcb_cfg.num_tcs.pfc_tcs = X540_TRAFFIC_CLASS;
5384                 break;
5385         default:
5386                 adapter->dcb_cfg.num_tcs.pg_tcs = MAX_TRAFFIC_CLASS;
5387                 adapter->dcb_cfg.num_tcs.pfc_tcs = MAX_TRAFFIC_CLASS;
5388                 break;
5389         }
5390
5391         /* Configure DCB traffic classes */
5392         for (j = 0; j < MAX_TRAFFIC_CLASS; j++) {
5393                 tc = &adapter->dcb_cfg.tc_config[j];
5394                 tc->path[DCB_TX_CONFIG].bwg_id = 0;
5395                 tc->path[DCB_TX_CONFIG].bwg_percent = 12 + (j & 1);
5396                 tc->path[DCB_RX_CONFIG].bwg_id = 0;
5397                 tc->path[DCB_RX_CONFIG].bwg_percent = 12 + (j & 1);
5398                 tc->dcb_pfc = pfc_disabled;
5399         }
5400
5401         /* Initialize default user to priority mapping, UPx->TC0 */
5402         tc = &adapter->dcb_cfg.tc_config[0];
5403         tc->path[DCB_TX_CONFIG].up_to_tc_bitmap = 0xFF;
5404         tc->path[DCB_RX_CONFIG].up_to_tc_bitmap = 0xFF;
5405
5406         adapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100;
5407         adapter->dcb_cfg.bw_percentage[DCB_RX_CONFIG][0] = 100;
5408         adapter->dcb_cfg.pfc_mode_enable = false;
5409         adapter->dcb_set_bitmap = 0x00;
5410         adapter->dcbx_cap = DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_CEE;
5411         memcpy(&adapter->temp_dcb_cfg, &adapter->dcb_cfg,
5412                sizeof(adapter->temp_dcb_cfg));
5413
5414 #endif
5415
5416         /* default flow control settings */
5417         hw->fc.requested_mode = ixgbe_fc_full;
5418         hw->fc.current_mode = ixgbe_fc_full;    /* init for ethtool output */
5419         ixgbe_pbthresh_setup(adapter);
5420         hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
5421         hw->fc.send_xon = true;
5422         hw->fc.disable_fc_autoneg = ixgbe_device_supports_autoneg_fc(hw);
5423
5424 #ifdef CONFIG_PCI_IOV
5425         if (max_vfs > 0)
5426                 e_dev_warn("Enabling SR-IOV VFs using the max_vfs module parameter is deprecated - please use the pci sysfs interface instead.\n");
5427
5428         /* assign number of SR-IOV VFs */
5429         if (hw->mac.type != ixgbe_mac_82598EB) {
5430                 if (max_vfs > IXGBE_MAX_VFS_DRV_LIMIT) {
5431                         adapter->num_vfs = 0;
5432                         e_dev_warn("max_vfs parameter out of range. Not assigning any SR-IOV VFs\n");
5433                 } else {
5434                         adapter->num_vfs = max_vfs;
5435                 }
5436         }
5437 #endif /* CONFIG_PCI_IOV */
5438
5439         /* enable itr by default in dynamic mode */
5440         adapter->rx_itr_setting = 1;
5441         adapter->tx_itr_setting = 1;
5442
5443         /* set default ring sizes */
5444         adapter->tx_ring_count = IXGBE_DEFAULT_TXD;
5445         adapter->rx_ring_count = IXGBE_DEFAULT_RXD;
5446
5447         /* set default work limits */
5448         adapter->tx_work_limit = IXGBE_DEFAULT_TX_WORK;
5449
5450         /* initialize eeprom parameters */
5451         if (ixgbe_init_eeprom_params_generic(hw)) {
5452                 e_dev_err("EEPROM initialization failed\n");
5453                 return -EIO;
5454         }
5455
5456         /* PF holds first pool slot */
5457         set_bit(0, &adapter->fwd_bitmask);
5458         set_bit(__IXGBE_DOWN, &adapter->state);
5459
5460         return 0;
5461 }
5462
5463 /**
5464  * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
5465  * @tx_ring:    tx descriptor ring (for a specific queue) to setup
5466  *
5467  * Return 0 on success, negative on failure
5468  **/
5469 int ixgbe_setup_tx_resources(struct ixgbe_ring *tx_ring)
5470 {
5471         struct device *dev = tx_ring->dev;
5472         int orig_node = dev_to_node(dev);
5473         int ring_node = -1;
5474         int size;
5475
5476         size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
5477
5478         if (tx_ring->q_vector)
5479                 ring_node = tx_ring->q_vector->numa_node;
5480
5481         tx_ring->tx_buffer_info = vzalloc_node(size, ring_node);
5482         if (!tx_ring->tx_buffer_info)
5483                 tx_ring->tx_buffer_info = vzalloc(size);
5484         if (!tx_ring->tx_buffer_info)
5485                 goto err;
5486
5487         u64_stats_init(&tx_ring->syncp);
5488
5489         /* round up to nearest 4K */
5490         tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
5491         tx_ring->size = ALIGN(tx_ring->size, 4096);
5492
5493         set_dev_node(dev, ring_node);
5494         tx_ring->desc = dma_alloc_coherent(dev,
5495                                            tx_ring->size,
5496                                            &tx_ring->dma,
5497                                            GFP_KERNEL);
5498         set_dev_node(dev, orig_node);
5499         if (!tx_ring->desc)
5500                 tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
5501                                                    &tx_ring->dma, GFP_KERNEL);
5502         if (!tx_ring->desc)
5503                 goto err;
5504
5505         tx_ring->next_to_use = 0;
5506         tx_ring->next_to_clean = 0;
5507         return 0;
5508
5509 err:
5510         vfree(tx_ring->tx_buffer_info);
5511         tx_ring->tx_buffer_info = NULL;
5512         dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
5513         return -ENOMEM;
5514 }
5515
5516 /**
5517  * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
5518  * @adapter: board private structure
5519  *
5520  * If this function returns with an error, then it's possible one or
5521  * more of the rings is populated (while the rest are not).  It is the
5522  * callers duty to clean those orphaned rings.
5523  *
5524  * Return 0 on success, negative on failure
5525  **/
5526 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
5527 {
5528         int i, err = 0;
5529
5530         for (i = 0; i < adapter->num_tx_queues; i++) {
5531                 err = ixgbe_setup_tx_resources(adapter->tx_ring[i]);
5532                 if (!err)
5533                         continue;
5534
5535                 e_err(probe, "Allocation for Tx Queue %u failed\n", i);
5536                 goto err_setup_tx;
5537         }
5538
5539         return 0;
5540 err_setup_tx:
5541         /* rewind the index freeing the rings as we go */
5542         while (i--)
5543                 ixgbe_free_tx_resources(adapter->tx_ring[i]);
5544         return err;
5545 }
5546
5547 /**
5548  * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
5549  * @rx_ring:    rx descriptor ring (for a specific queue) to setup
5550  *
5551  * Returns 0 on success, negative on failure
5552  **/
5553 int ixgbe_setup_rx_resources(struct ixgbe_ring *rx_ring)
5554 {
5555         struct device *dev = rx_ring->dev;
5556         int orig_node = dev_to_node(dev);
5557         int ring_node = -1;
5558         int size;
5559
5560         size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
5561
5562         if (rx_ring->q_vector)
5563                 ring_node = rx_ring->q_vector->numa_node;
5564
5565         rx_ring->rx_buffer_info = vzalloc_node(size, ring_node);
5566         if (!rx_ring->rx_buffer_info)
5567                 rx_ring->rx_buffer_info = vzalloc(size);
5568         if (!rx_ring->rx_buffer_info)
5569                 goto err;
5570
5571         u64_stats_init(&rx_ring->syncp);
5572
5573         /* Round up to nearest 4K */
5574         rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
5575         rx_ring->size = ALIGN(rx_ring->size, 4096);
5576
5577         set_dev_node(dev, ring_node);
5578         rx_ring->desc = dma_alloc_coherent(dev,
5579                                            rx_ring->size,
5580                                            &rx_ring->dma,
5581                                            GFP_KERNEL);
5582         set_dev_node(dev, orig_node);
5583         if (!rx_ring->desc)
5584                 rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
5585                                                    &rx_ring->dma, GFP_KERNEL);
5586         if (!rx_ring->desc)
5587                 goto err;
5588
5589         rx_ring->next_to_clean = 0;
5590         rx_ring->next_to_use = 0;
5591
5592         return 0;
5593 err:
5594         vfree(rx_ring->rx_buffer_info);
5595         rx_ring->rx_buffer_info = NULL;
5596         dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
5597         return -ENOMEM;
5598 }
5599
5600 /**
5601  * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
5602  * @adapter: board private structure
5603  *
5604  * If this function returns with an error, then it's possible one or
5605  * more of the rings is populated (while the rest are not).  It is the
5606  * callers duty to clean those orphaned rings.
5607  *
5608  * Return 0 on success, negative on failure
5609  **/
5610 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
5611 {
5612         int i, err = 0;
5613
5614         for (i = 0; i < adapter->num_rx_queues; i++) {
5615                 err = ixgbe_setup_rx_resources(adapter->rx_ring[i]);
5616                 if (!err)
5617                         continue;
5618
5619                 e_err(probe, "Allocation for Rx Queue %u failed\n", i);
5620                 goto err_setup_rx;
5621         }
5622
5623 #ifdef IXGBE_FCOE
5624         err = ixgbe_setup_fcoe_ddp_resources(adapter);
5625         if (!err)
5626 #endif
5627                 return 0;
5628 err_setup_rx:
5629         /* rewind the index freeing the rings as we go */
5630         while (i--)
5631                 ixgbe_free_rx_resources(adapter->rx_ring[i]);
5632         return err;
5633 }
5634
5635 /**
5636  * ixgbe_free_tx_resources - Free Tx Resources per Queue
5637  * @tx_ring: Tx descriptor ring for a specific queue
5638  *
5639  * Free all transmit software resources
5640  **/
5641 void ixgbe_free_tx_resources(struct ixgbe_ring *tx_ring)
5642 {
5643         ixgbe_clean_tx_ring(tx_ring);
5644
5645         vfree(tx_ring->tx_buffer_info);
5646         tx_ring->tx_buffer_info = NULL;
5647
5648         /* if not set, then don't free */
5649         if (!tx_ring->desc)
5650                 return;
5651
5652         dma_free_coherent(tx_ring->dev, tx_ring->size,
5653                           tx_ring->desc, tx_ring->dma);
5654
5655         tx_ring->desc = NULL;
5656 }
5657
5658 /**
5659  * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
5660  * @adapter: board private structure
5661  *
5662  * Free all transmit software resources
5663  **/
5664 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
5665 {
5666         int i;
5667
5668         for (i = 0; i < adapter->num_tx_queues; i++)
5669                 if (adapter->tx_ring[i]->desc)
5670                         ixgbe_free_tx_resources(adapter->tx_ring[i]);
5671 }
5672
5673 /**
5674  * ixgbe_free_rx_resources - Free Rx Resources
5675  * @rx_ring: ring to clean the resources from
5676  *
5677  * Free all receive software resources
5678  **/
5679 void ixgbe_free_rx_resources(struct ixgbe_ring *rx_ring)
5680 {
5681         ixgbe_clean_rx_ring(rx_ring);
5682
5683         vfree(rx_ring->rx_buffer_info);
5684         rx_ring->rx_buffer_info = NULL;
5685
5686         /* if not set, then don't free */
5687         if (!rx_ring->desc)
5688                 return;
5689
5690         dma_free_coherent(rx_ring->dev, rx_ring->size,
5691                           rx_ring->desc, rx_ring->dma);
5692
5693         rx_ring->desc = NULL;
5694 }
5695
5696 /**
5697  * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
5698  * @adapter: board private structure
5699  *
5700  * Free all receive software resources
5701  **/
5702 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
5703 {
5704         int i;
5705
5706 #ifdef IXGBE_FCOE
5707         ixgbe_free_fcoe_ddp_resources(adapter);
5708
5709 #endif
5710         for (i = 0; i < adapter->num_rx_queues; i++)
5711                 if (adapter->rx_ring[i]->desc)
5712                         ixgbe_free_rx_resources(adapter->rx_ring[i]);
5713 }
5714
5715 /**
5716  * ixgbe_change_mtu - Change the Maximum Transfer Unit
5717  * @netdev: network interface device structure
5718  * @new_mtu: new value for maximum frame size
5719  *
5720  * Returns 0 on success, negative on failure
5721  **/
5722 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
5723 {
5724         struct ixgbe_adapter *adapter = netdev_priv(netdev);
5725         int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
5726
5727         /* MTU < 68 is an error and causes problems on some kernels */
5728         if ((new_mtu < 68) || (max_frame > IXGBE_MAX_JUMBO_FRAME_SIZE))
5729                 return -EINVAL;
5730
5731         /*
5732          * For 82599EB we cannot allow legacy VFs to enable their receive
5733          * paths when MTU greater than 1500 is configured.  So display a
5734          * warning that legacy VFs will be disabled.
5735          */
5736         if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) &&
5737             (adapter->hw.mac.type == ixgbe_mac_82599EB) &&
5738             (max_frame > (ETH_FRAME_LEN + ETH_FCS_LEN)))
5739                 e_warn(probe, "Setting MTU > 1500 will disable legacy VFs\n");
5740
5741         e_info(probe, "changing MTU from %d to %d\n", netdev->mtu, new_mtu);
5742
5743         /* must set new MTU before calling down or up */
5744         netdev->mtu = new_mtu;
5745
5746         if (netif_running(netdev))
5747                 ixgbe_reinit_locked(adapter);
5748
5749         return 0;
5750 }
5751
5752 /**
5753  * ixgbe_open - Called when a network interface is made active
5754  * @netdev: network interface device structure
5755  *
5756  * Returns 0 on success, negative value on failure
5757  *
5758  * The open entry point is called when a network interface is made
5759  * active by the system (IFF_UP).  At this point all resources needed
5760  * for transmit and receive operations are allocated, the interrupt
5761  * handler is registered with the OS, the watchdog timer is started,
5762  * and the stack is notified that the interface is ready.
5763  **/
5764 static int ixgbe_open(struct net_device *netdev)
5765 {
5766         struct ixgbe_adapter *adapter = netdev_priv(netdev);
5767         struct ixgbe_hw *hw = &adapter->hw;
5768         int err, queues;
5769
5770         /* disallow open during test */
5771         if (test_bit(__IXGBE_TESTING, &adapter->state))
5772                 return -EBUSY;
5773
5774         netif_carrier_off(netdev);
5775
5776         /* allocate transmit descriptors */
5777         err = ixgbe_setup_all_tx_resources(adapter);
5778         if (err)
5779                 goto err_setup_tx;
5780
5781         /* allocate receive descriptors */
5782         err = ixgbe_setup_all_rx_resources(adapter);
5783         if (err)
5784                 goto err_setup_rx;
5785
5786         ixgbe_configure(adapter);
5787
5788         err = ixgbe_request_irq(adapter);
5789         if (err)
5790                 goto err_req_irq;
5791
5792         /* Notify the stack of the actual queue counts. */
5793         if (adapter->num_rx_pools > 1)
5794                 queues = adapter->num_rx_queues_per_pool;
5795         else
5796                 queues = adapter->num_tx_queues;
5797
5798         err = netif_set_real_num_tx_queues(netdev, queues);
5799         if (err)
5800                 goto err_set_queues;
5801
5802         if (adapter->num_rx_pools > 1 &&
5803             adapter->num_rx_queues > IXGBE_MAX_L2A_QUEUES)
5804                 queues = IXGBE_MAX_L2A_QUEUES;
5805         else
5806                 queues = adapter->num_rx_queues;
5807         err = netif_set_real_num_rx_queues(netdev, queues);
5808         if (err)
5809                 goto err_set_queues;
5810
5811         ixgbe_ptp_init(adapter);
5812
5813         ixgbe_up_complete(adapter);
5814
5815         ixgbe_clear_vxlan_port(adapter);
5816 #ifdef CONFIG_IXGBE_VXLAN
5817         vxlan_get_rx_port(netdev);
5818 #endif
5819
5820         return 0;
5821
5822 err_set_queues:
5823         ixgbe_free_irq(adapter);
5824 err_req_irq:
5825         ixgbe_free_all_rx_resources(adapter);
5826         if (hw->phy.ops.set_phy_power && !adapter->wol)
5827                 hw->phy.ops.set_phy_power(&adapter->hw, false);
5828 err_setup_rx:
5829         ixgbe_free_all_tx_resources(adapter);
5830 err_setup_tx:
5831         ixgbe_reset(adapter);
5832
5833         return err;
5834 }
5835
5836 static void ixgbe_close_suspend(struct ixgbe_adapter *adapter)
5837 {
5838         ixgbe_ptp_suspend(adapter);
5839
5840         if (adapter->hw.phy.ops.enter_lplu) {
5841                 adapter->hw.phy.reset_disable = true;
5842                 ixgbe_down(adapter);
5843                 adapter->hw.phy.ops.enter_lplu(&adapter->hw);
5844                 adapter->hw.phy.reset_disable = false;
5845         } else {
5846                 ixgbe_down(adapter);
5847         }
5848
5849         ixgbe_free_irq(adapter);
5850
5851         ixgbe_free_all_tx_resources(adapter);
5852         ixgbe_free_all_rx_resources(adapter);
5853 }
5854
5855 /**
5856  * ixgbe_close - Disables a network interface
5857  * @netdev: network interface device structure
5858  *
5859  * Returns 0, this is not allowed to fail
5860  *
5861  * The close entry point is called when an interface is de-activated
5862  * by the OS.  The hardware is still under the drivers control, but
5863  * needs to be disabled.  A global MAC reset is issued to stop the
5864  * hardware, and all transmit and receive resources are freed.
5865  **/
5866 static int ixgbe_close(struct net_device *netdev)
5867 {
5868         struct ixgbe_adapter *adapter = netdev_priv(netdev);
5869
5870         ixgbe_ptp_stop(adapter);
5871
5872         ixgbe_close_suspend(adapter);
5873
5874         ixgbe_fdir_filter_exit(adapter);
5875
5876         ixgbe_release_hw_control(adapter);
5877
5878         return 0;
5879 }
5880
5881 #ifdef CONFIG_PM
5882 static int ixgbe_resume(struct pci_dev *pdev)
5883 {
5884         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
5885         struct net_device *netdev = adapter->netdev;
5886         u32 err;
5887
5888         adapter->hw.hw_addr = adapter->io_addr;
5889         pci_set_power_state(pdev, PCI_D0);
5890         pci_restore_state(pdev);
5891         /*
5892          * pci_restore_state clears dev->state_saved so call
5893          * pci_save_state to restore it.
5894          */
5895         pci_save_state(pdev);
5896
5897         err = pci_enable_device_mem(pdev);
5898         if (err) {
5899                 e_dev_err("Cannot enable PCI device from suspend\n");
5900                 return err;
5901         }
5902         smp_mb__before_atomic();
5903         clear_bit(__IXGBE_DISABLED, &adapter->state);
5904         pci_set_master(pdev);
5905
5906         pci_wake_from_d3(pdev, false);
5907
5908         ixgbe_reset(adapter);
5909
5910         IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
5911
5912         rtnl_lock();
5913         err = ixgbe_init_interrupt_scheme(adapter);
5914         if (!err && netif_running(netdev))
5915                 err = ixgbe_open(netdev);
5916
5917         rtnl_unlock();
5918
5919         if (err)
5920                 return err;
5921
5922         netif_device_attach(netdev);
5923
5924         return 0;
5925 }
5926 #endif /* CONFIG_PM */
5927
5928 static int __ixgbe_shutdown(struct pci_dev *pdev, bool *enable_wake)
5929 {
5930         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
5931         struct net_device *netdev = adapter->netdev;
5932         struct ixgbe_hw *hw = &adapter->hw;
5933         u32 ctrl, fctrl;
5934         u32 wufc = adapter->wol;
5935 #ifdef CONFIG_PM
5936         int retval = 0;
5937 #endif
5938
5939         netif_device_detach(netdev);
5940
5941         rtnl_lock();
5942         if (netif_running(netdev))
5943                 ixgbe_close_suspend(adapter);
5944         rtnl_unlock();
5945
5946         ixgbe_clear_interrupt_scheme(adapter);
5947
5948 #ifdef CONFIG_PM
5949         retval = pci_save_state(pdev);
5950         if (retval)
5951                 return retval;
5952
5953 #endif
5954         if (hw->mac.ops.stop_link_on_d3)
5955                 hw->mac.ops.stop_link_on_d3(hw);
5956
5957         if (wufc) {
5958                 ixgbe_set_rx_mode(netdev);
5959
5960                 /* enable the optics for 82599 SFP+ fiber as we can WoL */
5961                 if (hw->mac.ops.enable_tx_laser)
5962                         hw->mac.ops.enable_tx_laser(hw);
5963
5964                 /* turn on all-multi mode if wake on multicast is enabled */
5965                 if (wufc & IXGBE_WUFC_MC) {
5966                         fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
5967                         fctrl |= IXGBE_FCTRL_MPE;
5968                         IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
5969                 }
5970
5971                 ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
5972                 ctrl |= IXGBE_CTRL_GIO_DIS;
5973                 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);
5974
5975                 IXGBE_WRITE_REG(hw, IXGBE_WUFC, wufc);
5976         } else {
5977                 IXGBE_WRITE_REG(hw, IXGBE_WUC, 0);
5978                 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0);
5979         }
5980
5981         switch (hw->mac.type) {
5982         case ixgbe_mac_82598EB:
5983                 pci_wake_from_d3(pdev, false);
5984                 break;
5985         case ixgbe_mac_82599EB:
5986         case ixgbe_mac_X540:
5987         case ixgbe_mac_X550:
5988         case ixgbe_mac_X550EM_x:
5989                 pci_wake_from_d3(pdev, !!wufc);
5990                 break;
5991         default:
5992                 break;
5993         }
5994
5995         *enable_wake = !!wufc;
5996         if (hw->phy.ops.set_phy_power && !*enable_wake)
5997                 hw->phy.ops.set_phy_power(hw, false);
5998
5999         ixgbe_release_hw_control(adapter);
6000
6001         if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
6002                 pci_disable_device(pdev);
6003
6004         return 0;
6005 }
6006
6007 #ifdef CONFIG_PM
6008 static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
6009 {
6010         int retval;
6011         bool wake;
6012
6013         retval = __ixgbe_shutdown(pdev, &wake);
6014         if (retval)
6015                 return retval;
6016
6017         if (wake) {
6018                 pci_prepare_to_sleep(pdev);
6019         } else {
6020                 pci_wake_from_d3(pdev, false);
6021                 pci_set_power_state(pdev, PCI_D3hot);
6022         }
6023
6024         return 0;
6025 }
6026 #endif /* CONFIG_PM */
6027
6028 static void ixgbe_shutdown(struct pci_dev *pdev)
6029 {
6030         bool wake;
6031
6032         __ixgbe_shutdown(pdev, &wake);
6033
6034         if (system_state == SYSTEM_POWER_OFF) {
6035                 pci_wake_from_d3(pdev, wake);
6036                 pci_set_power_state(pdev, PCI_D3hot);
6037         }
6038 }
6039
6040 /**
6041  * ixgbe_update_stats - Update the board statistics counters.
6042  * @adapter: board private structure
6043  **/
6044 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
6045 {
6046         struct net_device *netdev = adapter->netdev;
6047         struct ixgbe_hw *hw = &adapter->hw;
6048         struct ixgbe_hw_stats *hwstats = &adapter->stats;
6049         u64 total_mpc = 0;
6050         u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
6051         u64 non_eop_descs = 0, restart_queue = 0, tx_busy = 0;
6052         u64 alloc_rx_page_failed = 0, alloc_rx_buff_failed = 0;
6053         u64 bytes = 0, packets = 0, hw_csum_rx_error = 0;
6054
6055         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6056             test_bit(__IXGBE_RESETTING, &adapter->state))
6057                 return;
6058
6059         if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
6060                 u64 rsc_count = 0;
6061                 u64 rsc_flush = 0;
6062                 for (i = 0; i < adapter->num_rx_queues; i++) {
6063                         rsc_count += adapter->rx_ring[i]->rx_stats.rsc_count;
6064                         rsc_flush += adapter->rx_ring[i]->rx_stats.rsc_flush;
6065                 }
6066                 adapter->rsc_total_count = rsc_count;
6067                 adapter->rsc_total_flush = rsc_flush;
6068         }
6069
6070         for (i = 0; i < adapter->num_rx_queues; i++) {
6071                 struct ixgbe_ring *rx_ring = adapter->rx_ring[i];
6072                 non_eop_descs += rx_ring->rx_stats.non_eop_descs;
6073                 alloc_rx_page_failed += rx_ring->rx_stats.alloc_rx_page_failed;
6074                 alloc_rx_buff_failed += rx_ring->rx_stats.alloc_rx_buff_failed;
6075                 hw_csum_rx_error += rx_ring->rx_stats.csum_err;
6076                 bytes += rx_ring->stats.bytes;
6077                 packets += rx_ring->stats.packets;
6078         }
6079         adapter->non_eop_descs = non_eop_descs;
6080         adapter->alloc_rx_page_failed = alloc_rx_page_failed;
6081         adapter->alloc_rx_buff_failed = alloc_rx_buff_failed;
6082         adapter->hw_csum_rx_error = hw_csum_rx_error;
6083         netdev->stats.rx_bytes = bytes;
6084         netdev->stats.rx_packets = packets;
6085
6086         bytes = 0;
6087         packets = 0;
6088         /* gather some stats to the adapter struct that are per queue */
6089         for (i = 0; i < adapter->num_tx_queues; i++) {
6090                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
6091                 restart_queue += tx_ring->tx_stats.restart_queue;
6092                 tx_busy += tx_ring->tx_stats.tx_busy;
6093                 bytes += tx_ring->stats.bytes;
6094                 packets += tx_ring->stats.packets;
6095         }
6096         adapter->restart_queue = restart_queue;
6097         adapter->tx_busy = tx_busy;
6098         netdev->stats.tx_bytes = bytes;
6099         netdev->stats.tx_packets = packets;
6100
6101         hwstats->crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
6102
6103         /* 8 register reads */
6104         for (i = 0; i < 8; i++) {
6105                 /* for packet buffers not used, the register should read 0 */
6106                 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
6107                 missed_rx += mpc;
6108                 hwstats->mpc[i] += mpc;
6109                 total_mpc += hwstats->mpc[i];
6110                 hwstats->pxontxc[i] += IXGBE_READ_REG(hw, IXGBE_PXONTXC(i));
6111                 hwstats->pxofftxc[i] += IXGBE_READ_REG(hw, IXGBE_PXOFFTXC(i));
6112                 switch (hw->mac.type) {
6113                 case ixgbe_mac_82598EB:
6114                         hwstats->rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
6115                         hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC(i));
6116                         hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC(i));
6117                         hwstats->pxonrxc[i] +=
6118                                 IXGBE_READ_REG(hw, IXGBE_PXONRXC(i));
6119                         break;
6120                 case ixgbe_mac_82599EB:
6121                 case ixgbe_mac_X540:
6122                 case ixgbe_mac_X550:
6123                 case ixgbe_mac_X550EM_x:
6124                         hwstats->pxonrxc[i] +=
6125                                 IXGBE_READ_REG(hw, IXGBE_PXONRXCNT(i));
6126                         break;
6127                 default:
6128                         break;
6129                 }
6130         }
6131
6132         /*16 register reads */
6133         for (i = 0; i < 16; i++) {
6134                 hwstats->qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
6135                 hwstats->qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
6136                 if ((hw->mac.type == ixgbe_mac_82599EB) ||
6137                     (hw->mac.type == ixgbe_mac_X540) ||
6138                     (hw->mac.type == ixgbe_mac_X550) ||
6139                     (hw->mac.type == ixgbe_mac_X550EM_x)) {
6140                         hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
6141                         IXGBE_READ_REG(hw, IXGBE_QBTC_H(i)); /* to clear */
6142                         hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC_L(i));
6143                         IXGBE_READ_REG(hw, IXGBE_QBRC_H(i)); /* to clear */
6144                 }
6145         }
6146
6147         hwstats->gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
6148         /* work around hardware counting issue */
6149         hwstats->gprc -= missed_rx;
6150
6151         ixgbe_update_xoff_received(adapter);
6152
6153         /* 82598 hardware only has a 32 bit counter in the high register */
6154         switch (hw->mac.type) {
6155         case ixgbe_mac_82598EB:
6156                 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
6157                 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
6158                 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
6159                 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORH);
6160                 break;
6161         case ixgbe_mac_X540:
6162         case ixgbe_mac_X550:
6163         case ixgbe_mac_X550EM_x:
6164                 /* OS2BMC stats are X540 and later */
6165                 hwstats->o2bgptc += IXGBE_READ_REG(hw, IXGBE_O2BGPTC);
6166                 hwstats->o2bspc += IXGBE_READ_REG(hw, IXGBE_O2BSPC);
6167                 hwstats->b2ospc += IXGBE_READ_REG(hw, IXGBE_B2OSPC);
6168                 hwstats->b2ogprc += IXGBE_READ_REG(hw, IXGBE_B2OGPRC);
6169         case ixgbe_mac_82599EB:
6170                 for (i = 0; i < 16; i++)
6171                         adapter->hw_rx_no_dma_resources +=
6172                                              IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
6173                 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCL);
6174                 IXGBE_READ_REG(hw, IXGBE_GORCH); /* to clear */
6175                 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL);
6176                 IXGBE_READ_REG(hw, IXGBE_GOTCH); /* to clear */
6177                 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORL);
6178                 IXGBE_READ_REG(hw, IXGBE_TORH); /* to clear */
6179                 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT);
6180                 hwstats->fdirmatch += IXGBE_READ_REG(hw, IXGBE_FDIRMATCH);
6181                 hwstats->fdirmiss += IXGBE_READ_REG(hw, IXGBE_FDIRMISS);
6182 #ifdef IXGBE_FCOE
6183                 hwstats->fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC);
6184                 hwstats->fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC);
6185                 hwstats->fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC);
6186                 hwstats->fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC);
6187                 hwstats->fcoedwrc += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC);
6188                 hwstats->fcoedwtc += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC);
6189                 /* Add up per cpu counters for total ddp aloc fail */
6190                 if (adapter->fcoe.ddp_pool) {
6191                         struct ixgbe_fcoe *fcoe = &adapter->fcoe;
6192                         struct ixgbe_fcoe_ddp_pool *ddp_pool;
6193                         unsigned int cpu;
6194                         u64 noddp = 0, noddp_ext_buff = 0;
6195                         for_each_possible_cpu(cpu) {
6196                                 ddp_pool = per_cpu_ptr(fcoe->ddp_pool, cpu);
6197                                 noddp += ddp_pool->noddp;
6198                                 noddp_ext_buff += ddp_pool->noddp_ext_buff;
6199                         }
6200                         hwstats->fcoe_noddp = noddp;
6201                         hwstats->fcoe_noddp_ext_buff = noddp_ext_buff;
6202                 }
6203 #endif /* IXGBE_FCOE */
6204                 break;
6205         default:
6206                 break;
6207         }
6208         bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
6209         hwstats->bprc += bprc;
6210         hwstats->mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
6211         if (hw->mac.type == ixgbe_mac_82598EB)
6212                 hwstats->mprc -= bprc;
6213         hwstats->roc += IXGBE_READ_REG(hw, IXGBE_ROC);
6214         hwstats->prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
6215         hwstats->prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
6216         hwstats->prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
6217         hwstats->prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
6218         hwstats->prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
6219         hwstats->prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
6220         hwstats->rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
6221         lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
6222         hwstats->lxontxc += lxon;
6223         lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
6224         hwstats->lxofftxc += lxoff;
6225         hwstats->gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
6226         hwstats->mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
6227         /*
6228          * 82598 errata - tx of flow control packets is included in tx counters
6229          */
6230         xon_off_tot = lxon + lxoff;
6231         hwstats->gptc -= xon_off_tot;
6232         hwstats->mptc -= xon_off_tot;
6233         hwstats->gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
6234         hwstats->ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
6235         hwstats->rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
6236         hwstats->rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
6237         hwstats->tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
6238         hwstats->ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
6239         hwstats->ptc64 -= xon_off_tot;
6240         hwstats->ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
6241         hwstats->ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
6242         hwstats->ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
6243         hwstats->ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
6244         hwstats->ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
6245         hwstats->bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
6246
6247         /* Fill out the OS statistics structure */
6248         netdev->stats.multicast = hwstats->mprc;
6249
6250         /* Rx Errors */
6251         netdev->stats.rx_errors = hwstats->crcerrs + hwstats->rlec;
6252         netdev->stats.rx_dropped = 0;
6253         netdev->stats.rx_length_errors = hwstats->rlec;
6254         netdev->stats.rx_crc_errors = hwstats->crcerrs;
6255         netdev->stats.rx_missed_errors = total_mpc;
6256 }
6257
6258 /**
6259  * ixgbe_fdir_reinit_subtask - worker thread to reinit FDIR filter table
6260  * @adapter: pointer to the device adapter structure
6261  **/
6262 static void ixgbe_fdir_reinit_subtask(struct ixgbe_adapter *adapter)
6263 {
6264         struct ixgbe_hw *hw = &adapter->hw;
6265         int i;
6266
6267         if (!(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
6268                 return;
6269
6270         adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
6271
6272         /* if interface is down do nothing */
6273         if (test_bit(__IXGBE_DOWN, &adapter->state))
6274                 return;
6275
6276         /* do nothing if we are not using signature filters */
6277         if (!(adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE))
6278                 return;
6279
6280         adapter->fdir_overflow++;
6281
6282         if (ixgbe_reinit_fdir_tables_82599(hw) == 0) {
6283                 for (i = 0; i < adapter->num_tx_queues; i++)
6284                         set_bit(__IXGBE_TX_FDIR_INIT_DONE,
6285                                 &(adapter->tx_ring[i]->state));
6286                 /* re-enable flow director interrupts */
6287                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_FLOW_DIR);
6288         } else {
6289                 e_err(probe, "failed to finish FDIR re-initialization, "
6290                       "ignored adding FDIR ATR filters\n");
6291         }
6292 }
6293
6294 /**
6295  * ixgbe_check_hang_subtask - check for hung queues and dropped interrupts
6296  * @adapter: pointer to the device adapter structure
6297  *
6298  * This function serves two purposes.  First it strobes the interrupt lines
6299  * in order to make certain interrupts are occurring.  Secondly it sets the
6300  * bits needed to check for TX hangs.  As a result we should immediately
6301  * determine if a hang has occurred.
6302  */
6303 static void ixgbe_check_hang_subtask(struct ixgbe_adapter *adapter)
6304 {
6305         struct ixgbe_hw *hw = &adapter->hw;
6306         u64 eics = 0;
6307         int i;
6308
6309         /* If we're down, removing or resetting, just bail */
6310         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6311             test_bit(__IXGBE_REMOVING, &adapter->state) ||
6312             test_bit(__IXGBE_RESETTING, &adapter->state))
6313                 return;
6314
6315         /* Force detection of hung controller */
6316         if (netif_carrier_ok(adapter->netdev)) {
6317                 for (i = 0; i < adapter->num_tx_queues; i++)
6318                         set_check_for_tx_hang(adapter->tx_ring[i]);
6319         }
6320
6321         if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
6322                 /*
6323                  * for legacy and MSI interrupts don't set any bits
6324                  * that are enabled for EIAM, because this operation
6325                  * would set *both* EIMS and EICS for any bit in EIAM
6326                  */
6327                 IXGBE_WRITE_REG(hw, IXGBE_EICS,
6328                         (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
6329         } else {
6330                 /* get one bit for every active tx/rx interrupt vector */
6331                 for (i = 0; i < adapter->num_q_vectors; i++) {
6332                         struct ixgbe_q_vector *qv = adapter->q_vector[i];
6333                         if (qv->rx.ring || qv->tx.ring)
6334                                 eics |= ((u64)1 << i);
6335                 }
6336         }
6337
6338         /* Cause software interrupt to ensure rings are cleaned */
6339         ixgbe_irq_rearm_queues(adapter, eics);
6340 }
6341
6342 /**
6343  * ixgbe_watchdog_update_link - update the link status
6344  * @adapter: pointer to the device adapter structure
6345  * @link_speed: pointer to a u32 to store the link_speed
6346  **/
6347 static void ixgbe_watchdog_update_link(struct ixgbe_adapter *adapter)
6348 {
6349         struct ixgbe_hw *hw = &adapter->hw;
6350         u32 link_speed = adapter->link_speed;
6351         bool link_up = adapter->link_up;
6352         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
6353
6354         if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE))
6355                 return;
6356
6357         if (hw->mac.ops.check_link) {
6358                 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
6359         } else {
6360                 /* always assume link is up, if no check link function */
6361                 link_speed = IXGBE_LINK_SPEED_10GB_FULL;
6362                 link_up = true;
6363         }
6364
6365         if (adapter->ixgbe_ieee_pfc)
6366                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
6367
6368         if (link_up && !((adapter->flags & IXGBE_FLAG_DCB_ENABLED) && pfc_en)) {
6369                 hw->mac.ops.fc_enable(hw);
6370                 ixgbe_set_rx_drop_en(adapter);
6371         }
6372
6373         if (link_up ||
6374             time_after(jiffies, (adapter->link_check_timeout +
6375                                  IXGBE_TRY_LINK_TIMEOUT))) {
6376                 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
6377                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
6378                 IXGBE_WRITE_FLUSH(hw);
6379         }
6380
6381         adapter->link_up = link_up;
6382         adapter->link_speed = link_speed;
6383 }
6384
6385 static void ixgbe_update_default_up(struct ixgbe_adapter *adapter)
6386 {
6387 #ifdef CONFIG_IXGBE_DCB
6388         struct net_device *netdev = adapter->netdev;
6389         struct dcb_app app = {
6390                               .selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE,
6391                               .protocol = 0,
6392                              };
6393         u8 up = 0;
6394
6395         if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE)
6396                 up = dcb_ieee_getapp_mask(netdev, &app);
6397
6398         adapter->default_up = (up > 1) ? (ffs(up) - 1) : 0;
6399 #endif
6400 }
6401
6402 /**
6403  * ixgbe_watchdog_link_is_up - update netif_carrier status and
6404  *                             print link up message
6405  * @adapter: pointer to the device adapter structure
6406  **/
6407 static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter *adapter)
6408 {
6409         struct net_device *netdev = adapter->netdev;
6410         struct ixgbe_hw *hw = &adapter->hw;
6411         struct net_device *upper;
6412         struct list_head *iter;
6413         u32 link_speed = adapter->link_speed;
6414         const char *speed_str;
6415         bool flow_rx, flow_tx;
6416
6417         /* only continue if link was previously down */
6418         if (netif_carrier_ok(netdev))
6419                 return;
6420
6421         adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
6422
6423         switch (hw->mac.type) {
6424         case ixgbe_mac_82598EB: {
6425                 u32 frctl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
6426                 u32 rmcs = IXGBE_READ_REG(hw, IXGBE_RMCS);
6427                 flow_rx = !!(frctl & IXGBE_FCTRL_RFCE);
6428                 flow_tx = !!(rmcs & IXGBE_RMCS_TFCE_802_3X);
6429         }
6430                 break;
6431         case ixgbe_mac_X540:
6432         case ixgbe_mac_X550:
6433         case ixgbe_mac_X550EM_x:
6434         case ixgbe_mac_82599EB: {
6435                 u32 mflcn = IXGBE_READ_REG(hw, IXGBE_MFLCN);
6436                 u32 fccfg = IXGBE_READ_REG(hw, IXGBE_FCCFG);
6437                 flow_rx = !!(mflcn & IXGBE_MFLCN_RFCE);
6438                 flow_tx = !!(fccfg & IXGBE_FCCFG_TFCE_802_3X);
6439         }
6440                 break;
6441         default:
6442                 flow_tx = false;
6443                 flow_rx = false;
6444                 break;
6445         }
6446
6447         adapter->last_rx_ptp_check = jiffies;
6448
6449         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
6450                 ixgbe_ptp_start_cyclecounter(adapter);
6451
6452         switch (link_speed) {
6453         case IXGBE_LINK_SPEED_10GB_FULL:
6454                 speed_str = "10 Gbps";
6455                 break;
6456         case IXGBE_LINK_SPEED_2_5GB_FULL:
6457                 speed_str = "2.5 Gbps";
6458                 break;
6459         case IXGBE_LINK_SPEED_1GB_FULL:
6460                 speed_str = "1 Gbps";
6461                 break;
6462         case IXGBE_LINK_SPEED_100_FULL:
6463                 speed_str = "100 Mbps";
6464                 break;
6465         default:
6466                 speed_str = "unknown speed";
6467                 break;
6468         }
6469         e_info(drv, "NIC Link is Up %s, Flow Control: %s\n", speed_str,
6470                ((flow_rx && flow_tx) ? "RX/TX" :
6471                (flow_rx ? "RX" :
6472                (flow_tx ? "TX" : "None"))));
6473
6474         netif_carrier_on(netdev);
6475         ixgbe_check_vf_rate_limit(adapter);
6476
6477         /* enable transmits */
6478         netif_tx_wake_all_queues(adapter->netdev);
6479
6480         /* enable any upper devices */
6481         rtnl_lock();
6482         netdev_for_each_all_upper_dev_rcu(adapter->netdev, upper, iter) {
6483                 if (netif_is_macvlan(upper)) {
6484                         struct macvlan_dev *vlan = netdev_priv(upper);
6485
6486                         if (vlan->fwd_priv)
6487                                 netif_tx_wake_all_queues(upper);
6488                 }
6489         }
6490         rtnl_unlock();
6491
6492         /* update the default user priority for VFs */
6493         ixgbe_update_default_up(adapter);
6494
6495         /* ping all the active vfs to let them know link has changed */
6496         ixgbe_ping_all_vfs(adapter);
6497 }
6498
6499 /**
6500  * ixgbe_watchdog_link_is_down - update netif_carrier status and
6501  *                               print link down message
6502  * @adapter: pointer to the adapter structure
6503  **/
6504 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *adapter)
6505 {
6506         struct net_device *netdev = adapter->netdev;
6507         struct ixgbe_hw *hw = &adapter->hw;
6508
6509         adapter->link_up = false;
6510         adapter->link_speed = 0;
6511
6512         /* only continue if link was up previously */
6513         if (!netif_carrier_ok(netdev))
6514                 return;
6515
6516         /* poll for SFP+ cable when link is down */
6517         if (ixgbe_is_sfp(hw) && hw->mac.type == ixgbe_mac_82598EB)
6518                 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
6519
6520         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
6521                 ixgbe_ptp_start_cyclecounter(adapter);
6522
6523         e_info(drv, "NIC Link is Down\n");
6524         netif_carrier_off(netdev);
6525
6526         /* ping all the active vfs to let them know link has changed */
6527         ixgbe_ping_all_vfs(adapter);
6528 }
6529
6530 static bool ixgbe_ring_tx_pending(struct ixgbe_adapter *adapter)
6531 {
6532         int i;
6533
6534         for (i = 0; i < adapter->num_tx_queues; i++) {
6535                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
6536
6537                 if (tx_ring->next_to_use != tx_ring->next_to_clean)
6538                         return true;
6539         }
6540
6541         return false;
6542 }
6543
6544 static bool ixgbe_vf_tx_pending(struct ixgbe_adapter *adapter)
6545 {
6546         struct ixgbe_hw *hw = &adapter->hw;
6547         struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ];
6548         u32 q_per_pool = __ALIGN_MASK(1, ~vmdq->mask);
6549
6550         int i, j;
6551
6552         if (!adapter->num_vfs)
6553                 return false;
6554
6555         /* resetting the PF is only needed for MAC before X550 */
6556         if (hw->mac.type >= ixgbe_mac_X550)
6557                 return false;
6558
6559         for (i = 0; i < adapter->num_vfs; i++) {
6560                 for (j = 0; j < q_per_pool; j++) {
6561                         u32 h, t;
6562
6563                         h = IXGBE_READ_REG(hw, IXGBE_PVFTDHN(q_per_pool, i, j));
6564                         t = IXGBE_READ_REG(hw, IXGBE_PVFTDTN(q_per_pool, i, j));
6565
6566                         if (h != t)
6567                                 return true;
6568                 }
6569         }
6570
6571         return false;
6572 }
6573
6574 /**
6575  * ixgbe_watchdog_flush_tx - flush queues on link down
6576  * @adapter: pointer to the device adapter structure
6577  **/
6578 static void ixgbe_watchdog_flush_tx(struct ixgbe_adapter *adapter)
6579 {
6580         if (!netif_carrier_ok(adapter->netdev)) {
6581                 if (ixgbe_ring_tx_pending(adapter) ||
6582                     ixgbe_vf_tx_pending(adapter)) {
6583                         /* We've lost link, so the controller stops DMA,
6584                          * but we've got queued Tx work that's never going
6585                          * to get done, so reset controller to flush Tx.
6586                          * (Do the reset outside of interrupt context).
6587                          */
6588                         e_warn(drv, "initiating reset to clear Tx work after link loss\n");
6589                         adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
6590                 }
6591         }
6592 }
6593
6594 #ifdef CONFIG_PCI_IOV
6595 static inline void ixgbe_issue_vf_flr(struct ixgbe_adapter *adapter,
6596                                       struct pci_dev *vfdev)
6597 {
6598         if (!pci_wait_for_pending_transaction(vfdev))
6599                 e_dev_warn("Issuing VFLR with pending transactions\n");
6600
6601         e_dev_err("Issuing VFLR for VF %s\n", pci_name(vfdev));
6602         pcie_capability_set_word(vfdev, PCI_EXP_DEVCTL, PCI_EXP_DEVCTL_BCR_FLR);
6603
6604         msleep(100);
6605 }
6606
6607 static void ixgbe_check_for_bad_vf(struct ixgbe_adapter *adapter)
6608 {
6609         struct ixgbe_hw *hw = &adapter->hw;
6610         struct pci_dev *pdev = adapter->pdev;
6611         struct pci_dev *vfdev;
6612         u32 gpc;
6613         int pos;
6614         unsigned short vf_id;
6615
6616         if (!(netif_carrier_ok(adapter->netdev)))
6617                 return;
6618
6619         gpc = IXGBE_READ_REG(hw, IXGBE_TXDGPC);
6620         if (gpc) /* If incrementing then no need for the check below */
6621                 return;
6622         /* Check to see if a bad DMA write target from an errant or
6623          * malicious VF has caused a PCIe error.  If so then we can
6624          * issue a VFLR to the offending VF(s) and then resume without
6625          * requesting a full slot reset.
6626          */
6627
6628         if (!pdev)
6629                 return;
6630
6631         pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV);
6632         if (!pos)
6633                 return;
6634
6635         /* get the device ID for the VF */
6636         pci_read_config_word(pdev, pos + PCI_SRIOV_VF_DID, &vf_id);
6637
6638         /* check status reg for all VFs owned by this PF */
6639         vfdev = pci_get_device(pdev->vendor, vf_id, NULL);
6640         while (vfdev) {
6641                 if (vfdev->is_virtfn && (vfdev->physfn == pdev)) {
6642                         u16 status_reg;
6643
6644                         pci_read_config_word(vfdev, PCI_STATUS, &status_reg);
6645                         if (status_reg & PCI_STATUS_REC_MASTER_ABORT)
6646                                 /* issue VFLR */
6647                                 ixgbe_issue_vf_flr(adapter, vfdev);
6648                 }
6649
6650                 vfdev = pci_get_device(pdev->vendor, vf_id, vfdev);
6651         }
6652 }
6653
6654 static void ixgbe_spoof_check(struct ixgbe_adapter *adapter)
6655 {
6656         u32 ssvpc;
6657
6658         /* Do not perform spoof check for 82598 or if not in IOV mode */
6659         if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
6660             adapter->num_vfs == 0)
6661                 return;
6662
6663         ssvpc = IXGBE_READ_REG(&adapter->hw, IXGBE_SSVPC);
6664
6665         /*
6666          * ssvpc register is cleared on read, if zero then no
6667          * spoofed packets in the last interval.
6668          */
6669         if (!ssvpc)
6670                 return;
6671
6672         e_warn(drv, "%u Spoofed packets detected\n", ssvpc);
6673 }
6674 #else
6675 static void ixgbe_spoof_check(struct ixgbe_adapter __always_unused *adapter)
6676 {
6677 }
6678
6679 static void
6680 ixgbe_check_for_bad_vf(struct ixgbe_adapter __always_unused *adapter)
6681 {
6682 }
6683 #endif /* CONFIG_PCI_IOV */
6684
6685
6686 /**
6687  * ixgbe_watchdog_subtask - check and bring link up
6688  * @adapter: pointer to the device adapter structure
6689  **/
6690 static void ixgbe_watchdog_subtask(struct ixgbe_adapter *adapter)
6691 {
6692         /* if interface is down, removing or resetting, do nothing */
6693         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6694             test_bit(__IXGBE_REMOVING, &adapter->state) ||
6695             test_bit(__IXGBE_RESETTING, &adapter->state))
6696                 return;
6697
6698         ixgbe_watchdog_update_link(adapter);
6699
6700         if (adapter->link_up)
6701                 ixgbe_watchdog_link_is_up(adapter);
6702         else
6703                 ixgbe_watchdog_link_is_down(adapter);
6704
6705         ixgbe_check_for_bad_vf(adapter);
6706         ixgbe_spoof_check(adapter);
6707         ixgbe_update_stats(adapter);
6708
6709         ixgbe_watchdog_flush_tx(adapter);
6710 }
6711
6712 /**
6713  * ixgbe_sfp_detection_subtask - poll for SFP+ cable
6714  * @adapter: the ixgbe adapter structure
6715  **/
6716 static void ixgbe_sfp_detection_subtask(struct ixgbe_adapter *adapter)
6717 {
6718         struct ixgbe_hw *hw = &adapter->hw;
6719         s32 err;
6720
6721         /* not searching for SFP so there is nothing to do here */
6722         if (!(adapter->flags2 & IXGBE_FLAG2_SEARCH_FOR_SFP) &&
6723             !(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
6724                 return;
6725
6726         if (adapter->sfp_poll_time &&
6727             time_after(adapter->sfp_poll_time, jiffies))
6728                 return; /* If not yet time to poll for SFP */
6729
6730         /* someone else is in init, wait until next service event */
6731         if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
6732                 return;
6733
6734         adapter->sfp_poll_time = jiffies + IXGBE_SFP_POLL_JIFFIES - 1;
6735
6736         err = hw->phy.ops.identify_sfp(hw);
6737         if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
6738                 goto sfp_out;
6739
6740         if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
6741                 /* If no cable is present, then we need to reset
6742                  * the next time we find a good cable. */
6743                 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
6744         }
6745
6746         /* exit on error */
6747         if (err)
6748                 goto sfp_out;
6749
6750         /* exit if reset not needed */
6751         if (!(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
6752                 goto sfp_out;
6753
6754         adapter->flags2 &= ~IXGBE_FLAG2_SFP_NEEDS_RESET;
6755
6756         /*
6757          * A module may be identified correctly, but the EEPROM may not have
6758          * support for that module.  setup_sfp() will fail in that case, so
6759          * we should not allow that module to load.
6760          */
6761         if (hw->mac.type == ixgbe_mac_82598EB)
6762                 err = hw->phy.ops.reset(hw);
6763         else
6764                 err = hw->mac.ops.setup_sfp(hw);
6765
6766         if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
6767                 goto sfp_out;
6768
6769         adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
6770         e_info(probe, "detected SFP+: %d\n", hw->phy.sfp_type);
6771
6772 sfp_out:
6773         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
6774
6775         if ((err == IXGBE_ERR_SFP_NOT_SUPPORTED) &&
6776             (adapter->netdev->reg_state == NETREG_REGISTERED)) {
6777                 e_dev_err("failed to initialize because an unsupported "
6778                           "SFP+ module type was detected.\n");
6779                 e_dev_err("Reload the driver after installing a "
6780                           "supported module.\n");
6781                 unregister_netdev(adapter->netdev);
6782         }
6783 }
6784
6785 /**
6786  * ixgbe_sfp_link_config_subtask - set up link SFP after module install
6787  * @adapter: the ixgbe adapter structure
6788  **/
6789 static void ixgbe_sfp_link_config_subtask(struct ixgbe_adapter *adapter)
6790 {
6791         struct ixgbe_hw *hw = &adapter->hw;
6792         u32 speed;
6793         bool autoneg = false;
6794
6795         if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_CONFIG))
6796                 return;
6797
6798         /* someone else is in init, wait until next service event */
6799         if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
6800                 return;
6801
6802         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
6803
6804         speed = hw->phy.autoneg_advertised;
6805         if ((!speed) && (hw->mac.ops.get_link_capabilities)) {
6806                 hw->mac.ops.get_link_capabilities(hw, &speed, &autoneg);
6807
6808                 /* setup the highest link when no autoneg */
6809                 if (!autoneg) {
6810                         if (speed & IXGBE_LINK_SPEED_10GB_FULL)
6811                                 speed = IXGBE_LINK_SPEED_10GB_FULL;
6812                 }
6813         }
6814
6815         if (hw->mac.ops.setup_link)
6816                 hw->mac.ops.setup_link(hw, speed, true);
6817
6818         adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
6819         adapter->link_check_timeout = jiffies;
6820         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
6821 }
6822
6823 /**
6824  * ixgbe_service_timer - Timer Call-back
6825  * @data: pointer to adapter cast into an unsigned long
6826  **/
6827 static void ixgbe_service_timer(unsigned long data)
6828 {
6829         struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
6830         unsigned long next_event_offset;
6831
6832         /* poll faster when waiting for link */
6833         if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
6834                 next_event_offset = HZ / 10;
6835         else
6836                 next_event_offset = HZ * 2;
6837
6838         /* Reset the timer */
6839         mod_timer(&adapter->service_timer, next_event_offset + jiffies);
6840
6841         ixgbe_service_event_schedule(adapter);
6842 }
6843
6844 static void ixgbe_phy_interrupt_subtask(struct ixgbe_adapter *adapter)
6845 {
6846         struct ixgbe_hw *hw = &adapter->hw;
6847         u32 status;
6848
6849         if (!(adapter->flags2 & IXGBE_FLAG2_PHY_INTERRUPT))
6850                 return;
6851
6852         adapter->flags2 &= ~IXGBE_FLAG2_PHY_INTERRUPT;
6853
6854         if (!hw->phy.ops.handle_lasi)
6855                 return;
6856
6857         status = hw->phy.ops.handle_lasi(&adapter->hw);
6858         if (status != IXGBE_ERR_OVERTEMP)
6859                 return;
6860
6861         e_crit(drv, "%s\n", ixgbe_overheat_msg);
6862 }
6863
6864 static void ixgbe_reset_subtask(struct ixgbe_adapter *adapter)
6865 {
6866         if (!(adapter->flags2 & IXGBE_FLAG2_RESET_REQUESTED))
6867                 return;
6868
6869         adapter->flags2 &= ~IXGBE_FLAG2_RESET_REQUESTED;
6870
6871         /* If we're already down, removing or resetting, just bail */
6872         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6873             test_bit(__IXGBE_REMOVING, &adapter->state) ||
6874             test_bit(__IXGBE_RESETTING, &adapter->state))
6875                 return;
6876
6877         ixgbe_dump(adapter);
6878         netdev_err(adapter->netdev, "Reset adapter\n");
6879         adapter->tx_timeout_count++;
6880
6881         rtnl_lock();
6882         ixgbe_reinit_locked(adapter);
6883         rtnl_unlock();
6884 }
6885
6886 /**
6887  * ixgbe_service_task - manages and runs subtasks
6888  * @work: pointer to work_struct containing our data
6889  **/
6890 static void ixgbe_service_task(struct work_struct *work)
6891 {
6892         struct ixgbe_adapter *adapter = container_of(work,
6893                                                      struct ixgbe_adapter,
6894                                                      service_task);
6895         if (ixgbe_removed(adapter->hw.hw_addr)) {
6896                 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
6897                         rtnl_lock();
6898                         ixgbe_down(adapter);
6899                         rtnl_unlock();
6900                 }
6901                 ixgbe_service_event_complete(adapter);
6902                 return;
6903         }
6904 #ifdef CONFIG_IXGBE_VXLAN
6905         if (adapter->flags2 & IXGBE_FLAG2_VXLAN_REREG_NEEDED) {
6906                 adapter->flags2 &= ~IXGBE_FLAG2_VXLAN_REREG_NEEDED;
6907                 vxlan_get_rx_port(adapter->netdev);
6908         }
6909 #endif /* CONFIG_IXGBE_VXLAN */
6910         ixgbe_reset_subtask(adapter);
6911         ixgbe_phy_interrupt_subtask(adapter);
6912         ixgbe_sfp_detection_subtask(adapter);
6913         ixgbe_sfp_link_config_subtask(adapter);
6914         ixgbe_check_overtemp_subtask(adapter);
6915         ixgbe_watchdog_subtask(adapter);
6916         ixgbe_fdir_reinit_subtask(adapter);
6917         ixgbe_check_hang_subtask(adapter);
6918
6919         if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state)) {
6920                 ixgbe_ptp_overflow_check(adapter);
6921                 ixgbe_ptp_rx_hang(adapter);
6922         }
6923
6924         ixgbe_service_event_complete(adapter);
6925 }
6926
6927 static int ixgbe_tso(struct ixgbe_ring *tx_ring,
6928                      struct ixgbe_tx_buffer *first,
6929                      u8 *hdr_len)
6930 {
6931         struct sk_buff *skb = first->skb;
6932         u32 vlan_macip_lens, type_tucmd;
6933         u32 mss_l4len_idx, l4len;
6934         int err;
6935
6936         if (skb->ip_summed != CHECKSUM_PARTIAL)
6937                 return 0;
6938
6939         if (!skb_is_gso(skb))
6940                 return 0;
6941
6942         err = skb_cow_head(skb, 0);
6943         if (err < 0)
6944                 return err;
6945
6946         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
6947         type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
6948
6949         if (first->protocol == htons(ETH_P_IP)) {
6950                 struct iphdr *iph = ip_hdr(skb);
6951                 iph->tot_len = 0;
6952                 iph->check = 0;
6953                 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
6954                                                          iph->daddr, 0,
6955                                                          IPPROTO_TCP,
6956                                                          0);
6957                 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
6958                 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
6959                                    IXGBE_TX_FLAGS_CSUM |
6960                                    IXGBE_TX_FLAGS_IPV4;
6961         } else if (skb_is_gso_v6(skb)) {
6962                 ipv6_hdr(skb)->payload_len = 0;
6963                 tcp_hdr(skb)->check =
6964                     ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
6965                                      &ipv6_hdr(skb)->daddr,
6966                                      0, IPPROTO_TCP, 0);
6967                 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
6968                                    IXGBE_TX_FLAGS_CSUM;
6969         }
6970
6971         /* compute header lengths */
6972         l4len = tcp_hdrlen(skb);
6973         *hdr_len = skb_transport_offset(skb) + l4len;
6974
6975         /* update gso size and bytecount with header size */
6976         first->gso_segs = skb_shinfo(skb)->gso_segs;
6977         first->bytecount += (first->gso_segs - 1) * *hdr_len;
6978
6979         /* mss_l4len_id: use 0 as index for TSO */
6980         mss_l4len_idx = l4len << IXGBE_ADVTXD_L4LEN_SHIFT;
6981         mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
6982
6983         /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
6984         vlan_macip_lens = skb_network_header_len(skb);
6985         vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
6986         vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
6987
6988         ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0, type_tucmd,
6989                           mss_l4len_idx);
6990
6991         return 1;
6992 }
6993
6994 static void ixgbe_tx_csum(struct ixgbe_ring *tx_ring,
6995                           struct ixgbe_tx_buffer *first)
6996 {
6997         struct sk_buff *skb = first->skb;
6998         u32 vlan_macip_lens = 0;
6999         u32 mss_l4len_idx = 0;
7000         u32 type_tucmd = 0;
7001
7002         if (skb->ip_summed != CHECKSUM_PARTIAL) {
7003                 if (!(first->tx_flags & IXGBE_TX_FLAGS_HW_VLAN) &&
7004                     !(first->tx_flags & IXGBE_TX_FLAGS_CC))
7005                         return;
7006                 vlan_macip_lens = skb_network_offset(skb) <<
7007                                   IXGBE_ADVTXD_MACLEN_SHIFT;
7008         } else {
7009                 u8 l4_hdr = 0;
7010                 union {
7011                         struct iphdr *ipv4;
7012                         struct ipv6hdr *ipv6;
7013                         u8 *raw;
7014                 } network_hdr;
7015                 union {
7016                         struct tcphdr *tcphdr;
7017                         u8 *raw;
7018                 } transport_hdr;
7019
7020                 if (skb->encapsulation) {
7021                         network_hdr.raw = skb_inner_network_header(skb);
7022                         transport_hdr.raw = skb_inner_transport_header(skb);
7023                         vlan_macip_lens = skb_inner_network_offset(skb) <<
7024                                           IXGBE_ADVTXD_MACLEN_SHIFT;
7025                 } else {
7026                         network_hdr.raw = skb_network_header(skb);
7027                         transport_hdr.raw = skb_transport_header(skb);
7028                         vlan_macip_lens = skb_network_offset(skb) <<
7029                                           IXGBE_ADVTXD_MACLEN_SHIFT;
7030                 }
7031
7032                 /* use first 4 bits to determine IP version */
7033                 switch (network_hdr.ipv4->version) {
7034                 case IPVERSION:
7035                         vlan_macip_lens |= transport_hdr.raw - network_hdr.raw;
7036                         type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
7037                         l4_hdr = network_hdr.ipv4->protocol;
7038                         break;
7039                 case 6:
7040                         vlan_macip_lens |= transport_hdr.raw - network_hdr.raw;
7041                         l4_hdr = network_hdr.ipv6->nexthdr;
7042                         break;
7043                 default:
7044                         if (unlikely(net_ratelimit())) {
7045                                 dev_warn(tx_ring->dev,
7046                                          "partial checksum but version=%d\n",
7047                                          network_hdr.ipv4->version);
7048                         }
7049                 }
7050
7051                 switch (l4_hdr) {
7052                 case IPPROTO_TCP:
7053                         type_tucmd |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
7054                         mss_l4len_idx = (transport_hdr.tcphdr->doff * 4) <<
7055                                         IXGBE_ADVTXD_L4LEN_SHIFT;
7056                         break;
7057                 case IPPROTO_SCTP:
7058                         type_tucmd |= IXGBE_ADVTXD_TUCMD_L4T_SCTP;
7059                         mss_l4len_idx = sizeof(struct sctphdr) <<
7060                                         IXGBE_ADVTXD_L4LEN_SHIFT;
7061                         break;
7062                 case IPPROTO_UDP:
7063                         mss_l4len_idx = sizeof(struct udphdr) <<
7064                                         IXGBE_ADVTXD_L4LEN_SHIFT;
7065                         break;
7066                 default:
7067                         if (unlikely(net_ratelimit())) {
7068                                 dev_warn(tx_ring->dev,
7069                                  "partial checksum but l4 proto=%x!\n",
7070                                  l4_hdr);
7071                         }
7072                         break;
7073                 }
7074
7075                 /* update TX checksum flag */
7076                 first->tx_flags |= IXGBE_TX_FLAGS_CSUM;
7077         }
7078
7079         /* vlan_macip_lens: MACLEN, VLAN tag */
7080         vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
7081
7082         ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0,
7083                           type_tucmd, mss_l4len_idx);
7084 }
7085
7086 #define IXGBE_SET_FLAG(_input, _flag, _result) \
7087         ((_flag <= _result) ? \
7088          ((u32)(_input & _flag) * (_result / _flag)) : \
7089          ((u32)(_input & _flag) / (_flag / _result)))
7090
7091 static u32 ixgbe_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
7092 {
7093         /* set type for advanced descriptor with frame checksum insertion */
7094         u32 cmd_type = IXGBE_ADVTXD_DTYP_DATA |
7095                        IXGBE_ADVTXD_DCMD_DEXT |
7096                        IXGBE_ADVTXD_DCMD_IFCS;
7097
7098         /* set HW vlan bit if vlan is present */
7099         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_HW_VLAN,
7100                                    IXGBE_ADVTXD_DCMD_VLE);
7101
7102         /* set segmentation enable bits for TSO/FSO */
7103         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSO,
7104                                    IXGBE_ADVTXD_DCMD_TSE);
7105
7106         /* set timestamp bit if present */
7107         cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSTAMP,
7108                                    IXGBE_ADVTXD_MAC_TSTAMP);
7109
7110         /* insert frame checksum */
7111         cmd_type ^= IXGBE_SET_FLAG(skb->no_fcs, 1, IXGBE_ADVTXD_DCMD_IFCS);
7112
7113         return cmd_type;
7114 }
7115
7116 static void ixgbe_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc,
7117                                    u32 tx_flags, unsigned int paylen)
7118 {
7119         u32 olinfo_status = paylen << IXGBE_ADVTXD_PAYLEN_SHIFT;
7120
7121         /* enable L4 checksum for TSO and TX checksum offload */
7122         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7123                                         IXGBE_TX_FLAGS_CSUM,
7124                                         IXGBE_ADVTXD_POPTS_TXSM);
7125
7126         /* enble IPv4 checksum for TSO */
7127         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7128                                         IXGBE_TX_FLAGS_IPV4,
7129                                         IXGBE_ADVTXD_POPTS_IXSM);
7130
7131         /*
7132          * Check Context must be set if Tx switch is enabled, which it
7133          * always is for case where virtual functions are running
7134          */
7135         olinfo_status |= IXGBE_SET_FLAG(tx_flags,
7136                                         IXGBE_TX_FLAGS_CC,
7137                                         IXGBE_ADVTXD_CC);
7138
7139         tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
7140 }
7141
7142 static int __ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
7143 {
7144         netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
7145
7146         /* Herbert's original patch had:
7147          *  smp_mb__after_netif_stop_queue();
7148          * but since that doesn't exist yet, just open code it.
7149          */
7150         smp_mb();
7151
7152         /* We need to check again in a case another CPU has just
7153          * made room available.
7154          */
7155         if (likely(ixgbe_desc_unused(tx_ring) < size))
7156                 return -EBUSY;
7157
7158         /* A reprieve! - use start_queue because it doesn't call schedule */
7159         netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
7160         ++tx_ring->tx_stats.restart_queue;
7161         return 0;
7162 }
7163
7164 static inline int ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
7165 {
7166         if (likely(ixgbe_desc_unused(tx_ring) >= size))
7167                 return 0;
7168
7169         return __ixgbe_maybe_stop_tx(tx_ring, size);
7170 }
7171
7172 #define IXGBE_TXD_CMD (IXGBE_TXD_CMD_EOP | \
7173                        IXGBE_TXD_CMD_RS)
7174
7175 static void ixgbe_tx_map(struct ixgbe_ring *tx_ring,
7176                          struct ixgbe_tx_buffer *first,
7177                          const u8 hdr_len)
7178 {
7179         struct sk_buff *skb = first->skb;
7180         struct ixgbe_tx_buffer *tx_buffer;
7181         union ixgbe_adv_tx_desc *tx_desc;
7182         struct skb_frag_struct *frag;
7183         dma_addr_t dma;
7184         unsigned int data_len, size;
7185         u32 tx_flags = first->tx_flags;
7186         u32 cmd_type = ixgbe_tx_cmd_type(skb, tx_flags);
7187         u16 i = tx_ring->next_to_use;
7188
7189         tx_desc = IXGBE_TX_DESC(tx_ring, i);
7190
7191         ixgbe_tx_olinfo_status(tx_desc, tx_flags, skb->len - hdr_len);
7192
7193         size = skb_headlen(skb);
7194         data_len = skb->data_len;
7195
7196 #ifdef IXGBE_FCOE
7197         if (tx_flags & IXGBE_TX_FLAGS_FCOE) {
7198                 if (data_len < sizeof(struct fcoe_crc_eof)) {
7199                         size -= sizeof(struct fcoe_crc_eof) - data_len;
7200                         data_len = 0;
7201                 } else {
7202                         data_len -= sizeof(struct fcoe_crc_eof);
7203                 }
7204         }
7205
7206 #endif
7207         dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
7208
7209         tx_buffer = first;
7210
7211         for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
7212                 if (dma_mapping_error(tx_ring->dev, dma))
7213                         goto dma_error;
7214
7215                 /* record length, and DMA address */
7216                 dma_unmap_len_set(tx_buffer, len, size);
7217                 dma_unmap_addr_set(tx_buffer, dma, dma);
7218
7219                 tx_desc->read.buffer_addr = cpu_to_le64(dma);
7220
7221                 while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) {
7222                         tx_desc->read.cmd_type_len =
7223                                 cpu_to_le32(cmd_type ^ IXGBE_MAX_DATA_PER_TXD);
7224
7225                         i++;
7226                         tx_desc++;
7227                         if (i == tx_ring->count) {
7228                                 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
7229                                 i = 0;
7230                         }
7231                         tx_desc->read.olinfo_status = 0;
7232
7233                         dma += IXGBE_MAX_DATA_PER_TXD;
7234                         size -= IXGBE_MAX_DATA_PER_TXD;
7235
7236                         tx_desc->read.buffer_addr = cpu_to_le64(dma);
7237                 }
7238
7239                 if (likely(!data_len))
7240                         break;
7241
7242                 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
7243
7244                 i++;
7245                 tx_desc++;
7246                 if (i == tx_ring->count) {
7247                         tx_desc = IXGBE_TX_DESC(tx_ring, 0);
7248                         i = 0;
7249                 }
7250                 tx_desc->read.olinfo_status = 0;
7251
7252 #ifdef IXGBE_FCOE
7253                 size = min_t(unsigned int, data_len, skb_frag_size(frag));
7254 #else
7255                 size = skb_frag_size(frag);
7256 #endif
7257                 data_len -= size;
7258
7259                 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
7260                                        DMA_TO_DEVICE);
7261
7262                 tx_buffer = &tx_ring->tx_buffer_info[i];
7263         }
7264
7265         /* write last descriptor with RS and EOP bits */
7266         cmd_type |= size | IXGBE_TXD_CMD;
7267         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
7268
7269         netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
7270
7271         /* set the timestamp */
7272         first->time_stamp = jiffies;
7273
7274         /*
7275          * Force memory writes to complete before letting h/w know there
7276          * are new descriptors to fetch.  (Only applicable for weak-ordered
7277          * memory model archs, such as IA-64).
7278          *
7279          * We also need this memory barrier to make certain all of the
7280          * status bits have been updated before next_to_watch is written.
7281          */
7282         wmb();
7283
7284         /* set next_to_watch value indicating a packet is present */
7285         first->next_to_watch = tx_desc;
7286
7287         i++;
7288         if (i == tx_ring->count)
7289                 i = 0;
7290
7291         tx_ring->next_to_use = i;
7292
7293         ixgbe_maybe_stop_tx(tx_ring, DESC_NEEDED);
7294
7295         if (netif_xmit_stopped(txring_txq(tx_ring)) || !skb->xmit_more) {
7296                 writel(i, tx_ring->tail);
7297
7298                 /* we need this if more than one processor can write to our tail
7299                  * at a time, it synchronizes IO on IA64/Altix systems
7300                  */
7301                 mmiowb();
7302         }
7303
7304         return;
7305 dma_error:
7306         dev_err(tx_ring->dev, "TX DMA map failed\n");
7307
7308         /* clear dma mappings for failed tx_buffer_info map */
7309         for (;;) {
7310                 tx_buffer = &tx_ring->tx_buffer_info[i];
7311                 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer);
7312                 if (tx_buffer == first)
7313                         break;
7314                 if (i == 0)
7315                         i = tx_ring->count;
7316                 i--;
7317         }
7318
7319         tx_ring->next_to_use = i;
7320 }
7321
7322 static void ixgbe_atr(struct ixgbe_ring *ring,
7323                       struct ixgbe_tx_buffer *first)
7324 {
7325         struct ixgbe_q_vector *q_vector = ring->q_vector;
7326         union ixgbe_atr_hash_dword input = { .dword = 0 };
7327         union ixgbe_atr_hash_dword common = { .dword = 0 };
7328         union {
7329                 unsigned char *network;
7330                 struct iphdr *ipv4;
7331                 struct ipv6hdr *ipv6;
7332         } hdr;
7333         struct tcphdr *th;
7334         struct sk_buff *skb;
7335 #ifdef CONFIG_IXGBE_VXLAN
7336         u8 encap = false;
7337 #endif /* CONFIG_IXGBE_VXLAN */
7338         __be16 vlan_id;
7339
7340         /* if ring doesn't have a interrupt vector, cannot perform ATR */
7341         if (!q_vector)
7342                 return;
7343
7344         /* do nothing if sampling is disabled */
7345         if (!ring->atr_sample_rate)
7346                 return;
7347
7348         ring->atr_count++;
7349
7350         /* snag network header to get L4 type and address */
7351         skb = first->skb;
7352         hdr.network = skb_network_header(skb);
7353         if (skb->encapsulation) {
7354 #ifdef CONFIG_IXGBE_VXLAN
7355                 struct ixgbe_adapter *adapter = q_vector->adapter;
7356
7357                 if (!adapter->vxlan_port)
7358                         return;
7359                 if (first->protocol != htons(ETH_P_IP) ||
7360                     hdr.ipv4->version != IPVERSION ||
7361                     hdr.ipv4->protocol != IPPROTO_UDP) {
7362                         return;
7363                 }
7364                 if (ntohs(udp_hdr(skb)->dest) != adapter->vxlan_port)
7365                         return;
7366                 encap = true;
7367                 hdr.network = skb_inner_network_header(skb);
7368                 th = inner_tcp_hdr(skb);
7369 #else
7370                 return;
7371 #endif /* CONFIG_IXGBE_VXLAN */
7372         } else {
7373                 /* Currently only IPv4/IPv6 with TCP is supported */
7374                 if ((first->protocol != htons(ETH_P_IPV6) ||
7375                      hdr.ipv6->nexthdr != IPPROTO_TCP) &&
7376                     (first->protocol != htons(ETH_P_IP) ||
7377                      hdr.ipv4->protocol != IPPROTO_TCP))
7378                         return;
7379                 th = tcp_hdr(skb);
7380         }
7381
7382         /* skip this packet since it is invalid or the socket is closing */
7383         if (!th || th->fin)
7384                 return;
7385
7386         /* sample on all syn packets or once every atr sample count */
7387         if (!th->syn && (ring->atr_count < ring->atr_sample_rate))
7388                 return;
7389
7390         /* reset sample count */
7391         ring->atr_count = 0;
7392
7393         vlan_id = htons(first->tx_flags >> IXGBE_TX_FLAGS_VLAN_SHIFT);
7394
7395         /*
7396          * src and dst are inverted, think how the receiver sees them
7397          *
7398          * The input is broken into two sections, a non-compressed section
7399          * containing vm_pool, vlan_id, and flow_type.  The rest of the data
7400          * is XORed together and stored in the compressed dword.
7401          */
7402         input.formatted.vlan_id = vlan_id;
7403
7404         /*
7405          * since src port and flex bytes occupy the same word XOR them together
7406          * and write the value to source port portion of compressed dword
7407          */
7408         if (first->tx_flags & (IXGBE_TX_FLAGS_SW_VLAN | IXGBE_TX_FLAGS_HW_VLAN))
7409                 common.port.src ^= th->dest ^ htons(ETH_P_8021Q);
7410         else
7411                 common.port.src ^= th->dest ^ first->protocol;
7412         common.port.dst ^= th->source;
7413
7414         if (first->protocol == htons(ETH_P_IP)) {
7415                 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
7416                 common.ip ^= hdr.ipv4->saddr ^ hdr.ipv4->daddr;
7417         } else {
7418                 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV6;
7419                 common.ip ^= hdr.ipv6->saddr.s6_addr32[0] ^
7420                              hdr.ipv6->saddr.s6_addr32[1] ^
7421                              hdr.ipv6->saddr.s6_addr32[2] ^
7422                              hdr.ipv6->saddr.s6_addr32[3] ^
7423                              hdr.ipv6->daddr.s6_addr32[0] ^
7424                              hdr.ipv6->daddr.s6_addr32[1] ^
7425                              hdr.ipv6->daddr.s6_addr32[2] ^
7426                              hdr.ipv6->daddr.s6_addr32[3];
7427         }
7428
7429 #ifdef CONFIG_IXGBE_VXLAN
7430         if (encap)
7431                 input.formatted.flow_type |= IXGBE_ATR_L4TYPE_TUNNEL_MASK;
7432 #endif /* CONFIG_IXGBE_VXLAN */
7433
7434         /* This assumes the Rx queue and Tx queue are bound to the same CPU */
7435         ixgbe_fdir_add_signature_filter_82599(&q_vector->adapter->hw,
7436                                               input, common, ring->queue_index);
7437 }
7438
7439 static u16 ixgbe_select_queue(struct net_device *dev, struct sk_buff *skb,
7440                               void *accel_priv, select_queue_fallback_t fallback)
7441 {
7442         struct ixgbe_fwd_adapter *fwd_adapter = accel_priv;
7443 #ifdef IXGBE_FCOE
7444         struct ixgbe_adapter *adapter;
7445         struct ixgbe_ring_feature *f;
7446         int txq;
7447 #endif
7448
7449         if (fwd_adapter)
7450                 return skb->queue_mapping + fwd_adapter->tx_base_queue;
7451
7452 #ifdef IXGBE_FCOE
7453
7454         /*
7455          * only execute the code below if protocol is FCoE
7456          * or FIP and we have FCoE enabled on the adapter
7457          */
7458         switch (vlan_get_protocol(skb)) {
7459         case htons(ETH_P_FCOE):
7460         case htons(ETH_P_FIP):
7461                 adapter = netdev_priv(dev);
7462
7463                 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)
7464                         break;
7465         default:
7466                 return fallback(dev, skb);
7467         }
7468
7469         f = &adapter->ring_feature[RING_F_FCOE];
7470
7471         txq = skb_rx_queue_recorded(skb) ? skb_get_rx_queue(skb) :
7472                                            smp_processor_id();
7473
7474         while (txq >= f->indices)
7475                 txq -= f->indices;
7476
7477         return txq + f->offset;
7478 #else
7479         return fallback(dev, skb);
7480 #endif
7481 }
7482
7483 netdev_tx_t ixgbe_xmit_frame_ring(struct sk_buff *skb,
7484                           struct ixgbe_adapter *adapter,
7485                           struct ixgbe_ring *tx_ring)
7486 {
7487         struct ixgbe_tx_buffer *first;
7488         int tso;
7489         u32 tx_flags = 0;
7490         unsigned short f;
7491         u16 count = TXD_USE_COUNT(skb_headlen(skb));
7492         __be16 protocol = skb->protocol;
7493         u8 hdr_len = 0;
7494
7495         /*
7496          * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
7497          *       + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
7498          *       + 2 desc gap to keep tail from touching head,
7499          *       + 1 desc for context descriptor,
7500          * otherwise try next time
7501          */
7502         for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
7503                 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
7504
7505         if (ixgbe_maybe_stop_tx(tx_ring, count + 3)) {
7506                 tx_ring->tx_stats.tx_busy++;
7507                 return NETDEV_TX_BUSY;
7508         }
7509
7510         /* record the location of the first descriptor for this packet */
7511         first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
7512         first->skb = skb;
7513         first->bytecount = skb->len;
7514         first->gso_segs = 1;
7515
7516         /* if we have a HW VLAN tag being added default to the HW one */
7517         if (skb_vlan_tag_present(skb)) {
7518                 tx_flags |= skb_vlan_tag_get(skb) << IXGBE_TX_FLAGS_VLAN_SHIFT;
7519                 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
7520         /* else if it is a SW VLAN check the next protocol and store the tag */
7521         } else if (protocol == htons(ETH_P_8021Q)) {
7522                 struct vlan_hdr *vhdr, _vhdr;
7523                 vhdr = skb_header_pointer(skb, ETH_HLEN, sizeof(_vhdr), &_vhdr);
7524                 if (!vhdr)
7525                         goto out_drop;
7526
7527                 tx_flags |= ntohs(vhdr->h_vlan_TCI) <<
7528                                   IXGBE_TX_FLAGS_VLAN_SHIFT;
7529                 tx_flags |= IXGBE_TX_FLAGS_SW_VLAN;
7530         }
7531         protocol = vlan_get_protocol(skb);
7532
7533         if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
7534             adapter->ptp_clock &&
7535             !test_and_set_bit_lock(__IXGBE_PTP_TX_IN_PROGRESS,
7536                                    &adapter->state)) {
7537                 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
7538                 tx_flags |= IXGBE_TX_FLAGS_TSTAMP;
7539
7540                 /* schedule check for Tx timestamp */
7541                 adapter->ptp_tx_skb = skb_get(skb);
7542                 adapter->ptp_tx_start = jiffies;
7543                 schedule_work(&adapter->ptp_tx_work);
7544         }
7545
7546         skb_tx_timestamp(skb);
7547
7548 #ifdef CONFIG_PCI_IOV
7549         /*
7550          * Use the l2switch_enable flag - would be false if the DMA
7551          * Tx switch had been disabled.
7552          */
7553         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
7554                 tx_flags |= IXGBE_TX_FLAGS_CC;
7555
7556 #endif
7557         /* DCB maps skb priorities 0-7 onto 3 bit PCP of VLAN tag. */
7558         if ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
7559             ((tx_flags & (IXGBE_TX_FLAGS_HW_VLAN | IXGBE_TX_FLAGS_SW_VLAN)) ||
7560              (skb->priority != TC_PRIO_CONTROL))) {
7561                 tx_flags &= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK;
7562                 tx_flags |= (skb->priority & 0x7) <<
7563                                         IXGBE_TX_FLAGS_VLAN_PRIO_SHIFT;
7564                 if (tx_flags & IXGBE_TX_FLAGS_SW_VLAN) {
7565                         struct vlan_ethhdr *vhdr;
7566
7567                         if (skb_cow_head(skb, 0))
7568                                 goto out_drop;
7569                         vhdr = (struct vlan_ethhdr *)skb->data;
7570                         vhdr->h_vlan_TCI = htons(tx_flags >>
7571                                                  IXGBE_TX_FLAGS_VLAN_SHIFT);
7572                 } else {
7573                         tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
7574                 }
7575         }
7576
7577         /* record initial flags and protocol */
7578         first->tx_flags = tx_flags;
7579         first->protocol = protocol;
7580
7581 #ifdef IXGBE_FCOE
7582         /* setup tx offload for FCoE */
7583         if ((protocol == htons(ETH_P_FCOE)) &&
7584             (tx_ring->netdev->features & (NETIF_F_FSO | NETIF_F_FCOE_CRC))) {
7585                 tso = ixgbe_fso(tx_ring, first, &hdr_len);
7586                 if (tso < 0)
7587                         goto out_drop;
7588
7589                 goto xmit_fcoe;
7590         }
7591
7592 #endif /* IXGBE_FCOE */
7593         tso = ixgbe_tso(tx_ring, first, &hdr_len);
7594         if (tso < 0)
7595                 goto out_drop;
7596         else if (!tso)
7597                 ixgbe_tx_csum(tx_ring, first);
7598
7599         /* add the ATR filter if ATR is on */
7600         if (test_bit(__IXGBE_TX_FDIR_INIT_DONE, &tx_ring->state))
7601                 ixgbe_atr(tx_ring, first);
7602
7603 #ifdef IXGBE_FCOE
7604 xmit_fcoe:
7605 #endif /* IXGBE_FCOE */
7606         ixgbe_tx_map(tx_ring, first, hdr_len);
7607
7608         return NETDEV_TX_OK;
7609
7610 out_drop:
7611         dev_kfree_skb_any(first->skb);
7612         first->skb = NULL;
7613
7614         return NETDEV_TX_OK;
7615 }
7616
7617 static netdev_tx_t __ixgbe_xmit_frame(struct sk_buff *skb,
7618                                       struct net_device *netdev,
7619                                       struct ixgbe_ring *ring)
7620 {
7621         struct ixgbe_adapter *adapter = netdev_priv(netdev);
7622         struct ixgbe_ring *tx_ring;
7623
7624         /*
7625          * The minimum packet size for olinfo paylen is 17 so pad the skb
7626          * in order to meet this minimum size requirement.
7627          */
7628         if (skb_put_padto(skb, 17))
7629                 return NETDEV_TX_OK;
7630
7631         tx_ring = ring ? ring : adapter->tx_ring[skb->queue_mapping];
7632
7633         return ixgbe_xmit_frame_ring(skb, adapter, tx_ring);
7634 }
7635
7636 static netdev_tx_t ixgbe_xmit_frame(struct sk_buff *skb,
7637                                     struct net_device *netdev)
7638 {
7639         return __ixgbe_xmit_frame(skb, netdev, NULL);
7640 }
7641
7642 /**
7643  * ixgbe_set_mac - Change the Ethernet Address of the NIC
7644  * @netdev: network interface device structure
7645  * @p: pointer to an address structure
7646  *
7647  * Returns 0 on success, negative on failure
7648  **/
7649 static int ixgbe_set_mac(struct net_device *netdev, void *p)
7650 {
7651         struct ixgbe_adapter *adapter = netdev_priv(netdev);
7652         struct ixgbe_hw *hw = &adapter->hw;
7653         struct sockaddr *addr = p;
7654         int ret;
7655
7656         if (!is_valid_ether_addr(addr->sa_data))
7657                 return -EADDRNOTAVAIL;
7658
7659         ixgbe_del_mac_filter(adapter, hw->mac.addr, VMDQ_P(0));
7660         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
7661         memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
7662
7663         ret = ixgbe_add_mac_filter(adapter, hw->mac.addr, VMDQ_P(0));
7664         return ret > 0 ? 0 : ret;
7665 }
7666
7667 static int
7668 ixgbe_mdio_read(struct net_device *netdev, int prtad, int devad, u16 addr)
7669 {
7670         struct ixgbe_adapter *adapter = netdev_priv(netdev);
7671         struct ixgbe_hw *hw = &adapter->hw;
7672         u16 value;
7673         int rc;
7674
7675         if (prtad != hw->phy.mdio.prtad)
7676                 return -EINVAL;
7677         rc = hw->phy.ops.read_reg(hw, addr, devad, &value);
7678         if (!rc)
7679                 rc = value;
7680         return rc;
7681 }
7682
7683 static int ixgbe_mdio_write(struct net_device *netdev, int prtad, int devad,
7684                             u16 addr, u16 value)
7685 {
7686         struct ixgbe_adapter *adapter = netdev_priv(netdev);
7687         struct ixgbe_hw *hw = &adapter->hw;
7688
7689         if (prtad != hw->phy.mdio.prtad)
7690                 return -EINVAL;
7691         return hw->phy.ops.write_reg(hw, addr, devad, value);
7692 }
7693
7694 static int ixgbe_ioctl(struct net_device *netdev, struct ifreq *req, int cmd)
7695 {
7696         struct ixgbe_adapter *adapter = netdev_priv(netdev);
7697
7698         switch (cmd) {
7699         case SIOCSHWTSTAMP:
7700                 return ixgbe_ptp_set_ts_config(adapter, req);
7701         case SIOCGHWTSTAMP:
7702                 return ixgbe_ptp_get_ts_config(adapter, req);
7703         default:
7704                 return mdio_mii_ioctl(&adapter->hw.phy.mdio, if_mii(req), cmd);
7705         }
7706 }
7707
7708 /**
7709  * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding
7710  * netdev->dev_addrs
7711  * @netdev: network interface device structure
7712  *
7713  * Returns non-zero on failure
7714  **/
7715 static int ixgbe_add_sanmac_netdev(struct net_device *dev)
7716 {
7717         int err = 0;
7718         struct ixgbe_adapter *adapter = netdev_priv(dev);
7719         struct ixgbe_hw *hw = &adapter->hw;
7720
7721         if (is_valid_ether_addr(hw->mac.san_addr)) {
7722                 rtnl_lock();
7723                 err = dev_addr_add(dev, hw->mac.san_addr, NETDEV_HW_ADDR_T_SAN);
7724                 rtnl_unlock();
7725
7726                 /* update SAN MAC vmdq pool selection */
7727                 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
7728         }
7729         return err;
7730 }
7731
7732 /**
7733  * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding
7734  * netdev->dev_addrs
7735  * @netdev: network interface device structure
7736  *
7737  * Returns non-zero on failure
7738  **/
7739 static int ixgbe_del_sanmac_netdev(struct net_device *dev)
7740 {
7741         int err = 0;
7742         struct ixgbe_adapter *adapter = netdev_priv(dev);
7743         struct ixgbe_mac_info *mac = &adapter->hw.mac;
7744
7745         if (is_valid_ether_addr(mac->san_addr)) {
7746                 rtnl_lock();
7747                 err = dev_addr_del(dev, mac->san_addr, NETDEV_HW_ADDR_T_SAN);
7748                 rtnl_unlock();
7749         }
7750         return err;
7751 }
7752
7753 #ifdef CONFIG_NET_POLL_CONTROLLER
7754 /*
7755  * Polling 'interrupt' - used by things like netconsole to send skbs
7756  * without having to re-enable interrupts. It's not called while
7757  * the interrupt routine is executing.
7758  */
7759 static void ixgbe_netpoll(struct net_device *netdev)
7760 {
7761         struct ixgbe_adapter *adapter = netdev_priv(netdev);
7762         int i;
7763
7764         /* if interface is down do nothing */
7765         if (test_bit(__IXGBE_DOWN, &adapter->state))
7766                 return;
7767
7768         /* loop through and schedule all active queues */
7769         for (i = 0; i < adapter->num_q_vectors; i++)
7770                 ixgbe_msix_clean_rings(0, adapter->q_vector[i]);
7771 }
7772
7773 #endif
7774 static struct rtnl_link_stats64 *ixgbe_get_stats64(struct net_device *netdev,
7775                                                    struct rtnl_link_stats64 *stats)
7776 {
7777         struct ixgbe_adapter *adapter = netdev_priv(netdev);
7778         int i;
7779
7780         rcu_read_lock();
7781         for (i = 0; i < adapter->num_rx_queues; i++) {
7782                 struct ixgbe_ring *ring = ACCESS_ONCE(adapter->rx_ring[i]);
7783                 u64 bytes, packets;
7784                 unsigned int start;
7785
7786                 if (ring) {
7787                         do {
7788                                 start = u64_stats_fetch_begin_irq(&ring->syncp);
7789                                 packets = ring->stats.packets;
7790                                 bytes   = ring->stats.bytes;
7791                         } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
7792                         stats->rx_packets += packets;
7793                         stats->rx_bytes   += bytes;
7794                 }
7795         }
7796
7797         for (i = 0; i < adapter->num_tx_queues; i++) {
7798                 struct ixgbe_ring *ring = ACCESS_ONCE(adapter->tx_ring[i]);
7799                 u64 bytes, packets;
7800                 unsigned int start;
7801
7802                 if (ring) {
7803                         do {
7804                                 start = u64_stats_fetch_begin_irq(&ring->syncp);
7805                                 packets = ring->stats.packets;
7806                                 bytes   = ring->stats.bytes;
7807                         } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
7808                         stats->tx_packets += packets;
7809                         stats->tx_bytes   += bytes;
7810                 }
7811         }
7812         rcu_read_unlock();
7813         /* following stats updated by ixgbe_watchdog_task() */
7814         stats->multicast        = netdev->stats.multicast;
7815         stats->rx_errors        = netdev->stats.rx_errors;
7816         stats->rx_length_errors = netdev->stats.rx_length_errors;
7817         stats->rx_crc_errors    = netdev->stats.rx_crc_errors;
7818         stats->rx_missed_errors = netdev->stats.rx_missed_errors;
7819         return stats;
7820 }
7821
7822 #ifdef CONFIG_IXGBE_DCB
7823 /**
7824  * ixgbe_validate_rtr - verify 802.1Qp to Rx packet buffer mapping is valid.
7825  * @adapter: pointer to ixgbe_adapter
7826  * @tc: number of traffic classes currently enabled
7827  *
7828  * Configure a valid 802.1Qp to Rx packet buffer mapping ie confirm
7829  * 802.1Q priority maps to a packet buffer that exists.
7830  */
7831 static void ixgbe_validate_rtr(struct ixgbe_adapter *adapter, u8 tc)
7832 {
7833         struct ixgbe_hw *hw = &adapter->hw;
7834         u32 reg, rsave;
7835         int i;
7836
7837         /* 82598 have a static priority to TC mapping that can not
7838          * be changed so no validation is needed.
7839          */
7840         if (hw->mac.type == ixgbe_mac_82598EB)
7841                 return;
7842
7843         reg = IXGBE_READ_REG(hw, IXGBE_RTRUP2TC);
7844         rsave = reg;
7845
7846         for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
7847                 u8 up2tc = reg >> (i * IXGBE_RTRUP2TC_UP_SHIFT);
7848
7849                 /* If up2tc is out of bounds default to zero */
7850                 if (up2tc > tc)
7851                         reg &= ~(0x7 << IXGBE_RTRUP2TC_UP_SHIFT);
7852         }
7853
7854         if (reg != rsave)
7855                 IXGBE_WRITE_REG(hw, IXGBE_RTRUP2TC, reg);
7856
7857         return;
7858 }
7859
7860 /**
7861  * ixgbe_set_prio_tc_map - Configure netdev prio tc map
7862  * @adapter: Pointer to adapter struct
7863  *
7864  * Populate the netdev user priority to tc map
7865  */
7866 static void ixgbe_set_prio_tc_map(struct ixgbe_adapter *adapter)
7867 {
7868         struct net_device *dev = adapter->netdev;
7869         struct ixgbe_dcb_config *dcb_cfg = &adapter->dcb_cfg;
7870         struct ieee_ets *ets = adapter->ixgbe_ieee_ets;
7871         u8 prio;
7872
7873         for (prio = 0; prio < MAX_USER_PRIORITY; prio++) {
7874                 u8 tc = 0;
7875
7876                 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE)
7877                         tc = ixgbe_dcb_get_tc_from_up(dcb_cfg, 0, prio);
7878                 else if (ets)
7879                         tc = ets->prio_tc[prio];
7880
7881                 netdev_set_prio_tc_map(dev, prio, tc);
7882         }
7883 }
7884
7885 #endif /* CONFIG_IXGBE_DCB */
7886 /**
7887  * ixgbe_setup_tc - configure net_device for multiple traffic classes
7888  *
7889  * @netdev: net device to configure
7890  * @tc: number of traffic classes to enable
7891  */
7892 int ixgbe_setup_tc(struct net_device *dev, u8 tc)
7893 {
7894         struct ixgbe_adapter *adapter = netdev_priv(dev);
7895         struct ixgbe_hw *hw = &adapter->hw;
7896         bool pools;
7897
7898         /* Hardware supports up to 8 traffic classes */
7899         if (tc > adapter->dcb_cfg.num_tcs.pg_tcs)
7900                 return -EINVAL;
7901
7902         if (hw->mac.type == ixgbe_mac_82598EB && tc && tc < MAX_TRAFFIC_CLASS)
7903                 return -EINVAL;
7904
7905         pools = (find_first_zero_bit(&adapter->fwd_bitmask, 32) > 1);
7906         if (tc && pools && adapter->num_rx_pools > IXGBE_MAX_DCBMACVLANS)
7907                 return -EBUSY;
7908
7909         /* Hardware has to reinitialize queues and interrupts to
7910          * match packet buffer alignment. Unfortunately, the
7911          * hardware is not flexible enough to do this dynamically.
7912          */
7913         if (netif_running(dev))
7914                 ixgbe_close(dev);
7915         ixgbe_clear_interrupt_scheme(adapter);
7916
7917 #ifdef CONFIG_IXGBE_DCB
7918         if (tc) {
7919                 netdev_set_num_tc(dev, tc);
7920                 ixgbe_set_prio_tc_map(adapter);
7921
7922                 adapter->flags |= IXGBE_FLAG_DCB_ENABLED;
7923
7924                 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
7925                         adapter->last_lfc_mode = adapter->hw.fc.requested_mode;
7926                         adapter->hw.fc.requested_mode = ixgbe_fc_none;
7927                 }
7928         } else {
7929                 netdev_reset_tc(dev);
7930
7931                 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
7932                         adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
7933
7934                 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
7935
7936                 adapter->temp_dcb_cfg.pfc_mode_enable = false;
7937                 adapter->dcb_cfg.pfc_mode_enable = false;
7938         }
7939
7940         ixgbe_validate_rtr(adapter, tc);
7941
7942 #endif /* CONFIG_IXGBE_DCB */
7943         ixgbe_init_interrupt_scheme(adapter);
7944
7945         if (netif_running(dev))
7946                 return ixgbe_open(dev);
7947
7948         return 0;
7949 }
7950
7951 #ifdef CONFIG_PCI_IOV
7952 void ixgbe_sriov_reinit(struct ixgbe_adapter *adapter)
7953 {
7954         struct net_device *netdev = adapter->netdev;
7955
7956         rtnl_lock();
7957         ixgbe_setup_tc(netdev, netdev_get_num_tc(netdev));
7958         rtnl_unlock();
7959 }
7960
7961 #endif
7962 void ixgbe_do_reset(struct net_device *netdev)
7963 {
7964         struct ixgbe_adapter *adapter = netdev_priv(netdev);
7965
7966         if (netif_running(netdev))
7967                 ixgbe_reinit_locked(adapter);
7968         else
7969                 ixgbe_reset(adapter);
7970 }
7971
7972 static netdev_features_t ixgbe_fix_features(struct net_device *netdev,
7973                                             netdev_features_t features)
7974 {
7975         struct ixgbe_adapter *adapter = netdev_priv(netdev);
7976
7977         /* If Rx checksum is disabled, then RSC/LRO should also be disabled */
7978         if (!(features & NETIF_F_RXCSUM))
7979                 features &= ~NETIF_F_LRO;
7980
7981         /* Turn off LRO if not RSC capable */
7982         if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE))
7983                 features &= ~NETIF_F_LRO;
7984
7985         return features;
7986 }
7987
7988 static int ixgbe_set_features(struct net_device *netdev,
7989                               netdev_features_t features)
7990 {
7991         struct ixgbe_adapter *adapter = netdev_priv(netdev);
7992         netdev_features_t changed = netdev->features ^ features;
7993         bool need_reset = false;
7994
7995         /* Make sure RSC matches LRO, reset if change */
7996         if (!(features & NETIF_F_LRO)) {
7997                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
7998                         need_reset = true;
7999                 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
8000         } else if ((adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) &&
8001                    !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
8002                 if (adapter->rx_itr_setting == 1 ||
8003                     adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) {
8004                         adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
8005                         need_reset = true;
8006                 } else if ((changed ^ features) & NETIF_F_LRO) {
8007                         e_info(probe, "rx-usecs set too low, "
8008                                "disabling RSC\n");
8009                 }
8010         }
8011
8012         /*
8013          * Check if Flow Director n-tuple support was enabled or disabled.  If
8014          * the state changed, we need to reset.
8015          */
8016         switch (features & NETIF_F_NTUPLE) {
8017         case NETIF_F_NTUPLE:
8018                 /* turn off ATR, enable perfect filters and reset */
8019                 if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))
8020                         need_reset = true;
8021
8022                 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
8023                 adapter->flags |= IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
8024                 break;
8025         default:
8026                 /* turn off perfect filters, enable ATR and reset */
8027                 if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
8028                         need_reset = true;
8029
8030                 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
8031
8032                 /* We cannot enable ATR if SR-IOV is enabled */
8033                 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
8034                         break;
8035
8036                 /* We cannot enable ATR if we have 2 or more traffic classes */
8037                 if (netdev_get_num_tc(netdev) > 1)
8038                         break;
8039
8040                 /* We cannot enable ATR if RSS is disabled */
8041                 if (adapter->ring_feature[RING_F_RSS].limit <= 1)
8042                         break;
8043
8044                 /* A sample rate of 0 indicates ATR disabled */
8045                 if (!adapter->atr_sample_rate)
8046                         break;
8047
8048                 adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
8049                 break;
8050         }
8051
8052         if (features & NETIF_F_HW_VLAN_CTAG_RX)
8053                 ixgbe_vlan_strip_enable(adapter);
8054         else
8055                 ixgbe_vlan_strip_disable(adapter);
8056
8057         if (changed & NETIF_F_RXALL)
8058                 need_reset = true;
8059
8060         netdev->features = features;
8061
8062 #ifdef CONFIG_IXGBE_VXLAN
8063         if ((adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE)) {
8064                 if (features & NETIF_F_RXCSUM)
8065                         adapter->flags2 |= IXGBE_FLAG2_VXLAN_REREG_NEEDED;
8066                 else
8067                         ixgbe_clear_vxlan_port(adapter);
8068         }
8069 #endif /* CONFIG_IXGBE_VXLAN */
8070
8071         if (need_reset)
8072                 ixgbe_do_reset(netdev);
8073
8074         return 0;
8075 }
8076
8077 #ifdef CONFIG_IXGBE_VXLAN
8078 /**
8079  * ixgbe_add_vxlan_port - Get notifications about VXLAN ports that come up
8080  * @dev: The port's netdev
8081  * @sa_family: Socket Family that VXLAN is notifiying us about
8082  * @port: New UDP port number that VXLAN started listening to
8083  **/
8084 static void ixgbe_add_vxlan_port(struct net_device *dev, sa_family_t sa_family,
8085                                  __be16 port)
8086 {
8087         struct ixgbe_adapter *adapter = netdev_priv(dev);
8088         struct ixgbe_hw *hw = &adapter->hw;
8089         u16 new_port = ntohs(port);
8090
8091         if (!(adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE))
8092                 return;
8093
8094         if (sa_family == AF_INET6)
8095                 return;
8096
8097         if (adapter->vxlan_port == new_port)
8098                 return;
8099
8100         if (adapter->vxlan_port) {
8101                 netdev_info(dev,
8102                             "Hit Max num of VXLAN ports, not adding port %d\n",
8103                             new_port);
8104                 return;
8105         }
8106
8107         adapter->vxlan_port = new_port;
8108         IXGBE_WRITE_REG(hw, IXGBE_VXLANCTRL, new_port);
8109 }
8110
8111 /**
8112  * ixgbe_del_vxlan_port - Get notifications about VXLAN ports that go away
8113  * @dev: The port's netdev
8114  * @sa_family: Socket Family that VXLAN is notifying us about
8115  * @port: UDP port number that VXLAN stopped listening to
8116  **/
8117 static void ixgbe_del_vxlan_port(struct net_device *dev, sa_family_t sa_family,
8118                                  __be16 port)
8119 {
8120         struct ixgbe_adapter *adapter = netdev_priv(dev);
8121         u16 new_port = ntohs(port);
8122
8123         if (!(adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE))
8124                 return;
8125
8126         if (sa_family == AF_INET6)
8127                 return;
8128
8129         if (adapter->vxlan_port != new_port) {
8130                 netdev_info(dev, "Port %d was not found, not deleting\n",
8131                             new_port);
8132                 return;
8133         }
8134
8135         ixgbe_clear_vxlan_port(adapter);
8136         adapter->flags2 |= IXGBE_FLAG2_VXLAN_REREG_NEEDED;
8137 }
8138 #endif /* CONFIG_IXGBE_VXLAN */
8139
8140 static int ixgbe_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
8141                              struct net_device *dev,
8142                              const unsigned char *addr, u16 vid,
8143                              u16 flags)
8144 {
8145         /* guarantee we can provide a unique filter for the unicast address */
8146         if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
8147                 if (IXGBE_MAX_PF_MACVLANS <= netdev_uc_count(dev))
8148                         return -ENOMEM;
8149         }
8150
8151         return ndo_dflt_fdb_add(ndm, tb, dev, addr, vid, flags);
8152 }
8153
8154 /**
8155  * ixgbe_configure_bridge_mode - set various bridge modes
8156  * @adapter - the private structure
8157  * @mode - requested bridge mode
8158  *
8159  * Configure some settings require for various bridge modes.
8160  **/
8161 static int ixgbe_configure_bridge_mode(struct ixgbe_adapter *adapter,
8162                                        __u16 mode)
8163 {
8164         struct ixgbe_hw *hw = &adapter->hw;
8165         unsigned int p, num_pools;
8166         u32 vmdctl;
8167
8168         switch (mode) {
8169         case BRIDGE_MODE_VEPA:
8170                 /* disable Tx loopback, rely on switch hairpin mode */
8171                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC, 0);
8172
8173                 /* must enable Rx switching replication to allow multicast
8174                  * packet reception on all VFs, and to enable source address
8175                  * pruning.
8176                  */
8177                 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
8178                 vmdctl |= IXGBE_VT_CTL_REPLEN;
8179                 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
8180
8181                 /* enable Rx source address pruning. Note, this requires
8182                  * replication to be enabled or else it does nothing.
8183                  */
8184                 num_pools = adapter->num_vfs + adapter->num_rx_pools;
8185                 for (p = 0; p < num_pools; p++) {
8186                         if (hw->mac.ops.set_source_address_pruning)
8187                                 hw->mac.ops.set_source_address_pruning(hw,
8188                                                                        true,
8189                                                                        p);
8190                 }
8191                 break;
8192         case BRIDGE_MODE_VEB:
8193                 /* enable Tx loopback for internal VF/PF communication */
8194                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC,
8195                                 IXGBE_PFDTXGSWC_VT_LBEN);
8196
8197                 /* disable Rx switching replication unless we have SR-IOV
8198                  * virtual functions
8199                  */
8200                 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
8201                 if (!adapter->num_vfs)
8202                         vmdctl &= ~IXGBE_VT_CTL_REPLEN;
8203                 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
8204
8205                 /* disable Rx source address pruning, since we don't expect to
8206                  * be receiving external loopback of our transmitted frames.
8207                  */
8208                 num_pools = adapter->num_vfs + adapter->num_rx_pools;
8209                 for (p = 0; p < num_pools; p++) {
8210                         if (hw->mac.ops.set_source_address_pruning)
8211                                 hw->mac.ops.set_source_address_pruning(hw,
8212                                                                        false,
8213                                                                        p);
8214                 }
8215                 break;
8216         default:
8217                 return -EINVAL;
8218         }
8219
8220         adapter->bridge_mode = mode;
8221
8222         e_info(drv, "enabling bridge mode: %s\n",
8223                mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
8224
8225         return 0;
8226 }
8227
8228 static int ixgbe_ndo_bridge_setlink(struct net_device *dev,
8229                                     struct nlmsghdr *nlh, u16 flags)
8230 {
8231         struct ixgbe_adapter *adapter = netdev_priv(dev);
8232         struct nlattr *attr, *br_spec;
8233         int rem;
8234
8235         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
8236                 return -EOPNOTSUPP;
8237
8238         br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
8239         if (!br_spec)
8240                 return -EINVAL;
8241
8242         nla_for_each_nested(attr, br_spec, rem) {
8243                 int status;
8244                 __u16 mode;
8245
8246                 if (nla_type(attr) != IFLA_BRIDGE_MODE)
8247                         continue;
8248
8249                 if (nla_len(attr) < sizeof(mode))
8250                         return -EINVAL;
8251
8252                 mode = nla_get_u16(attr);
8253                 status = ixgbe_configure_bridge_mode(adapter, mode);
8254                 if (status)
8255                         return status;
8256
8257                 break;
8258         }
8259
8260         return 0;
8261 }
8262
8263 static int ixgbe_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
8264                                     struct net_device *dev,
8265                                     u32 filter_mask, int nlflags)
8266 {
8267         struct ixgbe_adapter *adapter = netdev_priv(dev);
8268
8269         if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
8270                 return 0;
8271
8272         return ndo_dflt_bridge_getlink(skb, pid, seq, dev,
8273                                        adapter->bridge_mode, 0, 0, nlflags,
8274                                        filter_mask, NULL);
8275 }
8276
8277 static void *ixgbe_fwd_add(struct net_device *pdev, struct net_device *vdev)
8278 {
8279         struct ixgbe_fwd_adapter *fwd_adapter = NULL;
8280         struct ixgbe_adapter *adapter = netdev_priv(pdev);
8281         int used_pools = adapter->num_vfs + adapter->num_rx_pools;
8282         unsigned int limit;
8283         int pool, err;
8284
8285         /* Hardware has a limited number of available pools. Each VF, and the
8286          * PF require a pool. Check to ensure we don't attempt to use more
8287          * then the available number of pools.
8288          */
8289         if (used_pools >= IXGBE_MAX_VF_FUNCTIONS)
8290                 return ERR_PTR(-EINVAL);
8291
8292 #ifdef CONFIG_RPS
8293         if (vdev->num_rx_queues != vdev->num_tx_queues) {
8294                 netdev_info(pdev, "%s: Only supports a single queue count for TX and RX\n",
8295                             vdev->name);
8296                 return ERR_PTR(-EINVAL);
8297         }
8298 #endif
8299         /* Check for hardware restriction on number of rx/tx queues */
8300         if (vdev->num_tx_queues > IXGBE_MAX_L2A_QUEUES ||
8301             vdev->num_tx_queues == IXGBE_BAD_L2A_QUEUE) {
8302                 netdev_info(pdev,
8303                             "%s: Supports RX/TX Queue counts 1,2, and 4\n",
8304                             pdev->name);
8305                 return ERR_PTR(-EINVAL);
8306         }
8307
8308         if (((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
8309               adapter->num_rx_pools > IXGBE_MAX_DCBMACVLANS - 1) ||
8310             (adapter->num_rx_pools > IXGBE_MAX_MACVLANS))
8311                 return ERR_PTR(-EBUSY);
8312
8313         fwd_adapter = kzalloc(sizeof(*fwd_adapter), GFP_KERNEL);
8314         if (!fwd_adapter)
8315                 return ERR_PTR(-ENOMEM);
8316
8317         pool = find_first_zero_bit(&adapter->fwd_bitmask, 32);
8318         adapter->num_rx_pools++;
8319         set_bit(pool, &adapter->fwd_bitmask);
8320         limit = find_last_bit(&adapter->fwd_bitmask, 32);
8321
8322         /* Enable VMDq flag so device will be set in VM mode */
8323         adapter->flags |= IXGBE_FLAG_VMDQ_ENABLED | IXGBE_FLAG_SRIOV_ENABLED;
8324         adapter->ring_feature[RING_F_VMDQ].limit = limit + 1;
8325         adapter->ring_feature[RING_F_RSS].limit = vdev->num_tx_queues;
8326
8327         /* Force reinit of ring allocation with VMDQ enabled */
8328         err = ixgbe_setup_tc(pdev, netdev_get_num_tc(pdev));
8329         if (err)
8330                 goto fwd_add_err;
8331         fwd_adapter->pool = pool;
8332         fwd_adapter->real_adapter = adapter;
8333         err = ixgbe_fwd_ring_up(vdev, fwd_adapter);
8334         if (err)
8335                 goto fwd_add_err;
8336         netif_tx_start_all_queues(vdev);
8337         return fwd_adapter;
8338 fwd_add_err:
8339         /* unwind counter and free adapter struct */
8340         netdev_info(pdev,
8341                     "%s: dfwd hardware acceleration failed\n", vdev->name);
8342         clear_bit(pool, &adapter->fwd_bitmask);
8343         adapter->num_rx_pools--;
8344         kfree(fwd_adapter);
8345         return ERR_PTR(err);
8346 }
8347
8348 static void ixgbe_fwd_del(struct net_device *pdev, void *priv)
8349 {
8350         struct ixgbe_fwd_adapter *fwd_adapter = priv;
8351         struct ixgbe_adapter *adapter = fwd_adapter->real_adapter;
8352         unsigned int limit;
8353
8354         clear_bit(fwd_adapter->pool, &adapter->fwd_bitmask);
8355         adapter->num_rx_pools--;
8356
8357         limit = find_last_bit(&adapter->fwd_bitmask, 32);
8358         adapter->ring_feature[RING_F_VMDQ].limit = limit + 1;
8359         ixgbe_fwd_ring_down(fwd_adapter->netdev, fwd_adapter);
8360         ixgbe_setup_tc(pdev, netdev_get_num_tc(pdev));
8361         netdev_dbg(pdev, "pool %i:%i queues %i:%i VSI bitmask %lx\n",
8362                    fwd_adapter->pool, adapter->num_rx_pools,
8363                    fwd_adapter->rx_base_queue,
8364                    fwd_adapter->rx_base_queue + adapter->num_rx_queues_per_pool,
8365                    adapter->fwd_bitmask);
8366         kfree(fwd_adapter);
8367 }
8368
8369 #define IXGBE_MAX_TUNNEL_HDR_LEN 80
8370 static netdev_features_t
8371 ixgbe_features_check(struct sk_buff *skb, struct net_device *dev,
8372                      netdev_features_t features)
8373 {
8374         if (!skb->encapsulation)
8375                 return features;
8376
8377         if (unlikely(skb_inner_mac_header(skb) - skb_transport_header(skb) >
8378                      IXGBE_MAX_TUNNEL_HDR_LEN))
8379                 return features & ~NETIF_F_ALL_CSUM;
8380
8381         return features;
8382 }
8383
8384 static const struct net_device_ops ixgbe_netdev_ops = {
8385         .ndo_open               = ixgbe_open,
8386         .ndo_stop               = ixgbe_close,
8387         .ndo_start_xmit         = ixgbe_xmit_frame,
8388         .ndo_select_queue       = ixgbe_select_queue,
8389         .ndo_set_rx_mode        = ixgbe_set_rx_mode,
8390         .ndo_validate_addr      = eth_validate_addr,
8391         .ndo_set_mac_address    = ixgbe_set_mac,
8392         .ndo_change_mtu         = ixgbe_change_mtu,
8393         .ndo_tx_timeout         = ixgbe_tx_timeout,
8394         .ndo_vlan_rx_add_vid    = ixgbe_vlan_rx_add_vid,
8395         .ndo_vlan_rx_kill_vid   = ixgbe_vlan_rx_kill_vid,
8396         .ndo_do_ioctl           = ixgbe_ioctl,
8397         .ndo_set_vf_mac         = ixgbe_ndo_set_vf_mac,
8398         .ndo_set_vf_vlan        = ixgbe_ndo_set_vf_vlan,
8399         .ndo_set_vf_rate        = ixgbe_ndo_set_vf_bw,
8400         .ndo_set_vf_spoofchk    = ixgbe_ndo_set_vf_spoofchk,
8401         .ndo_set_vf_rss_query_en = ixgbe_ndo_set_vf_rss_query_en,
8402         .ndo_get_vf_config      = ixgbe_ndo_get_vf_config,
8403         .ndo_get_stats64        = ixgbe_get_stats64,
8404 #ifdef CONFIG_IXGBE_DCB
8405         .ndo_setup_tc           = ixgbe_setup_tc,
8406 #endif
8407 #ifdef CONFIG_NET_POLL_CONTROLLER
8408         .ndo_poll_controller    = ixgbe_netpoll,
8409 #endif
8410 #ifdef CONFIG_NET_RX_BUSY_POLL
8411         .ndo_busy_poll          = ixgbe_low_latency_recv,
8412 #endif
8413 #ifdef IXGBE_FCOE
8414         .ndo_fcoe_ddp_setup = ixgbe_fcoe_ddp_get,
8415         .ndo_fcoe_ddp_target = ixgbe_fcoe_ddp_target,
8416         .ndo_fcoe_ddp_done = ixgbe_fcoe_ddp_put,
8417         .ndo_fcoe_enable = ixgbe_fcoe_enable,
8418         .ndo_fcoe_disable = ixgbe_fcoe_disable,
8419         .ndo_fcoe_get_wwn = ixgbe_fcoe_get_wwn,
8420         .ndo_fcoe_get_hbainfo = ixgbe_fcoe_get_hbainfo,
8421 #endif /* IXGBE_FCOE */
8422         .ndo_set_features = ixgbe_set_features,
8423         .ndo_fix_features = ixgbe_fix_features,
8424         .ndo_fdb_add            = ixgbe_ndo_fdb_add,
8425         .ndo_bridge_setlink     = ixgbe_ndo_bridge_setlink,
8426         .ndo_bridge_getlink     = ixgbe_ndo_bridge_getlink,
8427         .ndo_dfwd_add_station   = ixgbe_fwd_add,
8428         .ndo_dfwd_del_station   = ixgbe_fwd_del,
8429 #ifdef CONFIG_IXGBE_VXLAN
8430         .ndo_add_vxlan_port     = ixgbe_add_vxlan_port,
8431         .ndo_del_vxlan_port     = ixgbe_del_vxlan_port,
8432 #endif /* CONFIG_IXGBE_VXLAN */
8433         .ndo_features_check     = ixgbe_features_check,
8434 };
8435
8436 /**
8437  * ixgbe_enumerate_functions - Get the number of ports this device has
8438  * @adapter: adapter structure
8439  *
8440  * This function enumerates the phsyical functions co-located on a single slot,
8441  * in order to determine how many ports a device has. This is most useful in
8442  * determining the required GT/s of PCIe bandwidth necessary for optimal
8443  * performance.
8444  **/
8445 static inline int ixgbe_enumerate_functions(struct ixgbe_adapter *adapter)
8446 {
8447         struct pci_dev *entry, *pdev = adapter->pdev;
8448         int physfns = 0;
8449
8450         /* Some cards can not use the generic count PCIe functions method,
8451          * because they are behind a parent switch, so we hardcode these with
8452          * the correct number of functions.
8453          */
8454         if (ixgbe_pcie_from_parent(&adapter->hw))
8455                 physfns = 4;
8456
8457         list_for_each_entry(entry, &adapter->pdev->bus->devices, bus_list) {
8458                 /* don't count virtual functions */
8459                 if (entry->is_virtfn)
8460                         continue;
8461
8462                 /* When the devices on the bus don't all match our device ID,
8463                  * we can't reliably determine the correct number of
8464                  * functions. This can occur if a function has been direct
8465                  * attached to a virtual machine using VT-d, for example. In
8466                  * this case, simply return -1 to indicate this.
8467                  */
8468                 if ((entry->vendor != pdev->vendor) ||
8469                     (entry->device != pdev->device))
8470                         return -1;
8471
8472                 physfns++;
8473         }
8474
8475         return physfns;
8476 }
8477
8478 /**
8479  * ixgbe_wol_supported - Check whether device supports WoL
8480  * @hw: hw specific details
8481  * @device_id: the device ID
8482  * @subdev_id: the subsystem device ID
8483  *
8484  * This function is used by probe and ethtool to determine
8485  * which devices have WoL support
8486  *
8487  **/
8488 int ixgbe_wol_supported(struct ixgbe_adapter *adapter, u16 device_id,
8489                         u16 subdevice_id)
8490 {
8491         struct ixgbe_hw *hw = &adapter->hw;
8492         u16 wol_cap = adapter->eeprom_cap & IXGBE_DEVICE_CAPS_WOL_MASK;
8493         int is_wol_supported = 0;
8494
8495         switch (device_id) {
8496         case IXGBE_DEV_ID_82599_SFP:
8497                 /* Only these subdevices could supports WOL */
8498                 switch (subdevice_id) {
8499                 case IXGBE_SUBDEV_ID_82599_SFP_WOL0:
8500                 case IXGBE_SUBDEV_ID_82599_560FLR:
8501                         /* only support first port */
8502                         if (hw->bus.func != 0)
8503                                 break;
8504                 case IXGBE_SUBDEV_ID_82599_SP_560FLR:
8505                 case IXGBE_SUBDEV_ID_82599_SFP:
8506                 case IXGBE_SUBDEV_ID_82599_RNDC:
8507                 case IXGBE_SUBDEV_ID_82599_ECNA_DP:
8508                 case IXGBE_SUBDEV_ID_82599_LOM_SFP:
8509                         is_wol_supported = 1;
8510                         break;
8511                 }
8512                 break;
8513         case IXGBE_DEV_ID_82599EN_SFP:
8514                 /* Only this subdevice supports WOL */
8515                 switch (subdevice_id) {
8516                 case IXGBE_SUBDEV_ID_82599EN_SFP_OCP1:
8517                         is_wol_supported = 1;
8518                         break;
8519                 }
8520                 break;
8521         case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
8522                 /* All except this subdevice support WOL */
8523                 if (subdevice_id != IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ)
8524                         is_wol_supported = 1;
8525                 break;
8526         case IXGBE_DEV_ID_82599_KX4:
8527                 is_wol_supported = 1;
8528                 break;
8529         case IXGBE_DEV_ID_X540T:
8530         case IXGBE_DEV_ID_X540T1:
8531         case IXGBE_DEV_ID_X550T:
8532         case IXGBE_DEV_ID_X550EM_X_KX4:
8533         case IXGBE_DEV_ID_X550EM_X_KR:
8534         case IXGBE_DEV_ID_X550EM_X_10G_T:
8535                 /* check eeprom to see if enabled wol */
8536                 if ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0_1) ||
8537                     ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0) &&
8538                      (hw->bus.func == 0))) {
8539                         is_wol_supported = 1;
8540                 }
8541                 break;
8542         }
8543
8544         return is_wol_supported;
8545 }
8546
8547 /**
8548  * ixgbe_get_platform_mac_addr - Look up MAC address in Open Firmware / IDPROM
8549  * @adapter: Pointer to adapter struct
8550  */
8551 static void ixgbe_get_platform_mac_addr(struct ixgbe_adapter *adapter)
8552 {
8553 #ifdef CONFIG_OF
8554         struct device_node *dp = pci_device_to_OF_node(adapter->pdev);
8555         struct ixgbe_hw *hw = &adapter->hw;
8556         const unsigned char *addr;
8557
8558         addr = of_get_mac_address(dp);
8559         if (addr) {
8560                 ether_addr_copy(hw->mac.perm_addr, addr);
8561                 return;
8562         }
8563 #endif /* CONFIG_OF */
8564
8565 #ifdef CONFIG_SPARC
8566         ether_addr_copy(hw->mac.perm_addr, idprom->id_ethaddr);
8567 #endif /* CONFIG_SPARC */
8568 }
8569
8570 /**
8571  * ixgbe_probe - Device Initialization Routine
8572  * @pdev: PCI device information struct
8573  * @ent: entry in ixgbe_pci_tbl
8574  *
8575  * Returns 0 on success, negative on failure
8576  *
8577  * ixgbe_probe initializes an adapter identified by a pci_dev structure.
8578  * The OS initialization, configuring of the adapter private structure,
8579  * and a hardware reset occur.
8580  **/
8581 static int ixgbe_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
8582 {
8583         struct net_device *netdev;
8584         struct ixgbe_adapter *adapter = NULL;
8585         struct ixgbe_hw *hw;
8586         const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
8587         int i, err, pci_using_dac, expected_gts;
8588         unsigned int indices = MAX_TX_QUEUES;
8589         u8 part_str[IXGBE_PBANUM_LENGTH];
8590         bool disable_dev = false;
8591 #ifdef IXGBE_FCOE
8592         u16 device_caps;
8593 #endif
8594         u32 eec;
8595
8596         /* Catch broken hardware that put the wrong VF device ID in
8597          * the PCIe SR-IOV capability.
8598          */
8599         if (pdev->is_virtfn) {
8600                 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
8601                      pci_name(pdev), pdev->vendor, pdev->device);
8602                 return -EINVAL;
8603         }
8604
8605         err = pci_enable_device_mem(pdev);
8606         if (err)
8607                 return err;
8608
8609         if (!dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) {
8610                 pci_using_dac = 1;
8611         } else {
8612                 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
8613                 if (err) {
8614                         dev_err(&pdev->dev,
8615                                 "No usable DMA configuration, aborting\n");
8616                         goto err_dma;
8617                 }
8618                 pci_using_dac = 0;
8619         }
8620
8621         err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
8622                                            IORESOURCE_MEM), ixgbe_driver_name);
8623         if (err) {
8624                 dev_err(&pdev->dev,
8625                         "pci_request_selected_regions failed 0x%x\n", err);
8626                 goto err_pci_reg;
8627         }
8628
8629         pci_enable_pcie_error_reporting(pdev);
8630
8631         pci_set_master(pdev);
8632         pci_save_state(pdev);
8633
8634         if (ii->mac == ixgbe_mac_82598EB) {
8635 #ifdef CONFIG_IXGBE_DCB
8636                 /* 8 TC w/ 4 queues per TC */
8637                 indices = 4 * MAX_TRAFFIC_CLASS;
8638 #else
8639                 indices = IXGBE_MAX_RSS_INDICES;
8640 #endif
8641         }
8642
8643         netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), indices);
8644         if (!netdev) {
8645                 err = -ENOMEM;
8646                 goto err_alloc_etherdev;
8647         }
8648
8649         SET_NETDEV_DEV(netdev, &pdev->dev);
8650
8651         adapter = netdev_priv(netdev);
8652
8653         adapter->netdev = netdev;
8654         adapter->pdev = pdev;
8655         hw = &adapter->hw;
8656         hw->back = adapter;
8657         adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
8658
8659         hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
8660                               pci_resource_len(pdev, 0));
8661         adapter->io_addr = hw->hw_addr;
8662         if (!hw->hw_addr) {
8663                 err = -EIO;
8664                 goto err_ioremap;
8665         }
8666
8667         netdev->netdev_ops = &ixgbe_netdev_ops;
8668         ixgbe_set_ethtool_ops(netdev);
8669         netdev->watchdog_timeo = 5 * HZ;
8670         strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name));
8671
8672         /* Setup hw api */
8673         memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
8674         hw->mac.type  = ii->mac;
8675         hw->mvals     = ii->mvals;
8676
8677         /* EEPROM */
8678         memcpy(&hw->eeprom.ops, ii->eeprom_ops, sizeof(hw->eeprom.ops));
8679         eec = IXGBE_READ_REG(hw, IXGBE_EEC(hw));
8680         if (ixgbe_removed(hw->hw_addr)) {
8681                 err = -EIO;
8682                 goto err_ioremap;
8683         }
8684         /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
8685         if (!(eec & (1 << 8)))
8686                 hw->eeprom.ops.read = &ixgbe_read_eeprom_bit_bang_generic;
8687
8688         /* PHY */
8689         memcpy(&hw->phy.ops, ii->phy_ops, sizeof(hw->phy.ops));
8690         hw->phy.sfp_type = ixgbe_sfp_type_unknown;
8691         /* ixgbe_identify_phy_generic will set prtad and mmds properly */
8692         hw->phy.mdio.prtad = MDIO_PRTAD_NONE;
8693         hw->phy.mdio.mmds = 0;
8694         hw->phy.mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
8695         hw->phy.mdio.dev = netdev;
8696         hw->phy.mdio.mdio_read = ixgbe_mdio_read;
8697         hw->phy.mdio.mdio_write = ixgbe_mdio_write;
8698
8699         ii->get_invariants(hw);
8700
8701         /* setup the private structure */
8702         err = ixgbe_sw_init(adapter);
8703         if (err)
8704                 goto err_sw_init;
8705
8706         /* Make it possible the adapter to be woken up via WOL */
8707         switch (adapter->hw.mac.type) {
8708         case ixgbe_mac_82599EB:
8709         case ixgbe_mac_X540:
8710         case ixgbe_mac_X550:
8711         case ixgbe_mac_X550EM_x:
8712                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
8713                 break;
8714         default:
8715                 break;
8716         }
8717
8718         /*
8719          * If there is a fan on this device and it has failed log the
8720          * failure.
8721          */
8722         if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
8723                 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
8724                 if (esdp & IXGBE_ESDP_SDP1)
8725                         e_crit(probe, "Fan has stopped, replace the adapter\n");
8726         }
8727
8728         if (allow_unsupported_sfp)
8729                 hw->allow_unsupported_sfp = allow_unsupported_sfp;
8730
8731         /* reset_hw fills in the perm_addr as well */
8732         hw->phy.reset_if_overtemp = true;
8733         err = hw->mac.ops.reset_hw(hw);
8734         hw->phy.reset_if_overtemp = false;
8735         if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
8736                 err = 0;
8737         } else if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
8738                 e_dev_err("failed to load because an unsupported SFP+ or QSFP module type was detected.\n");
8739                 e_dev_err("Reload the driver after installing a supported module.\n");
8740                 goto err_sw_init;
8741         } else if (err) {
8742                 e_dev_err("HW Init failed: %d\n", err);
8743                 goto err_sw_init;
8744         }
8745
8746 #ifdef CONFIG_PCI_IOV
8747         /* SR-IOV not supported on the 82598 */
8748         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
8749                 goto skip_sriov;
8750         /* Mailbox */
8751         ixgbe_init_mbx_params_pf(hw);
8752         memcpy(&hw->mbx.ops, ii->mbx_ops, sizeof(hw->mbx.ops));
8753         pci_sriov_set_totalvfs(pdev, IXGBE_MAX_VFS_DRV_LIMIT);
8754         ixgbe_enable_sriov(adapter);
8755 skip_sriov:
8756
8757 #endif
8758         netdev->features = NETIF_F_SG |
8759                            NETIF_F_IP_CSUM |
8760                            NETIF_F_IPV6_CSUM |
8761                            NETIF_F_HW_VLAN_CTAG_TX |
8762                            NETIF_F_HW_VLAN_CTAG_RX |
8763                            NETIF_F_TSO |
8764                            NETIF_F_TSO6 |
8765                            NETIF_F_RXHASH |
8766                            NETIF_F_RXCSUM;
8767
8768         netdev->hw_features = netdev->features | NETIF_F_HW_L2FW_DOFFLOAD;
8769
8770         switch (adapter->hw.mac.type) {
8771         case ixgbe_mac_82599EB:
8772         case ixgbe_mac_X540:
8773         case ixgbe_mac_X550:
8774         case ixgbe_mac_X550EM_x:
8775                 netdev->features |= NETIF_F_SCTP_CSUM;
8776                 netdev->hw_features |= NETIF_F_SCTP_CSUM |
8777                                        NETIF_F_NTUPLE;
8778                 break;
8779         default:
8780                 break;
8781         }
8782
8783         netdev->hw_features |= NETIF_F_RXALL;
8784         netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
8785
8786         netdev->vlan_features |= NETIF_F_TSO;
8787         netdev->vlan_features |= NETIF_F_TSO6;
8788         netdev->vlan_features |= NETIF_F_IP_CSUM;
8789         netdev->vlan_features |= NETIF_F_IPV6_CSUM;
8790         netdev->vlan_features |= NETIF_F_SG;
8791
8792         netdev->hw_enc_features |= NETIF_F_SG | NETIF_F_IP_CSUM |
8793                                    NETIF_F_IPV6_CSUM;
8794
8795         netdev->priv_flags |= IFF_UNICAST_FLT;
8796         netdev->priv_flags |= IFF_SUPP_NOFCS;
8797
8798 #ifdef CONFIG_IXGBE_VXLAN
8799         switch (adapter->hw.mac.type) {
8800         case ixgbe_mac_X550:
8801         case ixgbe_mac_X550EM_x:
8802                 netdev->hw_enc_features |= NETIF_F_RXCSUM |
8803                                            NETIF_F_IP_CSUM |
8804                                            NETIF_F_IPV6_CSUM;
8805                 break;
8806         default:
8807                 break;
8808         }
8809 #endif /* CONFIG_IXGBE_VXLAN */
8810
8811 #ifdef CONFIG_IXGBE_DCB
8812         netdev->dcbnl_ops = &dcbnl_ops;
8813 #endif
8814
8815 #ifdef IXGBE_FCOE
8816         if (adapter->flags & IXGBE_FLAG_FCOE_CAPABLE) {
8817                 unsigned int fcoe_l;
8818
8819                 if (hw->mac.ops.get_device_caps) {
8820                         hw->mac.ops.get_device_caps(hw, &device_caps);
8821                         if (device_caps & IXGBE_DEVICE_CAPS_FCOE_OFFLOADS)
8822                                 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
8823                 }
8824
8825
8826                 fcoe_l = min_t(int, IXGBE_FCRETA_SIZE, num_online_cpus());
8827                 adapter->ring_feature[RING_F_FCOE].limit = fcoe_l;
8828
8829                 netdev->features |= NETIF_F_FSO |
8830                                     NETIF_F_FCOE_CRC;
8831
8832                 netdev->vlan_features |= NETIF_F_FSO |
8833                                          NETIF_F_FCOE_CRC |
8834                                          NETIF_F_FCOE_MTU;
8835         }
8836 #endif /* IXGBE_FCOE */
8837         if (pci_using_dac) {
8838                 netdev->features |= NETIF_F_HIGHDMA;
8839                 netdev->vlan_features |= NETIF_F_HIGHDMA;
8840         }
8841
8842         if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE)
8843                 netdev->hw_features |= NETIF_F_LRO;
8844         if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
8845                 netdev->features |= NETIF_F_LRO;
8846
8847         /* make sure the EEPROM is good */
8848         if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) {
8849                 e_dev_err("The EEPROM Checksum Is Not Valid\n");
8850                 err = -EIO;
8851                 goto err_sw_init;
8852         }
8853
8854         ixgbe_get_platform_mac_addr(adapter);
8855
8856         memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
8857
8858         if (!is_valid_ether_addr(netdev->dev_addr)) {
8859                 e_dev_err("invalid MAC address\n");
8860                 err = -EIO;
8861                 goto err_sw_init;
8862         }
8863
8864         ixgbe_mac_set_default_filter(adapter, hw->mac.perm_addr);
8865
8866         setup_timer(&adapter->service_timer, &ixgbe_service_timer,
8867                     (unsigned long) adapter);
8868
8869         if (ixgbe_removed(hw->hw_addr)) {
8870                 err = -EIO;
8871                 goto err_sw_init;
8872         }
8873         INIT_WORK(&adapter->service_task, ixgbe_service_task);
8874         set_bit(__IXGBE_SERVICE_INITED, &adapter->state);
8875         clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
8876
8877         err = ixgbe_init_interrupt_scheme(adapter);
8878         if (err)
8879                 goto err_sw_init;
8880
8881         /* WOL not supported for all devices */
8882         adapter->wol = 0;
8883         hw->eeprom.ops.read(hw, 0x2c, &adapter->eeprom_cap);
8884         hw->wol_enabled = ixgbe_wol_supported(adapter, pdev->device,
8885                                                 pdev->subsystem_device);
8886         if (hw->wol_enabled)
8887                 adapter->wol = IXGBE_WUFC_MAG;
8888
8889         device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
8890
8891         /* save off EEPROM version number */
8892         hw->eeprom.ops.read(hw, 0x2e, &adapter->eeprom_verh);
8893         hw->eeprom.ops.read(hw, 0x2d, &adapter->eeprom_verl);
8894
8895         /* pick up the PCI bus settings for reporting later */
8896         if (ixgbe_pcie_from_parent(hw))
8897                 ixgbe_get_parent_bus_info(adapter);
8898         else
8899                  hw->mac.ops.get_bus_info(hw);
8900
8901         /* calculate the expected PCIe bandwidth required for optimal
8902          * performance. Note that some older parts will never have enough
8903          * bandwidth due to being older generation PCIe parts. We clamp these
8904          * parts to ensure no warning is displayed if it can't be fixed.
8905          */
8906         switch (hw->mac.type) {
8907         case ixgbe_mac_82598EB:
8908                 expected_gts = min(ixgbe_enumerate_functions(adapter) * 10, 16);
8909                 break;
8910         default:
8911                 expected_gts = ixgbe_enumerate_functions(adapter) * 10;
8912                 break;
8913         }
8914
8915         /* don't check link if we failed to enumerate functions */
8916         if (expected_gts > 0)
8917                 ixgbe_check_minimum_link(adapter, expected_gts);
8918
8919         err = ixgbe_read_pba_string_generic(hw, part_str, sizeof(part_str));
8920         if (err)
8921                 strlcpy(part_str, "Unknown", sizeof(part_str));
8922         if (ixgbe_is_sfp(hw) && hw->phy.sfp_type != ixgbe_sfp_type_not_present)
8923                 e_dev_info("MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n",
8924                            hw->mac.type, hw->phy.type, hw->phy.sfp_type,
8925                            part_str);
8926         else
8927                 e_dev_info("MAC: %d, PHY: %d, PBA No: %s\n",
8928                            hw->mac.type, hw->phy.type, part_str);
8929
8930         e_dev_info("%pM\n", netdev->dev_addr);
8931
8932         /* reset the hardware with the new settings */
8933         err = hw->mac.ops.start_hw(hw);
8934         if (err == IXGBE_ERR_EEPROM_VERSION) {
8935                 /* We are running on a pre-production device, log a warning */
8936                 e_dev_warn("This device is a pre-production adapter/LOM. "
8937                            "Please be aware there may be issues associated "
8938                            "with your hardware.  If you are experiencing "
8939                            "problems please contact your Intel or hardware "
8940                            "representative who provided you with this "
8941                            "hardware.\n");
8942         }
8943         strcpy(netdev->name, "eth%d");
8944         err = register_netdev(netdev);
8945         if (err)
8946                 goto err_register;
8947
8948         pci_set_drvdata(pdev, adapter);
8949
8950         /* power down the optics for 82599 SFP+ fiber */
8951         if (hw->mac.ops.disable_tx_laser)
8952                 hw->mac.ops.disable_tx_laser(hw);
8953
8954         /* carrier off reporting is important to ethtool even BEFORE open */
8955         netif_carrier_off(netdev);
8956
8957 #ifdef CONFIG_IXGBE_DCA
8958         if (dca_add_requester(&pdev->dev) == 0) {
8959                 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
8960                 ixgbe_setup_dca(adapter);
8961         }
8962 #endif
8963         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
8964                 e_info(probe, "IOV is enabled with %d VFs\n", adapter->num_vfs);
8965                 for (i = 0; i < adapter->num_vfs; i++)
8966                         ixgbe_vf_configuration(pdev, (i | 0x10000000));
8967         }
8968
8969         /* firmware requires driver version to be 0xFFFFFFFF
8970          * since os does not support feature
8971          */
8972         if (hw->mac.ops.set_fw_drv_ver)
8973                 hw->mac.ops.set_fw_drv_ver(hw, 0xFF, 0xFF, 0xFF,
8974                                            0xFF);
8975
8976         /* add san mac addr to netdev */
8977         ixgbe_add_sanmac_netdev(netdev);
8978
8979         e_dev_info("%s\n", ixgbe_default_device_descr);
8980
8981 #ifdef CONFIG_IXGBE_HWMON
8982         if (ixgbe_sysfs_init(adapter))
8983                 e_err(probe, "failed to allocate sysfs resources\n");
8984 #endif /* CONFIG_IXGBE_HWMON */
8985
8986         ixgbe_dbg_adapter_init(adapter);
8987
8988         /* setup link for SFP devices with MNG FW, else wait for IXGBE_UP */
8989         if (ixgbe_mng_enabled(hw) && ixgbe_is_sfp(hw) && hw->mac.ops.setup_link)
8990                 hw->mac.ops.setup_link(hw,
8991                         IXGBE_LINK_SPEED_10GB_FULL | IXGBE_LINK_SPEED_1GB_FULL,
8992                         true);
8993
8994         return 0;
8995
8996 err_register:
8997         ixgbe_release_hw_control(adapter);
8998         ixgbe_clear_interrupt_scheme(adapter);
8999 err_sw_init:
9000         ixgbe_disable_sriov(adapter);
9001         adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
9002         iounmap(adapter->io_addr);
9003         kfree(adapter->mac_table);
9004 err_ioremap:
9005         disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
9006         free_netdev(netdev);
9007 err_alloc_etherdev:
9008         pci_release_selected_regions(pdev,
9009                                      pci_select_bars(pdev, IORESOURCE_MEM));
9010 err_pci_reg:
9011 err_dma:
9012         if (!adapter || disable_dev)
9013                 pci_disable_device(pdev);
9014         return err;
9015 }
9016
9017 /**
9018  * ixgbe_remove - Device Removal Routine
9019  * @pdev: PCI device information struct
9020  *
9021  * ixgbe_remove is called by the PCI subsystem to alert the driver
9022  * that it should release a PCI device.  The could be caused by a
9023  * Hot-Plug event, or because the driver is going to be removed from
9024  * memory.
9025  **/
9026 static void ixgbe_remove(struct pci_dev *pdev)
9027 {
9028         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
9029         struct net_device *netdev;
9030         bool disable_dev;
9031
9032         /* if !adapter then we already cleaned up in probe */
9033         if (!adapter)
9034                 return;
9035
9036         netdev  = adapter->netdev;
9037         ixgbe_dbg_adapter_exit(adapter);
9038
9039         set_bit(__IXGBE_REMOVING, &adapter->state);
9040         cancel_work_sync(&adapter->service_task);
9041
9042
9043 #ifdef CONFIG_IXGBE_DCA
9044         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
9045                 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
9046                 dca_remove_requester(&pdev->dev);
9047                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
9048                                 IXGBE_DCA_CTRL_DCA_DISABLE);
9049         }
9050
9051 #endif
9052 #ifdef CONFIG_IXGBE_HWMON
9053         ixgbe_sysfs_exit(adapter);
9054 #endif /* CONFIG_IXGBE_HWMON */
9055
9056         /* remove the added san mac */
9057         ixgbe_del_sanmac_netdev(netdev);
9058
9059 #ifdef CONFIG_PCI_IOV
9060         ixgbe_disable_sriov(adapter);
9061 #endif
9062         if (netdev->reg_state == NETREG_REGISTERED)
9063                 unregister_netdev(netdev);
9064
9065         ixgbe_clear_interrupt_scheme(adapter);
9066
9067         ixgbe_release_hw_control(adapter);
9068
9069 #ifdef CONFIG_DCB
9070         kfree(adapter->ixgbe_ieee_pfc);
9071         kfree(adapter->ixgbe_ieee_ets);
9072
9073 #endif
9074         iounmap(adapter->io_addr);
9075         pci_release_selected_regions(pdev, pci_select_bars(pdev,
9076                                      IORESOURCE_MEM));
9077
9078         e_dev_info("complete\n");
9079
9080         kfree(adapter->mac_table);
9081         disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
9082         free_netdev(netdev);
9083
9084         pci_disable_pcie_error_reporting(pdev);
9085
9086         if (disable_dev)
9087                 pci_disable_device(pdev);
9088 }
9089
9090 /**
9091  * ixgbe_io_error_detected - called when PCI error is detected
9092  * @pdev: Pointer to PCI device
9093  * @state: The current pci connection state
9094  *
9095  * This function is called after a PCI bus error affecting
9096  * this device has been detected.
9097  */
9098 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
9099                                                 pci_channel_state_t state)
9100 {
9101         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
9102         struct net_device *netdev = adapter->netdev;
9103
9104 #ifdef CONFIG_PCI_IOV
9105         struct ixgbe_hw *hw = &adapter->hw;
9106         struct pci_dev *bdev, *vfdev;
9107         u32 dw0, dw1, dw2, dw3;
9108         int vf, pos;
9109         u16 req_id, pf_func;
9110
9111         if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
9112             adapter->num_vfs == 0)
9113                 goto skip_bad_vf_detection;
9114
9115         bdev = pdev->bus->self;
9116         while (bdev && (pci_pcie_type(bdev) != PCI_EXP_TYPE_ROOT_PORT))
9117                 bdev = bdev->bus->self;
9118
9119         if (!bdev)
9120                 goto skip_bad_vf_detection;
9121
9122         pos = pci_find_ext_capability(bdev, PCI_EXT_CAP_ID_ERR);
9123         if (!pos)
9124                 goto skip_bad_vf_detection;
9125
9126         dw0 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG);
9127         dw1 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 4);
9128         dw2 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 8);
9129         dw3 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 12);
9130         if (ixgbe_removed(hw->hw_addr))
9131                 goto skip_bad_vf_detection;
9132
9133         req_id = dw1 >> 16;
9134         /* On the 82599 if bit 7 of the requestor ID is set then it's a VF */
9135         if (!(req_id & 0x0080))
9136                 goto skip_bad_vf_detection;
9137
9138         pf_func = req_id & 0x01;
9139         if ((pf_func & 1) == (pdev->devfn & 1)) {
9140                 unsigned int device_id;
9141
9142                 vf = (req_id & 0x7F) >> 1;
9143                 e_dev_err("VF %d has caused a PCIe error\n", vf);
9144                 e_dev_err("TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
9145                                 "%8.8x\tdw3: %8.8x\n",
9146                 dw0, dw1, dw2, dw3);
9147                 switch (adapter->hw.mac.type) {
9148                 case ixgbe_mac_82599EB:
9149                         device_id = IXGBE_82599_VF_DEVICE_ID;
9150                         break;
9151                 case ixgbe_mac_X540:
9152                         device_id = IXGBE_X540_VF_DEVICE_ID;
9153                         break;
9154                 case ixgbe_mac_X550:
9155                         device_id = IXGBE_DEV_ID_X550_VF;
9156                         break;
9157                 case ixgbe_mac_X550EM_x:
9158                         device_id = IXGBE_DEV_ID_X550EM_X_VF;
9159                         break;
9160                 default:
9161                         device_id = 0;
9162                         break;
9163                 }
9164
9165                 /* Find the pci device of the offending VF */
9166                 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL, device_id, NULL);
9167                 while (vfdev) {
9168                         if (vfdev->devfn == (req_id & 0xFF))
9169                                 break;
9170                         vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
9171                                                device_id, vfdev);
9172                 }
9173                 /*
9174                  * There's a slim chance the VF could have been hot plugged,
9175                  * so if it is no longer present we don't need to issue the
9176                  * VFLR.  Just clean up the AER in that case.
9177                  */
9178                 if (vfdev) {
9179                         ixgbe_issue_vf_flr(adapter, vfdev);
9180                         /* Free device reference count */
9181                         pci_dev_put(vfdev);
9182                 }
9183
9184                 pci_cleanup_aer_uncorrect_error_status(pdev);
9185         }
9186
9187         /*
9188          * Even though the error may have occurred on the other port
9189          * we still need to increment the vf error reference count for
9190          * both ports because the I/O resume function will be called
9191          * for both of them.
9192          */
9193         adapter->vferr_refcount++;
9194
9195         return PCI_ERS_RESULT_RECOVERED;
9196
9197 skip_bad_vf_detection:
9198 #endif /* CONFIG_PCI_IOV */
9199         if (!test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
9200                 return PCI_ERS_RESULT_DISCONNECT;
9201
9202         rtnl_lock();
9203         netif_device_detach(netdev);
9204
9205         if (state == pci_channel_io_perm_failure) {
9206                 rtnl_unlock();
9207                 return PCI_ERS_RESULT_DISCONNECT;
9208         }
9209
9210         if (netif_running(netdev))
9211                 ixgbe_down(adapter);
9212
9213         if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
9214                 pci_disable_device(pdev);
9215         rtnl_unlock();
9216
9217         /* Request a slot reset. */
9218         return PCI_ERS_RESULT_NEED_RESET;
9219 }
9220
9221 /**
9222  * ixgbe_io_slot_reset - called after the pci bus has been reset.
9223  * @pdev: Pointer to PCI device
9224  *
9225  * Restart the card from scratch, as if from a cold-boot.
9226  */
9227 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
9228 {
9229         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
9230         pci_ers_result_t result;
9231         int err;
9232
9233         if (pci_enable_device_mem(pdev)) {
9234                 e_err(probe, "Cannot re-enable PCI device after reset.\n");
9235                 result = PCI_ERS_RESULT_DISCONNECT;
9236         } else {
9237                 smp_mb__before_atomic();
9238                 clear_bit(__IXGBE_DISABLED, &adapter->state);
9239                 adapter->hw.hw_addr = adapter->io_addr;
9240                 pci_set_master(pdev);
9241                 pci_restore_state(pdev);
9242                 pci_save_state(pdev);
9243
9244                 pci_wake_from_d3(pdev, false);
9245
9246                 ixgbe_reset(adapter);
9247                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
9248                 result = PCI_ERS_RESULT_RECOVERED;
9249         }
9250
9251         err = pci_cleanup_aer_uncorrect_error_status(pdev);
9252         if (err) {
9253                 e_dev_err("pci_cleanup_aer_uncorrect_error_status "
9254                           "failed 0x%0x\n", err);
9255                 /* non-fatal, continue */
9256         }
9257
9258         return result;
9259 }
9260
9261 /**
9262  * ixgbe_io_resume - called when traffic can start flowing again.
9263  * @pdev: Pointer to PCI device
9264  *
9265  * This callback is called when the error recovery driver tells us that
9266  * its OK to resume normal operation.
9267  */
9268 static void ixgbe_io_resume(struct pci_dev *pdev)
9269 {
9270         struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
9271         struct net_device *netdev = adapter->netdev;
9272
9273 #ifdef CONFIG_PCI_IOV
9274         if (adapter->vferr_refcount) {
9275                 e_info(drv, "Resuming after VF err\n");
9276                 adapter->vferr_refcount--;
9277                 return;
9278         }
9279
9280 #endif
9281         if (netif_running(netdev))
9282                 ixgbe_up(adapter);
9283
9284         netif_device_attach(netdev);
9285 }
9286
9287 static const struct pci_error_handlers ixgbe_err_handler = {
9288         .error_detected = ixgbe_io_error_detected,
9289         .slot_reset = ixgbe_io_slot_reset,
9290         .resume = ixgbe_io_resume,
9291 };
9292
9293 static struct pci_driver ixgbe_driver = {
9294         .name     = ixgbe_driver_name,
9295         .id_table = ixgbe_pci_tbl,
9296         .probe    = ixgbe_probe,
9297         .remove   = ixgbe_remove,
9298 #ifdef CONFIG_PM
9299         .suspend  = ixgbe_suspend,
9300         .resume   = ixgbe_resume,
9301 #endif
9302         .shutdown = ixgbe_shutdown,
9303         .sriov_configure = ixgbe_pci_sriov_configure,
9304         .err_handler = &ixgbe_err_handler
9305 };
9306
9307 /**
9308  * ixgbe_init_module - Driver Registration Routine
9309  *
9310  * ixgbe_init_module is the first routine called when the driver is
9311  * loaded. All it does is register with the PCI subsystem.
9312  **/
9313 static int __init ixgbe_init_module(void)
9314 {
9315         int ret;
9316         pr_info("%s - version %s\n", ixgbe_driver_string, ixgbe_driver_version);
9317         pr_info("%s\n", ixgbe_copyright);
9318
9319         ixgbe_dbg_init();
9320
9321         ret = pci_register_driver(&ixgbe_driver);
9322         if (ret) {
9323                 ixgbe_dbg_exit();
9324                 return ret;
9325         }
9326
9327 #ifdef CONFIG_IXGBE_DCA
9328         dca_register_notify(&dca_notifier);
9329 #endif
9330
9331         return 0;
9332 }
9333
9334 module_init(ixgbe_init_module);
9335
9336 /**
9337  * ixgbe_exit_module - Driver Exit Cleanup Routine
9338  *
9339  * ixgbe_exit_module is called just before the driver is removed
9340  * from memory.
9341  **/
9342 static void __exit ixgbe_exit_module(void)
9343 {
9344 #ifdef CONFIG_IXGBE_DCA
9345         dca_unregister_notify(&dca_notifier);
9346 #endif
9347         pci_unregister_driver(&ixgbe_driver);
9348
9349         ixgbe_dbg_exit();
9350 }
9351
9352 #ifdef CONFIG_IXGBE_DCA
9353 static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
9354                             void *p)
9355 {
9356         int ret_val;
9357
9358         ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
9359                                          __ixgbe_notify_dca);
9360
9361         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
9362 }
9363
9364 #endif /* CONFIG_IXGBE_DCA */
9365
9366 module_exit(ixgbe_exit_module);
9367
9368 /* ixgbe_main.c */