drivers/net/ethernet/mellanox/mlx4/en_tx.c

   1 /*
   2  * Copyright (c) 2007 Mellanox Technologies. All rights reserved.
   3  *
   4  * This software is available to you under a choice of one of two
   5  * licenses.  You may choose to be licensed under the terms of the GNU
   6  * General Public License (GPL) Version 2, available from the file
   7  * COPYING in the main directory of this source tree, or the
   8  * OpenIB.org BSD license below:
   9  *
  10  *     Redistribution and use in source and binary forms, with or
  11  *     without modification, are permitted provided that the following
  12  *     conditions are met:
  13  *
  14  *      - Redistributions of source code must retain the above
  15  *        copyright notice, this list of conditions and the following
  16  *        disclaimer.
  17  *
  18  *      - Redistributions in binary form must reproduce the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer in the documentation and/or other materials
  21  *        provided with the distribution.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30  * SOFTWARE.
  31  *
  32  */
  33
  34 #include <asm/page.h>
  35 #include <linux/mlx4/cq.h>
  36 #include <linux/slab.h>
  37 #include <linux/mlx4/qp.h>
  38 #include <linux/skbuff.h>
  39 #include <linux/if_vlan.h>
  40 #include <linux/vmalloc.h>
  41 #include <linux/tcp.h>
  42 #include <linux/ip.h>
  43 #include <linux/moduleparam.h>
  44
  45 #include "mlx4_en.h"
  46
  47 int mlx4_en_create_tx_ring(struct mlx4_en_priv *priv,
  48                            struct mlx4_en_tx_ring **pring, int qpn, u32 size,
  49                            u16 stride, int node, int queue_index)
  50 {
  51         struct mlx4_en_dev *mdev = priv->mdev;
  52         struct mlx4_en_tx_ring *ring;
  53         int tmp;
  54         int err;
  55
  56         ring = kzalloc_node(sizeof(*ring), GFP_KERNEL, node);
  57         if (!ring) {
  58                 ring = kzalloc(sizeof(*ring), GFP_KERNEL);
  59                 if (!ring) {
  60                         en_err(priv, "Failed allocating TX ring\n");
  61                         return -ENOMEM;
  62                 }
  63         }
  64
  65         ring->size = size;
  66         ring->size_mask = size - 1;
  67         ring->stride = stride;
  68         ring->inline_thold = priv->prof->inline_thold;
  69
  70         tmp = size * sizeof(struct mlx4_en_tx_info);
  71         ring->tx_info = vmalloc_node(tmp, node);
  72         if (!ring->tx_info) {
  73                 ring->tx_info = vmalloc(tmp);
  74                 if (!ring->tx_info) {
  75                         err = -ENOMEM;
  76                         goto err_ring;
  77                 }
  78         }
  79
  80         en_dbg(DRV, priv, "Allocated tx_info ring at addr:%p size:%d\n",
  81                  ring->tx_info, tmp);
  82
  83         ring->bounce_buf = kmalloc_node(MAX_DESC_SIZE, GFP_KERNEL, node);
  84         if (!ring->bounce_buf) {
  85                 ring->bounce_buf = kmalloc(MAX_DESC_SIZE, GFP_KERNEL);
  86                 if (!ring->bounce_buf) {
  87                         err = -ENOMEM;
  88                         goto err_info;
  89                 }
  90         }
  91         ring->buf_size = ALIGN(size * ring->stride, MLX4_EN_PAGE_SIZE);
  92
  93         /* Allocate HW buffers on provided NUMA node */
  94         set_dev_node(&mdev->dev->pdev->dev, node);
  95         err = mlx4_alloc_hwq_res(mdev->dev, &ring->wqres, ring->buf_size,
  96                                  2 * PAGE_SIZE);
  97         set_dev_node(&mdev->dev->pdev->dev, mdev->dev->numa_node);
  98         if (err) {
  99                 en_err(priv, "Failed allocating hwq resources\n");
 100                 goto err_bounce;
 101         }
 102
 103         err = mlx4_en_map_buffer(&ring->wqres.buf);
 104         if (err) {
 105                 en_err(priv, "Failed to map TX buffer\n");
 106                 goto err_hwq_res;
 107         }
 108
 109         ring->buf = ring->wqres.buf.direct.buf;
 110
 111         en_dbg(DRV, priv, "Allocated TX ring (addr:%p) - buf:%p size:%d buf_size:%d dma:%llx\n",
 112                ring, ring->buf, ring->size, ring->buf_size,
 113                (unsigned long long) ring->wqres.buf.direct.map);
 114
 115         ring->qpn = qpn;
 116         err = mlx4_qp_alloc(mdev->dev, ring->qpn, &ring->qp, GFP_KERNEL);
 117         if (err) {
 118                 en_err(priv, "Failed allocating qp %d\n", ring->qpn);
 119                 goto err_map;
 120         }
 121         ring->qp.event = mlx4_en_sqp_event;
 122
 123         err = mlx4_bf_alloc(mdev->dev, &ring->bf, node);
 124         if (err) {
 125                 en_dbg(DRV, priv, "working without blueflame (%d)\n", err);
 126                 ring->bf.uar = &mdev->priv_uar;
 127                 ring->bf.uar->map = mdev->uar_map;
 128                 ring->bf_enabled = false;
 129                 ring->bf_alloced = false;
 130                 priv->pflags &= ~MLX4_EN_PRIV_FLAGS_BLUEFLAME;
 131         } else {
 132                 ring->bf_alloced = true;
 133                 ring->bf_enabled = !!(priv->pflags &
 134                                       MLX4_EN_PRIV_FLAGS_BLUEFLAME);
 135         }
 136
 137         ring->hwtstamp_tx_type = priv->hwtstamp_config.tx_type;
 138         ring->queue_index = queue_index;
 139
 140         if (queue_index < priv->num_tx_rings_p_up && cpu_online(queue_index))
 141                 cpumask_set_cpu(queue_index, &ring->affinity_mask);
 142
 143         *pring = ring;
 144         return 0;
 145
 146 err_map:
 147         mlx4_en_unmap_buffer(&ring->wqres.buf);
 148 err_hwq_res:
 149         mlx4_free_hwq_res(mdev->dev, &ring->wqres, ring->buf_size);
 150 err_bounce:
 151         kfree(ring->bounce_buf);
 152         ring->bounce_buf = NULL;
 153 err_info:
 154         vfree(ring->tx_info);
 155         ring->tx_info = NULL;
 156 err_ring:
 157         kfree(ring);
 158         *pring = NULL;
 159         return err;
 160 }
 161
 162 void mlx4_en_destroy_tx_ring(struct mlx4_en_priv *priv,
 163                              struct mlx4_en_tx_ring **pring)
 164 {
 165         struct mlx4_en_dev *mdev = priv->mdev;
 166         struct mlx4_en_tx_ring *ring = *pring;
 167         en_dbg(DRV, priv, "Destroying tx ring, qpn: %d\n", ring->qpn);
 168
 169         if (ring->bf_alloced)
 170                 mlx4_bf_free(mdev->dev, &ring->bf);
 171         mlx4_qp_remove(mdev->dev, &ring->qp);
 172         mlx4_qp_free(mdev->dev, &ring->qp);
 173         mlx4_en_unmap_buffer(&ring->wqres.buf);
 174         mlx4_free_hwq_res(mdev->dev, &ring->wqres, ring->buf_size);
 175         kfree(ring->bounce_buf);
 176         ring->bounce_buf = NULL;
 177         vfree(ring->tx_info);
 178         ring->tx_info = NULL;
 179         kfree(ring);
 180         *pring = NULL;
 181 }
 182
 183 int mlx4_en_activate_tx_ring(struct mlx4_en_priv *priv,
 184                              struct mlx4_en_tx_ring *ring,
 185                              int cq, int user_prio)
 186 {
 187         struct mlx4_en_dev *mdev = priv->mdev;
 188         int err;
 189
 190         ring->cqn = cq;
 191         ring->prod = 0;
 192         ring->cons = 0xffffffff;
 193         ring->last_nr_txbb = 1;
 194         ring->poll_cnt = 0;
 195         memset(ring->tx_info, 0, ring->size * sizeof(struct mlx4_en_tx_info));
 196         memset(ring->buf, 0, ring->buf_size);
 197
 198         ring->qp_state = MLX4_QP_STATE_RST;
 199         ring->doorbell_qpn = ring->qp.qpn << 8;
 200
 201         mlx4_en_fill_qp_context(priv, ring->size, ring->stride, 1, 0, ring->qpn,
 202                                 ring->cqn, user_prio, &ring->context);
 203         if (ring->bf_alloced)
 204                 ring->context.usr_page = cpu_to_be32(ring->bf.uar->index);
 205
 206         err = mlx4_qp_to_ready(mdev->dev, &ring->wqres.mtt, &ring->context,
 207                                &ring->qp, &ring->qp_state);
 208         if (!user_prio && cpu_online(ring->queue_index))
 209                 netif_set_xps_queue(priv->dev, &ring->affinity_mask,
 210                                     ring->queue_index);
 211
 212         return err;
 213 }
 214
 215 void mlx4_en_deactivate_tx_ring(struct mlx4_en_priv *priv,
 216                                 struct mlx4_en_tx_ring *ring)
 217 {
 218         struct mlx4_en_dev *mdev = priv->mdev;
 219
 220         mlx4_qp_modify(mdev->dev, NULL, ring->qp_state,
 221                        MLX4_QP_STATE_RST, NULL, 0, 0, &ring->qp);
 222 }
 223
 224 static void mlx4_en_stamp_wqe(struct mlx4_en_priv *priv,
 225                               struct mlx4_en_tx_ring *ring, int index,
 226                               u8 owner)
 227 {
 228         __be32 stamp = cpu_to_be32(STAMP_VAL | (!!owner << STAMP_SHIFT));
 229         struct mlx4_en_tx_desc *tx_desc = ring->buf + index * TXBB_SIZE;
 230         struct mlx4_en_tx_info *tx_info = &ring->tx_info[index];
 231         void *end = ring->buf + ring->buf_size;
 232         __be32 *ptr = (__be32 *)tx_desc;
 233         int i;
 234
 235         /* Optimize the common case when there are no wraparounds */
 236         if (likely((void *)tx_desc + tx_info->nr_txbb * TXBB_SIZE <= end)) {
 237                 /* Stamp the freed descriptor */
 238                 for (i = 0; i < tx_info->nr_txbb * TXBB_SIZE;
 239                      i += STAMP_STRIDE) {
 240                         *ptr = stamp;
 241                         ptr += STAMP_DWORDS;
 242                 }
 243         } else {
 244                 /* Stamp the freed descriptor */
 245                 for (i = 0; i < tx_info->nr_txbb * TXBB_SIZE;
 246                      i += STAMP_STRIDE) {
 247                         *ptr = stamp;
 248                         ptr += STAMP_DWORDS;
 249                         if ((void *)ptr >= end) {
 250                                 ptr = ring->buf;
 251                                 stamp ^= cpu_to_be32(0x80000000);
 252                         }
 253                 }
 254         }
 255 }
 256
 257
 258 static u32 mlx4_en_free_tx_desc(struct mlx4_en_priv *priv,
 259                                 struct mlx4_en_tx_ring *ring,
 260                                 int index, u8 owner, u64 timestamp)
 261 {
 262         struct mlx4_en_dev *mdev = priv->mdev;
 263         struct mlx4_en_tx_info *tx_info = &ring->tx_info[index];
 264         struct mlx4_en_tx_desc *tx_desc = ring->buf + index * TXBB_SIZE;
 265         struct mlx4_wqe_data_seg *data = (void *) tx_desc + tx_info->data_offset;
 266         struct sk_buff *skb = tx_info->skb;
 267         struct skb_frag_struct *frag;
 268         void *end = ring->buf + ring->buf_size;
 269         int frags = skb_shinfo(skb)->nr_frags;
 270         int i;
 271         struct skb_shared_hwtstamps hwts;
 272
 273         if (timestamp) {
 274                 mlx4_en_fill_hwtstamps(mdev, &hwts, timestamp);
 275                 skb_tstamp_tx(skb, &hwts);
 276         }
 277
 278         /* Optimize the common case when there are no wraparounds */
 279         if (likely((void *) tx_desc + tx_info->nr_txbb * TXBB_SIZE <= end)) {
 280                 if (!tx_info->inl) {
 281                         if (tx_info->linear) {
 282                                 dma_unmap_single(priv->ddev,
 283                                         (dma_addr_t) be64_to_cpu(data->addr),
 284                                          be32_to_cpu(data->byte_count),
 285                                          PCI_DMA_TODEVICE);
 286                                 ++data;
 287                         }
 288
 289                         for (i = 0; i < frags; i++) {
 290                                 frag = &skb_shinfo(skb)->frags[i];
 291                                 dma_unmap_page(priv->ddev,
 292                                         (dma_addr_t) be64_to_cpu(data[i].addr),
 293                                         skb_frag_size(frag), PCI_DMA_TODEVICE);
 294                         }
 295                 }
 296         } else {
 297                 if (!tx_info->inl) {
 298                         if ((void *) data >= end) {
 299                                 data = ring->buf + ((void *)data - end);
 300                         }
 301
 302                         if (tx_info->linear) {
 303                                 dma_unmap_single(priv->ddev,
 304                                         (dma_addr_t) be64_to_cpu(data->addr),
 305                                          be32_to_cpu(data->byte_count),
 306                                          PCI_DMA_TODEVICE);
 307                                 ++data;
 308                         }
 309
 310                         for (i = 0; i < frags; i++) {
 311                                 /* Check for wraparound before unmapping */
 312                                 if ((void *) data >= end)
 313                                         data = ring->buf;
 314                                 frag = &skb_shinfo(skb)->frags[i];
 315                                 dma_unmap_page(priv->ddev,
 316                                         (dma_addr_t) be64_to_cpu(data->addr),
 317                                          skb_frag_size(frag), PCI_DMA_TODEVICE);
 318                                 ++data;
 319                         }
 320                 }
 321         }
 322         dev_kfree_skb_any(skb);
 323         return tx_info->nr_txbb;
 324 }
 325
 326
 327 int mlx4_en_free_tx_buf(struct net_device *dev, struct mlx4_en_tx_ring *ring)
 328 {
 329         struct mlx4_en_priv *priv = netdev_priv(dev);
 330         int cnt = 0;
 331
 332         /* Skip last polled descriptor */
 333         ring->cons += ring->last_nr_txbb;
 334         en_dbg(DRV, priv, "Freeing Tx buf - cons:0x%x prod:0x%x\n",
 335                  ring->cons, ring->prod);
 336
 337         if ((u32) (ring->prod - ring->cons) > ring->size) {
 338                 if (netif_msg_tx_err(priv))
 339                         en_warn(priv, "Tx consumer passed producer!\n");
 340                 return 0;
 341         }
 342
 343         while (ring->cons != ring->prod) {
 344                 ring->last_nr_txbb = mlx4_en_free_tx_desc(priv, ring,
 345                                                 ring->cons & ring->size_mask,
 346                                                 !!(ring->cons & ring->size), 0);
 347                 ring->cons += ring->last_nr_txbb;
 348                 cnt++;
 349         }
 350
 351         netdev_tx_reset_queue(ring->tx_queue);
 352
 353         if (cnt)
 354                 en_dbg(DRV, priv, "Freed %d uncompleted tx descriptors\n", cnt);
 355
 356         return cnt;
 357 }
 358
 359 static bool mlx4_en_process_tx_cq(struct net_device *dev,
 360                                  struct mlx4_en_cq *cq)
 361 {
 362         struct mlx4_en_priv *priv = netdev_priv(dev);
 363         struct mlx4_cq *mcq = &cq->mcq;
 364         struct mlx4_en_tx_ring *ring = priv->tx_ring[cq->ring];
 365         struct mlx4_cqe *cqe;
 366         u16 index;
 367         u16 new_index, ring_index, stamp_index;
 368         u32 txbbs_skipped = 0;
 369         u32 txbbs_stamp = 0;
 370         u32 cons_index = mcq->cons_index;
 371         int size = cq->size;
 372         u32 size_mask = ring->size_mask;
 373         struct mlx4_cqe *buf = cq->buf;
 374         u32 packets = 0;
 375         u32 bytes = 0;
 376         int factor = priv->cqe_factor;
 377         u64 timestamp = 0;
 378         int done = 0;
 379         int budget = priv->tx_work_limit;
 380
 381         if (!priv->port_up)
 382                 return true;
 383
 384         index = cons_index & size_mask;
 385         cqe = &buf[(index << factor) + factor];
 386         ring_index = ring->cons & size_mask;
 387         stamp_index = ring_index;
 388
 389         /* Process all completed CQEs */
 390         while (XNOR(cqe->owner_sr_opcode & MLX4_CQE_OWNER_MASK,
 391                         cons_index & size) && (done < budget)) {
 392                 /*
 393                  * make sure we read the CQE after we read the
 394                  * ownership bit
 395                  */
 396                 rmb();
 397
 398                 if (unlikely((cqe->owner_sr_opcode & MLX4_CQE_OPCODE_MASK) ==
 399                              MLX4_CQE_OPCODE_ERROR)) {
 400                         struct mlx4_err_cqe *cqe_err = (struct mlx4_err_cqe *)cqe;
 401
 402                         en_err(priv, "CQE error - vendor syndrome: 0x%x syndrome: 0x%x\n",
 403                                cqe_err->vendor_err_syndrome,
 404                                cqe_err->syndrome);
 405                 }
 406
 407                 /* Skip over last polled CQE */
 408                 new_index = be16_to_cpu(cqe->wqe_index) & size_mask;
 409
 410                 do {
 411                         txbbs_skipped += ring->last_nr_txbb;
 412                         ring_index = (ring_index + ring->last_nr_txbb) & size_mask;
 413                         if (ring->tx_info[ring_index].ts_requested)
 414                                 timestamp = mlx4_en_get_cqe_ts(cqe);
 415
 416                         /* free next descriptor */
 417                         ring->last_nr_txbb = mlx4_en_free_tx_desc(
 418                                         priv, ring, ring_index,
 419                                         !!((ring->cons + txbbs_skipped) &
 420                                         ring->size), timestamp);
 421
 422                         mlx4_en_stamp_wqe(priv, ring, stamp_index,
 423                                           !!((ring->cons + txbbs_stamp) &
 424                                                 ring->size));
 425                         stamp_index = ring_index;
 426                         txbbs_stamp = txbbs_skipped;
 427                         packets++;
 428                         bytes += ring->tx_info[ring_index].nr_bytes;
 429                 } while ((++done < budget) && (ring_index != new_index));
 430
 431                 ++cons_index;
 432                 index = cons_index & size_mask;
 433                 cqe = &buf[(index << factor) + factor];
 434         }
 435
 436
 437         /*
 438          * To prevent CQ overflow we first update CQ consumer and only then
 439          * the ring consumer.
 440          */
 441         mcq->cons_index = cons_index;
 442         mlx4_cq_set_ci(mcq);
 443         wmb();
 444         ring->cons += txbbs_skipped;
 445         netdev_tx_completed_queue(ring->tx_queue, packets, bytes);
 446
 447         /*
 448          * Wakeup Tx queue if this stopped, and at least 1 packet
 449          * was completed
 450          */
 451         if (netif_tx_queue_stopped(ring->tx_queue) && txbbs_skipped > 0) {
 452                 netif_tx_wake_queue(ring->tx_queue);
 453                 ring->wake_queue++;
 454         }
 455         return done < budget;
 456 }
 457
 458 void mlx4_en_tx_irq(struct mlx4_cq *mcq)
 459 {
 460         struct mlx4_en_cq *cq = container_of(mcq, struct mlx4_en_cq, mcq);
 461         struct mlx4_en_priv *priv = netdev_priv(cq->dev);
 462
 463         if (priv->port_up)
 464                 napi_schedule(&cq->napi);
 465         else
 466                 mlx4_en_arm_cq(priv, cq);
 467 }
 468
 469 /* TX CQ polling - called by NAPI */
 470 int mlx4_en_poll_tx_cq(struct napi_struct *napi, int budget)
 471 {
 472         struct mlx4_en_cq *cq = container_of(napi, struct mlx4_en_cq, napi);
 473         struct net_device *dev = cq->dev;
 474         struct mlx4_en_priv *priv = netdev_priv(dev);
 475         int clean_complete;
 476
 477         clean_complete = mlx4_en_process_tx_cq(dev, cq);
 478         if (!clean_complete)
 479                 return budget;
 480
 481         napi_complete(napi);
 482         mlx4_en_arm_cq(priv, cq);
 483
 484         return 0;
 485 }
 486
 487 static struct mlx4_en_tx_desc *mlx4_en_bounce_to_desc(struct mlx4_en_priv *priv,
 488                                                       struct mlx4_en_tx_ring *ring,
 489                                                       u32 index,
 490                                                       unsigned int desc_size)
 491 {
 492         u32 copy = (ring->size - index) * TXBB_SIZE;
 493         int i;
 494
 495         for (i = desc_size - copy - 4; i >= 0; i -= 4) {
 496                 if ((i & (TXBB_SIZE - 1)) == 0)
 497                         wmb();
 498
 499                 *((u32 *) (ring->buf + i)) =
 500                         *((u32 *) (ring->bounce_buf + copy + i));
 501         }
 502
 503         for (i = copy - 4; i >= 4 ; i -= 4) {
 504                 if ((i & (TXBB_SIZE - 1)) == 0)
 505                         wmb();
 506
 507                 *((u32 *) (ring->buf + index * TXBB_SIZE + i)) =
 508                         *((u32 *) (ring->bounce_buf + i));
 509         }
 510
 511         /* Return real descriptor location */
 512         return ring->buf + index * TXBB_SIZE;
 513 }
 514
 515 static int is_inline(int inline_thold, struct sk_buff *skb, void **pfrag)
 516 {
 517         void *ptr;
 518
 519         if (inline_thold && !skb_is_gso(skb) && skb->len <= inline_thold) {
 520                 if (skb_shinfo(skb)->nr_frags == 1) {
 521                         ptr = skb_frag_address_safe(&skb_shinfo(skb)->frags[0]);
 522                         if (unlikely(!ptr))
 523                                 return 0;
 524
 525                         if (pfrag)
 526                                 *pfrag = ptr;
 527
 528                         return 1;
 529                 } else if (unlikely(skb_shinfo(skb)->nr_frags))
 530                         return 0;
 531                 else
 532                         return 1;
 533         }
 534
 535         return 0;
 536 }
 537
 538 static int inline_size(struct sk_buff *skb)
 539 {
 540         if (skb->len + CTRL_SIZE + sizeof(struct mlx4_wqe_inline_seg)
 541             <= MLX4_INLINE_ALIGN)
 542                 return ALIGN(skb->len + CTRL_SIZE +
 543                              sizeof(struct mlx4_wqe_inline_seg), 16);
 544         else
 545                 return ALIGN(skb->len + CTRL_SIZE + 2 *
 546                              sizeof(struct mlx4_wqe_inline_seg), 16);
 547 }
 548
 549 static int get_real_size(struct sk_buff *skb, struct net_device *dev,
 550                          int *lso_header_size)
 551 {
 552         struct mlx4_en_priv *priv = netdev_priv(dev);
 553         int real_size;
 554
 555         if (skb_is_gso(skb)) {
 556                 if (skb->encapsulation)
 557                         *lso_header_size = (skb_inner_transport_header(skb) - skb->data) + inner_tcp_hdrlen(skb);
 558                 else
 559                         *lso_header_size = skb_transport_offset(skb) + tcp_hdrlen(skb);
 560                 real_size = CTRL_SIZE + skb_shinfo(skb)->nr_frags * DS_SIZE +
 561                         ALIGN(*lso_header_size + 4, DS_SIZE);
 562                 if (unlikely(*lso_header_size != skb_headlen(skb))) {
 563                         /* We add a segment for the skb linear buffer only if
 564                          * it contains data */
 565                         if (*lso_header_size < skb_headlen(skb))
 566                                 real_size += DS_SIZE;
 567                         else {
 568                                 if (netif_msg_tx_err(priv))
 569                                         en_warn(priv, "Non-linear headers\n");
 570                                 return 0;
 571                         }
 572                 }
 573         } else {
 574                 *lso_header_size = 0;
 575                 if (!is_inline(priv->prof->inline_thold, skb, NULL))
 576                         real_size = CTRL_SIZE + (skb_shinfo(skb)->nr_frags + 1) * DS_SIZE;
 577                 else
 578                         real_size = inline_size(skb);
 579         }
 580
 581         return real_size;
 582 }
 583
 584 static void build_inline_wqe(struct mlx4_en_tx_desc *tx_desc, struct sk_buff *skb,
 585                              int real_size, u16 *vlan_tag, int tx_ind, void *fragptr)
 586 {
 587         struct mlx4_wqe_inline_seg *inl = &tx_desc->inl;
 588         int spc = MLX4_INLINE_ALIGN - CTRL_SIZE - sizeof *inl;
 589
 590         if (skb->len <= spc) {
 591                 if (likely(skb->len >= MIN_PKT_LEN)) {
 592                         inl->byte_count = cpu_to_be32(1 << 31 | skb->len);
 593                 } else {
 594                         inl->byte_count = cpu_to_be32(1 << 31 | MIN_PKT_LEN);
 595                         memset(((void *)(inl + 1)) + skb->len, 0,
 596                                MIN_PKT_LEN - skb->len);
 597                 }
 598                 skb_copy_from_linear_data(skb, inl + 1, skb_headlen(skb));
 599                 if (skb_shinfo(skb)->nr_frags)
 600                         memcpy(((void *)(inl + 1)) + skb_headlen(skb), fragptr,
 601                                skb_frag_size(&skb_shinfo(skb)->frags[0]));
 602
 603         } else {
 604                 inl->byte_count = cpu_to_be32(1 << 31 | spc);
 605                 if (skb_headlen(skb) <= spc) {
 606                         skb_copy_from_linear_data(skb, inl + 1, skb_headlen(skb));
 607                         if (skb_headlen(skb) < spc) {
 608                                 memcpy(((void *)(inl + 1)) + skb_headlen(skb),
 609                                         fragptr, spc - skb_headlen(skb));
 610                                 fragptr +=  spc - skb_headlen(skb);
 611                         }
 612                         inl = (void *) (inl + 1) + spc;
 613                         memcpy(((void *)(inl + 1)), fragptr, skb->len - spc);
 614                 } else {
 615                         skb_copy_from_linear_data(skb, inl + 1, spc);
 616                         inl = (void *) (inl + 1) + spc;
 617                         skb_copy_from_linear_data_offset(skb, spc, inl + 1,
 618                                         skb_headlen(skb) - spc);
 619                         if (skb_shinfo(skb)->nr_frags)
 620                                 memcpy(((void *)(inl + 1)) + skb_headlen(skb) - spc,
 621                                         fragptr, skb_frag_size(&skb_shinfo(skb)->frags[0]));
 622                 }
 623
 624                 wmb();
 625                 inl->byte_count = cpu_to_be32(1 << 31 | (skb->len - spc));
 626         }
 627 }
 628
 629 u16 mlx4_en_select_queue(struct net_device *dev, struct sk_buff *skb,
 630                          void *accel_priv, select_queue_fallback_t fallback)
 631 {
 632         struct mlx4_en_priv *priv = netdev_priv(dev);
 633         u16 rings_p_up = priv->num_tx_rings_p_up;
 634         u8 up = 0;
 635
 636         if (dev->num_tc)
 637                 return skb_tx_hash(dev, skb);
 638
 639         if (vlan_tx_tag_present(skb))
 640                 up = vlan_tx_tag_get(skb) >> VLAN_PRIO_SHIFT;
 641
 642         return fallback(dev, skb) % rings_p_up + up * rings_p_up;
 643 }
 644
 645 static void mlx4_bf_copy(void __iomem *dst, unsigned long *src, unsigned bytecnt)
 646 {
 647         __iowrite64_copy(dst, src, bytecnt / 8);
 648 }
 649
 650 netdev_tx_t mlx4_en_xmit(struct sk_buff *skb, struct net_device *dev)
 651 {
 652         struct mlx4_en_priv *priv = netdev_priv(dev);
 653         struct mlx4_en_dev *mdev = priv->mdev;
 654         struct device *ddev = priv->ddev;
 655         struct mlx4_en_tx_ring *ring;
 656         struct mlx4_en_tx_desc *tx_desc;
 657         struct mlx4_wqe_data_seg *data;
 658         struct mlx4_en_tx_info *tx_info;
 659         int tx_ind = 0;
 660         int nr_txbb;
 661         int desc_size;
 662         int real_size;
 663         u32 index, bf_index;
 664         __be32 op_own;
 665         u16 vlan_tag = 0;
 666         int i;
 667         int lso_header_size;
 668         void *fragptr;
 669         bool bounce = false;
 670
 671         if (!priv->port_up)
 672                 goto tx_drop;
 673
 674         real_size = get_real_size(skb, dev, &lso_header_size);
 675         if (unlikely(!real_size))
 676                 goto tx_drop;
 677
 678         /* Align descriptor to TXBB size */
 679         desc_size = ALIGN(real_size, TXBB_SIZE);
 680         nr_txbb = desc_size / TXBB_SIZE;
 681         if (unlikely(nr_txbb > MAX_DESC_TXBBS)) {
 682                 if (netif_msg_tx_err(priv))
 683                         en_warn(priv, "Oversized header or SG list\n");
 684                 goto tx_drop;
 685         }
 686
 687         tx_ind = skb->queue_mapping;
 688         ring = priv->tx_ring[tx_ind];
 689         if (vlan_tx_tag_present(skb))
 690                 vlan_tag = vlan_tx_tag_get(skb);
 691
 692         /* Check available TXBBs And 2K spare for prefetch */
 693         if (unlikely(((int)(ring->prod - ring->cons)) >
 694                      ring->size - HEADROOM - MAX_DESC_TXBBS)) {
 695                 /* every full Tx ring stops queue */
 696                 netif_tx_stop_queue(ring->tx_queue);
 697                 ring->queue_stopped++;
 698
 699                 /* If queue was emptied after the if, and before the
 700                  * stop_queue - need to wake the queue, or else it will remain
 701                  * stopped forever.
 702                  * Need a memory barrier to make sure ring->cons was not
 703                  * updated before queue was stopped.
 704                  */
 705                 wmb();
 706
 707                 if (unlikely(((int)(ring->prod - ring->cons)) <=
 708                              ring->size - HEADROOM - MAX_DESC_TXBBS)) {
 709                         netif_tx_wake_queue(ring->tx_queue);
 710                         ring->wake_queue++;
 711                 } else {
 712                         return NETDEV_TX_BUSY;
 713                 }
 714         }
 715
 716         /* Track current inflight packets for performance analysis */
 717         AVG_PERF_COUNTER(priv->pstats.inflight_avg,
 718                          (u32) (ring->prod - ring->cons - 1));
 719
 720         /* Packet is good - grab an index and transmit it */
 721         index = ring->prod & ring->size_mask;
 722         bf_index = ring->prod;
 723
 724         /* See if we have enough space for whole descriptor TXBB for setting
 725          * SW ownership on next descriptor; if not, use a bounce buffer. */
 726         if (likely(index + nr_txbb <= ring->size))
 727                 tx_desc = ring->buf + index * TXBB_SIZE;
 728         else {
 729                 tx_desc = (struct mlx4_en_tx_desc *) ring->bounce_buf;
 730                 bounce = true;
 731         }
 732
 733         /* Save skb in tx_info ring */
 734         tx_info = &ring->tx_info[index];
 735         tx_info->skb = skb;
 736         tx_info->nr_txbb = nr_txbb;
 737
 738         if (lso_header_size)
 739                 data = ((void *)&tx_desc->lso + ALIGN(lso_header_size + 4,
 740                                                       DS_SIZE));
 741         else
 742                 data = &tx_desc->data;
 743
 744         /* valid only for none inline segments */
 745         tx_info->data_offset = (void *)data - (void *)tx_desc;
 746
 747         tx_info->linear = (lso_header_size < skb_headlen(skb) &&
 748                            !is_inline(ring->inline_thold, skb, NULL)) ? 1 : 0;
 749
 750         data += skb_shinfo(skb)->nr_frags + tx_info->linear - 1;
 751
 752         if (is_inline(ring->inline_thold, skb, &fragptr)) {
 753                 tx_info->inl = 1;
 754         } else {
 755                 /* Map fragments */
 756                 for (i = skb_shinfo(skb)->nr_frags - 1; i >= 0; i--) {
 757                         struct skb_frag_struct *frag;
 758                         dma_addr_t dma;
 759
 760                         frag = &skb_shinfo(skb)->frags[i];
 761                         dma = skb_frag_dma_map(ddev, frag,
 762                                                0, skb_frag_size(frag),
 763                                                DMA_TO_DEVICE);
 764                         if (dma_mapping_error(ddev, dma))
 765                                 goto tx_drop_unmap;
 766
 767                         data->addr = cpu_to_be64(dma);
 768                         data->lkey = cpu_to_be32(mdev->mr.key);
 769                         wmb();
 770                         data->byte_count = cpu_to_be32(skb_frag_size(frag));
 771                         --data;
 772                 }
 773
 774                 /* Map linear part */
 775                 if (tx_info->linear) {
 776                         u32 byte_count = skb_headlen(skb) - lso_header_size;
 777                         dma_addr_t dma;
 778
 779                         dma = dma_map_single(ddev, skb->data +
 780                                              lso_header_size, byte_count,
 781                                              PCI_DMA_TODEVICE);
 782                         if (dma_mapping_error(ddev, dma))
 783                                 goto tx_drop_unmap;
 784
 785                         data->addr = cpu_to_be64(dma);
 786                         data->lkey = cpu_to_be32(mdev->mr.key);
 787                         wmb();
 788                         data->byte_count = cpu_to_be32(byte_count);
 789                 }
 790                 tx_info->inl = 0;
 791         }
 792
 793         /*
 794          * For timestamping add flag to skb_shinfo and
 795          * set flag for further reference
 796          */
 797         if (ring->hwtstamp_tx_type == HWTSTAMP_TX_ON &&
 798             skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) {
 799                 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
 800                 tx_info->ts_requested = 1;
 801         }
 802
 803         /* Prepare ctrl segement apart opcode+ownership, which depends on
 804          * whether LSO is used */
 805         tx_desc->ctrl.vlan_tag = cpu_to_be16(vlan_tag);
 806         tx_desc->ctrl.ins_vlan = MLX4_WQE_CTRL_INS_VLAN *
 807                 !!vlan_tx_tag_present(skb);
 808         tx_desc->ctrl.fence_size = (real_size / 16) & 0x3f;
 809         tx_desc->ctrl.srcrb_flags = priv->ctrl_flags;
 810         if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
 811                 tx_desc->ctrl.srcrb_flags |= cpu_to_be32(MLX4_WQE_CTRL_IP_CSUM |
 812                                                          MLX4_WQE_CTRL_TCP_UDP_CSUM);
 813                 ring->tx_csum++;
 814         }
 815
 816         if (priv->flags & MLX4_EN_FLAG_ENABLE_HW_LOOPBACK) {
 817                 struct ethhdr *ethh;
 818
 819                 /* Copy dst mac address to wqe. This allows loopback in eSwitch,
 820                  * so that VFs and PF can communicate with each other
 821                  */
 822                 ethh = (struct ethhdr *)skb->data;
 823                 tx_desc->ctrl.srcrb_flags16[0] = get_unaligned((__be16 *)ethh->h_dest);
 824                 tx_desc->ctrl.imm = get_unaligned((__be32 *)(ethh->h_dest + 2));
 825         }
 826
 827         /* Handle LSO (TSO) packets */
 828         if (lso_header_size) {
 829                 /* Mark opcode as LSO */
 830                 op_own = cpu_to_be32(MLX4_OPCODE_LSO | (1 << 6)) |
 831                         ((ring->prod & ring->size) ?
 832                                 cpu_to_be32(MLX4_EN_BIT_DESC_OWN) : 0);
 833
 834                 /* Fill in the LSO prefix */
 835                 tx_desc->lso.mss_hdr_size = cpu_to_be32(
 836                         skb_shinfo(skb)->gso_size << 16 | lso_header_size);
 837
 838                 /* Copy headers;
 839                  * note that we already verified that it is linear */
 840                 memcpy(tx_desc->lso.header, skb->data, lso_header_size);
 841
 842                 priv->port_stats.tso_packets++;
 843                 i = ((skb->len - lso_header_size) / skb_shinfo(skb)->gso_size) +
 844                         !!((skb->len - lso_header_size) % skb_shinfo(skb)->gso_size);
 845                 tx_info->nr_bytes = skb->len + (i - 1) * lso_header_size;
 846                 ring->packets += i;
 847         } else {
 848                 /* Normal (Non LSO) packet */
 849                 op_own = cpu_to_be32(MLX4_OPCODE_SEND) |
 850                         ((ring->prod & ring->size) ?
 851                          cpu_to_be32(MLX4_EN_BIT_DESC_OWN) : 0);
 852                 tx_info->nr_bytes = max_t(unsigned int, skb->len, ETH_ZLEN);
 853                 ring->packets++;
 854
 855         }
 856         ring->bytes += tx_info->nr_bytes;
 857         netdev_tx_sent_queue(ring->tx_queue, tx_info->nr_bytes);
 858         AVG_PERF_COUNTER(priv->pstats.tx_pktsz_avg, skb->len);
 859
 860         if (tx_info->inl) {
 861                 build_inline_wqe(tx_desc, skb, real_size, &vlan_tag, tx_ind, fragptr);
 862                 tx_info->inl = 1;
 863         }
 864
 865         if (skb->encapsulation) {
 866                 struct iphdr *ipv4 = (struct iphdr *)skb_inner_network_header(skb);
 867                 if (ipv4->protocol == IPPROTO_TCP || ipv4->protocol == IPPROTO_UDP)
 868                         op_own |= cpu_to_be32(MLX4_WQE_CTRL_IIP | MLX4_WQE_CTRL_ILP);
 869                 else
 870                         op_own |= cpu_to_be32(MLX4_WQE_CTRL_IIP);
 871         }
 872
 873         ring->prod += nr_txbb;
 874
 875         /* If we used a bounce buffer then copy descriptor back into place */
 876         if (bounce)
 877                 tx_desc = mlx4_en_bounce_to_desc(priv, ring, index, desc_size);
 878
 879         skb_tx_timestamp(skb);
 880
 881         if (ring->bf_enabled && desc_size <= MAX_BF && !bounce && !vlan_tx_tag_present(skb)) {
 882                 tx_desc->ctrl.bf_qpn |= cpu_to_be32(ring->doorbell_qpn);
 883
 884                 op_own |= htonl((bf_index & 0xffff) << 8);
 885                 /* Ensure new descirptor hits memory
 886                 * before setting ownership of this descriptor to HW */
 887                 wmb();
 888                 tx_desc->ctrl.owner_opcode = op_own;
 889
 890                 wmb();
 891
 892                 mlx4_bf_copy(ring->bf.reg + ring->bf.offset, (unsigned long *) &tx_desc->ctrl,
 893                      desc_size);
 894
 895                 wmb();
 896
 897                 ring->bf.offset ^= ring->bf.buf_size;
 898         } else {
 899                 /* Ensure new descirptor hits memory
 900                 * before setting ownership of this descriptor to HW */
 901                 wmb();
 902                 tx_desc->ctrl.owner_opcode = op_own;
 903                 wmb();
 904                 iowrite32be(ring->doorbell_qpn, ring->bf.uar->map + MLX4_SEND_DOORBELL);
 905         }
 906
 907         return NETDEV_TX_OK;
 908
 909 tx_drop_unmap:
 910         en_err(priv, "DMA mapping error\n");
 911
 912         for (i++; i < skb_shinfo(skb)->nr_frags; i++) {
 913                 data++;
 914                 dma_unmap_page(ddev, (dma_addr_t) be64_to_cpu(data->addr),
 915                                be32_to_cpu(data->byte_count),
 916                                PCI_DMA_TODEVICE);
 917         }
 918
 919 tx_drop:
 920         dev_kfree_skb_any(skb);
 921         priv->stats.tx_dropped++;
 922         return NETDEV_TX_OK;
 923 }
 924