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[karo-tx-linux.git] / drivers / net / wireless / iwlwifi / iwl-rx.c
1 /******************************************************************************
2  *
3  * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
4  *
5  * Portions of this file are derived from the ipw3945 project, as well
6  * as portions of the ieee80211 subsystem header files.
7  *
8  * This program is free software; you can redistribute it and/or modify it
9  * under the terms of version 2 of the GNU General Public License as
10  * published by the Free Software Foundation.
11  *
12  * This program is distributed in the hope that it will be useful, but WITHOUT
13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
15  * more details.
16  *
17  * You should have received a copy of the GNU General Public License along with
18  * this program; if not, write to the Free Software Foundation, Inc.,
19  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20  *
21  * The full GNU General Public License is included in this distribution in the
22  * file called LICENSE.
23  *
24  * Contact Information:
25  *  Intel Linux Wireless <ilw@linux.intel.com>
26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27  *
28  *****************************************************************************/
29
30 #include <linux/etherdevice.h>
31 #include <linux/slab.h>
32 #include <net/mac80211.h>
33 #include <asm/unaligned.h>
34 #include "iwl-eeprom.h"
35 #include "iwl-dev.h"
36 #include "iwl-core.h"
37 #include "iwl-sta.h"
38 #include "iwl-io.h"
39 #include "iwl-calib.h"
40 #include "iwl-helpers.h"
41 /************************** RX-FUNCTIONS ****************************/
42 /*
43  * Rx theory of operation
44  *
45  * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
46  * each of which point to Receive Buffers to be filled by the NIC.  These get
47  * used not only for Rx frames, but for any command response or notification
48  * from the NIC.  The driver and NIC manage the Rx buffers by means
49  * of indexes into the circular buffer.
50  *
51  * Rx Queue Indexes
52  * The host/firmware share two index registers for managing the Rx buffers.
53  *
54  * The READ index maps to the first position that the firmware may be writing
55  * to -- the driver can read up to (but not including) this position and get
56  * good data.
57  * The READ index is managed by the firmware once the card is enabled.
58  *
59  * The WRITE index maps to the last position the driver has read from -- the
60  * position preceding WRITE is the last slot the firmware can place a packet.
61  *
62  * The queue is empty (no good data) if WRITE = READ - 1, and is full if
63  * WRITE = READ.
64  *
65  * During initialization, the host sets up the READ queue position to the first
66  * INDEX position, and WRITE to the last (READ - 1 wrapped)
67  *
68  * When the firmware places a packet in a buffer, it will advance the READ index
69  * and fire the RX interrupt.  The driver can then query the READ index and
70  * process as many packets as possible, moving the WRITE index forward as it
71  * resets the Rx queue buffers with new memory.
72  *
73  * The management in the driver is as follows:
74  * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free.  When
75  *   iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
76  *   to replenish the iwl->rxq->rx_free.
77  * + In iwl_rx_replenish (scheduled) if 'processed' != 'read' then the
78  *   iwl->rxq is replenished and the READ INDEX is updated (updating the
79  *   'processed' and 'read' driver indexes as well)
80  * + A received packet is processed and handed to the kernel network stack,
81  *   detached from the iwl->rxq.  The driver 'processed' index is updated.
82  * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
83  *   list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
84  *   INDEX is not incremented and iwl->status(RX_STALLED) is set.  If there
85  *   were enough free buffers and RX_STALLED is set it is cleared.
86  *
87  *
88  * Driver sequence:
89  *
90  * iwl_rx_queue_alloc()   Allocates rx_free
91  * iwl_rx_replenish()     Replenishes rx_free list from rx_used, and calls
92  *                            iwl_rx_queue_restock
93  * iwl_rx_queue_restock() Moves available buffers from rx_free into Rx
94  *                            queue, updates firmware pointers, and updates
95  *                            the WRITE index.  If insufficient rx_free buffers
96  *                            are available, schedules iwl_rx_replenish
97  *
98  * -- enable interrupts --
99  * ISR - iwl_rx()         Detach iwl_rx_mem_buffers from pool up to the
100  *                            READ INDEX, detaching the SKB from the pool.
101  *                            Moves the packet buffer from queue to rx_used.
102  *                            Calls iwl_rx_queue_restock to refill any empty
103  *                            slots.
104  * ...
105  *
106  */
107
108 /**
109  * iwl_rx_queue_space - Return number of free slots available in queue.
110  */
111 int iwl_rx_queue_space(const struct iwl_rx_queue *q)
112 {
113         int s = q->read - q->write;
114         if (s <= 0)
115                 s += RX_QUEUE_SIZE;
116         /* keep some buffer to not confuse full and empty queue */
117         s -= 2;
118         if (s < 0)
119                 s = 0;
120         return s;
121 }
122 EXPORT_SYMBOL(iwl_rx_queue_space);
123
124 /**
125  * iwl_rx_queue_update_write_ptr - Update the write pointer for the RX queue
126  */
127 void iwl_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl_rx_queue *q)
128 {
129         unsigned long flags;
130         u32 rx_wrt_ptr_reg = priv->hw_params.rx_wrt_ptr_reg;
131         u32 reg;
132
133         spin_lock_irqsave(&q->lock, flags);
134
135         if (q->need_update == 0)
136                 goto exit_unlock;
137
138         /* If power-saving is in use, make sure device is awake */
139         if (test_bit(STATUS_POWER_PMI, &priv->status)) {
140                 reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
141
142                 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
143                         IWL_DEBUG_INFO(priv, "Rx queue requesting wakeup, GP1 = 0x%x\n",
144                                       reg);
145                         iwl_set_bit(priv, CSR_GP_CNTRL,
146                                     CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
147                         goto exit_unlock;
148                 }
149
150                 q->write_actual = (q->write & ~0x7);
151                 iwl_write_direct32(priv, rx_wrt_ptr_reg, q->write_actual);
152
153         /* Else device is assumed to be awake */
154         } else {
155                 /* Device expects a multiple of 8 */
156                 q->write_actual = (q->write & ~0x7);
157                 iwl_write_direct32(priv, rx_wrt_ptr_reg, q->write_actual);
158         }
159
160         q->need_update = 0;
161
162  exit_unlock:
163         spin_unlock_irqrestore(&q->lock, flags);
164 }
165 EXPORT_SYMBOL(iwl_rx_queue_update_write_ptr);
166 /**
167  * iwl_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
168  */
169 static inline __le32 iwl_dma_addr2rbd_ptr(struct iwl_priv *priv,
170                                           dma_addr_t dma_addr)
171 {
172         return cpu_to_le32((u32)(dma_addr >> 8));
173 }
174
175 /**
176  * iwl_rx_queue_restock - refill RX queue from pre-allocated pool
177  *
178  * If there are slots in the RX queue that need to be restocked,
179  * and we have free pre-allocated buffers, fill the ranks as much
180  * as we can, pulling from rx_free.
181  *
182  * This moves the 'write' index forward to catch up with 'processed', and
183  * also updates the memory address in the firmware to reference the new
184  * target buffer.
185  */
186 void iwl_rx_queue_restock(struct iwl_priv *priv)
187 {
188         struct iwl_rx_queue *rxq = &priv->rxq;
189         struct list_head *element;
190         struct iwl_rx_mem_buffer *rxb;
191         unsigned long flags;
192         int write;
193
194         spin_lock_irqsave(&rxq->lock, flags);
195         write = rxq->write & ~0x7;
196         while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
197                 /* Get next free Rx buffer, remove from free list */
198                 element = rxq->rx_free.next;
199                 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
200                 list_del(element);
201
202                 /* Point to Rx buffer via next RBD in circular buffer */
203                 rxq->bd[rxq->write] = iwl_dma_addr2rbd_ptr(priv, rxb->page_dma);
204                 rxq->queue[rxq->write] = rxb;
205                 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
206                 rxq->free_count--;
207         }
208         spin_unlock_irqrestore(&rxq->lock, flags);
209         /* If the pre-allocated buffer pool is dropping low, schedule to
210          * refill it */
211         if (rxq->free_count <= RX_LOW_WATERMARK)
212                 queue_work(priv->workqueue, &priv->rx_replenish);
213
214
215         /* If we've added more space for the firmware to place data, tell it.
216          * Increment device's write pointer in multiples of 8. */
217         if (rxq->write_actual != (rxq->write & ~0x7)) {
218                 spin_lock_irqsave(&rxq->lock, flags);
219                 rxq->need_update = 1;
220                 spin_unlock_irqrestore(&rxq->lock, flags);
221                 iwl_rx_queue_update_write_ptr(priv, rxq);
222         }
223 }
224 EXPORT_SYMBOL(iwl_rx_queue_restock);
225
226
227 /**
228  * iwl_rx_replenish - Move all used packet from rx_used to rx_free
229  *
230  * When moving to rx_free an SKB is allocated for the slot.
231  *
232  * Also restock the Rx queue via iwl_rx_queue_restock.
233  * This is called as a scheduled work item (except for during initialization)
234  */
235 void iwl_rx_allocate(struct iwl_priv *priv, gfp_t priority)
236 {
237         struct iwl_rx_queue *rxq = &priv->rxq;
238         struct list_head *element;
239         struct iwl_rx_mem_buffer *rxb;
240         struct page *page;
241         unsigned long flags;
242         gfp_t gfp_mask = priority;
243
244         while (1) {
245                 spin_lock_irqsave(&rxq->lock, flags);
246                 if (list_empty(&rxq->rx_used)) {
247                         spin_unlock_irqrestore(&rxq->lock, flags);
248                         return;
249                 }
250                 spin_unlock_irqrestore(&rxq->lock, flags);
251
252                 if (rxq->free_count > RX_LOW_WATERMARK)
253                         gfp_mask |= __GFP_NOWARN;
254
255                 if (priv->hw_params.rx_page_order > 0)
256                         gfp_mask |= __GFP_COMP;
257
258                 /* Alloc a new receive buffer */
259                 page = alloc_pages(gfp_mask, priv->hw_params.rx_page_order);
260                 if (!page) {
261                         if (net_ratelimit())
262                                 IWL_DEBUG_INFO(priv, "alloc_pages failed, "
263                                                "order: %d\n",
264                                                priv->hw_params.rx_page_order);
265
266                         if ((rxq->free_count <= RX_LOW_WATERMARK) &&
267                             net_ratelimit())
268                                 IWL_CRIT(priv, "Failed to alloc_pages with %s. Only %u free buffers remaining.\n",
269                                          priority == GFP_ATOMIC ?  "GFP_ATOMIC" : "GFP_KERNEL",
270                                          rxq->free_count);
271                         /* We don't reschedule replenish work here -- we will
272                          * call the restock method and if it still needs
273                          * more buffers it will schedule replenish */
274                         return;
275                 }
276
277                 spin_lock_irqsave(&rxq->lock, flags);
278
279                 if (list_empty(&rxq->rx_used)) {
280                         spin_unlock_irqrestore(&rxq->lock, flags);
281                         __free_pages(page, priv->hw_params.rx_page_order);
282                         return;
283                 }
284                 element = rxq->rx_used.next;
285                 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
286                 list_del(element);
287
288                 spin_unlock_irqrestore(&rxq->lock, flags);
289
290                 rxb->page = page;
291                 /* Get physical address of the RB */
292                 rxb->page_dma = pci_map_page(priv->pci_dev, page, 0,
293                                 PAGE_SIZE << priv->hw_params.rx_page_order,
294                                 PCI_DMA_FROMDEVICE);
295                 /* dma address must be no more than 36 bits */
296                 BUG_ON(rxb->page_dma & ~DMA_BIT_MASK(36));
297                 /* and also 256 byte aligned! */
298                 BUG_ON(rxb->page_dma & DMA_BIT_MASK(8));
299
300                 spin_lock_irqsave(&rxq->lock, flags);
301
302                 list_add_tail(&rxb->list, &rxq->rx_free);
303                 rxq->free_count++;
304                 priv->alloc_rxb_page++;
305
306                 spin_unlock_irqrestore(&rxq->lock, flags);
307         }
308 }
309
310 void iwl_rx_replenish(struct iwl_priv *priv)
311 {
312         unsigned long flags;
313
314         iwl_rx_allocate(priv, GFP_KERNEL);
315
316         spin_lock_irqsave(&priv->lock, flags);
317         iwl_rx_queue_restock(priv);
318         spin_unlock_irqrestore(&priv->lock, flags);
319 }
320 EXPORT_SYMBOL(iwl_rx_replenish);
321
322 void iwl_rx_replenish_now(struct iwl_priv *priv)
323 {
324         iwl_rx_allocate(priv, GFP_ATOMIC);
325
326         iwl_rx_queue_restock(priv);
327 }
328 EXPORT_SYMBOL(iwl_rx_replenish_now);
329
330
331 /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
332  * If an SKB has been detached, the POOL needs to have its SKB set to NULL
333  * This free routine walks the list of POOL entries and if SKB is set to
334  * non NULL it is unmapped and freed
335  */
336 void iwl_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
337 {
338         int i;
339         for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
340                 if (rxq->pool[i].page != NULL) {
341                         pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
342                                 PAGE_SIZE << priv->hw_params.rx_page_order,
343                                 PCI_DMA_FROMDEVICE);
344                         __iwl_free_pages(priv, rxq->pool[i].page);
345                         rxq->pool[i].page = NULL;
346                 }
347         }
348
349         dma_free_coherent(&priv->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
350                           rxq->dma_addr);
351         dma_free_coherent(&priv->pci_dev->dev, sizeof(struct iwl_rb_status),
352                           rxq->rb_stts, rxq->rb_stts_dma);
353         rxq->bd = NULL;
354         rxq->rb_stts  = NULL;
355 }
356 EXPORT_SYMBOL(iwl_rx_queue_free);
357
358 int iwl_rx_queue_alloc(struct iwl_priv *priv)
359 {
360         struct iwl_rx_queue *rxq = &priv->rxq;
361         struct device *dev = &priv->pci_dev->dev;
362         int i;
363
364         spin_lock_init(&rxq->lock);
365         INIT_LIST_HEAD(&rxq->rx_free);
366         INIT_LIST_HEAD(&rxq->rx_used);
367
368         /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
369         rxq->bd = dma_alloc_coherent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr,
370                                      GFP_KERNEL);
371         if (!rxq->bd)
372                 goto err_bd;
373
374         rxq->rb_stts = dma_alloc_coherent(dev, sizeof(struct iwl_rb_status),
375                                           &rxq->rb_stts_dma, GFP_KERNEL);
376         if (!rxq->rb_stts)
377                 goto err_rb;
378
379         /* Fill the rx_used queue with _all_ of the Rx buffers */
380         for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
381                 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
382
383         /* Set us so that we have processed and used all buffers, but have
384          * not restocked the Rx queue with fresh buffers */
385         rxq->read = rxq->write = 0;
386         rxq->write_actual = 0;
387         rxq->free_count = 0;
388         rxq->need_update = 0;
389         return 0;
390
391 err_rb:
392         dma_free_coherent(&priv->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
393                           rxq->dma_addr);
394 err_bd:
395         return -ENOMEM;
396 }
397 EXPORT_SYMBOL(iwl_rx_queue_alloc);
398
399 void iwl_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
400 {
401         unsigned long flags;
402         int i;
403         spin_lock_irqsave(&rxq->lock, flags);
404         INIT_LIST_HEAD(&rxq->rx_free);
405         INIT_LIST_HEAD(&rxq->rx_used);
406         /* Fill the rx_used queue with _all_ of the Rx buffers */
407         for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
408                 /* In the reset function, these buffers may have been allocated
409                  * to an SKB, so we need to unmap and free potential storage */
410                 if (rxq->pool[i].page != NULL) {
411                         pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
412                                 PAGE_SIZE << priv->hw_params.rx_page_order,
413                                 PCI_DMA_FROMDEVICE);
414                         __iwl_free_pages(priv, rxq->pool[i].page);
415                         rxq->pool[i].page = NULL;
416                 }
417                 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
418         }
419
420         /* Set us so that we have processed and used all buffers, but have
421          * not restocked the Rx queue with fresh buffers */
422         rxq->read = rxq->write = 0;
423         rxq->write_actual = 0;
424         rxq->free_count = 0;
425         spin_unlock_irqrestore(&rxq->lock, flags);
426 }
427
428 int iwl_rx_init(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
429 {
430         u32 rb_size;
431         const u32 rfdnlog = RX_QUEUE_SIZE_LOG; /* 256 RBDs */
432         u32 rb_timeout = 0; /* FIXME: RX_RB_TIMEOUT for all devices? */
433
434         if (!priv->cfg->use_isr_legacy)
435                 rb_timeout = RX_RB_TIMEOUT;
436
437         if (priv->cfg->mod_params->amsdu_size_8K)
438                 rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_8K;
439         else
440                 rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_4K;
441
442         /* Stop Rx DMA */
443         iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
444
445         /* Reset driver's Rx queue write index */
446         iwl_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_WPTR_REG, 0);
447
448         /* Tell device where to find RBD circular buffer in DRAM */
449         iwl_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_BASE_REG,
450                            (u32)(rxq->dma_addr >> 8));
451
452         /* Tell device where in DRAM to update its Rx status */
453         iwl_write_direct32(priv, FH_RSCSR_CHNL0_STTS_WPTR_REG,
454                            rxq->rb_stts_dma >> 4);
455
456         /* Enable Rx DMA
457          * FH_RCSR_CHNL0_RX_IGNORE_RXF_EMPTY is set because of HW bug in
458          *      the credit mechanism in 5000 HW RX FIFO
459          * Direct rx interrupts to hosts
460          * Rx buffer size 4 or 8k
461          * RB timeout 0x10
462          * 256 RBDs
463          */
464         iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG,
465                            FH_RCSR_RX_CONFIG_CHNL_EN_ENABLE_VAL |
466                            FH_RCSR_CHNL0_RX_IGNORE_RXF_EMPTY |
467                            FH_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_INT_HOST_VAL |
468                            FH_RCSR_CHNL0_RX_CONFIG_SINGLE_FRAME_MSK |
469                            rb_size|
470                            (rb_timeout << FH_RCSR_RX_CONFIG_REG_IRQ_RBTH_POS)|
471                            (rfdnlog << FH_RCSR_RX_CONFIG_RBDCB_SIZE_POS));
472
473         /* Set interrupt coalescing timer to default (2048 usecs) */
474         iwl_write8(priv, CSR_INT_COALESCING, IWL_HOST_INT_TIMEOUT_DEF);
475
476         return 0;
477 }
478
479 int iwl_rxq_stop(struct iwl_priv *priv)
480 {
481
482         /* stop Rx DMA */
483         iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
484         iwl_poll_direct_bit(priv, FH_MEM_RSSR_RX_STATUS_REG,
485                             FH_RSSR_CHNL0_RX_STATUS_CHNL_IDLE, 1000);
486
487         return 0;
488 }
489 EXPORT_SYMBOL(iwl_rxq_stop);
490
491 void iwl_rx_missed_beacon_notif(struct iwl_priv *priv,
492                                 struct iwl_rx_mem_buffer *rxb)
493
494 {
495         struct iwl_rx_packet *pkt = rxb_addr(rxb);
496         struct iwl_missed_beacon_notif *missed_beacon;
497
498         missed_beacon = &pkt->u.missed_beacon;
499         if (le32_to_cpu(missed_beacon->consecutive_missed_beacons) >
500             priv->missed_beacon_threshold) {
501                 IWL_DEBUG_CALIB(priv, "missed bcn cnsq %d totl %d rcd %d expctd %d\n",
502                     le32_to_cpu(missed_beacon->consecutive_missed_beacons),
503                     le32_to_cpu(missed_beacon->total_missed_becons),
504                     le32_to_cpu(missed_beacon->num_recvd_beacons),
505                     le32_to_cpu(missed_beacon->num_expected_beacons));
506                 if (!test_bit(STATUS_SCANNING, &priv->status))
507                         iwl_init_sensitivity(priv);
508         }
509 }
510 EXPORT_SYMBOL(iwl_rx_missed_beacon_notif);
511
512 void iwl_rx_spectrum_measure_notif(struct iwl_priv *priv,
513                                           struct iwl_rx_mem_buffer *rxb)
514 {
515         struct iwl_rx_packet *pkt = rxb_addr(rxb);
516         struct iwl_spectrum_notification *report = &(pkt->u.spectrum_notif);
517
518         if (!report->state) {
519                 IWL_DEBUG_11H(priv,
520                         "Spectrum Measure Notification: Start\n");
521                 return;
522         }
523
524         memcpy(&priv->measure_report, report, sizeof(*report));
525         priv->measurement_status |= MEASUREMENT_READY;
526 }
527 EXPORT_SYMBOL(iwl_rx_spectrum_measure_notif);
528
529
530
531 /* Calculate noise level, based on measurements during network silence just
532  *   before arriving beacon.  This measurement can be done only if we know
533  *   exactly when to expect beacons, therefore only when we're associated. */
534 static void iwl_rx_calc_noise(struct iwl_priv *priv)
535 {
536         struct statistics_rx_non_phy *rx_info
537                                 = &(priv->statistics.rx.general);
538         int num_active_rx = 0;
539         int total_silence = 0;
540         int bcn_silence_a =
541                 le32_to_cpu(rx_info->beacon_silence_rssi_a) & IN_BAND_FILTER;
542         int bcn_silence_b =
543                 le32_to_cpu(rx_info->beacon_silence_rssi_b) & IN_BAND_FILTER;
544         int bcn_silence_c =
545                 le32_to_cpu(rx_info->beacon_silence_rssi_c) & IN_BAND_FILTER;
546
547         if (bcn_silence_a) {
548                 total_silence += bcn_silence_a;
549                 num_active_rx++;
550         }
551         if (bcn_silence_b) {
552                 total_silence += bcn_silence_b;
553                 num_active_rx++;
554         }
555         if (bcn_silence_c) {
556                 total_silence += bcn_silence_c;
557                 num_active_rx++;
558         }
559
560         /* Average among active antennas */
561         if (num_active_rx)
562                 priv->last_rx_noise = (total_silence / num_active_rx) - 107;
563         else
564                 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
565
566         IWL_DEBUG_CALIB(priv, "inband silence a %u, b %u, c %u, dBm %d\n",
567                         bcn_silence_a, bcn_silence_b, bcn_silence_c,
568                         priv->last_rx_noise);
569 }
570
571 #ifdef CONFIG_IWLWIFI_DEBUG
572 /*
573  *  based on the assumption of all statistics counter are in DWORD
574  *  FIXME: This function is for debugging, do not deal with
575  *  the case of counters roll-over.
576  */
577 static void iwl_accumulative_statistics(struct iwl_priv *priv,
578                                         __le32 *stats)
579 {
580         int i;
581         __le32 *prev_stats;
582         u32 *accum_stats;
583         u32 *delta, *max_delta;
584
585         prev_stats = (__le32 *)&priv->statistics;
586         accum_stats = (u32 *)&priv->accum_statistics;
587         delta = (u32 *)&priv->delta_statistics;
588         max_delta = (u32 *)&priv->max_delta;
589
590         for (i = sizeof(__le32); i < sizeof(struct iwl_notif_statistics);
591              i += sizeof(__le32), stats++, prev_stats++, delta++,
592              max_delta++, accum_stats++) {
593                 if (le32_to_cpu(*stats) > le32_to_cpu(*prev_stats)) {
594                         *delta = (le32_to_cpu(*stats) -
595                                 le32_to_cpu(*prev_stats));
596                         *accum_stats += *delta;
597                         if (*delta > *max_delta)
598                                 *max_delta = *delta;
599                 }
600         }
601
602         /* reset accumulative statistics for "no-counter" type statistics */
603         priv->accum_statistics.general.temperature =
604                 priv->statistics.general.temperature;
605         priv->accum_statistics.general.temperature_m =
606                 priv->statistics.general.temperature_m;
607         priv->accum_statistics.general.ttl_timestamp =
608                 priv->statistics.general.ttl_timestamp;
609         priv->accum_statistics.tx.tx_power.ant_a =
610                 priv->statistics.tx.tx_power.ant_a;
611         priv->accum_statistics.tx.tx_power.ant_b =
612                 priv->statistics.tx.tx_power.ant_b;
613         priv->accum_statistics.tx.tx_power.ant_c =
614                 priv->statistics.tx.tx_power.ant_c;
615 }
616 #endif
617
618 #define REG_RECALIB_PERIOD (60)
619
620 #define PLCP_MSG "plcp_err exceeded %u, %u, %u, %u, %u, %d, %u mSecs\n"
621 void iwl_rx_statistics(struct iwl_priv *priv,
622                               struct iwl_rx_mem_buffer *rxb)
623 {
624         int change;
625         struct iwl_rx_packet *pkt = rxb_addr(rxb);
626         int combined_plcp_delta;
627         unsigned int plcp_msec;
628         unsigned long plcp_received_jiffies;
629
630         IWL_DEBUG_RX(priv, "Statistics notification received (%d vs %d).\n",
631                      (int)sizeof(priv->statistics),
632                      le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK);
633
634         change = ((priv->statistics.general.temperature !=
635                    pkt->u.stats.general.temperature) ||
636                   ((priv->statistics.flag &
637                     STATISTICS_REPLY_FLG_HT40_MODE_MSK) !=
638                    (pkt->u.stats.flag & STATISTICS_REPLY_FLG_HT40_MODE_MSK)));
639
640 #ifdef CONFIG_IWLWIFI_DEBUG
641         iwl_accumulative_statistics(priv, (__le32 *)&pkt->u.stats);
642 #endif
643         /*
644          * check for plcp_err and trigger radio reset if it exceeds
645          * the plcp error threshold plcp_delta.
646          */
647         plcp_received_jiffies = jiffies;
648         plcp_msec = jiffies_to_msecs((long) plcp_received_jiffies -
649                                         (long) priv->plcp_jiffies);
650         priv->plcp_jiffies = plcp_received_jiffies;
651         /*
652          * check to make sure plcp_msec is not 0 to prevent division
653          * by zero.
654          */
655         if (plcp_msec) {
656                 combined_plcp_delta =
657                         (le32_to_cpu(pkt->u.stats.rx.ofdm.plcp_err) -
658                         le32_to_cpu(priv->statistics.rx.ofdm.plcp_err)) +
659                         (le32_to_cpu(pkt->u.stats.rx.ofdm_ht.plcp_err) -
660                         le32_to_cpu(priv->statistics.rx.ofdm_ht.plcp_err));
661
662                 if ((combined_plcp_delta > 0) &&
663                         ((combined_plcp_delta * 100) / plcp_msec) >
664                         priv->cfg->plcp_delta_threshold) {
665                         /*
666                          * if plcp_err exceed the threshold, the following
667                          * data is printed in csv format:
668                          *    Text: plcp_err exceeded %d,
669                          *    Received ofdm.plcp_err,
670                          *    Current ofdm.plcp_err,
671                          *    Received ofdm_ht.plcp_err,
672                          *    Current ofdm_ht.plcp_err,
673                          *    combined_plcp_delta,
674                          *    plcp_msec
675                          */
676                         IWL_DEBUG_RADIO(priv, PLCP_MSG,
677                                 priv->cfg->plcp_delta_threshold,
678                                 le32_to_cpu(pkt->u.stats.rx.ofdm.plcp_err),
679                                 le32_to_cpu(priv->statistics.rx.ofdm.plcp_err),
680                                 le32_to_cpu(pkt->u.stats.rx.ofdm_ht.plcp_err),
681                                 le32_to_cpu(
682                                         priv->statistics.rx.ofdm_ht.plcp_err),
683                                 combined_plcp_delta, plcp_msec);
684
685                         /*
686                          * Reset the RF radio due to the high plcp
687                          * error rate
688                          */
689                         iwl_force_reset(priv, IWL_RF_RESET);
690                 }
691         }
692
693         memcpy(&priv->statistics, &pkt->u.stats, sizeof(priv->statistics));
694
695         set_bit(STATUS_STATISTICS, &priv->status);
696
697         /* Reschedule the statistics timer to occur in
698          * REG_RECALIB_PERIOD seconds to ensure we get a
699          * thermal update even if the uCode doesn't give
700          * us one */
701         mod_timer(&priv->statistics_periodic, jiffies +
702                   msecs_to_jiffies(REG_RECALIB_PERIOD * 1000));
703
704         if (unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
705             (pkt->hdr.cmd == STATISTICS_NOTIFICATION)) {
706                 iwl_rx_calc_noise(priv);
707                 queue_work(priv->workqueue, &priv->run_time_calib_work);
708         }
709         if (priv->cfg->ops->lib->temp_ops.temperature && change)
710                 priv->cfg->ops->lib->temp_ops.temperature(priv);
711 }
712 EXPORT_SYMBOL(iwl_rx_statistics);
713
714 void iwl_reply_statistics(struct iwl_priv *priv,
715                               struct iwl_rx_mem_buffer *rxb)
716 {
717         struct iwl_rx_packet *pkt = rxb_addr(rxb);
718
719         if (le32_to_cpu(pkt->u.stats.flag) & UCODE_STATISTICS_CLEAR_MSK) {
720 #ifdef CONFIG_IWLWIFI_DEBUG
721                 memset(&priv->accum_statistics, 0,
722                         sizeof(struct iwl_notif_statistics));
723                 memset(&priv->delta_statistics, 0,
724                         sizeof(struct iwl_notif_statistics));
725                 memset(&priv->max_delta, 0,
726                         sizeof(struct iwl_notif_statistics));
727 #endif
728                 IWL_DEBUG_RX(priv, "Statistics have been cleared\n");
729         }
730         iwl_rx_statistics(priv, rxb);
731 }
732 EXPORT_SYMBOL(iwl_reply_statistics);
733
734 /* Calc max signal level (dBm) among 3 possible receivers */
735 static inline int iwl_calc_rssi(struct iwl_priv *priv,
736                                 struct iwl_rx_phy_res *rx_resp)
737 {
738         return priv->cfg->ops->utils->calc_rssi(priv, rx_resp);
739 }
740
741 #ifdef CONFIG_IWLWIFI_DEBUG
742 /**
743  * iwl_dbg_report_frame - dump frame to syslog during debug sessions
744  *
745  * You may hack this function to show different aspects of received frames,
746  * including selective frame dumps.
747  * group100 parameter selects whether to show 1 out of 100 good data frames.
748  *    All beacon and probe response frames are printed.
749  */
750 static void iwl_dbg_report_frame(struct iwl_priv *priv,
751                       struct iwl_rx_phy_res *phy_res, u16 length,
752                       struct ieee80211_hdr *header, int group100)
753 {
754         u32 to_us;
755         u32 print_summary = 0;
756         u32 print_dump = 0;     /* set to 1 to dump all frames' contents */
757         u32 hundred = 0;
758         u32 dataframe = 0;
759         __le16 fc;
760         u16 seq_ctl;
761         u16 channel;
762         u16 phy_flags;
763         u32 rate_n_flags;
764         u32 tsf_low;
765         int rssi;
766
767         if (likely(!(iwl_get_debug_level(priv) & IWL_DL_RX)))
768                 return;
769
770         /* MAC header */
771         fc = header->frame_control;
772         seq_ctl = le16_to_cpu(header->seq_ctrl);
773
774         /* metadata */
775         channel = le16_to_cpu(phy_res->channel);
776         phy_flags = le16_to_cpu(phy_res->phy_flags);
777         rate_n_flags = le32_to_cpu(phy_res->rate_n_flags);
778
779         /* signal statistics */
780         rssi = iwl_calc_rssi(priv, phy_res);
781         tsf_low = le64_to_cpu(phy_res->timestamp) & 0x0ffffffff;
782
783         to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
784
785         /* if data frame is to us and all is good,
786          *   (optionally) print summary for only 1 out of every 100 */
787         if (to_us && (fc & ~cpu_to_le16(IEEE80211_FCTL_PROTECTED)) ==
788             cpu_to_le16(IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
789                 dataframe = 1;
790                 if (!group100)
791                         print_summary = 1;      /* print each frame */
792                 else if (priv->framecnt_to_us < 100) {
793                         priv->framecnt_to_us++;
794                         print_summary = 0;
795                 } else {
796                         priv->framecnt_to_us = 0;
797                         print_summary = 1;
798                         hundred = 1;
799                 }
800         } else {
801                 /* print summary for all other frames */
802                 print_summary = 1;
803         }
804
805         if (print_summary) {
806                 char *title;
807                 int rate_idx;
808                 u32 bitrate;
809
810                 if (hundred)
811                         title = "100Frames";
812                 else if (ieee80211_has_retry(fc))
813                         title = "Retry";
814                 else if (ieee80211_is_assoc_resp(fc))
815                         title = "AscRsp";
816                 else if (ieee80211_is_reassoc_resp(fc))
817                         title = "RasRsp";
818                 else if (ieee80211_is_probe_resp(fc)) {
819                         title = "PrbRsp";
820                         print_dump = 1; /* dump frame contents */
821                 } else if (ieee80211_is_beacon(fc)) {
822                         title = "Beacon";
823                         print_dump = 1; /* dump frame contents */
824                 } else if (ieee80211_is_atim(fc))
825                         title = "ATIM";
826                 else if (ieee80211_is_auth(fc))
827                         title = "Auth";
828                 else if (ieee80211_is_deauth(fc))
829                         title = "DeAuth";
830                 else if (ieee80211_is_disassoc(fc))
831                         title = "DisAssoc";
832                 else
833                         title = "Frame";
834
835                 rate_idx = iwl_hwrate_to_plcp_idx(rate_n_flags);
836                 if (unlikely((rate_idx < 0) || (rate_idx >= IWL_RATE_COUNT))) {
837                         bitrate = 0;
838                         WARN_ON_ONCE(1);
839                 } else {
840                         bitrate = iwl_rates[rate_idx].ieee / 2;
841                 }
842
843                 /* print frame summary.
844                  * MAC addresses show just the last byte (for brevity),
845                  *    but you can hack it to show more, if you'd like to. */
846                 if (dataframe)
847                         IWL_DEBUG_RX(priv, "%s: mhd=0x%04x, dst=0x%02x, "
848                                      "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
849                                      title, le16_to_cpu(fc), header->addr1[5],
850                                      length, rssi, channel, bitrate);
851                 else {
852                         /* src/dst addresses assume managed mode */
853                         IWL_DEBUG_RX(priv, "%s: 0x%04x, dst=0x%02x, src=0x%02x, "
854                                      "len=%u, rssi=%d, tim=%lu usec, "
855                                      "phy=0x%02x, chnl=%d\n",
856                                      title, le16_to_cpu(fc), header->addr1[5],
857                                      header->addr3[5], length, rssi,
858                                      tsf_low - priv->scan_start_tsf,
859                                      phy_flags, channel);
860                 }
861         }
862         if (print_dump)
863                 iwl_print_hex_dump(priv, IWL_DL_RX, header, length);
864 }
865 #endif
866
867 /*
868  * returns non-zero if packet should be dropped
869  */
870 int iwl_set_decrypted_flag(struct iwl_priv *priv,
871                            struct ieee80211_hdr *hdr,
872                            u32 decrypt_res,
873                            struct ieee80211_rx_status *stats)
874 {
875         u16 fc = le16_to_cpu(hdr->frame_control);
876
877         if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
878                 return 0;
879
880         if (!(fc & IEEE80211_FCTL_PROTECTED))
881                 return 0;
882
883         IWL_DEBUG_RX(priv, "decrypt_res:0x%x\n", decrypt_res);
884         switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
885         case RX_RES_STATUS_SEC_TYPE_TKIP:
886                 /* The uCode has got a bad phase 1 Key, pushes the packet.
887                  * Decryption will be done in SW. */
888                 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
889                     RX_RES_STATUS_BAD_KEY_TTAK)
890                         break;
891
892         case RX_RES_STATUS_SEC_TYPE_WEP:
893                 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
894                     RX_RES_STATUS_BAD_ICV_MIC) {
895                         /* bad ICV, the packet is destroyed since the
896                          * decryption is inplace, drop it */
897                         IWL_DEBUG_RX(priv, "Packet destroyed\n");
898                         return -1;
899                 }
900         case RX_RES_STATUS_SEC_TYPE_CCMP:
901                 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
902                     RX_RES_STATUS_DECRYPT_OK) {
903                         IWL_DEBUG_RX(priv, "hw decrypt successfully!!!\n");
904                         stats->flag |= RX_FLAG_DECRYPTED;
905                 }
906                 break;
907
908         default:
909                 break;
910         }
911         return 0;
912 }
913 EXPORT_SYMBOL(iwl_set_decrypted_flag);
914
915 static u32 iwl_translate_rx_status(struct iwl_priv *priv, u32 decrypt_in)
916 {
917         u32 decrypt_out = 0;
918
919         if ((decrypt_in & RX_RES_STATUS_STATION_FOUND) ==
920                                         RX_RES_STATUS_STATION_FOUND)
921                 decrypt_out |= (RX_RES_STATUS_STATION_FOUND |
922                                 RX_RES_STATUS_NO_STATION_INFO_MISMATCH);
923
924         decrypt_out |= (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK);
925
926         /* packet was not encrypted */
927         if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
928                                         RX_RES_STATUS_SEC_TYPE_NONE)
929                 return decrypt_out;
930
931         /* packet was encrypted with unknown alg */
932         if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
933                                         RX_RES_STATUS_SEC_TYPE_ERR)
934                 return decrypt_out;
935
936         /* decryption was not done in HW */
937         if ((decrypt_in & RX_MPDU_RES_STATUS_DEC_DONE_MSK) !=
938                                         RX_MPDU_RES_STATUS_DEC_DONE_MSK)
939                 return decrypt_out;
940
941         switch (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) {
942
943         case RX_RES_STATUS_SEC_TYPE_CCMP:
944                 /* alg is CCM: check MIC only */
945                 if (!(decrypt_in & RX_MPDU_RES_STATUS_MIC_OK))
946                         /* Bad MIC */
947                         decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
948                 else
949                         decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
950
951                 break;
952
953         case RX_RES_STATUS_SEC_TYPE_TKIP:
954                 if (!(decrypt_in & RX_MPDU_RES_STATUS_TTAK_OK)) {
955                         /* Bad TTAK */
956                         decrypt_out |= RX_RES_STATUS_BAD_KEY_TTAK;
957                         break;
958                 }
959                 /* fall through if TTAK OK */
960         default:
961                 if (!(decrypt_in & RX_MPDU_RES_STATUS_ICV_OK))
962                         decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
963                 else
964                         decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
965                 break;
966         };
967
968         IWL_DEBUG_RX(priv, "decrypt_in:0x%x  decrypt_out = 0x%x\n",
969                                         decrypt_in, decrypt_out);
970
971         return decrypt_out;
972 }
973
974 static void iwl_pass_packet_to_mac80211(struct iwl_priv *priv,
975                                         struct ieee80211_hdr *hdr,
976                                         u16 len,
977                                         u32 ampdu_status,
978                                         struct iwl_rx_mem_buffer *rxb,
979                                         struct ieee80211_rx_status *stats)
980 {
981         struct sk_buff *skb;
982         int ret = 0;
983         __le16 fc = hdr->frame_control;
984
985         /* We only process data packets if the interface is open */
986         if (unlikely(!priv->is_open)) {
987                 IWL_DEBUG_DROP_LIMIT(priv,
988                     "Dropping packet while interface is not open.\n");
989                 return;
990         }
991
992         /* In case of HW accelerated crypto and bad decryption, drop */
993         if (!priv->cfg->mod_params->sw_crypto &&
994             iwl_set_decrypted_flag(priv, hdr, ampdu_status, stats))
995                 return;
996
997         skb = alloc_skb(IWL_LINK_HDR_MAX * 2, GFP_ATOMIC);
998         if (!skb) {
999                 IWL_ERR(priv, "alloc_skb failed\n");
1000                 return;
1001         }
1002
1003         skb_reserve(skb, IWL_LINK_HDR_MAX);
1004         skb_add_rx_frag(skb, 0, rxb->page, (void *)hdr - rxb_addr(rxb), len);
1005
1006         /* mac80211 currently doesn't support paged SKB. Convert it to
1007          * linear SKB for management frame and data frame requires
1008          * software decryption or software defragementation. */
1009         if (ieee80211_is_mgmt(fc) ||
1010             ieee80211_has_protected(fc) ||
1011             ieee80211_has_morefrags(fc) ||
1012             le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_FRAG ||
1013             (ieee80211_is_data_qos(fc) &&
1014              *ieee80211_get_qos_ctl(hdr) &
1015              IEEE80211_QOS_CONTROL_A_MSDU_PRESENT))
1016                 ret = skb_linearize(skb);
1017         else
1018                 ret = __pskb_pull_tail(skb, min_t(u16, IWL_LINK_HDR_MAX, len)) ?
1019                          0 : -ENOMEM;
1020
1021         if (ret) {
1022                 kfree_skb(skb);
1023                 goto out;
1024         }
1025
1026         /*
1027          * XXX: We cannot touch the page and its virtual memory (hdr) after
1028          * here. It might have already been freed by the above skb change.
1029          */
1030
1031         iwl_update_stats(priv, false, fc, len);
1032         memcpy(IEEE80211_SKB_RXCB(skb), stats, sizeof(*stats));
1033
1034         ieee80211_rx(priv->hw, skb);
1035  out:
1036         priv->alloc_rxb_page--;
1037         rxb->page = NULL;
1038 }
1039
1040 /* This is necessary only for a number of statistics, see the caller. */
1041 static int iwl_is_network_packet(struct iwl_priv *priv,
1042                 struct ieee80211_hdr *header)
1043 {
1044         /* Filter incoming packets to determine if they are targeted toward
1045          * this network, discarding packets coming from ourselves */
1046         switch (priv->iw_mode) {
1047         case NL80211_IFTYPE_ADHOC: /* Header: Dest. | Source    | BSSID */
1048                 /* packets to our IBSS update information */
1049                 return !compare_ether_addr(header->addr3, priv->bssid);
1050         case NL80211_IFTYPE_STATION: /* Header: Dest. | AP{BSSID} | Source */
1051                 /* packets to our IBSS update information */
1052                 return !compare_ether_addr(header->addr2, priv->bssid);
1053         default:
1054                 return 1;
1055         }
1056 }
1057
1058 /* Called for REPLY_RX (legacy ABG frames), or
1059  * REPLY_RX_MPDU_CMD (HT high-throughput N frames). */
1060 void iwl_rx_reply_rx(struct iwl_priv *priv,
1061                                 struct iwl_rx_mem_buffer *rxb)
1062 {
1063         struct ieee80211_hdr *header;
1064         struct ieee80211_rx_status rx_status;
1065         struct iwl_rx_packet *pkt = rxb_addr(rxb);
1066         struct iwl_rx_phy_res *phy_res;
1067         __le32 rx_pkt_status;
1068         struct iwl4965_rx_mpdu_res_start *amsdu;
1069         u32 len;
1070         u32 ampdu_status;
1071         u32 rate_n_flags;
1072
1073         /**
1074          * REPLY_RX and REPLY_RX_MPDU_CMD are handled differently.
1075          *      REPLY_RX: physical layer info is in this buffer
1076          *      REPLY_RX_MPDU_CMD: physical layer info was sent in separate
1077          *              command and cached in priv->last_phy_res
1078          *
1079          * Here we set up local variables depending on which command is
1080          * received.
1081          */
1082         if (pkt->hdr.cmd == REPLY_RX) {
1083                 phy_res = (struct iwl_rx_phy_res *)pkt->u.raw;
1084                 header = (struct ieee80211_hdr *)(pkt->u.raw + sizeof(*phy_res)
1085                                 + phy_res->cfg_phy_cnt);
1086
1087                 len = le16_to_cpu(phy_res->byte_count);
1088                 rx_pkt_status = *(__le32 *)(pkt->u.raw + sizeof(*phy_res) +
1089                                 phy_res->cfg_phy_cnt + len);
1090                 ampdu_status = le32_to_cpu(rx_pkt_status);
1091         } else {
1092                 if (!priv->last_phy_res[0]) {
1093                         IWL_ERR(priv, "MPDU frame without cached PHY data\n");
1094                         return;
1095                 }
1096                 phy_res = (struct iwl_rx_phy_res *)&priv->last_phy_res[1];
1097                 amsdu = (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw;
1098                 header = (struct ieee80211_hdr *)(pkt->u.raw + sizeof(*amsdu));
1099                 len = le16_to_cpu(amsdu->byte_count);
1100                 rx_pkt_status = *(__le32 *)(pkt->u.raw + sizeof(*amsdu) + len);
1101                 ampdu_status = iwl_translate_rx_status(priv,
1102                                 le32_to_cpu(rx_pkt_status));
1103         }
1104
1105         if ((unlikely(phy_res->cfg_phy_cnt > 20))) {
1106                 IWL_DEBUG_DROP(priv, "dsp size out of range [0,20]: %d/n",
1107                                 phy_res->cfg_phy_cnt);
1108                 return;
1109         }
1110
1111         if (!(rx_pkt_status & RX_RES_STATUS_NO_CRC32_ERROR) ||
1112             !(rx_pkt_status & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
1113                 IWL_DEBUG_RX(priv, "Bad CRC or FIFO: 0x%08X.\n",
1114                                 le32_to_cpu(rx_pkt_status));
1115                 return;
1116         }
1117
1118         /* This will be used in several places later */
1119         rate_n_flags = le32_to_cpu(phy_res->rate_n_flags);
1120
1121         /* rx_status carries information about the packet to mac80211 */
1122         rx_status.mactime = le64_to_cpu(phy_res->timestamp);
1123         rx_status.freq =
1124                 ieee80211_channel_to_frequency(le16_to_cpu(phy_res->channel));
1125         rx_status.band = (phy_res->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
1126                                 IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
1127         rx_status.rate_idx =
1128                 iwl_hwrate_to_mac80211_idx(rate_n_flags, rx_status.band);
1129         rx_status.flag = 0;
1130
1131         /* TSF isn't reliable. In order to allow smooth user experience,
1132          * this W/A doesn't propagate it to the mac80211 */
1133         /*rx_status.flag |= RX_FLAG_TSFT;*/
1134
1135         priv->ucode_beacon_time = le32_to_cpu(phy_res->beacon_time_stamp);
1136
1137         /* Find max signal strength (dBm) among 3 antenna/receiver chains */
1138         rx_status.signal = iwl_calc_rssi(priv, phy_res);
1139
1140         /* Meaningful noise values are available only from beacon statistics,
1141          *   which are gathered only when associated, and indicate noise
1142          *   only for the associated network channel ...
1143          * Ignore these noise values while scanning (other channels) */
1144         if (iwl_is_associated(priv) &&
1145             !test_bit(STATUS_SCANNING, &priv->status)) {
1146                 rx_status.noise = priv->last_rx_noise;
1147         } else {
1148                 rx_status.noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
1149         }
1150
1151         /* Reset beacon noise level if not associated. */
1152         if (!iwl_is_associated(priv))
1153                 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
1154
1155 #ifdef CONFIG_IWLWIFI_DEBUG
1156         /* Set "1" to report good data frames in groups of 100 */
1157         if (unlikely(iwl_get_debug_level(priv) & IWL_DL_RX))
1158                 iwl_dbg_report_frame(priv, phy_res, len, header, 1);
1159 #endif
1160         iwl_dbg_log_rx_data_frame(priv, len, header);
1161         IWL_DEBUG_STATS_LIMIT(priv, "Rssi %d, noise %d, TSF %llu\n",
1162                 rx_status.signal, rx_status.noise,
1163                 (unsigned long long)rx_status.mactime);
1164
1165         /*
1166          * "antenna number"
1167          *
1168          * It seems that the antenna field in the phy flags value
1169          * is actually a bit field. This is undefined by radiotap,
1170          * it wants an actual antenna number but I always get "7"
1171          * for most legacy frames I receive indicating that the
1172          * same frame was received on all three RX chains.
1173          *
1174          * I think this field should be removed in favor of a
1175          * new 802.11n radiotap field "RX chains" that is defined
1176          * as a bitmask.
1177          */
1178         rx_status.antenna =
1179                 (le16_to_cpu(phy_res->phy_flags) & RX_RES_PHY_FLAGS_ANTENNA_MSK)
1180                 >> RX_RES_PHY_FLAGS_ANTENNA_POS;
1181
1182         /* set the preamble flag if appropriate */
1183         if (phy_res->phy_flags & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
1184                 rx_status.flag |= RX_FLAG_SHORTPRE;
1185
1186         /* Set up the HT phy flags */
1187         if (rate_n_flags & RATE_MCS_HT_MSK)
1188                 rx_status.flag |= RX_FLAG_HT;
1189         if (rate_n_flags & RATE_MCS_HT40_MSK)
1190                 rx_status.flag |= RX_FLAG_40MHZ;
1191         if (rate_n_flags & RATE_MCS_SGI_MSK)
1192                 rx_status.flag |= RX_FLAG_SHORT_GI;
1193
1194         if (iwl_is_network_packet(priv, header)) {
1195                 priv->last_rx_rssi = rx_status.signal;
1196                 priv->last_beacon_time =  priv->ucode_beacon_time;
1197                 priv->last_tsf = le64_to_cpu(phy_res->timestamp);
1198         }
1199
1200         iwl_pass_packet_to_mac80211(priv, header, len, ampdu_status,
1201                                     rxb, &rx_status);
1202 }
1203 EXPORT_SYMBOL(iwl_rx_reply_rx);
1204
1205 /* Cache phy data (Rx signal strength, etc) for HT frame (REPLY_RX_PHY_CMD).
1206  * This will be used later in iwl_rx_reply_rx() for REPLY_RX_MPDU_CMD. */
1207 void iwl_rx_reply_rx_phy(struct iwl_priv *priv,
1208                                     struct iwl_rx_mem_buffer *rxb)
1209 {
1210         struct iwl_rx_packet *pkt = rxb_addr(rxb);
1211         priv->last_phy_res[0] = 1;
1212         memcpy(&priv->last_phy_res[1], &(pkt->u.raw[0]),
1213                sizeof(struct iwl_rx_phy_res));
1214 }
1215 EXPORT_SYMBOL(iwl_rx_reply_rx_phy);