drivers/scsi/hpsa.c

   1 /*
   2  *    Disk Array driver for HP Smart Array SAS controllers
   3  *    Copyright 2000, 2014 Hewlett-Packard Development Company, L.P.
   4  *
   5  *    This program is free software; you can redistribute it and/or modify
   6  *    it under the terms of the GNU General Public License as published by
   7  *    the Free Software Foundation; version 2 of the License.
   8  *
   9  *    This program is distributed in the hope that it will be useful,
  10  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  *    MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  12  *    NON INFRINGEMENT.  See the GNU General Public License for more details.
  13  *
  14  *    You should have received a copy of the GNU General Public License
  15  *    along with this program; if not, write to the Free Software
  16  *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17  *
  18  *    Questions/Comments/Bugfixes to iss_storagedev@hp.com
  19  *
  20  */
  21
  22 #include <linux/module.h>
  23 #include <linux/interrupt.h>
  24 #include <linux/types.h>
  25 #include <linux/pci.h>
  26 #include <linux/pci-aspm.h>
  27 #include <linux/kernel.h>
  28 #include <linux/slab.h>
  29 #include <linux/delay.h>
  30 #include <linux/fs.h>
  31 #include <linux/timer.h>
  32 #include <linux/init.h>
  33 #include <linux/spinlock.h>
  34 #include <linux/compat.h>
  35 #include <linux/blktrace_api.h>
  36 #include <linux/uaccess.h>
  37 #include <linux/io.h>
  38 #include <linux/dma-mapping.h>
  39 #include <linux/completion.h>
  40 #include <linux/moduleparam.h>
  41 #include <scsi/scsi.h>
  42 #include <scsi/scsi_cmnd.h>
  43 #include <scsi/scsi_device.h>
  44 #include <scsi/scsi_host.h>
  45 #include <scsi/scsi_tcq.h>
  46 #include <scsi/scsi_eh.h>
  47 #include <linux/cciss_ioctl.h>
  48 #include <linux/string.h>
  49 #include <linux/bitmap.h>
  50 #include <linux/atomic.h>
  51 #include <linux/jiffies.h>
  52 #include <linux/percpu-defs.h>
  53 #include <linux/percpu.h>
  54 #include <asm/unaligned.h>
  55 #include <asm/div64.h>
  56 #include "hpsa_cmd.h"
  57 #include "hpsa.h"
  58
  59 /* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */
  60 #define HPSA_DRIVER_VERSION "3.4.4-1"
  61 #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
  62 #define HPSA "hpsa"
  63
  64 /* How long to wait for CISS doorbell communication */
  65 #define CLEAR_EVENT_WAIT_INTERVAL 20    /* ms for each msleep() call */
  66 #define MODE_CHANGE_WAIT_INTERVAL 10    /* ms for each msleep() call */
  67 #define MAX_CLEAR_EVENT_WAIT 30000      /* times 20 ms = 600 s */
  68 #define MAX_MODE_CHANGE_WAIT 2000       /* times 10 ms = 20 s */
  69 #define MAX_IOCTL_CONFIG_WAIT 1000
  70
  71 /*define how many times we will try a command because of bus resets */
  72 #define MAX_CMD_RETRIES 3
  73
  74 /* Embedded module documentation macros - see modules.h */
  75 MODULE_AUTHOR("Hewlett-Packard Company");
  76 MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
  77         HPSA_DRIVER_VERSION);
  78 MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
  79 MODULE_VERSION(HPSA_DRIVER_VERSION);
  80 MODULE_LICENSE("GPL");
  81
  82 static int hpsa_allow_any;
  83 module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
  84 MODULE_PARM_DESC(hpsa_allow_any,
  85                 "Allow hpsa driver to access unknown HP Smart Array hardware");
  86 static int hpsa_simple_mode;
  87 module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
  88 MODULE_PARM_DESC(hpsa_simple_mode,
  89         "Use 'simple mode' rather than 'performant mode'");
  90
  91 /* define the PCI info for the cards we can control */
  92 static const struct pci_device_id hpsa_pci_device_id[] = {
  93         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3241},
  94         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3243},
  95         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3245},
  96         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3247},
  97         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3249},
  98         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x324A},
  99         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x324B},
 100         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3233},
 101         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3350},
 102         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3351},
 103         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3352},
 104         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3353},
 105         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3354},
 106         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3355},
 107         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3356},
 108         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1921},
 109         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1922},
 110         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1923},
 111         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1924},
 112         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1926},
 113         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1928},
 114         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1929},
 115         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21BD},
 116         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21BE},
 117         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21BF},
 118         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C0},
 119         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C1},
 120         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C2},
 121         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C3},
 122         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C4},
 123         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C5},
 124         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C6},
 125         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C7},
 126         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C8},
 127         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C9},
 128         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CA},
 129         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CB},
 130         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CC},
 131         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CD},
 132         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CE},
 133         {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0076},
 134         {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0087},
 135         {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x007D},
 136         {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0088},
 137         {PCI_VENDOR_ID_HP, 0x333f, 0x103c, 0x333f},
 138         {PCI_VENDOR_ID_HP,     PCI_ANY_ID,      PCI_ANY_ID, PCI_ANY_ID,
 139                 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
 140         {0,}
 141 };
 142
 143 MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
 144
 145 /*  board_id = Subsystem Device ID & Vendor ID
 146  *  product = Marketing Name for the board
 147  *  access = Address of the struct of function pointers
 148  */
 149 static struct board_type products[] = {
 150         {0x3241103C, "Smart Array P212", &SA5_access},
 151         {0x3243103C, "Smart Array P410", &SA5_access},
 152         {0x3245103C, "Smart Array P410i", &SA5_access},
 153         {0x3247103C, "Smart Array P411", &SA5_access},
 154         {0x3249103C, "Smart Array P812", &SA5_access},
 155         {0x324A103C, "Smart Array P712m", &SA5_access},
 156         {0x324B103C, "Smart Array P711m", &SA5_access},
 157         {0x3233103C, "HP StorageWorks 1210m", &SA5_access}, /* alias of 333f */
 158         {0x3350103C, "Smart Array P222", &SA5_access},
 159         {0x3351103C, "Smart Array P420", &SA5_access},
 160         {0x3352103C, "Smart Array P421", &SA5_access},
 161         {0x3353103C, "Smart Array P822", &SA5_access},
 162         {0x3354103C, "Smart Array P420i", &SA5_access},
 163         {0x3355103C, "Smart Array P220i", &SA5_access},
 164         {0x3356103C, "Smart Array P721m", &SA5_access},
 165         {0x1921103C, "Smart Array P830i", &SA5_access},
 166         {0x1922103C, "Smart Array P430", &SA5_access},
 167         {0x1923103C, "Smart Array P431", &SA5_access},
 168         {0x1924103C, "Smart Array P830", &SA5_access},
 169         {0x1926103C, "Smart Array P731m", &SA5_access},
 170         {0x1928103C, "Smart Array P230i", &SA5_access},
 171         {0x1929103C, "Smart Array P530", &SA5_access},
 172         {0x21BD103C, "Smart Array P244br", &SA5_access},
 173         {0x21BE103C, "Smart Array P741m", &SA5_access},
 174         {0x21BF103C, "Smart HBA H240ar", &SA5_access},
 175         {0x21C0103C, "Smart Array P440ar", &SA5_access},
 176         {0x21C1103C, "Smart Array P840ar", &SA5_access},
 177         {0x21C2103C, "Smart Array P440", &SA5_access},
 178         {0x21C3103C, "Smart Array P441", &SA5_access},
 179         {0x21C4103C, "Smart Array", &SA5_access},
 180         {0x21C5103C, "Smart Array P841", &SA5_access},
 181         {0x21C6103C, "Smart HBA H244br", &SA5_access},
 182         {0x21C7103C, "Smart HBA H240", &SA5_access},
 183         {0x21C8103C, "Smart HBA H241", &SA5_access},
 184         {0x21C9103C, "Smart Array", &SA5_access},
 185         {0x21CA103C, "Smart Array P246br", &SA5_access},
 186         {0x21CB103C, "Smart Array P840", &SA5_access},
 187         {0x21CC103C, "Smart Array", &SA5_access},
 188         {0x21CD103C, "Smart Array", &SA5_access},
 189         {0x21CE103C, "Smart HBA", &SA5_access},
 190         {0x00761590, "HP Storage P1224 Array Controller", &SA5_access},
 191         {0x00871590, "HP Storage P1224e Array Controller", &SA5_access},
 192         {0x007D1590, "HP Storage P1228 Array Controller", &SA5_access},
 193         {0x00881590, "HP Storage P1228e Array Controller", &SA5_access},
 194         {0x333f103c, "HP StorageWorks 1210m Array Controller", &SA5_access},
 195         {0xFFFF103C, "Unknown Smart Array", &SA5_access},
 196 };
 197
 198 static int number_of_controllers;
 199
 200 static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
 201 static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
 202 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg);
 203
 204 #ifdef CONFIG_COMPAT
 205 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd,
 206         void __user *arg);
 207 #endif
 208
 209 static void cmd_free(struct ctlr_info *h, struct CommandList *c);
 210 static struct CommandList *cmd_alloc(struct ctlr_info *h);
 211 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
 212         void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
 213         int cmd_type);
 214 static void hpsa_free_cmd_pool(struct ctlr_info *h);
 215 #define VPD_PAGE (1 << 8)
 216
 217 static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
 218 static void hpsa_scan_start(struct Scsi_Host *);
 219 static int hpsa_scan_finished(struct Scsi_Host *sh,
 220         unsigned long elapsed_time);
 221 static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth);
 222
 223 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
 224 static int hpsa_eh_abort_handler(struct scsi_cmnd *scsicmd);
 225 static int hpsa_slave_alloc(struct scsi_device *sdev);
 226 static int hpsa_slave_configure(struct scsi_device *sdev);
 227 static void hpsa_slave_destroy(struct scsi_device *sdev);
 228
 229 static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno);
 230 static int check_for_unit_attention(struct ctlr_info *h,
 231         struct CommandList *c);
 232 static void check_ioctl_unit_attention(struct ctlr_info *h,
 233         struct CommandList *c);
 234 /* performant mode helper functions */
 235 static void calc_bucket_map(int *bucket, int num_buckets,
 236         int nsgs, int min_blocks, u32 *bucket_map);
 237 static void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
 238 static inline u32 next_command(struct ctlr_info *h, u8 q);
 239 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
 240                                u32 *cfg_base_addr, u64 *cfg_base_addr_index,
 241                                u64 *cfg_offset);
 242 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
 243                                     unsigned long *memory_bar);
 244 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);
 245 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
 246                                      int wait_for_ready);
 247 static inline void finish_cmd(struct CommandList *c);
 248 static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h);
 249 #define BOARD_NOT_READY 0
 250 #define BOARD_READY 1
 251 static void hpsa_drain_accel_commands(struct ctlr_info *h);
 252 static void hpsa_flush_cache(struct ctlr_info *h);
 253 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
 254         struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
 255         u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk);
 256 static void hpsa_command_resubmit_worker(struct work_struct *work);
 257 static u32 lockup_detected(struct ctlr_info *h);
 258 static int detect_controller_lockup(struct ctlr_info *h);
 259
 260 static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
 261 {
 262         unsigned long *priv = shost_priv(sdev->host);
 263         return (struct ctlr_info *) *priv;
 264 }
 265
 266 static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
 267 {
 268         unsigned long *priv = shost_priv(sh);
 269         return (struct ctlr_info *) *priv;
 270 }
 271
 272 /* extract sense key, asc, and ascq from sense data.  -1 means invalid. */
 273 static void decode_sense_data(const u8 *sense_data, int sense_data_len,
 274                         u8 *sense_key, u8 *asc, u8 *ascq)
 275 {
 276         struct scsi_sense_hdr sshdr;
 277         bool rc;
 278
 279         *sense_key = -1;
 280         *asc = -1;
 281         *ascq = -1;
 282
 283         if (sense_data_len < 1)
 284                 return;
 285
 286         rc = scsi_normalize_sense(sense_data, sense_data_len, &sshdr);
 287         if (rc) {
 288                 *sense_key = sshdr.sense_key;
 289                 *asc = sshdr.asc;
 290                 *ascq = sshdr.ascq;
 291         }
 292 }
 293
 294 static int check_for_unit_attention(struct ctlr_info *h,
 295         struct CommandList *c)
 296 {
 297         u8 sense_key, asc, ascq;
 298         int sense_len;
 299
 300         if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo))
 301                 sense_len = sizeof(c->err_info->SenseInfo);
 302         else
 303                 sense_len = c->err_info->SenseLen;
 304
 305         decode_sense_data(c->err_info->SenseInfo, sense_len,
 306                                 &sense_key, &asc, &ascq);
 307         if (sense_key != UNIT_ATTENTION || asc == -1)
 308                 return 0;
 309
 310         switch (asc) {
 311         case STATE_CHANGED:
 312                 dev_warn(&h->pdev->dev,
 313                         HPSA "%d: a state change detected, command retried\n",
 314                         h->ctlr);
 315                 break;
 316         case LUN_FAILED:
 317                 dev_warn(&h->pdev->dev,
 318                         HPSA "%d: LUN failure detected\n", h->ctlr);
 319                 break;
 320         case REPORT_LUNS_CHANGED:
 321                 dev_warn(&h->pdev->dev,
 322                         HPSA "%d: report LUN data changed\n", h->ctlr);
 323         /*
 324          * Note: this REPORT_LUNS_CHANGED condition only occurs on the external
 325          * target (array) devices.
 326          */
 327                 break;
 328         case POWER_OR_RESET:
 329                 dev_warn(&h->pdev->dev, HPSA "%d: a power on "
 330                         "or device reset detected\n", h->ctlr);
 331                 break;
 332         case UNIT_ATTENTION_CLEARED:
 333                 dev_warn(&h->pdev->dev, HPSA "%d: unit attention "
 334                     "cleared by another initiator\n", h->ctlr);
 335                 break;
 336         default:
 337                 dev_warn(&h->pdev->dev, HPSA "%d: unknown "
 338                         "unit attention detected\n", h->ctlr);
 339                 break;
 340         }
 341         return 1;
 342 }
 343
 344 static int check_for_busy(struct ctlr_info *h, struct CommandList *c)
 345 {
 346         if (c->err_info->CommandStatus != CMD_TARGET_STATUS ||
 347                 (c->err_info->ScsiStatus != SAM_STAT_BUSY &&
 348                  c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL))
 349                 return 0;
 350         dev_warn(&h->pdev->dev, HPSA "device busy");
 351         return 1;
 352 }
 353
 354 static u32 lockup_detected(struct ctlr_info *h);
 355 static ssize_t host_show_lockup_detected(struct device *dev,
 356                 struct device_attribute *attr, char *buf)
 357 {
 358         int ld;
 359         struct ctlr_info *h;
 360         struct Scsi_Host *shost = class_to_shost(dev);
 361
 362         h = shost_to_hba(shost);
 363         ld = lockup_detected(h);
 364
 365         return sprintf(buf, "ld=%d\n", ld);
 366 }
 367
 368 static ssize_t host_store_hp_ssd_smart_path_status(struct device *dev,
 369                                          struct device_attribute *attr,
 370                                          const char *buf, size_t count)
 371 {
 372         int status, len;
 373         struct ctlr_info *h;
 374         struct Scsi_Host *shost = class_to_shost(dev);
 375         char tmpbuf[10];
 376
 377         if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
 378                 return -EACCES;
 379         len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
 380         strncpy(tmpbuf, buf, len);
 381         tmpbuf[len] = '\0';
 382         if (sscanf(tmpbuf, "%d", &status) != 1)
 383                 return -EINVAL;
 384         h = shost_to_hba(shost);
 385         h->acciopath_status = !!status;
 386         dev_warn(&h->pdev->dev,
 387                 "hpsa: HP SSD Smart Path %s via sysfs update.\n",
 388                 h->acciopath_status ? "enabled" : "disabled");
 389         return count;
 390 }
 391
 392 static ssize_t host_store_raid_offload_debug(struct device *dev,
 393                                          struct device_attribute *attr,
 394                                          const char *buf, size_t count)
 395 {
 396         int debug_level, len;
 397         struct ctlr_info *h;
 398         struct Scsi_Host *shost = class_to_shost(dev);
 399         char tmpbuf[10];
 400
 401         if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
 402                 return -EACCES;
 403         len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
 404         strncpy(tmpbuf, buf, len);
 405         tmpbuf[len] = '\0';
 406         if (sscanf(tmpbuf, "%d", &debug_level) != 1)
 407                 return -EINVAL;
 408         if (debug_level < 0)
 409                 debug_level = 0;
 410         h = shost_to_hba(shost);
 411         h->raid_offload_debug = debug_level;
 412         dev_warn(&h->pdev->dev, "hpsa: Set raid_offload_debug level = %d\n",
 413                 h->raid_offload_debug);
 414         return count;
 415 }
 416
 417 static ssize_t host_store_rescan(struct device *dev,
 418                                  struct device_attribute *attr,
 419                                  const char *buf, size_t count)
 420 {
 421         struct ctlr_info *h;
 422         struct Scsi_Host *shost = class_to_shost(dev);
 423         h = shost_to_hba(shost);
 424         hpsa_scan_start(h->scsi_host);
 425         return count;
 426 }
 427
 428 static ssize_t host_show_firmware_revision(struct device *dev,
 429              struct device_attribute *attr, char *buf)
 430 {
 431         struct ctlr_info *h;
 432         struct Scsi_Host *shost = class_to_shost(dev);
 433         unsigned char *fwrev;
 434
 435         h = shost_to_hba(shost);
 436         if (!h->hba_inquiry_data)
 437                 return 0;
 438         fwrev = &h->hba_inquiry_data[32];
 439         return snprintf(buf, 20, "%c%c%c%c\n",
 440                 fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
 441 }
 442
 443 static ssize_t host_show_commands_outstanding(struct device *dev,
 444              struct device_attribute *attr, char *buf)
 445 {
 446         struct Scsi_Host *shost = class_to_shost(dev);
 447         struct ctlr_info *h = shost_to_hba(shost);
 448
 449         return snprintf(buf, 20, "%d\n",
 450                         atomic_read(&h->commands_outstanding));
 451 }
 452
 453 static ssize_t host_show_transport_mode(struct device *dev,
 454         struct device_attribute *attr, char *buf)
 455 {
 456         struct ctlr_info *h;
 457         struct Scsi_Host *shost = class_to_shost(dev);
 458
 459         h = shost_to_hba(shost);
 460         return snprintf(buf, 20, "%s\n",
 461                 h->transMethod & CFGTBL_Trans_Performant ?
 462                         "performant" : "simple");
 463 }
 464
 465 static ssize_t host_show_hp_ssd_smart_path_status(struct device *dev,
 466         struct device_attribute *attr, char *buf)
 467 {
 468         struct ctlr_info *h;
 469         struct Scsi_Host *shost = class_to_shost(dev);
 470
 471         h = shost_to_hba(shost);
 472         return snprintf(buf, 30, "HP SSD Smart Path %s\n",
 473                 (h->acciopath_status == 1) ?  "enabled" : "disabled");
 474 }
 475
 476 /* List of controllers which cannot be hard reset on kexec with reset_devices */
 477 static u32 unresettable_controller[] = {
 478         0x324a103C, /* Smart Array P712m */
 479         0x324b103C, /* Smart Array P711m */
 480         0x3223103C, /* Smart Array P800 */
 481         0x3234103C, /* Smart Array P400 */
 482         0x3235103C, /* Smart Array P400i */
 483         0x3211103C, /* Smart Array E200i */
 484         0x3212103C, /* Smart Array E200 */
 485         0x3213103C, /* Smart Array E200i */
 486         0x3214103C, /* Smart Array E200i */
 487         0x3215103C, /* Smart Array E200i */
 488         0x3237103C, /* Smart Array E500 */
 489         0x323D103C, /* Smart Array P700m */
 490         0x40800E11, /* Smart Array 5i */
 491         0x409C0E11, /* Smart Array 6400 */
 492         0x409D0E11, /* Smart Array 6400 EM */
 493         0x40700E11, /* Smart Array 5300 */
 494         0x40820E11, /* Smart Array 532 */
 495         0x40830E11, /* Smart Array 5312 */
 496         0x409A0E11, /* Smart Array 641 */
 497         0x409B0E11, /* Smart Array 642 */
 498         0x40910E11, /* Smart Array 6i */
 499 };
 500
 501 /* List of controllers which cannot even be soft reset */
 502 static u32 soft_unresettable_controller[] = {
 503         0x40800E11, /* Smart Array 5i */
 504         0x40700E11, /* Smart Array 5300 */
 505         0x40820E11, /* Smart Array 532 */
 506         0x40830E11, /* Smart Array 5312 */
 507         0x409A0E11, /* Smart Array 641 */
 508         0x409B0E11, /* Smart Array 642 */
 509         0x40910E11, /* Smart Array 6i */
 510         /* Exclude 640x boards.  These are two pci devices in one slot
 511          * which share a battery backed cache module.  One controls the
 512          * cache, the other accesses the cache through the one that controls
 513          * it.  If we reset the one controlling the cache, the other will
 514          * likely not be happy.  Just forbid resetting this conjoined mess.
 515          * The 640x isn't really supported by hpsa anyway.
 516          */
 517         0x409C0E11, /* Smart Array 6400 */
 518         0x409D0E11, /* Smart Array 6400 EM */
 519 };
 520
 521 static u32 needs_abort_tags_swizzled[] = {
 522         0x323D103C, /* Smart Array P700m */
 523         0x324a103C, /* Smart Array P712m */
 524         0x324b103C, /* SmartArray P711m */
 525 };
 526
 527 static int board_id_in_array(u32 a[], int nelems, u32 board_id)
 528 {
 529         int i;
 530
 531         for (i = 0; i < nelems; i++)
 532                 if (a[i] == board_id)
 533                         return 1;
 534         return 0;
 535 }
 536
 537 static int ctlr_is_hard_resettable(u32 board_id)
 538 {
 539         return !board_id_in_array(unresettable_controller,
 540                         ARRAY_SIZE(unresettable_controller), board_id);
 541 }
 542
 543 static int ctlr_is_soft_resettable(u32 board_id)
 544 {
 545         return !board_id_in_array(soft_unresettable_controller,
 546                         ARRAY_SIZE(soft_unresettable_controller), board_id);
 547 }
 548
 549 static int ctlr_is_resettable(u32 board_id)
 550 {
 551         return ctlr_is_hard_resettable(board_id) ||
 552                 ctlr_is_soft_resettable(board_id);
 553 }
 554
 555 static int ctlr_needs_abort_tags_swizzled(u32 board_id)
 556 {
 557         return board_id_in_array(needs_abort_tags_swizzled,
 558                         ARRAY_SIZE(needs_abort_tags_swizzled), board_id);
 559 }
 560
 561 static ssize_t host_show_resettable(struct device *dev,
 562         struct device_attribute *attr, char *buf)
 563 {
 564         struct ctlr_info *h;
 565         struct Scsi_Host *shost = class_to_shost(dev);
 566
 567         h = shost_to_hba(shost);
 568         return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
 569 }
 570
 571 static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
 572 {
 573         return (scsi3addr[3] & 0xC0) == 0x40;
 574 }
 575
 576 static const char * const raid_label[] = { "0", "4", "1(+0)", "5", "5+1", "6",
 577         "1(+0)ADM", "UNKNOWN"
 578 };
 579 #define HPSA_RAID_0     0
 580 #define HPSA_RAID_4     1
 581 #define HPSA_RAID_1     2       /* also used for RAID 10 */
 582 #define HPSA_RAID_5     3       /* also used for RAID 50 */
 583 #define HPSA_RAID_51    4
 584 #define HPSA_RAID_6     5       /* also used for RAID 60 */
 585 #define HPSA_RAID_ADM   6       /* also used for RAID 1+0 ADM */
 586 #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1)
 587
 588 static ssize_t raid_level_show(struct device *dev,
 589              struct device_attribute *attr, char *buf)
 590 {
 591         ssize_t l = 0;
 592         unsigned char rlevel;
 593         struct ctlr_info *h;
 594         struct scsi_device *sdev;
 595         struct hpsa_scsi_dev_t *hdev;
 596         unsigned long flags;
 597
 598         sdev = to_scsi_device(dev);
 599         h = sdev_to_hba(sdev);
 600         spin_lock_irqsave(&h->lock, flags);
 601         hdev = sdev->hostdata;
 602         if (!hdev) {
 603                 spin_unlock_irqrestore(&h->lock, flags);
 604                 return -ENODEV;
 605         }
 606
 607         /* Is this even a logical drive? */
 608         if (!is_logical_dev_addr_mode(hdev->scsi3addr)) {
 609                 spin_unlock_irqrestore(&h->lock, flags);
 610                 l = snprintf(buf, PAGE_SIZE, "N/A\n");
 611                 return l;
 612         }
 613
 614         rlevel = hdev->raid_level;
 615         spin_unlock_irqrestore(&h->lock, flags);
 616         if (rlevel > RAID_UNKNOWN)
 617                 rlevel = RAID_UNKNOWN;
 618         l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
 619         return l;
 620 }
 621
 622 static ssize_t lunid_show(struct device *dev,
 623              struct device_attribute *attr, char *buf)
 624 {
 625         struct ctlr_info *h;
 626         struct scsi_device *sdev;
 627         struct hpsa_scsi_dev_t *hdev;
 628         unsigned long flags;
 629         unsigned char lunid[8];
 630
 631         sdev = to_scsi_device(dev);
 632         h = sdev_to_hba(sdev);
 633         spin_lock_irqsave(&h->lock, flags);
 634         hdev = sdev->hostdata;
 635         if (!hdev) {
 636                 spin_unlock_irqrestore(&h->lock, flags);
 637                 return -ENODEV;
 638         }
 639         memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
 640         spin_unlock_irqrestore(&h->lock, flags);
 641         return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
 642                 lunid[0], lunid[1], lunid[2], lunid[3],
 643                 lunid[4], lunid[5], lunid[6], lunid[7]);
 644 }
 645
 646 static ssize_t unique_id_show(struct device *dev,
 647              struct device_attribute *attr, char *buf)
 648 {
 649         struct ctlr_info *h;
 650         struct scsi_device *sdev;
 651         struct hpsa_scsi_dev_t *hdev;
 652         unsigned long flags;
 653         unsigned char sn[16];
 654
 655         sdev = to_scsi_device(dev);
 656         h = sdev_to_hba(sdev);
 657         spin_lock_irqsave(&h->lock, flags);
 658         hdev = sdev->hostdata;
 659         if (!hdev) {
 660                 spin_unlock_irqrestore(&h->lock, flags);
 661                 return -ENODEV;
 662         }
 663         memcpy(sn, hdev->device_id, sizeof(sn));
 664         spin_unlock_irqrestore(&h->lock, flags);
 665         return snprintf(buf, 16 * 2 + 2,
 666                         "%02X%02X%02X%02X%02X%02X%02X%02X"
 667                         "%02X%02X%02X%02X%02X%02X%02X%02X\n",
 668                         sn[0], sn[1], sn[2], sn[3],
 669                         sn[4], sn[5], sn[6], sn[7],
 670                         sn[8], sn[9], sn[10], sn[11],
 671                         sn[12], sn[13], sn[14], sn[15]);
 672 }
 673
 674 static ssize_t host_show_hp_ssd_smart_path_enabled(struct device *dev,
 675              struct device_attribute *attr, char *buf)
 676 {
 677         struct ctlr_info *h;
 678         struct scsi_device *sdev;
 679         struct hpsa_scsi_dev_t *hdev;
 680         unsigned long flags;
 681         int offload_enabled;
 682
 683         sdev = to_scsi_device(dev);
 684         h = sdev_to_hba(sdev);
 685         spin_lock_irqsave(&h->lock, flags);
 686         hdev = sdev->hostdata;
 687         if (!hdev) {
 688                 spin_unlock_irqrestore(&h->lock, flags);
 689                 return -ENODEV;
 690         }
 691         offload_enabled = hdev->offload_enabled;
 692         spin_unlock_irqrestore(&h->lock, flags);
 693         return snprintf(buf, 20, "%d\n", offload_enabled);
 694 }
 695
 696 static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
 697 static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
 698 static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
 699 static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
 700 static DEVICE_ATTR(hp_ssd_smart_path_enabled, S_IRUGO,
 701                         host_show_hp_ssd_smart_path_enabled, NULL);
 702 static DEVICE_ATTR(hp_ssd_smart_path_status, S_IWUSR|S_IRUGO|S_IROTH,
 703                 host_show_hp_ssd_smart_path_status,
 704                 host_store_hp_ssd_smart_path_status);
 705 static DEVICE_ATTR(raid_offload_debug, S_IWUSR, NULL,
 706                         host_store_raid_offload_debug);
 707 static DEVICE_ATTR(firmware_revision, S_IRUGO,
 708         host_show_firmware_revision, NULL);
 709 static DEVICE_ATTR(commands_outstanding, S_IRUGO,
 710         host_show_commands_outstanding, NULL);
 711 static DEVICE_ATTR(transport_mode, S_IRUGO,
 712         host_show_transport_mode, NULL);
 713 static DEVICE_ATTR(resettable, S_IRUGO,
 714         host_show_resettable, NULL);
 715 static DEVICE_ATTR(lockup_detected, S_IRUGO,
 716         host_show_lockup_detected, NULL);
 717
 718 static struct device_attribute *hpsa_sdev_attrs[] = {
 719         &dev_attr_raid_level,
 720         &dev_attr_lunid,
 721         &dev_attr_unique_id,
 722         &dev_attr_hp_ssd_smart_path_enabled,
 723         &dev_attr_lockup_detected,
 724         NULL,
 725 };
 726
 727 static struct device_attribute *hpsa_shost_attrs[] = {
 728         &dev_attr_rescan,
 729         &dev_attr_firmware_revision,
 730         &dev_attr_commands_outstanding,
 731         &dev_attr_transport_mode,
 732         &dev_attr_resettable,
 733         &dev_attr_hp_ssd_smart_path_status,
 734         &dev_attr_raid_offload_debug,
 735         NULL,
 736 };
 737
 738 #define HPSA_NRESERVED_CMDS     (HPSA_CMDS_RESERVED_FOR_ABORTS + \
 739                 HPSA_CMDS_RESERVED_FOR_DRIVER + HPSA_MAX_CONCURRENT_PASSTHRUS)
 740
 741 static struct scsi_host_template hpsa_driver_template = {
 742         .module                 = THIS_MODULE,
 743         .name                   = HPSA,
 744         .proc_name              = HPSA,
 745         .queuecommand           = hpsa_scsi_queue_command,
 746         .scan_start             = hpsa_scan_start,
 747         .scan_finished          = hpsa_scan_finished,
 748         .change_queue_depth     = hpsa_change_queue_depth,
 749         .this_id                = -1,
 750         .use_clustering         = ENABLE_CLUSTERING,
 751         .eh_abort_handler       = hpsa_eh_abort_handler,
 752         .eh_device_reset_handler = hpsa_eh_device_reset_handler,
 753         .ioctl                  = hpsa_ioctl,
 754         .slave_alloc            = hpsa_slave_alloc,
 755         .slave_configure        = hpsa_slave_configure,
 756         .slave_destroy          = hpsa_slave_destroy,
 757 #ifdef CONFIG_COMPAT
 758         .compat_ioctl           = hpsa_compat_ioctl,
 759 #endif
 760         .sdev_attrs = hpsa_sdev_attrs,
 761         .shost_attrs = hpsa_shost_attrs,
 762         .max_sectors = 8192,
 763         .no_write_same = 1,
 764 };
 765
 766 static inline u32 next_command(struct ctlr_info *h, u8 q)
 767 {
 768         u32 a;
 769         struct reply_queue_buffer *rq = &h->reply_queue[q];
 770
 771         if (h->transMethod & CFGTBL_Trans_io_accel1)
 772                 return h->access.command_completed(h, q);
 773
 774         if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
 775                 return h->access.command_completed(h, q);
 776
 777         if ((rq->head[rq->current_entry] & 1) == rq->wraparound) {
 778                 a = rq->head[rq->current_entry];
 779                 rq->current_entry++;
 780                 atomic_dec(&h->commands_outstanding);
 781         } else {
 782                 a = FIFO_EMPTY;
 783         }
 784         /* Check for wraparound */
 785         if (rq->current_entry == h->max_commands) {
 786                 rq->current_entry = 0;
 787                 rq->wraparound ^= 1;
 788         }
 789         return a;
 790 }
 791
 792 /*
 793  * There are some special bits in the bus address of the
 794  * command that we have to set for the controller to know
 795  * how to process the command:
 796  *
 797  * Normal performant mode:
 798  * bit 0: 1 means performant mode, 0 means simple mode.
 799  * bits 1-3 = block fetch table entry
 800  * bits 4-6 = command type (== 0)
 801  *
 802  * ioaccel1 mode:
 803  * bit 0 = "performant mode" bit.
 804  * bits 1-3 = block fetch table entry
 805  * bits 4-6 = command type (== 110)
 806  * (command type is needed because ioaccel1 mode
 807  * commands are submitted through the same register as normal
 808  * mode commands, so this is how the controller knows whether
 809  * the command is normal mode or ioaccel1 mode.)
 810  *
 811  * ioaccel2 mode:
 812  * bit 0 = "performant mode" bit.
 813  * bits 1-4 = block fetch table entry (note extra bit)
 814  * bits 4-6 = not needed, because ioaccel2 mode has
 815  * a separate special register for submitting commands.
 816  */
 817
 818 /*
 819  * set_performant_mode: Modify the tag for cciss performant
 820  * set bit 0 for pull model, bits 3-1 for block fetch
 821  * register number
 822  */
 823 #define DEFAULT_REPLY_QUEUE (-1)
 824 static void set_performant_mode(struct ctlr_info *h, struct CommandList *c,
 825                                         int reply_queue)
 826 {
 827         if (likely(h->transMethod & CFGTBL_Trans_Performant)) {
 828                 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
 829                 if (unlikely(!h->msix_vector))
 830                         return;
 831                 if (likely(reply_queue == DEFAULT_REPLY_QUEUE))
 832                         c->Header.ReplyQueue =
 833                                 raw_smp_processor_id() % h->nreply_queues;
 834                 else
 835                         c->Header.ReplyQueue = reply_queue % h->nreply_queues;
 836         }
 837 }
 838
 839 static void set_ioaccel1_performant_mode(struct ctlr_info *h,
 840                                                 struct CommandList *c,
 841                                                 int reply_queue)
 842 {
 843         struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
 844
 845         /*
 846          * Tell the controller to post the reply to the queue for this
 847          * processor.  This seems to give the best I/O throughput.
 848          */
 849         if (likely(reply_queue == DEFAULT_REPLY_QUEUE))
 850                 cp->ReplyQueue = smp_processor_id() % h->nreply_queues;
 851         else
 852                 cp->ReplyQueue = reply_queue % h->nreply_queues;
 853         /*
 854          * Set the bits in the address sent down to include:
 855          *  - performant mode bit (bit 0)
 856          *  - pull count (bits 1-3)
 857          *  - command type (bits 4-6)
 858          */
 859         c->busaddr |= 1 | (h->ioaccel1_blockFetchTable[c->Header.SGList] << 1) |
 860                                         IOACCEL1_BUSADDR_CMDTYPE;
 861 }
 862
 863 static void set_ioaccel2_performant_mode(struct ctlr_info *h,
 864                                                 struct CommandList *c,
 865                                                 int reply_queue)
 866 {
 867         struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
 868
 869         /*
 870          * Tell the controller to post the reply to the queue for this
 871          * processor.  This seems to give the best I/O throughput.
 872          */
 873         if (likely(reply_queue == DEFAULT_REPLY_QUEUE))
 874                 cp->reply_queue = smp_processor_id() % h->nreply_queues;
 875         else
 876                 cp->reply_queue = reply_queue % h->nreply_queues;
 877         /*
 878          * Set the bits in the address sent down to include:
 879          *  - performant mode bit not used in ioaccel mode 2
 880          *  - pull count (bits 0-3)
 881          *  - command type isn't needed for ioaccel2
 882          */
 883         c->busaddr |= (h->ioaccel2_blockFetchTable[cp->sg_count]);
 884 }
 885
 886 static int is_firmware_flash_cmd(u8 *cdb)
 887 {
 888         return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE;
 889 }
 890
 891 /*
 892  * During firmware flash, the heartbeat register may not update as frequently
 893  * as it should.  So we dial down lockup detection during firmware flash. and
 894  * dial it back up when firmware flash completes.
 895  */
 896 #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ)
 897 #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ)
 898 static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h,
 899                 struct CommandList *c)
 900 {
 901         if (!is_firmware_flash_cmd(c->Request.CDB))
 902                 return;
 903         atomic_inc(&h->firmware_flash_in_progress);
 904         h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH;
 905 }
 906
 907 static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h,
 908                 struct CommandList *c)
 909 {
 910         if (is_firmware_flash_cmd(c->Request.CDB) &&
 911                 atomic_dec_and_test(&h->firmware_flash_in_progress))
 912                 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
 913 }
 914
 915 static void __enqueue_cmd_and_start_io(struct ctlr_info *h,
 916         struct CommandList *c, int reply_queue)
 917 {
 918         dial_down_lockup_detection_during_fw_flash(h, c);
 919         atomic_inc(&h->commands_outstanding);
 920         switch (c->cmd_type) {
 921         case CMD_IOACCEL1:
 922                 set_ioaccel1_performant_mode(h, c, reply_queue);
 923                 writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET);
 924                 break;
 925         case CMD_IOACCEL2:
 926                 set_ioaccel2_performant_mode(h, c, reply_queue);
 927                 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32);
 928                 break;
 929         default:
 930                 set_performant_mode(h, c, reply_queue);
 931                 h->access.submit_command(h, c);
 932         }
 933 }
 934
 935 static void enqueue_cmd_and_start_io(struct ctlr_info *h,
 936                                         struct CommandList *c)
 937 {
 938         __enqueue_cmd_and_start_io(h, c, DEFAULT_REPLY_QUEUE);
 939 }
 940
 941 static inline int is_hba_lunid(unsigned char scsi3addr[])
 942 {
 943         return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
 944 }
 945
 946 static inline int is_scsi_rev_5(struct ctlr_info *h)
 947 {
 948         if (!h->hba_inquiry_data)
 949                 return 0;
 950         if ((h->hba_inquiry_data[2] & 0x07) == 5)
 951                 return 1;
 952         return 0;
 953 }
 954
 955 static int hpsa_find_target_lun(struct ctlr_info *h,
 956         unsigned char scsi3addr[], int bus, int *target, int *lun)
 957 {
 958         /* finds an unused bus, target, lun for a new physical device
 959          * assumes h->devlock is held
 960          */
 961         int i, found = 0;
 962         DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES);
 963
 964         bitmap_zero(lun_taken, HPSA_MAX_DEVICES);
 965
 966         for (i = 0; i < h->ndevices; i++) {
 967                 if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
 968                         __set_bit(h->dev[i]->target, lun_taken);
 969         }
 970
 971         i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES);
 972         if (i < HPSA_MAX_DEVICES) {
 973                 /* *bus = 1; */
 974                 *target = i;
 975                 *lun = 0;
 976                 found = 1;
 977         }
 978         return !found;
 979 }
 980
 981 static inline void hpsa_show_dev_msg(const char *level, struct ctlr_info *h,
 982         struct hpsa_scsi_dev_t *dev, char *description)
 983 {
 984         dev_printk(level, &h->pdev->dev,
 985                         "scsi %d:%d:%d:%d: %s %s %.8s %.16s RAID-%s SSDSmartPathCap%c En%c Exp=%d\n",
 986                         h->scsi_host->host_no, dev->bus, dev->target, dev->lun,
 987                         description,
 988                         scsi_device_type(dev->devtype),
 989                         dev->vendor,
 990                         dev->model,
 991                         dev->raid_level > RAID_UNKNOWN ?
 992                                 "RAID-?" : raid_label[dev->raid_level],
 993                         dev->offload_config ? '+' : '-',
 994                         dev->offload_enabled ? '+' : '-',
 995                         dev->expose_state);
 996 }
 997
 998 /* Add an entry into h->dev[] array. */
 999 static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno,
1000                 struct hpsa_scsi_dev_t *device,
1001                 struct hpsa_scsi_dev_t *added[], int *nadded)
1002 {
1003         /* assumes h->devlock is held */
1004         int n = h->ndevices;
1005         int i;
1006         unsigned char addr1[8], addr2[8];
1007         struct hpsa_scsi_dev_t *sd;
1008
1009         if (n >= HPSA_MAX_DEVICES) {
1010                 dev_err(&h->pdev->dev, "too many devices, some will be "
1011                         "inaccessible.\n");
1012                 return -1;
1013         }
1014
1015         /* physical devices do not have lun or target assigned until now. */
1016         if (device->lun != -1)
1017                 /* Logical device, lun is already assigned. */
1018                 goto lun_assigned;
1019
1020         /* If this device a non-zero lun of a multi-lun device
1021          * byte 4 of the 8-byte LUN addr will contain the logical
1022          * unit no, zero otherwise.
1023          */
1024         if (device->scsi3addr[4] == 0) {
1025                 /* This is not a non-zero lun of a multi-lun device */
1026                 if (hpsa_find_target_lun(h, device->scsi3addr,
1027                         device->bus, &device->target, &device->lun) != 0)
1028                         return -1;
1029                 goto lun_assigned;
1030         }
1031
1032         /* This is a non-zero lun of a multi-lun device.
1033          * Search through our list and find the device which
1034          * has the same 8 byte LUN address, excepting byte 4.
1035          * Assign the same bus and target for this new LUN.
1036          * Use the logical unit number from the firmware.
1037          */
1038         memcpy(addr1, device->scsi3addr, 8);
1039         addr1[4] = 0;
1040         for (i = 0; i < n; i++) {
1041                 sd = h->dev[i];
1042                 memcpy(addr2, sd->scsi3addr, 8);
1043                 addr2[4] = 0;
1044                 /* differ only in byte 4? */
1045                 if (memcmp(addr1, addr2, 8) == 0) {
1046                         device->bus = sd->bus;
1047                         device->target = sd->target;
1048                         device->lun = device->scsi3addr[4];
1049                         break;
1050                 }
1051         }
1052         if (device->lun == -1) {
1053                 dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
1054                         " suspect firmware bug or unsupported hardware "
1055                         "configuration.\n");
1056                         return -1;
1057         }
1058
1059 lun_assigned:
1060
1061         h->dev[n] = device;
1062         h->ndevices++;
1063         device->offload_to_be_enabled = device->offload_enabled;
1064         device->offload_enabled = 0;
1065         added[*nadded] = device;
1066         (*nadded)++;
1067         hpsa_show_dev_msg(KERN_INFO, h, device,
1068                 device->expose_state & HPSA_SCSI_ADD ? "added" : "masked");
1069         return 0;
1070 }
1071
1072 /* Update an entry in h->dev[] array. */
1073 static void hpsa_scsi_update_entry(struct ctlr_info *h, int hostno,
1074         int entry, struct hpsa_scsi_dev_t *new_entry)
1075 {
1076         /* assumes h->devlock is held */
1077         BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1078
1079         /* Raid level changed. */
1080         h->dev[entry]->raid_level = new_entry->raid_level;
1081
1082         /* Raid offload parameters changed.  Careful about the ordering. */
1083         if (new_entry->offload_config && new_entry->offload_enabled) {
1084                 /*
1085                  * if drive is newly offload_enabled, we want to copy the
1086                  * raid map data first.  If previously offload_enabled and
1087                  * offload_config were set, raid map data had better be
1088                  * the same as it was before.  if raid map data is changed
1089                  * then it had better be the case that
1090                  * h->dev[entry]->offload_enabled is currently 0.
1091                  */
1092                 h->dev[entry]->raid_map = new_entry->raid_map;
1093                 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
1094         }
1095         h->dev[entry]->offload_config = new_entry->offload_config;
1096         h->dev[entry]->offload_to_mirror = new_entry->offload_to_mirror;
1097         h->dev[entry]->queue_depth = new_entry->queue_depth;
1098
1099         /*
1100          * We can turn off ioaccel offload now, but need to delay turning
1101          * it on until we can update h->dev[entry]->phys_disk[], but we
1102          * can't do that until all the devices are updated.
1103          */
1104         h->dev[entry]->offload_to_be_enabled = new_entry->offload_enabled;
1105         if (!new_entry->offload_enabled)
1106                 h->dev[entry]->offload_enabled = 0;
1107
1108         hpsa_show_dev_msg(KERN_INFO, h, h->dev[entry], "updated");
1109 }
1110
1111 /* Replace an entry from h->dev[] array. */
1112 static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno,
1113         int entry, struct hpsa_scsi_dev_t *new_entry,
1114         struct hpsa_scsi_dev_t *added[], int *nadded,
1115         struct hpsa_scsi_dev_t *removed[], int *nremoved)
1116 {
1117         /* assumes h->devlock is held */
1118         BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1119         removed[*nremoved] = h->dev[entry];
1120         (*nremoved)++;
1121
1122         /*
1123          * New physical devices won't have target/lun assigned yet
1124          * so we need to preserve the values in the slot we are replacing.
1125          */
1126         if (new_entry->target == -1) {
1127                 new_entry->target = h->dev[entry]->target;
1128                 new_entry->lun = h->dev[entry]->lun;
1129         }
1130
1131         new_entry->offload_to_be_enabled = new_entry->offload_enabled;
1132         new_entry->offload_enabled = 0;
1133         h->dev[entry] = new_entry;
1134         added[*nadded] = new_entry;
1135         (*nadded)++;
1136         hpsa_show_dev_msg(KERN_INFO, h, new_entry, "replaced");
1137 }
1138
1139 /* Remove an entry from h->dev[] array. */
1140 static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry,
1141         struct hpsa_scsi_dev_t *removed[], int *nremoved)
1142 {
1143         /* assumes h->devlock is held */
1144         int i;
1145         struct hpsa_scsi_dev_t *sd;
1146
1147         BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1148
1149         sd = h->dev[entry];
1150         removed[*nremoved] = h->dev[entry];
1151         (*nremoved)++;
1152
1153         for (i = entry; i < h->ndevices-1; i++)
1154                 h->dev[i] = h->dev[i+1];
1155         h->ndevices--;
1156         hpsa_show_dev_msg(KERN_INFO, h, sd, "removed");
1157 }
1158
1159 #define SCSI3ADDR_EQ(a, b) ( \
1160         (a)[7] == (b)[7] && \
1161         (a)[6] == (b)[6] && \
1162         (a)[5] == (b)[5] && \
1163         (a)[4] == (b)[4] && \
1164         (a)[3] == (b)[3] && \
1165         (a)[2] == (b)[2] && \
1166         (a)[1] == (b)[1] && \
1167         (a)[0] == (b)[0])
1168
1169 static void fixup_botched_add(struct ctlr_info *h,
1170         struct hpsa_scsi_dev_t *added)
1171 {
1172         /* called when scsi_add_device fails in order to re-adjust
1173          * h->dev[] to match the mid layer's view.
1174          */
1175         unsigned long flags;
1176         int i, j;
1177
1178         spin_lock_irqsave(&h->lock, flags);
1179         for (i = 0; i < h->ndevices; i++) {
1180                 if (h->dev[i] == added) {
1181                         for (j = i; j < h->ndevices-1; j++)
1182                                 h->dev[j] = h->dev[j+1];
1183                         h->ndevices--;
1184                         break;
1185                 }
1186         }
1187         spin_unlock_irqrestore(&h->lock, flags);
1188         kfree(added);
1189 }
1190
1191 static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
1192         struct hpsa_scsi_dev_t *dev2)
1193 {
1194         /* we compare everything except lun and target as these
1195          * are not yet assigned.  Compare parts likely
1196          * to differ first
1197          */
1198         if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
1199                 sizeof(dev1->scsi3addr)) != 0)
1200                 return 0;
1201         if (memcmp(dev1->device_id, dev2->device_id,
1202                 sizeof(dev1->device_id)) != 0)
1203                 return 0;
1204         if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
1205                 return 0;
1206         if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
1207                 return 0;
1208         if (dev1->devtype != dev2->devtype)
1209                 return 0;
1210         if (dev1->bus != dev2->bus)
1211                 return 0;
1212         return 1;
1213 }
1214
1215 static inline int device_updated(struct hpsa_scsi_dev_t *dev1,
1216         struct hpsa_scsi_dev_t *dev2)
1217 {
1218         /* Device attributes that can change, but don't mean
1219          * that the device is a different device, nor that the OS
1220          * needs to be told anything about the change.
1221          */
1222         if (dev1->raid_level != dev2->raid_level)
1223                 return 1;
1224         if (dev1->offload_config != dev2->offload_config)
1225                 return 1;
1226         if (dev1->offload_enabled != dev2->offload_enabled)
1227                 return 1;
1228         if (dev1->queue_depth != dev2->queue_depth)
1229                 return 1;
1230         return 0;
1231 }
1232
1233 /* Find needle in haystack.  If exact match found, return DEVICE_SAME,
1234  * and return needle location in *index.  If scsi3addr matches, but not
1235  * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
1236  * location in *index.
1237  * In the case of a minor device attribute change, such as RAID level, just
1238  * return DEVICE_UPDATED, along with the updated device's location in index.
1239  * If needle not found, return DEVICE_NOT_FOUND.
1240  */
1241 static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
1242         struct hpsa_scsi_dev_t *haystack[], int haystack_size,
1243         int *index)
1244 {
1245         int i;
1246 #define DEVICE_NOT_FOUND 0
1247 #define DEVICE_CHANGED 1
1248 #define DEVICE_SAME 2
1249 #define DEVICE_UPDATED 3
1250         for (i = 0; i < haystack_size; i++) {
1251                 if (haystack[i] == NULL) /* previously removed. */
1252                         continue;
1253                 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
1254                         *index = i;
1255                         if (device_is_the_same(needle, haystack[i])) {
1256                                 if (device_updated(needle, haystack[i]))
1257                                         return DEVICE_UPDATED;
1258                                 return DEVICE_SAME;
1259                         } else {
1260                                 /* Keep offline devices offline */
1261                                 if (needle->volume_offline)
1262                                         return DEVICE_NOT_FOUND;
1263                                 return DEVICE_CHANGED;
1264                         }
1265                 }
1266         }
1267         *index = -1;
1268         return DEVICE_NOT_FOUND;
1269 }
1270
1271 static void hpsa_monitor_offline_device(struct ctlr_info *h,
1272                                         unsigned char scsi3addr[])
1273 {
1274         struct offline_device_entry *device;
1275         unsigned long flags;
1276
1277         /* Check to see if device is already on the list */
1278         spin_lock_irqsave(&h->offline_device_lock, flags);
1279         list_for_each_entry(device, &h->offline_device_list, offline_list) {
1280                 if (memcmp(device->scsi3addr, scsi3addr,
1281                         sizeof(device->scsi3addr)) == 0) {
1282                         spin_unlock_irqrestore(&h->offline_device_lock, flags);
1283                         return;
1284                 }
1285         }
1286         spin_unlock_irqrestore(&h->offline_device_lock, flags);
1287
1288         /* Device is not on the list, add it. */
1289         device = kmalloc(sizeof(*device), GFP_KERNEL);
1290         if (!device) {
1291                 dev_warn(&h->pdev->dev, "out of memory in %s\n", __func__);
1292                 return;
1293         }
1294         memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr));
1295         spin_lock_irqsave(&h->offline_device_lock, flags);
1296         list_add_tail(&device->offline_list, &h->offline_device_list);
1297         spin_unlock_irqrestore(&h->offline_device_lock, flags);
1298 }
1299
1300 /* Print a message explaining various offline volume states */
1301 static void hpsa_show_volume_status(struct ctlr_info *h,
1302         struct hpsa_scsi_dev_t *sd)
1303 {
1304         if (sd->volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED)
1305                 dev_info(&h->pdev->dev,
1306                         "C%d:B%d:T%d:L%d Volume status is not available through vital product data pages.\n",
1307                         h->scsi_host->host_no,
1308                         sd->bus, sd->target, sd->lun);
1309         switch (sd->volume_offline) {
1310         case HPSA_LV_OK:
1311                 break;
1312         case HPSA_LV_UNDERGOING_ERASE:
1313                 dev_info(&h->pdev->dev,
1314                         "C%d:B%d:T%d:L%d Volume is undergoing background erase process.\n",
1315                         h->scsi_host->host_no,
1316                         sd->bus, sd->target, sd->lun);
1317                 break;
1318         case HPSA_LV_UNDERGOING_RPI:
1319                 dev_info(&h->pdev->dev,
1320                         "C%d:B%d:T%d:L%d Volume is undergoing rapid parity initialization process.\n",
1321                         h->scsi_host->host_no,
1322                         sd->bus, sd->target, sd->lun);
1323                 break;
1324         case HPSA_LV_PENDING_RPI:
1325                 dev_info(&h->pdev->dev,
1326                                 "C%d:B%d:T%d:L%d Volume is queued for rapid parity initialization process.\n",
1327                                 h->scsi_host->host_no,
1328                                 sd->bus, sd->target, sd->lun);
1329                 break;
1330         case HPSA_LV_ENCRYPTED_NO_KEY:
1331                 dev_info(&h->pdev->dev,
1332                         "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because key is not present.\n",
1333                         h->scsi_host->host_no,
1334                         sd->bus, sd->target, sd->lun);
1335                 break;
1336         case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
1337                 dev_info(&h->pdev->dev,
1338                         "C%d:B%d:T%d:L%d Volume is not encrypted and cannot be accessed because controller is in encryption-only mode.\n",
1339                         h->scsi_host->host_no,
1340                         sd->bus, sd->target, sd->lun);
1341                 break;
1342         case HPSA_LV_UNDERGOING_ENCRYPTION:
1343                 dev_info(&h->pdev->dev,
1344                         "C%d:B%d:T%d:L%d Volume is undergoing encryption process.\n",
1345                         h->scsi_host->host_no,
1346                         sd->bus, sd->target, sd->lun);
1347                 break;
1348         case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
1349                 dev_info(&h->pdev->dev,
1350                         "C%d:B%d:T%d:L%d Volume is undergoing encryption re-keying process.\n",
1351                         h->scsi_host->host_no,
1352                         sd->bus, sd->target, sd->lun);
1353                 break;
1354         case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
1355                 dev_info(&h->pdev->dev,
1356                         "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because controller does not have encryption enabled.\n",
1357                         h->scsi_host->host_no,
1358                         sd->bus, sd->target, sd->lun);
1359                 break;
1360         case HPSA_LV_PENDING_ENCRYPTION:
1361                 dev_info(&h->pdev->dev,
1362                         "C%d:B%d:T%d:L%d Volume is pending migration to encrypted state, but process has not started.\n",
1363                         h->scsi_host->host_no,
1364                         sd->bus, sd->target, sd->lun);
1365                 break;
1366         case HPSA_LV_PENDING_ENCRYPTION_REKEYING:
1367                 dev_info(&h->pdev->dev,
1368                         "C%d:B%d:T%d:L%d Volume is encrypted and is pending encryption rekeying.\n",
1369                         h->scsi_host->host_no,
1370                         sd->bus, sd->target, sd->lun);
1371                 break;
1372         }
1373 }
1374
1375 /*
1376  * Figure the list of physical drive pointers for a logical drive with
1377  * raid offload configured.
1378  */
1379 static void hpsa_figure_phys_disk_ptrs(struct ctlr_info *h,
1380                                 struct hpsa_scsi_dev_t *dev[], int ndevices,
1381                                 struct hpsa_scsi_dev_t *logical_drive)
1382 {
1383         struct raid_map_data *map = &logical_drive->raid_map;
1384         struct raid_map_disk_data *dd = &map->data[0];
1385         int i, j;
1386         int total_disks_per_row = le16_to_cpu(map->data_disks_per_row) +
1387                                 le16_to_cpu(map->metadata_disks_per_row);
1388         int nraid_map_entries = le16_to_cpu(map->row_cnt) *
1389                                 le16_to_cpu(map->layout_map_count) *
1390                                 total_disks_per_row;
1391         int nphys_disk = le16_to_cpu(map->layout_map_count) *
1392                                 total_disks_per_row;
1393         int qdepth;
1394
1395         if (nraid_map_entries > RAID_MAP_MAX_ENTRIES)
1396                 nraid_map_entries = RAID_MAP_MAX_ENTRIES;
1397
1398         qdepth = 0;
1399         for (i = 0; i < nraid_map_entries; i++) {
1400                 logical_drive->phys_disk[i] = NULL;
1401                 if (!logical_drive->offload_config)
1402                         continue;
1403                 for (j = 0; j < ndevices; j++) {
1404                         if (dev[j]->devtype != TYPE_DISK)
1405                                 continue;
1406                         if (is_logical_dev_addr_mode(dev[j]->scsi3addr))
1407                                 continue;
1408                         if (dev[j]->ioaccel_handle != dd[i].ioaccel_handle)
1409                                 continue;
1410
1411                         logical_drive->phys_disk[i] = dev[j];
1412                         if (i < nphys_disk)
1413                                 qdepth = min(h->nr_cmds, qdepth +
1414                                     logical_drive->phys_disk[i]->queue_depth);
1415                         break;
1416                 }
1417
1418                 /*
1419                  * This can happen if a physical drive is removed and
1420                  * the logical drive is degraded.  In that case, the RAID
1421                  * map data will refer to a physical disk which isn't actually
1422                  * present.  And in that case offload_enabled should already
1423                  * be 0, but we'll turn it off here just in case
1424                  */
1425                 if (!logical_drive->phys_disk[i]) {
1426                         logical_drive->offload_enabled = 0;
1427                         logical_drive->offload_to_be_enabled = 0;
1428                         logical_drive->queue_depth = 8;
1429                 }
1430         }
1431         if (nraid_map_entries)
1432                 /*
1433                  * This is correct for reads, too high for full stripe writes,
1434                  * way too high for partial stripe writes
1435                  */
1436                 logical_drive->queue_depth = qdepth;
1437         else
1438                 logical_drive->queue_depth = h->nr_cmds;
1439 }
1440
1441 static void hpsa_update_log_drive_phys_drive_ptrs(struct ctlr_info *h,
1442                                 struct hpsa_scsi_dev_t *dev[], int ndevices)
1443 {
1444         int i;
1445
1446         for (i = 0; i < ndevices; i++) {
1447                 if (dev[i]->devtype != TYPE_DISK)
1448                         continue;
1449                 if (!is_logical_dev_addr_mode(dev[i]->scsi3addr))
1450                         continue;
1451
1452                 /*
1453                  * If offload is currently enabled, the RAID map and
1454                  * phys_disk[] assignment *better* not be changing
1455                  * and since it isn't changing, we do not need to
1456                  * update it.
1457                  */
1458                 if (dev[i]->offload_enabled)
1459                         continue;
1460
1461                 hpsa_figure_phys_disk_ptrs(h, dev, ndevices, dev[i]);
1462         }
1463 }
1464
1465 static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno,
1466         struct hpsa_scsi_dev_t *sd[], int nsds)
1467 {
1468         /* sd contains scsi3 addresses and devtypes, and inquiry
1469          * data.  This function takes what's in sd to be the current
1470          * reality and updates h->dev[] to reflect that reality.
1471          */
1472         int i, entry, device_change, changes = 0;
1473         struct hpsa_scsi_dev_t *csd;
1474         unsigned long flags;
1475         struct hpsa_scsi_dev_t **added, **removed;
1476         int nadded, nremoved;
1477         struct Scsi_Host *sh = NULL;
1478
1479         added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL);
1480         removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL);
1481
1482         if (!added || !removed) {
1483                 dev_warn(&h->pdev->dev, "out of memory in "
1484                         "adjust_hpsa_scsi_table\n");
1485                 goto free_and_out;
1486         }
1487
1488         spin_lock_irqsave(&h->devlock, flags);
1489
1490         /* find any devices in h->dev[] that are not in
1491          * sd[] and remove them from h->dev[], and for any
1492          * devices which have changed, remove the old device
1493          * info and add the new device info.
1494          * If minor device attributes change, just update
1495          * the existing device structure.
1496          */
1497         i = 0;
1498         nremoved = 0;
1499         nadded = 0;
1500         while (i < h->ndevices) {
1501                 csd = h->dev[i];
1502                 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
1503                 if (device_change == DEVICE_NOT_FOUND) {
1504                         changes++;
1505                         hpsa_scsi_remove_entry(h, hostno, i,
1506                                 removed, &nremoved);
1507                         continue; /* remove ^^^, hence i not incremented */
1508                 } else if (device_change == DEVICE_CHANGED) {
1509                         changes++;
1510                         hpsa_scsi_replace_entry(h, hostno, i, sd[entry],
1511                                 added, &nadded, removed, &nremoved);
1512                         /* Set it to NULL to prevent it from being freed
1513                          * at the bottom of hpsa_update_scsi_devices()
1514                          */
1515                         sd[entry] = NULL;
1516                 } else if (device_change == DEVICE_UPDATED) {
1517                         hpsa_scsi_update_entry(h, hostno, i, sd[entry]);
1518                 }
1519                 i++;
1520         }
1521
1522         /* Now, make sure every device listed in sd[] is also
1523          * listed in h->dev[], adding them if they aren't found
1524          */
1525
1526         for (i = 0; i < nsds; i++) {
1527                 if (!sd[i]) /* if already added above. */
1528                         continue;
1529
1530                 /* Don't add devices which are NOT READY, FORMAT IN PROGRESS
1531                  * as the SCSI mid-layer does not handle such devices well.
1532                  * It relentlessly loops sending TUR at 3Hz, then READ(10)
1533                  * at 160Hz, and prevents the system from coming up.
1534                  */
1535                 if (sd[i]->volume_offline) {
1536                         hpsa_show_volume_status(h, sd[i]);
1537                         hpsa_show_dev_msg(KERN_INFO, h, sd[i], "offline");
1538                         continue;
1539                 }
1540
1541                 device_change = hpsa_scsi_find_entry(sd[i], h->dev,
1542                                         h->ndevices, &entry);
1543                 if (device_change == DEVICE_NOT_FOUND) {
1544                         changes++;
1545                         if (hpsa_scsi_add_entry(h, hostno, sd[i],
1546                                 added, &nadded) != 0)
1547                                 break;
1548                         sd[i] = NULL; /* prevent from being freed later. */
1549                 } else if (device_change == DEVICE_CHANGED) {
1550                         /* should never happen... */
1551                         changes++;
1552                         dev_warn(&h->pdev->dev,
1553                                 "device unexpectedly changed.\n");
1554                         /* but if it does happen, we just ignore that device */
1555                 }
1556         }
1557         hpsa_update_log_drive_phys_drive_ptrs(h, h->dev, h->ndevices);
1558
1559         /* Now that h->dev[]->phys_disk[] is coherent, we can enable
1560          * any logical drives that need it enabled.
1561          */
1562         for (i = 0; i < h->ndevices; i++)
1563                 h->dev[i]->offload_enabled = h->dev[i]->offload_to_be_enabled;
1564
1565         spin_unlock_irqrestore(&h->devlock, flags);
1566
1567         /* Monitor devices which are in one of several NOT READY states to be
1568          * brought online later. This must be done without holding h->devlock,
1569          * so don't touch h->dev[]
1570          */
1571         for (i = 0; i < nsds; i++) {
1572                 if (!sd[i]) /* if already added above. */
1573                         continue;
1574                 if (sd[i]->volume_offline)
1575                         hpsa_monitor_offline_device(h, sd[i]->scsi3addr);
1576         }
1577
1578         /* Don't notify scsi mid layer of any changes the first time through
1579          * (or if there are no changes) scsi_scan_host will do it later the
1580          * first time through.
1581          */
1582         if (hostno == -1 || !changes)
1583                 goto free_and_out;
1584
1585         sh = h->scsi_host;
1586         /* Notify scsi mid layer of any removed devices */
1587         for (i = 0; i < nremoved; i++) {
1588                 if (removed[i]->expose_state & HPSA_SCSI_ADD) {
1589                         struct scsi_device *sdev =
1590                                 scsi_device_lookup(sh, removed[i]->bus,
1591                                         removed[i]->target, removed[i]->lun);
1592                         if (sdev != NULL) {
1593                                 scsi_remove_device(sdev);
1594                                 scsi_device_put(sdev);
1595                         } else {
1596                                 /*
1597                                  * We don't expect to get here.
1598                                  * future cmds to this device will get selection
1599                                  * timeout as if the device was gone.
1600                                  */
1601                                 hpsa_show_dev_msg(KERN_WARNING, h, removed[i],
1602                                         "didn't find device for removal.");
1603                         }
1604                 }
1605                 kfree(removed[i]);
1606                 removed[i] = NULL;
1607         }
1608
1609         /* Notify scsi mid layer of any added devices */
1610         for (i = 0; i < nadded; i++) {
1611                 if (!(added[i]->expose_state & HPSA_SCSI_ADD))
1612                         continue;
1613                 if (scsi_add_device(sh, added[i]->bus,
1614                         added[i]->target, added[i]->lun) == 0)
1615                         continue;
1616                 hpsa_show_dev_msg(KERN_WARNING, h, added[i],
1617                                         "addition failed, device not added.");
1618                 /* now we have to remove it from h->dev,
1619                  * since it didn't get added to scsi mid layer
1620                  */
1621                 fixup_botched_add(h, added[i]);
1622         }
1623
1624 free_and_out:
1625         kfree(added);
1626         kfree(removed);
1627 }
1628
1629 /*
1630  * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t *
1631  * Assume's h->devlock is held.
1632  */
1633 static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
1634         int bus, int target, int lun)
1635 {
1636         int i;
1637         struct hpsa_scsi_dev_t *sd;
1638
1639         for (i = 0; i < h->ndevices; i++) {
1640                 sd = h->dev[i];
1641                 if (sd->bus == bus && sd->target == target && sd->lun == lun)
1642                         return sd;
1643         }
1644         return NULL;
1645 }
1646
1647 static int hpsa_slave_alloc(struct scsi_device *sdev)
1648 {
1649         struct hpsa_scsi_dev_t *sd;
1650         unsigned long flags;
1651         struct ctlr_info *h;
1652
1653         h = sdev_to_hba(sdev);
1654         spin_lock_irqsave(&h->devlock, flags);
1655         sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
1656                 sdev_id(sdev), sdev->lun);
1657         if (likely(sd)) {
1658                 atomic_set(&sd->ioaccel_cmds_out, 0);
1659                 sdev->hostdata = (sd->expose_state & HPSA_SCSI_ADD) ? sd : NULL;
1660         } else
1661                 sdev->hostdata = NULL;
1662         spin_unlock_irqrestore(&h->devlock, flags);
1663         return 0;
1664 }
1665
1666 /* configure scsi device based on internal per-device structure */
1667 static int hpsa_slave_configure(struct scsi_device *sdev)
1668 {
1669         struct hpsa_scsi_dev_t *sd;
1670         int queue_depth;
1671
1672         sd = sdev->hostdata;
1673         sdev->no_uld_attach = !sd || !(sd->expose_state & HPSA_ULD_ATTACH);
1674
1675         if (sd)
1676                 queue_depth = sd->queue_depth != 0 ?
1677                         sd->queue_depth : sdev->host->can_queue;
1678         else
1679                 queue_depth = sdev->host->can_queue;
1680
1681         scsi_change_queue_depth(sdev, queue_depth);
1682
1683         return 0;
1684 }
1685
1686 static void hpsa_slave_destroy(struct scsi_device *sdev)
1687 {
1688         /* nothing to do. */
1689 }
1690
1691 static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
1692 {
1693         int i;
1694
1695         if (!h->cmd_sg_list)
1696                 return;
1697         for (i = 0; i < h->nr_cmds; i++) {
1698                 kfree(h->cmd_sg_list[i]);
1699                 h->cmd_sg_list[i] = NULL;
1700         }
1701         kfree(h->cmd_sg_list);
1702         h->cmd_sg_list = NULL;
1703 }
1704
1705 static int hpsa_allocate_sg_chain_blocks(struct ctlr_info *h)
1706 {
1707         int i;
1708
1709         if (h->chainsize <= 0)
1710                 return 0;
1711
1712         h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
1713                                 GFP_KERNEL);
1714         if (!h->cmd_sg_list) {
1715                 dev_err(&h->pdev->dev, "Failed to allocate SG list\n");
1716                 return -ENOMEM;
1717         }
1718         for (i = 0; i < h->nr_cmds; i++) {
1719                 h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
1720                                                 h->chainsize, GFP_KERNEL);
1721                 if (!h->cmd_sg_list[i]) {
1722                         dev_err(&h->pdev->dev, "Failed to allocate cmd SG\n");
1723                         goto clean;
1724                 }
1725         }
1726         return 0;
1727
1728 clean:
1729         hpsa_free_sg_chain_blocks(h);
1730         return -ENOMEM;
1731 }
1732
1733 static int hpsa_map_sg_chain_block(struct ctlr_info *h,
1734         struct CommandList *c)
1735 {
1736         struct SGDescriptor *chain_sg, *chain_block;
1737         u64 temp64;
1738         u32 chain_len;
1739
1740         chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
1741         chain_block = h->cmd_sg_list[c->cmdindex];
1742         chain_sg->Ext = cpu_to_le32(HPSA_SG_CHAIN);
1743         chain_len = sizeof(*chain_sg) *
1744                 (le16_to_cpu(c->Header.SGTotal) - h->max_cmd_sg_entries);
1745         chain_sg->Len = cpu_to_le32(chain_len);
1746         temp64 = pci_map_single(h->pdev, chain_block, chain_len,
1747                                 PCI_DMA_TODEVICE);
1748         if (dma_mapping_error(&h->pdev->dev, temp64)) {
1749                 /* prevent subsequent unmapping */
1750                 chain_sg->Addr = cpu_to_le64(0);
1751                 return -1;
1752         }
1753         chain_sg->Addr = cpu_to_le64(temp64);
1754         return 0;
1755 }
1756
1757 static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
1758         struct CommandList *c)
1759 {
1760         struct SGDescriptor *chain_sg;
1761
1762         if (le16_to_cpu(c->Header.SGTotal) <= h->max_cmd_sg_entries)
1763                 return;
1764
1765         chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
1766         pci_unmap_single(h->pdev, le64_to_cpu(chain_sg->Addr),
1767                         le32_to_cpu(chain_sg->Len), PCI_DMA_TODEVICE);
1768 }
1769
1770
1771 /* Decode the various types of errors on ioaccel2 path.
1772  * Return 1 for any error that should generate a RAID path retry.
1773  * Return 0 for errors that don't require a RAID path retry.
1774  */
1775 static int handle_ioaccel_mode2_error(struct ctlr_info *h,
1776                                         struct CommandList *c,
1777                                         struct scsi_cmnd *cmd,
1778                                         struct io_accel2_cmd *c2)
1779 {
1780         int data_len;
1781         int retry = 0;
1782
1783         switch (c2->error_data.serv_response) {
1784         case IOACCEL2_SERV_RESPONSE_COMPLETE:
1785                 switch (c2->error_data.status) {
1786                 case IOACCEL2_STATUS_SR_TASK_COMP_GOOD:
1787                         break;
1788                 case IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND:
1789                         dev_warn(&h->pdev->dev,
1790                                 "%s: task complete with check condition.\n",
1791                                 "HP SSD Smart Path");
1792                         cmd->result |= SAM_STAT_CHECK_CONDITION;
1793                         if (c2->error_data.data_present !=
1794                                         IOACCEL2_SENSE_DATA_PRESENT) {
1795                                 memset(cmd->sense_buffer, 0,
1796                                         SCSI_SENSE_BUFFERSIZE);
1797                                 break;
1798                         }
1799                         /* copy the sense data */
1800                         data_len = c2->error_data.sense_data_len;
1801                         if (data_len > SCSI_SENSE_BUFFERSIZE)
1802                                 data_len = SCSI_SENSE_BUFFERSIZE;
1803                         if (data_len > sizeof(c2->error_data.sense_data_buff))
1804                                 data_len =
1805                                         sizeof(c2->error_data.sense_data_buff);
1806                         memcpy(cmd->sense_buffer,
1807                                 c2->error_data.sense_data_buff, data_len);
1808                         retry = 1;
1809                         break;
1810                 case IOACCEL2_STATUS_SR_TASK_COMP_BUSY:
1811                         dev_warn(&h->pdev->dev,
1812                                 "%s: task complete with BUSY status.\n",
1813                                 "HP SSD Smart Path");
1814                         retry = 1;
1815                         break;
1816                 case IOACCEL2_STATUS_SR_TASK_COMP_RES_CON:
1817                         dev_warn(&h->pdev->dev,
1818                                 "%s: task complete with reservation conflict.\n",
1819                                 "HP SSD Smart Path");
1820                         retry = 1;
1821                         break;
1822                 case IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL:
1823                         retry = 1;
1824                         break;
1825                 case IOACCEL2_STATUS_SR_TASK_COMP_ABORTED:
1826                         dev_warn(&h->pdev->dev,
1827                                 "%s: task complete with aborted status.\n",
1828                                 "HP SSD Smart Path");
1829                         retry = 1;
1830                         break;
1831                 default:
1832                         dev_warn(&h->pdev->dev,
1833                                 "%s: task complete with unrecognized status: 0x%02x\n",
1834                                 "HP SSD Smart Path", c2->error_data.status);
1835                         retry = 1;
1836                         break;
1837                 }
1838                 break;
1839         case IOACCEL2_SERV_RESPONSE_FAILURE:
1840                 /* don't expect to get here. */
1841                 dev_warn(&h->pdev->dev,
1842                         "unexpected delivery or target failure, status = 0x%02x\n",
1843                         c2->error_data.status);
1844                 retry = 1;
1845                 break;
1846         case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE:
1847                 break;
1848         case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS:
1849                 break;
1850         case IOACCEL2_SERV_RESPONSE_TMF_REJECTED:
1851                 dev_warn(&h->pdev->dev, "task management function rejected.\n");
1852                 retry = 1;
1853                 break;
1854         case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN:
1855                 dev_warn(&h->pdev->dev, "task management function invalid LUN\n");
1856                 break;
1857         default:
1858                 dev_warn(&h->pdev->dev,
1859                         "%s: Unrecognized server response: 0x%02x\n",
1860                         "HP SSD Smart Path",
1861                         c2->error_data.serv_response);
1862                 retry = 1;
1863                 break;
1864         }
1865
1866         return retry;   /* retry on raid path? */
1867 }
1868
1869 static void process_ioaccel2_completion(struct ctlr_info *h,
1870                 struct CommandList *c, struct scsi_cmnd *cmd,
1871                 struct hpsa_scsi_dev_t *dev)
1872 {
1873         struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
1874
1875         /* check for good status */
1876         if (likely(c2->error_data.serv_response == 0 &&
1877                         c2->error_data.status == 0)) {
1878                 cmd_free(h, c);
1879                 cmd->scsi_done(cmd);
1880                 return;
1881         }
1882
1883         /* Any RAID offload error results in retry which will use
1884          * the normal I/O path so the controller can handle whatever's
1885          * wrong.
1886          */
1887         if (is_logical_dev_addr_mode(dev->scsi3addr) &&
1888                 c2->error_data.serv_response ==
1889                         IOACCEL2_SERV_RESPONSE_FAILURE) {
1890                 if (c2->error_data.status ==
1891                         IOACCEL2_STATUS_SR_IOACCEL_DISABLED)
1892                         dev->offload_enabled = 0;
1893                 goto retry_cmd;
1894         }
1895
1896         if (handle_ioaccel_mode2_error(h, c, cmd, c2))
1897                 goto retry_cmd;
1898
1899         cmd_free(h, c);
1900         cmd->scsi_done(cmd);
1901         return;
1902
1903 retry_cmd:
1904         INIT_WORK(&c->work, hpsa_command_resubmit_worker);
1905         queue_work_on(raw_smp_processor_id(), h->resubmit_wq, &c->work);
1906 }
1907
1908 /* Returns 0 on success, < 0 otherwise. */
1909 static int hpsa_evaluate_tmf_status(struct ctlr_info *h,
1910                                         struct CommandList *cp)
1911 {
1912         u8 tmf_status = cp->err_info->ScsiStatus;
1913
1914         switch (tmf_status) {
1915         case CISS_TMF_COMPLETE:
1916                 /*
1917                  * CISS_TMF_COMPLETE never happens, instead,
1918                  * ei->CommandStatus == 0 for this case.
1919                  */
1920         case CISS_TMF_SUCCESS:
1921                 return 0;
1922         case CISS_TMF_INVALID_FRAME:
1923         case CISS_TMF_NOT_SUPPORTED:
1924         case CISS_TMF_FAILED:
1925         case CISS_TMF_WRONG_LUN:
1926         case CISS_TMF_OVERLAPPED_TAG:
1927                 break;
1928         default:
1929                 dev_warn(&h->pdev->dev, "Unknown TMF status: 0x%02x\n",
1930                                 tmf_status);
1931                 break;
1932         }
1933         return -tmf_status;
1934 }
1935
1936 static void complete_scsi_command(struct CommandList *cp)
1937 {
1938         struct scsi_cmnd *cmd;
1939         struct ctlr_info *h;
1940         struct ErrorInfo *ei;
1941         struct hpsa_scsi_dev_t *dev;
1942
1943         u8 sense_key;
1944         u8 asc;      /* additional sense code */
1945         u8 ascq;     /* additional sense code qualifier */
1946         unsigned long sense_data_size;
1947
1948         ei = cp->err_info;
1949         cmd = cp->scsi_cmd;
1950         h = cp->h;
1951         dev = cmd->device->hostdata;
1952
1953         scsi_dma_unmap(cmd); /* undo the DMA mappings */
1954         if ((cp->cmd_type == CMD_SCSI) &&
1955                 (le16_to_cpu(cp->Header.SGTotal) > h->max_cmd_sg_entries))
1956                 hpsa_unmap_sg_chain_block(h, cp);
1957
1958         cmd->result = (DID_OK << 16);           /* host byte */
1959         cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
1960
1961         if (cp->cmd_type == CMD_IOACCEL2 || cp->cmd_type == CMD_IOACCEL1)
1962                 atomic_dec(&cp->phys_disk->ioaccel_cmds_out);
1963
1964         /*
1965          * We check for lockup status here as it may be set for
1966          * CMD_SCSI, CMD_IOACCEL1 and CMD_IOACCEL2 commands by
1967          * fail_all_oustanding_cmds()
1968          */
1969         if (unlikely(ei->CommandStatus == CMD_CTLR_LOCKUP)) {
1970                 /* DID_NO_CONNECT will prevent a retry */
1971                 cmd->result = DID_NO_CONNECT << 16;
1972                 cmd_free(h, cp);
1973                 cmd->scsi_done(cmd);
1974                 return;
1975         }
1976
1977         if (cp->cmd_type == CMD_IOACCEL2)
1978                 return process_ioaccel2_completion(h, cp, cmd, dev);
1979
1980         scsi_set_resid(cmd, ei->ResidualCnt);
1981         if (ei->CommandStatus == 0) {
1982                 if (cp->cmd_type == CMD_IOACCEL1)
1983                         atomic_dec(&cp->phys_disk->ioaccel_cmds_out);
1984                 cmd_free(h, cp);
1985                 cmd->scsi_done(cmd);
1986                 return;
1987         }
1988
1989         /* For I/O accelerator commands, copy over some fields to the normal
1990          * CISS header used below for error handling.
1991          */
1992         if (cp->cmd_type == CMD_IOACCEL1) {
1993                 struct io_accel1_cmd *c = &h->ioaccel_cmd_pool[cp->cmdindex];
1994                 cp->Header.SGList = scsi_sg_count(cmd);
1995                 cp->Header.SGTotal = cpu_to_le16(cp->Header.SGList);
1996                 cp->Request.CDBLen = le16_to_cpu(c->io_flags) &
1997                         IOACCEL1_IOFLAGS_CDBLEN_MASK;
1998                 cp->Header.tag = c->tag;
1999                 memcpy(cp->Header.LUN.LunAddrBytes, c->CISS_LUN, 8);
2000                 memcpy(cp->Request.CDB, c->CDB, cp->Request.CDBLen);
2001
2002                 /* Any RAID offload error results in retry which will use
2003                  * the normal I/O path so the controller can handle whatever's
2004                  * wrong.
2005                  */
2006                 if (is_logical_dev_addr_mode(dev->scsi3addr)) {
2007                         if (ei->CommandStatus == CMD_IOACCEL_DISABLED)
2008                                 dev->offload_enabled = 0;
2009                         INIT_WORK(&cp->work, hpsa_command_resubmit_worker);
2010                         queue_work_on(raw_smp_processor_id(),
2011                                         h->resubmit_wq, &cp->work);
2012                         return;
2013                 }
2014         }
2015
2016         /* an error has occurred */
2017         switch (ei->CommandStatus) {
2018
2019         case CMD_TARGET_STATUS:
2020                 cmd->result |= ei->ScsiStatus;
2021                 /* copy the sense data */
2022                 if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo))
2023                         sense_data_size = SCSI_SENSE_BUFFERSIZE;
2024                 else
2025                         sense_data_size = sizeof(ei->SenseInfo);
2026                 if (ei->SenseLen < sense_data_size)
2027                         sense_data_size = ei->SenseLen;
2028                 memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size);
2029                 if (ei->ScsiStatus)
2030                         decode_sense_data(ei->SenseInfo, sense_data_size,
2031                                 &sense_key, &asc, &ascq);
2032                 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
2033                         if (sense_key == ABORTED_COMMAND) {
2034                                 cmd->result |= DID_SOFT_ERROR << 16;
2035                                 break;
2036                         }
2037                         break;
2038                 }
2039                 /* Problem was not a check condition
2040                  * Pass it up to the upper layers...
2041                  */
2042                 if (ei->ScsiStatus) {
2043                         dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
2044                                 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
2045                                 "Returning result: 0x%x\n",
2046                                 cp, ei->ScsiStatus,
2047                                 sense_key, asc, ascq,
2048                                 cmd->result);
2049                 } else {  /* scsi status is zero??? How??? */
2050                         dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
2051                                 "Returning no connection.\n", cp),
2052
2053                         /* Ordinarily, this case should never happen,
2054                          * but there is a bug in some released firmware
2055                          * revisions that allows it to happen if, for
2056                          * example, a 4100 backplane loses power and
2057                          * the tape drive is in it.  We assume that
2058                          * it's a fatal error of some kind because we
2059                          * can't show that it wasn't. We will make it
2060                          * look like selection timeout since that is
2061                          * the most common reason for this to occur,
2062                          * and it's severe enough.
2063                          */
2064
2065                         cmd->result = DID_NO_CONNECT << 16;
2066                 }
2067                 break;
2068
2069         case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
2070                 break;
2071         case CMD_DATA_OVERRUN:
2072                 dev_warn(&h->pdev->dev,
2073                         "CDB %16phN data overrun\n", cp->Request.CDB);
2074                 break;
2075         case CMD_INVALID: {
2076                 /* print_bytes(cp, sizeof(*cp), 1, 0);
2077                 print_cmd(cp); */
2078                 /* We get CMD_INVALID if you address a non-existent device
2079                  * instead of a selection timeout (no response).  You will
2080                  * see this if you yank out a drive, then try to access it.
2081                  * This is kind of a shame because it means that any other
2082                  * CMD_INVALID (e.g. driver bug) will get interpreted as a
2083                  * missing target. */
2084                 cmd->result = DID_NO_CONNECT << 16;
2085         }
2086                 break;
2087         case CMD_PROTOCOL_ERR:
2088                 cmd->result = DID_ERROR << 16;
2089                 dev_warn(&h->pdev->dev, "CDB %16phN : protocol error\n",
2090                                 cp->Request.CDB);
2091                 break;
2092         case CMD_HARDWARE_ERR:
2093                 cmd->result = DID_ERROR << 16;
2094                 dev_warn(&h->pdev->dev, "CDB %16phN : hardware error\n",
2095                         cp->Request.CDB);
2096                 break;
2097         case CMD_CONNECTION_LOST:
2098                 cmd->result = DID_ERROR << 16;
2099                 dev_warn(&h->pdev->dev, "CDB %16phN : connection lost\n",
2100                         cp->Request.CDB);
2101                 break;
2102         case CMD_ABORTED:
2103                 cmd->result = DID_ABORT << 16;
2104                 dev_warn(&h->pdev->dev, "CDB %16phN was aborted with status 0x%x\n",
2105                                 cp->Request.CDB, ei->ScsiStatus);
2106                 break;
2107         case CMD_ABORT_FAILED:
2108                 cmd->result = DID_ERROR << 16;
2109                 dev_warn(&h->pdev->dev, "CDB %16phN : abort failed\n",
2110                         cp->Request.CDB);
2111                 break;
2112         case CMD_UNSOLICITED_ABORT:
2113                 cmd->result = DID_SOFT_ERROR << 16; /* retry the command */
2114                 dev_warn(&h->pdev->dev, "CDB %16phN : unsolicited abort\n",
2115                         cp->Request.CDB);
2116                 break;
2117         case CMD_TIMEOUT:
2118                 cmd->result = DID_TIME_OUT << 16;
2119                 dev_warn(&h->pdev->dev, "CDB %16phN timed out\n",
2120                         cp->Request.CDB);
2121                 break;
2122         case CMD_UNABORTABLE:
2123                 cmd->result = DID_ERROR << 16;
2124                 dev_warn(&h->pdev->dev, "Command unabortable\n");
2125                 break;
2126         case CMD_TMF_STATUS:
2127                 if (hpsa_evaluate_tmf_status(h, cp)) /* TMF failed? */
2128                         cmd->result = DID_ERROR << 16;
2129                 break;
2130         case CMD_IOACCEL_DISABLED:
2131                 /* This only handles the direct pass-through case since RAID
2132                  * offload is handled above.  Just attempt a retry.
2133                  */
2134                 cmd->result = DID_SOFT_ERROR << 16;
2135                 dev_warn(&h->pdev->dev,
2136                                 "cp %p had HP SSD Smart Path error\n", cp);
2137                 break;
2138         default:
2139                 cmd->result = DID_ERROR << 16;
2140                 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
2141                                 cp, ei->CommandStatus);
2142         }
2143         cmd_free(h, cp);
2144         cmd->scsi_done(cmd);
2145 }
2146
2147 static void hpsa_pci_unmap(struct pci_dev *pdev,
2148         struct CommandList *c, int sg_used, int data_direction)
2149 {
2150         int i;
2151
2152         for (i = 0; i < sg_used; i++)
2153                 pci_unmap_single(pdev, (dma_addr_t) le64_to_cpu(c->SG[i].Addr),
2154                                 le32_to_cpu(c->SG[i].Len),
2155                                 data_direction);
2156 }
2157
2158 static int hpsa_map_one(struct pci_dev *pdev,
2159                 struct CommandList *cp,
2160                 unsigned char *buf,
2161                 size_t buflen,
2162                 int data_direction)
2163 {
2164         u64 addr64;
2165
2166         if (buflen == 0 || data_direction == PCI_DMA_NONE) {
2167                 cp->Header.SGList = 0;
2168                 cp->Header.SGTotal = cpu_to_le16(0);
2169                 return 0;
2170         }
2171
2172         addr64 = pci_map_single(pdev, buf, buflen, data_direction);
2173         if (dma_mapping_error(&pdev->dev, addr64)) {
2174                 /* Prevent subsequent unmap of something never mapped */
2175                 cp->Header.SGList = 0;
2176                 cp->Header.SGTotal = cpu_to_le16(0);
2177                 return -1;
2178         }
2179         cp->SG[0].Addr = cpu_to_le64(addr64);
2180         cp->SG[0].Len = cpu_to_le32(buflen);
2181         cp->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* we are not chaining */
2182         cp->Header.SGList = 1;   /* no. SGs contig in this cmd */
2183         cp->Header.SGTotal = cpu_to_le16(1); /* total sgs in cmd list */
2184         return 0;
2185 }
2186
2187 #define NO_TIMEOUT ((unsigned long) -1)
2188 #define DEFAULT_TIMEOUT 30000 /* milliseconds */
2189 static int hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
2190         struct CommandList *c, int reply_queue, unsigned long timeout_msecs)
2191 {
2192         DECLARE_COMPLETION_ONSTACK(wait);
2193
2194         c->waiting = &wait;
2195         __enqueue_cmd_and_start_io(h, c, reply_queue);
2196         if (timeout_msecs == NO_TIMEOUT) {
2197                 /* TODO: get rid of this no-timeout thing */
2198                 wait_for_completion_io(&wait);
2199                 return IO_OK;
2200         }
2201         if (!wait_for_completion_io_timeout(&wait,
2202                                         msecs_to_jiffies(timeout_msecs))) {
2203                 dev_warn(&h->pdev->dev, "Command timed out.\n");
2204                 return -ETIMEDOUT;
2205         }
2206         return IO_OK;
2207 }
2208
2209 static int hpsa_scsi_do_simple_cmd(struct ctlr_info *h, struct CommandList *c,
2210                                    int reply_queue, unsigned long timeout_msecs)
2211 {
2212         if (unlikely(lockup_detected(h))) {
2213                 c->err_info->CommandStatus = CMD_CTLR_LOCKUP;
2214                 return IO_OK;
2215         }
2216         return hpsa_scsi_do_simple_cmd_core(h, c, reply_queue, timeout_msecs);
2217 }
2218
2219 static u32 lockup_detected(struct ctlr_info *h)
2220 {
2221         int cpu;
2222         u32 rc, *lockup_detected;
2223
2224         cpu = get_cpu();
2225         lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
2226         rc = *lockup_detected;
2227         put_cpu();
2228         return rc;
2229 }
2230
2231 #define MAX_DRIVER_CMD_RETRIES 25
2232 static int hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
2233         struct CommandList *c, int data_direction, unsigned long timeout_msecs)
2234 {
2235         int backoff_time = 10, retry_count = 0;
2236         int rc;
2237
2238         do {
2239                 memset(c->err_info, 0, sizeof(*c->err_info));
2240                 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
2241                                                   timeout_msecs);
2242                 if (rc)
2243                         break;
2244                 retry_count++;
2245                 if (retry_count > 3) {
2246                         msleep(backoff_time);
2247                         if (backoff_time < 1000)
2248                                 backoff_time *= 2;
2249                 }
2250         } while ((check_for_unit_attention(h, c) ||
2251                         check_for_busy(h, c)) &&
2252                         retry_count <= MAX_DRIVER_CMD_RETRIES);
2253         hpsa_pci_unmap(h->pdev, c, 1, data_direction);
2254         if (retry_count > MAX_DRIVER_CMD_RETRIES)
2255                 rc = -EIO;
2256         return rc;
2257 }
2258
2259 static void hpsa_print_cmd(struct ctlr_info *h, char *txt,
2260                                 struct CommandList *c)
2261 {
2262         const u8 *cdb = c->Request.CDB;
2263         const u8 *lun = c->Header.LUN.LunAddrBytes;
2264
2265         dev_warn(&h->pdev->dev, "%s: LUN:%02x%02x%02x%02x%02x%02x%02x%02x"
2266         " CDB:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x\n",
2267                 txt, lun[0], lun[1], lun[2], lun[3],
2268                 lun[4], lun[5], lun[6], lun[7],
2269                 cdb[0], cdb[1], cdb[2], cdb[3],
2270                 cdb[4], cdb[5], cdb[6], cdb[7],
2271                 cdb[8], cdb[9], cdb[10], cdb[11],
2272                 cdb[12], cdb[13], cdb[14], cdb[15]);
2273 }
2274
2275 static void hpsa_scsi_interpret_error(struct ctlr_info *h,
2276                         struct CommandList *cp)
2277 {
2278         const struct ErrorInfo *ei = cp->err_info;
2279         struct device *d = &cp->h->pdev->dev;
2280         u8 sense_key, asc, ascq;
2281         int sense_len;
2282
2283         switch (ei->CommandStatus) {
2284         case CMD_TARGET_STATUS:
2285                 if (ei->SenseLen > sizeof(ei->SenseInfo))
2286                         sense_len = sizeof(ei->SenseInfo);
2287                 else
2288                         sense_len = ei->SenseLen;
2289                 decode_sense_data(ei->SenseInfo, sense_len,
2290                                         &sense_key, &asc, &ascq);
2291                 hpsa_print_cmd(h, "SCSI status", cp);
2292                 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION)
2293                         dev_warn(d, "SCSI Status = 02, Sense key = 0x%02x, ASC = 0x%02x, ASCQ = 0x%02x\n",
2294                                 sense_key, asc, ascq);
2295                 else
2296                         dev_warn(d, "SCSI Status = 0x%02x\n", ei->ScsiStatus);
2297                 if (ei->ScsiStatus == 0)
2298                         dev_warn(d, "SCSI status is abnormally zero.  "
2299                         "(probably indicates selection timeout "
2300                         "reported incorrectly due to a known "
2301                         "firmware bug, circa July, 2001.)\n");
2302                 break;
2303         case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
2304                 break;
2305         case CMD_DATA_OVERRUN:
2306                 hpsa_print_cmd(h, "overrun condition", cp);
2307                 break;
2308         case CMD_INVALID: {
2309                 /* controller unfortunately reports SCSI passthru's
2310                  * to non-existent targets as invalid commands.
2311                  */
2312                 hpsa_print_cmd(h, "invalid command", cp);
2313                 dev_warn(d, "probably means device no longer present\n");
2314                 }
2315                 break;
2316         case CMD_PROTOCOL_ERR:
2317                 hpsa_print_cmd(h, "protocol error", cp);
2318                 break;
2319         case CMD_HARDWARE_ERR:
2320                 hpsa_print_cmd(h, "hardware error", cp);
2321                 break;
2322         case CMD_CONNECTION_LOST:
2323                 hpsa_print_cmd(h, "connection lost", cp);
2324                 break;
2325         case CMD_ABORTED:
2326                 hpsa_print_cmd(h, "aborted", cp);
2327                 break;
2328         case CMD_ABORT_FAILED:
2329                 hpsa_print_cmd(h, "abort failed", cp);
2330                 break;
2331         case CMD_UNSOLICITED_ABORT:
2332                 hpsa_print_cmd(h, "unsolicited abort", cp);
2333                 break;
2334         case CMD_TIMEOUT:
2335                 hpsa_print_cmd(h, "timed out", cp);
2336                 break;
2337         case CMD_UNABORTABLE:
2338                 hpsa_print_cmd(h, "unabortable", cp);
2339                 break;
2340         case CMD_CTLR_LOCKUP:
2341                 hpsa_print_cmd(h, "controller lockup detected", cp);
2342                 break;
2343         default:
2344                 hpsa_print_cmd(h, "unknown status", cp);
2345                 dev_warn(d, "Unknown command status %x\n",
2346                                 ei->CommandStatus);
2347         }
2348 }
2349
2350 static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
2351                         u16 page, unsigned char *buf,
2352                         unsigned char bufsize)
2353 {
2354         int rc = IO_OK;
2355         struct CommandList *c;
2356         struct ErrorInfo *ei;
2357
2358         c = cmd_alloc(h);
2359
2360         if (c == NULL) {
2361                 dev_warn(&h->pdev->dev, "cmd_alloc returned NULL!\n");
2362                 return -ENOMEM;
2363         }
2364
2365         if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize,
2366                         page, scsi3addr, TYPE_CMD)) {
2367                 rc = -1;
2368                 goto out;
2369         }
2370         rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
2371                                         PCI_DMA_FROMDEVICE, NO_TIMEOUT);
2372         if (rc)
2373                 goto out;
2374         ei = c->err_info;
2375         if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
2376                 hpsa_scsi_interpret_error(h, c);
2377                 rc = -1;
2378         }
2379 out:
2380         cmd_free(h, c);
2381         return rc;
2382 }
2383
2384 static int hpsa_bmic_ctrl_mode_sense(struct ctlr_info *h,
2385                 unsigned char *scsi3addr, unsigned char page,
2386                 struct bmic_controller_parameters *buf, size_t bufsize)
2387 {
2388         int rc = IO_OK;
2389         struct CommandList *c;
2390         struct ErrorInfo *ei;
2391
2392         c = cmd_alloc(h);
2393         if (c == NULL) {                        /* trouble... */
2394                 dev_warn(&h->pdev->dev, "cmd_alloc returned NULL!\n");
2395                 return -ENOMEM;
2396         }
2397
2398         if (fill_cmd(c, BMIC_SENSE_CONTROLLER_PARAMETERS, h, buf, bufsize,
2399                         page, scsi3addr, TYPE_CMD)) {
2400                 rc = -1;
2401                 goto out;
2402         }
2403         rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
2404                         PCI_DMA_FROMDEVICE, NO_TIMEOUT);
2405         if (rc)
2406                 goto out;
2407         ei = c->err_info;
2408         if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
2409                 hpsa_scsi_interpret_error(h, c);
2410                 rc = -1;
2411         }
2412 out:
2413         cmd_free(h, c);
2414         return rc;
2415         }
2416
2417 static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr,
2418         u8 reset_type, int reply_queue)
2419 {
2420         int rc = IO_OK;
2421         struct CommandList *c;
2422         struct ErrorInfo *ei;
2423
2424         c = cmd_alloc(h);
2425
2426         if (c == NULL) {                        /* trouble... */
2427                 dev_warn(&h->pdev->dev, "cmd_alloc returned NULL!\n");
2428                 return -ENOMEM;
2429         }
2430
2431         /* fill_cmd can't fail here, no data buffer to map. */
2432         (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
2433                         scsi3addr, TYPE_MSG);
2434         c->Request.CDB[1] = reset_type; /* fill_cmd defaults to LUN reset */
2435         rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT);
2436         if (rc) {
2437                 dev_warn(&h->pdev->dev, "Failed to send reset command\n");
2438                 goto out;
2439         }
2440         /* no unmap needed here because no data xfer. */
2441
2442         ei = c->err_info;
2443         if (ei->CommandStatus != 0) {
2444                 hpsa_scsi_interpret_error(h, c);
2445                 rc = -1;
2446         }
2447 out:
2448         cmd_free(h, c);
2449         return rc;
2450 }
2451
2452 static void hpsa_get_raid_level(struct ctlr_info *h,
2453         unsigned char *scsi3addr, unsigned char *raid_level)
2454 {
2455         int rc;
2456         unsigned char *buf;
2457
2458         *raid_level = RAID_UNKNOWN;
2459         buf = kzalloc(64, GFP_KERNEL);
2460         if (!buf)
2461                 return;
2462         rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 0xC1, buf, 64);
2463         if (rc == 0)
2464                 *raid_level = buf[8];
2465         if (*raid_level > RAID_UNKNOWN)
2466                 *raid_level = RAID_UNKNOWN;
2467         kfree(buf);
2468         return;
2469 }
2470
2471 #define HPSA_MAP_DEBUG
2472 #ifdef HPSA_MAP_DEBUG
2473 static void hpsa_debug_map_buff(struct ctlr_info *h, int rc,
2474                                 struct raid_map_data *map_buff)
2475 {
2476         struct raid_map_disk_data *dd = &map_buff->data[0];
2477         int map, row, col;
2478         u16 map_cnt, row_cnt, disks_per_row;
2479
2480         if (rc != 0)
2481                 return;
2482
2483         /* Show details only if debugging has been activated. */
2484         if (h->raid_offload_debug < 2)
2485                 return;
2486
2487         dev_info(&h->pdev->dev, "structure_size = %u\n",
2488                                 le32_to_cpu(map_buff->structure_size));
2489         dev_info(&h->pdev->dev, "volume_blk_size = %u\n",
2490                         le32_to_cpu(map_buff->volume_blk_size));
2491         dev_info(&h->pdev->dev, "volume_blk_cnt = 0x%llx\n",
2492                         le64_to_cpu(map_buff->volume_blk_cnt));
2493         dev_info(&h->pdev->dev, "physicalBlockShift = %u\n",
2494                         map_buff->phys_blk_shift);
2495         dev_info(&h->pdev->dev, "parity_rotation_shift = %u\n",
2496                         map_buff->parity_rotation_shift);
2497         dev_info(&h->pdev->dev, "strip_size = %u\n",
2498                         le16_to_cpu(map_buff->strip_size));
2499         dev_info(&h->pdev->dev, "disk_starting_blk = 0x%llx\n",
2500                         le64_to_cpu(map_buff->disk_starting_blk));
2501         dev_info(&h->pdev->dev, "disk_blk_cnt = 0x%llx\n",
2502                         le64_to_cpu(map_buff->disk_blk_cnt));
2503         dev_info(&h->pdev->dev, "data_disks_per_row = %u\n",
2504                         le16_to_cpu(map_buff->data_disks_per_row));
2505         dev_info(&h->pdev->dev, "metadata_disks_per_row = %u\n",
2506                         le16_to_cpu(map_buff->metadata_disks_per_row));
2507         dev_info(&h->pdev->dev, "row_cnt = %u\n",
2508                         le16_to_cpu(map_buff->row_cnt));
2509         dev_info(&h->pdev->dev, "layout_map_count = %u\n",
2510                         le16_to_cpu(map_buff->layout_map_count));
2511         dev_info(&h->pdev->dev, "flags = 0x%x\n",
2512                         le16_to_cpu(map_buff->flags));
2513         dev_info(&h->pdev->dev, "encrypytion = %s\n",
2514                         le16_to_cpu(map_buff->flags) &
2515                         RAID_MAP_FLAG_ENCRYPT_ON ?  "ON" : "OFF");
2516         dev_info(&h->pdev->dev, "dekindex = %u\n",
2517                         le16_to_cpu(map_buff->dekindex));
2518         map_cnt = le16_to_cpu(map_buff->layout_map_count);
2519         for (map = 0; map < map_cnt; map++) {
2520                 dev_info(&h->pdev->dev, "Map%u:\n", map);
2521                 row_cnt = le16_to_cpu(map_buff->row_cnt);
2522                 for (row = 0; row < row_cnt; row++) {
2523                         dev_info(&h->pdev->dev, "  Row%u:\n", row);
2524                         disks_per_row =
2525                                 le16_to_cpu(map_buff->data_disks_per_row);
2526                         for (col = 0; col < disks_per_row; col++, dd++)
2527                                 dev_info(&h->pdev->dev,
2528                                         "    D%02u: h=0x%04x xor=%u,%u\n",
2529                                         col, dd->ioaccel_handle,
2530                                         dd->xor_mult[0], dd->xor_mult[1]);
2531                         disks_per_row =
2532                                 le16_to_cpu(map_buff->metadata_disks_per_row);
2533                         for (col = 0; col < disks_per_row; col++, dd++)
2534                                 dev_info(&h->pdev->dev,
2535                                         "    M%02u: h=0x%04x xor=%u,%u\n",
2536                                         col, dd->ioaccel_handle,
2537                                         dd->xor_mult[0], dd->xor_mult[1]);
2538                 }
2539         }
2540 }
2541 #else
2542 static void hpsa_debug_map_buff(__attribute__((unused)) struct ctlr_info *h,
2543                         __attribute__((unused)) int rc,
2544                         __attribute__((unused)) struct raid_map_data *map_buff)
2545 {
2546 }
2547 #endif
2548
2549 static int hpsa_get_raid_map(struct ctlr_info *h,
2550         unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
2551 {
2552         int rc = 0;
2553         struct CommandList *c;
2554         struct ErrorInfo *ei;
2555
2556         c = cmd_alloc(h);
2557         if (c == NULL) {
2558                 dev_warn(&h->pdev->dev, "cmd_alloc returned NULL!\n");
2559                 return -ENOMEM;
2560         }
2561         if (fill_cmd(c, HPSA_GET_RAID_MAP, h, &this_device->raid_map,
2562                         sizeof(this_device->raid_map), 0,
2563                         scsi3addr, TYPE_CMD)) {
2564                 dev_warn(&h->pdev->dev, "Out of memory in hpsa_get_raid_map()\n");
2565                 rc = -ENOMEM;
2566                 goto out;
2567         }
2568         rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
2569                                         PCI_DMA_FROMDEVICE, NO_TIMEOUT);
2570         if (rc)
2571                 goto out;
2572         ei = c->err_info;
2573         if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
2574                 hpsa_scsi_interpret_error(h, c);
2575                 rc = -1;
2576                 goto out;
2577         }
2578         cmd_free(h, c);
2579
2580         /* @todo in the future, dynamically allocate RAID map memory */
2581         if (le32_to_cpu(this_device->raid_map.structure_size) >
2582                                 sizeof(this_device->raid_map)) {
2583                 dev_warn(&h->pdev->dev, "RAID map size is too large!\n");
2584                 rc = -1;
2585         }
2586         hpsa_debug_map_buff(h, rc, &this_device->raid_map);
2587         return rc;
2588 out:
2589         cmd_free(h, c);
2590         return rc;
2591 }
2592
2593 static int hpsa_bmic_id_physical_device(struct ctlr_info *h,
2594                 unsigned char scsi3addr[], u16 bmic_device_index,
2595                 struct bmic_identify_physical_device *buf, size_t bufsize)
2596 {
2597         int rc = IO_OK;
2598         struct CommandList *c;
2599         struct ErrorInfo *ei;
2600
2601         c = cmd_alloc(h);
2602         rc = fill_cmd(c, BMIC_IDENTIFY_PHYSICAL_DEVICE, h, buf, bufsize,
2603                 0, RAID_CTLR_LUNID, TYPE_CMD);
2604         if (rc)
2605                 goto out;
2606
2607         c->Request.CDB[2] = bmic_device_index & 0xff;
2608         c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff;
2609
2610         hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE,
2611                                                 NO_TIMEOUT);
2612         ei = c->err_info;
2613         if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
2614                 hpsa_scsi_interpret_error(h, c);
2615                 rc = -1;
2616         }
2617 out:
2618         cmd_free(h, c);
2619         return rc;
2620 }
2621
2622 static int hpsa_vpd_page_supported(struct ctlr_info *h,
2623         unsigned char scsi3addr[], u8 page)
2624 {
2625         int rc;
2626         int i;
2627         int pages;
2628         unsigned char *buf, bufsize;
2629
2630         buf = kzalloc(256, GFP_KERNEL);
2631         if (!buf)
2632                 return 0;
2633
2634         /* Get the size of the page list first */
2635         rc = hpsa_scsi_do_inquiry(h, scsi3addr,
2636                                 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
2637                                 buf, HPSA_VPD_HEADER_SZ);
2638         if (rc != 0)
2639                 goto exit_unsupported;
2640         pages = buf[3];
2641         if ((pages + HPSA_VPD_HEADER_SZ) <= 255)
2642                 bufsize = pages + HPSA_VPD_HEADER_SZ;
2643         else
2644                 bufsize = 255;
2645
2646         /* Get the whole VPD page list */
2647         rc = hpsa_scsi_do_inquiry(h, scsi3addr,
2648                                 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
2649                                 buf, bufsize);
2650         if (rc != 0)
2651                 goto exit_unsupported;
2652
2653         pages = buf[3];
2654         for (i = 1; i <= pages; i++)
2655                 if (buf[3 + i] == page)
2656                         goto exit_supported;
2657 exit_unsupported:
2658         kfree(buf);
2659         return 0;
2660 exit_supported:
2661         kfree(buf);
2662         return 1;
2663 }
2664
2665 static void hpsa_get_ioaccel_status(struct ctlr_info *h,
2666         unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
2667 {
2668         int rc;
2669         unsigned char *buf;
2670         u8 ioaccel_status;
2671
2672         this_device->offload_config = 0;
2673         this_device->offload_enabled = 0;
2674         this_device->offload_to_be_enabled = 0;
2675
2676         buf = kzalloc(64, GFP_KERNEL);
2677         if (!buf)
2678                 return;
2679         if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_IOACCEL_STATUS))
2680                 goto out;
2681         rc = hpsa_scsi_do_inquiry(h, scsi3addr,
2682                         VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, buf, 64);
2683         if (rc != 0)
2684                 goto out;
2685
2686 #define IOACCEL_STATUS_BYTE 4
2687 #define OFFLOAD_CONFIGURED_BIT 0x01
2688 #define OFFLOAD_ENABLED_BIT 0x02
2689         ioaccel_status = buf[IOACCEL_STATUS_BYTE];
2690         this_device->offload_config =
2691                 !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT);
2692         if (this_device->offload_config) {
2693                 this_device->offload_enabled =
2694                         !!(ioaccel_status & OFFLOAD_ENABLED_BIT);
2695                 if (hpsa_get_raid_map(h, scsi3addr, this_device))
2696                         this_device->offload_enabled = 0;
2697         }
2698         this_device->offload_to_be_enabled = this_device->offload_enabled;
2699 out:
2700         kfree(buf);
2701         return;
2702 }
2703
2704 /* Get the device id from inquiry page 0x83 */
2705 static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
2706         unsigned char *device_id, int buflen)
2707 {
2708         int rc;
2709         unsigned char *buf;
2710
2711         if (buflen > 16)
2712                 buflen = 16;
2713         buf = kzalloc(64, GFP_KERNEL);
2714         if (!buf)
2715                 return -ENOMEM;
2716         rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 0x83, buf, 64);
2717         if (rc == 0)
2718                 memcpy(device_id, &buf[8], buflen);
2719         kfree(buf);
2720         return rc != 0;
2721 }
2722
2723 static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
2724                 void *buf, int bufsize,
2725                 int extended_response)
2726 {
2727         int rc = IO_OK;
2728         struct CommandList *c;
2729         unsigned char scsi3addr[8];
2730         struct ErrorInfo *ei;
2731
2732         c = cmd_alloc(h);
2733         if (c == NULL) {                        /* trouble... */
2734                 dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n");
2735                 return -1;
2736         }
2737         /* address the controller */
2738         memset(scsi3addr, 0, sizeof(scsi3addr));
2739         if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
2740                 buf, bufsize, 0, scsi3addr, TYPE_CMD)) {
2741                 rc = -1;
2742                 goto out;
2743         }
2744         if (extended_response)
2745                 c->Request.CDB[1] = extended_response;
2746         rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
2747                                         PCI_DMA_FROMDEVICE, NO_TIMEOUT);
2748         if (rc)
2749                 goto out;
2750         ei = c->err_info;
2751         if (ei->CommandStatus != 0 &&
2752             ei->CommandStatus != CMD_DATA_UNDERRUN) {
2753                 hpsa_scsi_interpret_error(h, c);
2754                 rc = -1;
2755         } else {
2756                 struct ReportLUNdata *rld = buf;
2757
2758                 if (rld->extended_response_flag != extended_response) {
2759                         dev_err(&h->pdev->dev,
2760                                 "report luns requested format %u, got %u\n",
2761                                 extended_response,
2762                                 rld->extended_response_flag);
2763                         rc = -1;
2764                 }
2765         }
2766 out:
2767         cmd_free(h, c);
2768         return rc;
2769 }
2770
2771 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
2772                 struct ReportExtendedLUNdata *buf, int bufsize)
2773 {
2774         return hpsa_scsi_do_report_luns(h, 0, buf, bufsize,
2775                                                 HPSA_REPORT_PHYS_EXTENDED);
2776 }
2777
2778 static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
2779                 struct ReportLUNdata *buf, int bufsize)
2780 {
2781         return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
2782 }
2783
2784 static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
2785         int bus, int target, int lun)
2786 {
2787         device->bus = bus;
2788         device->target = target;
2789         device->lun = lun;
2790 }
2791
2792 /* Use VPD inquiry to get details of volume status */
2793 static int hpsa_get_volume_status(struct ctlr_info *h,
2794                                         unsigned char scsi3addr[])
2795 {
2796         int rc;
2797         int status;
2798         int size;
2799         unsigned char *buf;
2800
2801         buf = kzalloc(64, GFP_KERNEL);
2802         if (!buf)
2803                 return HPSA_VPD_LV_STATUS_UNSUPPORTED;
2804
2805         /* Does controller have VPD for logical volume status? */
2806         if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_STATUS))
2807                 goto exit_failed;
2808
2809         /* Get the size of the VPD return buffer */
2810         rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
2811                                         buf, HPSA_VPD_HEADER_SZ);
2812         if (rc != 0)
2813                 goto exit_failed;
2814         size = buf[3];
2815
2816         /* Now get the whole VPD buffer */
2817         rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
2818                                         buf, size + HPSA_VPD_HEADER_SZ);
2819         if (rc != 0)
2820                 goto exit_failed;
2821         status = buf[4]; /* status byte */
2822
2823         kfree(buf);
2824         return status;
2825 exit_failed:
2826         kfree(buf);
2827         return HPSA_VPD_LV_STATUS_UNSUPPORTED;
2828 }
2829
2830 /* Determine offline status of a volume.
2831  * Return either:
2832  *  0 (not offline)
2833  *  0xff (offline for unknown reasons)
2834  *  # (integer code indicating one of several NOT READY states
2835  *     describing why a volume is to be kept offline)
2836  */
2837 static int hpsa_volume_offline(struct ctlr_info *h,
2838                                         unsigned char scsi3addr[])
2839 {
2840         struct CommandList *c;
2841         unsigned char *sense;
2842         u8 sense_key, asc, ascq;
2843         int sense_len;
2844         int rc, ldstat = 0;
2845         u16 cmd_status;
2846         u8 scsi_status;
2847 #define ASC_LUN_NOT_READY 0x04
2848 #define ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS 0x04
2849 #define ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ 0x02
2850
2851         c = cmd_alloc(h);
2852         if (!c)
2853                 return 0;
2854         (void) fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, scsi3addr, TYPE_CMD);
2855         rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, NO_TIMEOUT);
2856         if (rc) {
2857                 cmd_free(h, c);
2858                 return 0;
2859         }
2860         sense = c->err_info->SenseInfo;
2861         if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo))
2862                 sense_len = sizeof(c->err_info->SenseInfo);
2863         else
2864                 sense_len = c->err_info->SenseLen;
2865         decode_sense_data(sense, sense_len, &sense_key, &asc, &ascq);
2866         cmd_status = c->err_info->CommandStatus;
2867         scsi_status = c->err_info->ScsiStatus;
2868         cmd_free(h, c);
2869         /* Is the volume 'not ready'? */
2870         if (cmd_status != CMD_TARGET_STATUS ||
2871                 scsi_status != SAM_STAT_CHECK_CONDITION ||
2872                 sense_key != NOT_READY ||
2873                 asc != ASC_LUN_NOT_READY)  {
2874                 return 0;
2875         }
2876
2877         /* Determine the reason for not ready state */
2878         ldstat = hpsa_get_volume_status(h, scsi3addr);
2879
2880         /* Keep volume offline in certain cases: */
2881         switch (ldstat) {
2882         case HPSA_LV_UNDERGOING_ERASE:
2883         case HPSA_LV_UNDERGOING_RPI:
2884         case HPSA_LV_PENDING_RPI:
2885         case HPSA_LV_ENCRYPTED_NO_KEY:
2886         case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
2887         case HPSA_LV_UNDERGOING_ENCRYPTION:
2888         case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
2889         case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
2890                 return ldstat;
2891         case HPSA_VPD_LV_STATUS_UNSUPPORTED:
2892                 /* If VPD status page isn't available,
2893                  * use ASC/ASCQ to determine state
2894                  */
2895                 if ((ascq == ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS) ||
2896                         (ascq == ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ))
2897                         return ldstat;
2898                 break;
2899         default:
2900                 break;
2901         }
2902         return 0;
2903 }
2904
2905 /*
2906  * Find out if a logical device supports aborts by simply trying one.
2907  * Smart Array may claim not to support aborts on logical drives, but
2908  * if a MSA2000 * is connected, the drives on that will be presented
2909  * by the Smart Array as logical drives, and aborts may be sent to
2910  * those devices successfully.  So the simplest way to find out is
2911  * to simply try an abort and see how the device responds.
2912  */
2913 static int hpsa_device_supports_aborts(struct ctlr_info *h,
2914                                         unsigned char *scsi3addr)
2915 {
2916         struct CommandList *c;
2917         struct ErrorInfo *ei;
2918         int rc = 0;
2919
2920         u64 tag = (u64) -1; /* bogus tag */
2921
2922         /* Assume that physical devices support aborts */
2923         if (!is_logical_dev_addr_mode(scsi3addr))
2924                 return 1;
2925
2926         c = cmd_alloc(h);
2927         if (!c)
2928                 return -ENOMEM;
2929         (void) fill_cmd(c, HPSA_ABORT_MSG, h, &tag, 0, 0, scsi3addr, TYPE_MSG);
2930         (void) hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, NO_TIMEOUT);
2931         /* no unmap needed here because no data xfer. */
2932         ei = c->err_info;
2933         switch (ei->CommandStatus) {
2934         case CMD_INVALID:
2935                 rc = 0;
2936                 break;
2937         case CMD_UNABORTABLE:
2938         case CMD_ABORT_FAILED:
2939                 rc = 1;
2940                 break;
2941         case CMD_TMF_STATUS:
2942                 rc = hpsa_evaluate_tmf_status(h, c);
2943                 break;
2944         default:
2945                 rc = 0;
2946                 break;
2947         }
2948         cmd_free(h, c);
2949         return rc;
2950 }
2951
2952 static int hpsa_update_device_info(struct ctlr_info *h,
2953         unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device,
2954         unsigned char *is_OBDR_device)
2955 {
2956
2957 #define OBDR_SIG_OFFSET 43
2958 #define OBDR_TAPE_SIG "$DR-10"
2959 #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1)
2960 #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN)
2961
2962         unsigned char *inq_buff;
2963         unsigned char *obdr_sig;
2964
2965         inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
2966         if (!inq_buff)
2967                 goto bail_out;
2968
2969         /* Do an inquiry to the device to see what it is. */
2970         if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
2971                 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
2972                 /* Inquiry failed (msg printed already) */
2973                 dev_err(&h->pdev->dev,
2974                         "hpsa_update_device_info: inquiry failed\n");
2975                 goto bail_out;
2976         }
2977
2978         this_device->devtype = (inq_buff[0] & 0x1f);
2979         memcpy(this_device->scsi3addr, scsi3addr, 8);
2980         memcpy(this_device->vendor, &inq_buff[8],
2981                 sizeof(this_device->vendor));
2982         memcpy(this_device->model, &inq_buff[16],
2983                 sizeof(this_device->model));
2984         memset(this_device->device_id, 0,
2985                 sizeof(this_device->device_id));
2986         hpsa_get_device_id(h, scsi3addr, this_device->device_id,
2987                 sizeof(this_device->device_id));
2988
2989         if (this_device->devtype == TYPE_DISK &&
2990                 is_logical_dev_addr_mode(scsi3addr)) {
2991                 int volume_offline;
2992
2993                 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
2994                 if (h->fw_support & MISC_FW_RAID_OFFLOAD_BASIC)
2995                         hpsa_get_ioaccel_status(h, scsi3addr, this_device);
2996                 volume_offline = hpsa_volume_offline(h, scsi3addr);
2997                 if (volume_offline < 0 || volume_offline > 0xff)
2998                         volume_offline = HPSA_VPD_LV_STATUS_UNSUPPORTED;
2999                 this_device->volume_offline = volume_offline & 0xff;
3000         } else {
3001                 this_device->raid_level = RAID_UNKNOWN;
3002                 this_device->offload_config = 0;
3003                 this_device->offload_enabled = 0;
3004                 this_device->offload_to_be_enabled = 0;
3005                 this_device->volume_offline = 0;
3006                 this_device->queue_depth = h->nr_cmds;
3007         }
3008
3009         if (is_OBDR_device) {
3010                 /* See if this is a One-Button-Disaster-Recovery device
3011                  * by looking for "$DR-10" at offset 43 in inquiry data.
3012                  */
3013                 obdr_sig = &inq_buff[OBDR_SIG_OFFSET];
3014                 *is_OBDR_device = (this_device->devtype == TYPE_ROM &&
3015                                         strncmp(obdr_sig, OBDR_TAPE_SIG,
3016                                                 OBDR_SIG_LEN) == 0);
3017         }
3018         kfree(inq_buff);
3019         return 0;
3020
3021 bail_out:
3022         kfree(inq_buff);
3023         return 1;
3024 }
3025
3026 static void hpsa_update_device_supports_aborts(struct ctlr_info *h,
3027                         struct hpsa_scsi_dev_t *dev, u8 *scsi3addr)
3028 {
3029         unsigned long flags;
3030         int rc, entry;
3031         /*
3032          * See if this device supports aborts.  If we already know
3033          * the device, we already know if it supports aborts, otherwise
3034          * we have to find out if it supports aborts by trying one.
3035          */
3036         spin_lock_irqsave(&h->devlock, flags);
3037         rc = hpsa_scsi_find_entry(dev, h->dev, h->ndevices, &entry);
3038         if ((rc == DEVICE_SAME || rc == DEVICE_UPDATED) &&
3039                 entry >= 0 && entry < h->ndevices) {
3040                 dev->supports_aborts = h->dev[entry]->supports_aborts;
3041                 spin_unlock_irqrestore(&h->devlock, flags);
3042         } else {
3043                 spin_unlock_irqrestore(&h->devlock, flags);
3044                 dev->supports_aborts =
3045                                 hpsa_device_supports_aborts(h, scsi3addr);
3046                 if (dev->supports_aborts < 0)
3047                         dev->supports_aborts = 0;
3048         }
3049 }
3050
3051 static unsigned char *ext_target_model[] = {
3052         "MSA2012",
3053         "MSA2024",
3054         "MSA2312",
3055         "MSA2324",
3056         "P2000 G3 SAS",
3057         "MSA 2040 SAS",
3058         NULL,
3059 };
3060
3061 static int is_ext_target(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
3062 {
3063         int i;
3064
3065         for (i = 0; ext_target_model[i]; i++)
3066                 if (strncmp(device->model, ext_target_model[i],
3067                         strlen(ext_target_model[i])) == 0)
3068                         return 1;
3069         return 0;
3070 }
3071
3072 /* Helper function to assign bus, target, lun mapping of devices.
3073  * Puts non-external target logical volumes on bus 0, external target logical
3074  * volumes on bus 1, physical devices on bus 2. and the hba on bus 3.
3075  * Logical drive target and lun are assigned at this time, but
3076  * physical device lun and target assignment are deferred (assigned
3077  * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
3078  */
3079 static void figure_bus_target_lun(struct ctlr_info *h,
3080         u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device)
3081 {
3082         u32 lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
3083
3084         if (!is_logical_dev_addr_mode(lunaddrbytes)) {
3085                 /* physical device, target and lun filled in later */
3086                 if (is_hba_lunid(lunaddrbytes))
3087                         hpsa_set_bus_target_lun(device, 3, 0, lunid & 0x3fff);
3088                 else
3089                         /* defer target, lun assignment for physical devices */
3090                         hpsa_set_bus_target_lun(device, 2, -1, -1);
3091                 return;
3092         }
3093         /* It's a logical device */
3094         if (is_ext_target(h, device)) {
3095                 /* external target way, put logicals on bus 1
3096                  * and match target/lun numbers box
3097                  * reports, other smart array, bus 0, target 0, match lunid
3098                  */
3099                 hpsa_set_bus_target_lun(device,
3100                         1, (lunid >> 16) & 0x3fff, lunid & 0x00ff);
3101                 return;
3102         }
3103         hpsa_set_bus_target_lun(device, 0, 0, lunid & 0x3fff);
3104 }
3105
3106 /*
3107  * If there is no lun 0 on a target, linux won't find any devices.
3108  * For the external targets (arrays), we have to manually detect the enclosure
3109  * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report
3110  * it for some reason.  *tmpdevice is the target we're adding,
3111  * this_device is a pointer into the current element of currentsd[]
3112  * that we're building up in update_scsi_devices(), below.
3113  * lunzerobits is a bitmap that tracks which targets already have a
3114  * lun 0 assigned.
3115  * Returns 1 if an enclosure was added, 0 if not.
3116  */
3117 static int add_ext_target_dev(struct ctlr_info *h,
3118         struct hpsa_scsi_dev_t *tmpdevice,
3119         struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes,
3120         unsigned long lunzerobits[], int *n_ext_target_devs)
3121 {
3122         unsigned char scsi3addr[8];
3123
3124         if (test_bit(tmpdevice->target, lunzerobits))
3125                 return 0; /* There is already a lun 0 on this target. */
3126
3127         if (!is_logical_dev_addr_mode(lunaddrbytes))
3128                 return 0; /* It's the logical targets that may lack lun 0. */
3129
3130         if (!is_ext_target(h, tmpdevice))
3131                 return 0; /* Only external target devices have this problem. */
3132
3133         if (tmpdevice->lun == 0) /* if lun is 0, then we have a lun 0. */
3134                 return 0;
3135
3136         memset(scsi3addr, 0, 8);
3137         scsi3addr[3] = tmpdevice->target;
3138         if (is_hba_lunid(scsi3addr))
3139                 return 0; /* Don't add the RAID controller here. */
3140
3141         if (is_scsi_rev_5(h))
3142                 return 0; /* p1210m doesn't need to do this. */
3143
3144         if (*n_ext_target_devs >= MAX_EXT_TARGETS) {
3145                 dev_warn(&h->pdev->dev, "Maximum number of external "
3146                         "target devices exceeded.  Check your hardware "
3147                         "configuration.");
3148                 return 0;
3149         }
3150
3151         if (hpsa_update_device_info(h, scsi3addr, this_device, NULL))
3152                 return 0;
3153         (*n_ext_target_devs)++;
3154         hpsa_set_bus_target_lun(this_device,
3155                                 tmpdevice->bus, tmpdevice->target, 0);
3156         hpsa_update_device_supports_aborts(h, this_device, scsi3addr);
3157         set_bit(tmpdevice->target, lunzerobits);
3158         return 1;
3159 }
3160
3161 /*
3162  * Get address of physical disk used for an ioaccel2 mode command:
3163  *      1. Extract ioaccel2 handle from the command.
3164  *      2. Find a matching ioaccel2 handle from list of physical disks.
3165  *      3. Return:
3166  *              1 and set scsi3addr to address of matching physical
3167  *              0 if no matching physical disk was found.
3168  */
3169 static int hpsa_get_pdisk_of_ioaccel2(struct ctlr_info *h,
3170         struct CommandList *ioaccel2_cmd_to_abort, unsigned char *scsi3addr)
3171 {
3172         struct io_accel2_cmd *c2 =
3173                         &h->ioaccel2_cmd_pool[ioaccel2_cmd_to_abort->cmdindex];
3174         unsigned long flags;
3175         int i;
3176
3177         spin_lock_irqsave(&h->devlock, flags);
3178         for (i = 0; i < h->ndevices; i++)
3179                 if (h->dev[i]->ioaccel_handle == le32_to_cpu(c2->scsi_nexus)) {
3180                         memcpy(scsi3addr, h->dev[i]->scsi3addr,
3181                                 sizeof(h->dev[i]->scsi3addr));
3182                         spin_unlock_irqrestore(&h->devlock, flags);
3183                         return 1;
3184                 }
3185         spin_unlock_irqrestore(&h->devlock, flags);
3186         return 0;
3187 }
3188
3189 /*
3190  * Do CISS_REPORT_PHYS and CISS_REPORT_LOG.  Data is returned in physdev,
3191  * logdev.  The number of luns in physdev and logdev are returned in
3192  * *nphysicals and *nlogicals, respectively.
3193  * Returns 0 on success, -1 otherwise.
3194  */
3195 static int hpsa_gather_lun_info(struct ctlr_info *h,
3196         struct ReportExtendedLUNdata *physdev, u32 *nphysicals,
3197         struct ReportLUNdata *logdev, u32 *nlogicals)
3198 {
3199         if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) {
3200                 dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
3201                 return -1;
3202         }
3203         *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 24;
3204         if (*nphysicals > HPSA_MAX_PHYS_LUN) {
3205                 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded. %d LUNs ignored.\n",
3206                         HPSA_MAX_PHYS_LUN, *nphysicals - HPSA_MAX_PHYS_LUN);
3207                 *nphysicals = HPSA_MAX_PHYS_LUN;
3208         }
3209         if (hpsa_scsi_do_report_log_luns(h, logdev, sizeof(*logdev))) {
3210                 dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
3211                 return -1;
3212         }
3213         *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
3214         /* Reject Logicals in excess of our max capability. */
3215         if (*nlogicals > HPSA_MAX_LUN) {
3216                 dev_warn(&h->pdev->dev,
3217                         "maximum logical LUNs (%d) exceeded.  "
3218                         "%d LUNs ignored.\n", HPSA_MAX_LUN,
3219                         *nlogicals - HPSA_MAX_LUN);
3220                         *nlogicals = HPSA_MAX_LUN;
3221         }
3222         if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
3223                 dev_warn(&h->pdev->dev,
3224                         "maximum logical + physical LUNs (%d) exceeded. "
3225                         "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
3226                         *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
3227                 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
3228         }
3229         return 0;
3230 }
3231
3232 static u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position,
3233         int i, int nphysicals, int nlogicals,
3234         struct ReportExtendedLUNdata *physdev_list,
3235         struct ReportLUNdata *logdev_list)
3236 {
3237         /* Helper function, figure out where the LUN ID info is coming from
3238          * given index i, lists of physical and logical devices, where in
3239          * the list the raid controller is supposed to appear (first or last)
3240          */
3241
3242         int logicals_start = nphysicals + (raid_ctlr_position == 0);
3243         int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
3244
3245         if (i == raid_ctlr_position)
3246                 return RAID_CTLR_LUNID;
3247
3248         if (i < logicals_start)
3249                 return &physdev_list->LUN[i -
3250                                 (raid_ctlr_position == 0)].lunid[0];
3251
3252         if (i < last_device)
3253                 return &logdev_list->LUN[i - nphysicals -
3254                         (raid_ctlr_position == 0)][0];
3255         BUG();
3256         return NULL;
3257 }
3258
3259 static int hpsa_hba_mode_enabled(struct ctlr_info *h)
3260 {
3261         int rc;
3262         int hba_mode_enabled;
3263         struct bmic_controller_parameters *ctlr_params;
3264         ctlr_params = kzalloc(sizeof(struct bmic_controller_parameters),
3265                 GFP_KERNEL);
3266
3267         if (!ctlr_params)
3268                 return -ENOMEM;
3269         rc = hpsa_bmic_ctrl_mode_sense(h, RAID_CTLR_LUNID, 0, ctlr_params,
3270                 sizeof(struct bmic_controller_parameters));
3271         if (rc) {
3272                 kfree(ctlr_params);
3273                 return rc;
3274         }
3275
3276         hba_mode_enabled =
3277                 ((ctlr_params->nvram_flags & HBA_MODE_ENABLED_FLAG) != 0);
3278         kfree(ctlr_params);
3279         return hba_mode_enabled;
3280 }
3281
3282 /* get physical drive ioaccel handle and queue depth */
3283 static void hpsa_get_ioaccel_drive_info(struct ctlr_info *h,
3284                 struct hpsa_scsi_dev_t *dev,
3285                 u8 *lunaddrbytes,
3286                 struct bmic_identify_physical_device *id_phys)
3287 {
3288         int rc;
3289         struct ext_report_lun_entry *rle =
3290                 (struct ext_report_lun_entry *) lunaddrbytes;
3291
3292         dev->ioaccel_handle = rle->ioaccel_handle;
3293         memset(id_phys, 0, sizeof(*id_phys));
3294         rc = hpsa_bmic_id_physical_device(h, lunaddrbytes,
3295                         GET_BMIC_DRIVE_NUMBER(lunaddrbytes), id_phys,
3296                         sizeof(*id_phys));
3297         if (!rc)
3298                 /* Reserve space for FW operations */
3299 #define DRIVE_CMDS_RESERVED_FOR_FW 2
3300 #define DRIVE_QUEUE_DEPTH 7
3301                 dev->queue_depth =
3302                         le16_to_cpu(id_phys->current_queue_depth_limit) -
3303                                 DRIVE_CMDS_RESERVED_FOR_FW;
3304         else
3305                 dev->queue_depth = DRIVE_QUEUE_DEPTH; /* conservative */
3306         atomic_set(&dev->ioaccel_cmds_out, 0);
3307 }
3308
3309 static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno)
3310 {
3311         /* the idea here is we could get notified
3312          * that some devices have changed, so we do a report
3313          * physical luns and report logical luns cmd, and adjust
3314          * our list of devices accordingly.
3315          *
3316          * The scsi3addr's of devices won't change so long as the
3317          * adapter is not reset.  That means we can rescan and
3318          * tell which devices we already know about, vs. new
3319          * devices, vs.  disappearing devices.
3320          */
3321         struct ReportExtendedLUNdata *physdev_list = NULL;
3322         struct ReportLUNdata *logdev_list = NULL;
3323         struct bmic_identify_physical_device *id_phys = NULL;
3324         u32 nphysicals = 0;
3325         u32 nlogicals = 0;
3326         u32 ndev_allocated = 0;
3327         struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
3328         int ncurrent = 0;
3329         int i, n_ext_target_devs, ndevs_to_allocate;
3330         int raid_ctlr_position;
3331         int rescan_hba_mode;
3332         DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS);
3333
3334         currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL);
3335         physdev_list = kzalloc(sizeof(*physdev_list), GFP_KERNEL);
3336         logdev_list = kzalloc(sizeof(*logdev_list), GFP_KERNEL);
3337         tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
3338         id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
3339
3340         if (!currentsd || !physdev_list || !logdev_list ||
3341                 !tmpdevice || !id_phys) {
3342                 dev_err(&h->pdev->dev, "out of memory\n");
3343                 goto out;
3344         }
3345         memset(lunzerobits, 0, sizeof(lunzerobits));
3346
3347         rescan_hba_mode = hpsa_hba_mode_enabled(h);
3348         if (rescan_hba_mode < 0)
3349                 goto out;
3350
3351         if (!h->hba_mode_enabled && rescan_hba_mode)
3352                 dev_warn(&h->pdev->dev, "HBA mode enabled\n");
3353         else if (h->hba_mode_enabled && !rescan_hba_mode)
3354                 dev_warn(&h->pdev->dev, "HBA mode disabled\n");
3355
3356         h->hba_mode_enabled = rescan_hba_mode;
3357
3358         if (hpsa_gather_lun_info(h, physdev_list, &nphysicals,
3359                         logdev_list, &nlogicals))
3360                 goto out;
3361
3362         /* We might see up to the maximum number of logical and physical disks
3363          * plus external target devices, and a device for the local RAID
3364          * controller.
3365          */
3366         ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1;
3367
3368         /* Allocate the per device structures */
3369         for (i = 0; i < ndevs_to_allocate; i++) {
3370                 if (i >= HPSA_MAX_DEVICES) {
3371                         dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded."
3372                                 "  %d devices ignored.\n", HPSA_MAX_DEVICES,
3373                                 ndevs_to_allocate - HPSA_MAX_DEVICES);
3374                         break;
3375                 }
3376
3377                 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
3378                 if (!currentsd[i]) {
3379                         dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
3380                                 __FILE__, __LINE__);
3381                         goto out;
3382                 }
3383                 ndev_allocated++;
3384         }
3385
3386         if (is_scsi_rev_5(h))
3387                 raid_ctlr_position = 0;
3388         else
3389                 raid_ctlr_position = nphysicals + nlogicals;
3390
3391         /* adjust our table of devices */
3392         n_ext_target_devs = 0;
3393         for (i = 0; i < nphysicals + nlogicals + 1; i++) {
3394                 u8 *lunaddrbytes, is_OBDR = 0;
3395
3396                 /* Figure out where the LUN ID info is coming from */
3397                 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
3398                         i, nphysicals, nlogicals, physdev_list, logdev_list);
3399
3400                 /* skip masked non-disk devices */
3401                 if (MASKED_DEVICE(lunaddrbytes))
3402                         if (i < nphysicals + (raid_ctlr_position == 0) &&
3403                                 NON_DISK_PHYS_DEV(lunaddrbytes))
3404                                 continue;
3405
3406                 /* Get device type, vendor, model, device id */
3407                 if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice,
3408                                                         &is_OBDR))
3409                         continue; /* skip it if we can't talk to it. */
3410                 figure_bus_target_lun(h, lunaddrbytes, tmpdevice);
3411                 hpsa_update_device_supports_aborts(h, tmpdevice, lunaddrbytes);
3412                 this_device = currentsd[ncurrent];
3413
3414                 /*
3415                  * For external target devices, we have to insert a LUN 0 which
3416                  * doesn't show up in CCISS_REPORT_PHYSICAL data, but there
3417                  * is nonetheless an enclosure device there.  We have to
3418                  * present that otherwise linux won't find anything if
3419                  * there is no lun 0.
3420                  */
3421                 if (add_ext_target_dev(h, tmpdevice, this_device,
3422                                 lunaddrbytes, lunzerobits,
3423                                 &n_ext_target_devs)) {
3424                         ncurrent++;
3425                         this_device = currentsd[ncurrent];
3426                 }
3427
3428                 *this_device = *tmpdevice;
3429
3430                 /* do not expose masked devices */
3431                 if (MASKED_DEVICE(lunaddrbytes) &&
3432                         i < nphysicals + (raid_ctlr_position == 0)) {
3433                         if (h->hba_mode_enabled)
3434                                 dev_warn(&h->pdev->dev,
3435                                         "Masked physical device detected\n");
3436                         this_device->expose_state = HPSA_DO_NOT_EXPOSE;
3437                 } else {
3438                         this_device->expose_state =
3439                                         HPSA_SG_ATTACH | HPSA_ULD_ATTACH;
3440                 }
3441
3442                 switch (this_device->devtype) {
3443                 case TYPE_ROM:
3444                         /* We don't *really* support actual CD-ROM devices,
3445                          * just "One Button Disaster Recovery" tape drive
3446                          * which temporarily pretends to be a CD-ROM drive.
3447                          * So we check that the device is really an OBDR tape
3448                          * device by checking for "$DR-10" in bytes 43-48 of
3449                          * the inquiry data.
3450                          */
3451                         if (is_OBDR)
3452                                 ncurrent++;
3453                         break;
3454                 case TYPE_DISK:
3455                         if (h->hba_mode_enabled) {
3456                                 /* never use raid mapper in HBA mode */
3457                                 this_device->offload_enabled = 0;
3458                                 ncurrent++;
3459                                 break;
3460                         } else if (h->acciopath_status) {
3461                                 if (i >= nphysicals) {
3462                                         ncurrent++;
3463                                         break;
3464                                 }
3465                         } else {
3466                                 if (i < nphysicals)
3467                                         break;
3468                                 ncurrent++;
3469                                 break;
3470                         }
3471                         if (h->transMethod & CFGTBL_Trans_io_accel1 ||
3472                                 h->transMethod & CFGTBL_Trans_io_accel2) {
3473                                 hpsa_get_ioaccel_drive_info(h, this_device,
3474                                                         lunaddrbytes, id_phys);
3475                                 atomic_set(&this_device->ioaccel_cmds_out, 0);
3476                                 ncurrent++;
3477                         }
3478                         break;
3479                 case TYPE_TAPE:
3480                 case TYPE_MEDIUM_CHANGER:
3481                         ncurrent++;
3482                         break;
3483                 case TYPE_ENCLOSURE:
3484                         if (h->hba_mode_enabled)
3485                                 ncurrent++;
3486                         break;
3487                 case TYPE_RAID:
3488                         /* Only present the Smartarray HBA as a RAID controller.
3489                          * If it's a RAID controller other than the HBA itself
3490                          * (an external RAID controller, MSA500 or similar)
3491                          * don't present it.
3492                          */
3493                         if (!is_hba_lunid(lunaddrbytes))
3494                                 break;
3495                         ncurrent++;
3496                         break;
3497                 default:
3498                         break;
3499                 }
3500                 if (ncurrent >= HPSA_MAX_DEVICES)
3501                         break;
3502         }
3503         adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent);
3504 out:
3505         kfree(tmpdevice);
3506         for (i = 0; i < ndev_allocated; i++)
3507                 kfree(currentsd[i]);
3508         kfree(currentsd);
3509         kfree(physdev_list);
3510         kfree(logdev_list);
3511         kfree(id_phys);
3512 }
3513
3514 static void hpsa_set_sg_descriptor(struct SGDescriptor *desc,
3515                                    struct scatterlist *sg)
3516 {
3517         u64 addr64 = (u64) sg_dma_address(sg);
3518         unsigned int len = sg_dma_len(sg);
3519
3520         desc->Addr = cpu_to_le64(addr64);
3521         desc->Len = cpu_to_le32(len);
3522         desc->Ext = 0;
3523 }
3524
3525 /*
3526  * hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
3527  * dma mapping  and fills in the scatter gather entries of the
3528  * hpsa command, cp.
3529  */
3530 static int hpsa_scatter_gather(struct ctlr_info *h,
3531                 struct CommandList *cp,
3532                 struct scsi_cmnd *cmd)
3533 {
3534         struct scatterlist *sg;
3535         int use_sg, i, sg_index, chained;
3536         struct SGDescriptor *curr_sg;
3537
3538         BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
3539
3540         use_sg = scsi_dma_map(cmd);
3541         if (use_sg < 0)
3542                 return use_sg;
3543
3544         if (!use_sg)
3545                 goto sglist_finished;
3546
3547         curr_sg = cp->SG;
3548         chained = 0;
3549         sg_index = 0;
3550         scsi_for_each_sg(cmd, sg, use_sg, i) {
3551                 if (i == h->max_cmd_sg_entries - 1 &&
3552                         use_sg > h->max_cmd_sg_entries) {
3553                         chained = 1;
3554                         curr_sg = h->cmd_sg_list[cp->cmdindex];
3555                         sg_index = 0;
3556                 }
3557                 hpsa_set_sg_descriptor(curr_sg, sg);
3558                 curr_sg++;
3559         }
3560
3561         /* Back the pointer up to the last entry and mark it as "last". */
3562         (--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST);
3563
3564         if (use_sg + chained > h->maxSG)
3565                 h->maxSG = use_sg + chained;
3566
3567         if (chained) {
3568                 cp->Header.SGList = h->max_cmd_sg_entries;
3569                 cp->Header.SGTotal = cpu_to_le16(use_sg + 1);
3570                 if (hpsa_map_sg_chain_block(h, cp)) {
3571                         scsi_dma_unmap(cmd);
3572                         return -1;
3573                 }
3574                 return 0;
3575         }
3576
3577 sglist_finished:
3578
3579         cp->Header.SGList = (u8) use_sg;   /* no. SGs contig in this cmd */
3580         cp->Header.SGTotal = cpu_to_le16(use_sg); /* total sgs in cmd list */
3581         return 0;
3582 }
3583
3584 #define IO_ACCEL_INELIGIBLE (1)
3585 static int fixup_ioaccel_cdb(u8 *cdb, int *cdb_len)
3586 {
3587         int is_write = 0;
3588         u32 block;
3589         u32 block_cnt;
3590
3591         /* Perform some CDB fixups if needed using 10 byte reads/writes only */
3592         switch (cdb[0]) {
3593         case WRITE_6:
3594         case WRITE_12:
3595                 is_write = 1;
3596         case READ_6:
3597         case READ_12:
3598                 if (*cdb_len == 6) {
3599                         block = (((u32) cdb[2]) << 8) | cdb[3];
3600                         block_cnt = cdb[4];
3601                 } else {
3602                         BUG_ON(*cdb_len != 12);
3603                         block = (((u32) cdb[2]) << 24) |
3604                                 (((u32) cdb[3]) << 16) |
3605                                 (((u32) cdb[4]) << 8) |
3606                                 cdb[5];
3607                         block_cnt =
3608                                 (((u32) cdb[6]) << 24) |
3609                                 (((u32) cdb[7]) << 16) |
3610                                 (((u32) cdb[8]) << 8) |
3611                                 cdb[9];
3612                 }
3613                 if (block_cnt > 0xffff)
3614                         return IO_ACCEL_INELIGIBLE;
3615
3616                 cdb[0] = is_write ? WRITE_10 : READ_10;
3617                 cdb[1] = 0;
3618                 cdb[2] = (u8) (block >> 24);
3619                 cdb[3] = (u8) (block >> 16);
3620                 cdb[4] = (u8) (block >> 8);
3621                 cdb[5] = (u8) (block);
3622                 cdb[6] = 0;
3623                 cdb[7] = (u8) (block_cnt >> 8);
3624                 cdb[8] = (u8) (block_cnt);
3625                 cdb[9] = 0;
3626                 *cdb_len = 10;
3627                 break;
3628         }
3629         return 0;
3630 }
3631
3632 static int hpsa_scsi_ioaccel1_queue_command(struct ctlr_info *h,
3633         struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
3634         u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
3635 {
3636         struct scsi_cmnd *cmd = c->scsi_cmd;
3637         struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
3638         unsigned int len;
3639         unsigned int total_len = 0;
3640         struct scatterlist *sg;
3641         u64 addr64;
3642         int use_sg, i;
3643         struct SGDescriptor *curr_sg;
3644         u32 control = IOACCEL1_CONTROL_SIMPLEQUEUE;
3645
3646         /* TODO: implement chaining support */
3647         if (scsi_sg_count(cmd) > h->ioaccel_maxsg) {
3648                 atomic_dec(&phys_disk->ioaccel_cmds_out);
3649                 return IO_ACCEL_INELIGIBLE;
3650         }
3651
3652         BUG_ON(cmd->cmd_len > IOACCEL1_IOFLAGS_CDBLEN_MAX);
3653
3654         if (fixup_ioaccel_cdb(cdb, &cdb_len)) {
3655                 atomic_dec(&phys_disk->ioaccel_cmds_out);
3656                 return IO_ACCEL_INELIGIBLE;
3657         }
3658
3659         c->cmd_type = CMD_IOACCEL1;
3660
3661         /* Adjust the DMA address to point to the accelerated command buffer */
3662         c->busaddr = (u32) h->ioaccel_cmd_pool_dhandle +
3663                                 (c->cmdindex * sizeof(*cp));
3664         BUG_ON(c->busaddr & 0x0000007F);
3665
3666         use_sg = scsi_dma_map(cmd);
3667         if (use_sg < 0) {
3668                 atomic_dec(&phys_disk->ioaccel_cmds_out);
3669                 return use_sg;
3670         }
3671
3672         if (use_sg) {
3673                 curr_sg = cp->SG;
3674                 scsi_for_each_sg(cmd, sg, use_sg, i) {
3675                         addr64 = (u64) sg_dma_address(sg);
3676                         len  = sg_dma_len(sg);
3677                         total_len += len;
3678                         curr_sg->Addr = cpu_to_le64(addr64);
3679                         curr_sg->Len = cpu_to_le32(len);
3680                         curr_sg->Ext = cpu_to_le32(0);
3681                         curr_sg++;
3682                 }
3683                 (--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST);
3684
3685                 switch (cmd->sc_data_direction) {
3686                 case DMA_TO_DEVICE:
3687                         control |= IOACCEL1_CONTROL_DATA_OUT;
3688                         break;
3689                 case DMA_FROM_DEVICE:
3690                         control |= IOACCEL1_CONTROL_DATA_IN;
3691                         break;
3692                 case DMA_NONE:
3693                         control |= IOACCEL1_CONTROL_NODATAXFER;
3694                         break;
3695                 default:
3696                         dev_err(&h->pdev->dev, "unknown data direction: %d\n",
3697                         cmd->sc_data_direction);
3698                         BUG();
3699                         break;
3700                 }
3701         } else {
3702                 control |= IOACCEL1_CONTROL_NODATAXFER;
3703         }
3704
3705         c->Header.SGList = use_sg;
3706         /* Fill out the command structure to submit */
3707         cp->dev_handle = cpu_to_le16(ioaccel_handle & 0xFFFF);
3708         cp->transfer_len = cpu_to_le32(total_len);
3709         cp->io_flags = cpu_to_le16(IOACCEL1_IOFLAGS_IO_REQ |
3710                         (cdb_len & IOACCEL1_IOFLAGS_CDBLEN_MASK));
3711         cp->control = cpu_to_le32(control);
3712         memcpy(cp->CDB, cdb, cdb_len);
3713         memcpy(cp->CISS_LUN, scsi3addr, 8);
3714         /* Tag was already set at init time. */
3715         enqueue_cmd_and_start_io(h, c);
3716         return 0;
3717 }
3718
3719 /*
3720  * Queue a command directly to a device behind the controller using the
3721  * I/O accelerator path.
3722  */
3723 static int hpsa_scsi_ioaccel_direct_map(struct ctlr_info *h,
3724         struct CommandList *c)
3725 {
3726         struct scsi_cmnd *cmd = c->scsi_cmd;
3727         struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
3728
3729         c->phys_disk = dev;
3730
3731         return hpsa_scsi_ioaccel_queue_command(h, c, dev->ioaccel_handle,
3732                 cmd->cmnd, cmd->cmd_len, dev->scsi3addr, dev);
3733 }
3734
3735 /*
3736  * Set encryption parameters for the ioaccel2 request
3737  */
3738 static void set_encrypt_ioaccel2(struct ctlr_info *h,
3739         struct CommandList *c, struct io_accel2_cmd *cp)
3740 {
3741         struct scsi_cmnd *cmd = c->scsi_cmd;
3742         struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
3743         struct raid_map_data *map = &dev->raid_map;
3744         u64 first_block;
3745
3746         /* Are we doing encryption on this device */
3747         if (!(le16_to_cpu(map->flags) & RAID_MAP_FLAG_ENCRYPT_ON))
3748                 return;
3749         /* Set the data encryption key index. */
3750         cp->dekindex = map->dekindex;
3751
3752         /* Set the encryption enable flag, encoded into direction field. */
3753         cp->direction |= IOACCEL2_DIRECTION_ENCRYPT_MASK;
3754
3755         /* Set encryption tweak values based on logical block address
3756          * If block size is 512, tweak value is LBA.
3757          * For other block sizes, tweak is (LBA * block size)/ 512)
3758          */
3759         switch (cmd->cmnd[0]) {
3760         /* Required? 6-byte cdbs eliminated by fixup_ioaccel_cdb */
3761         case WRITE_6:
3762         case READ_6:
3763                 first_block = get_unaligned_be16(&cmd->cmnd[2]);
3764                 break;
3765         case WRITE_10:
3766         case READ_10:
3767         /* Required? 12-byte cdbs eliminated by fixup_ioaccel_cdb */
3768         case WRITE_12:
3769         case READ_12:
3770                 first_block = get_unaligned_be32(&cmd->cmnd[2]);
3771                 break;
3772         case WRITE_16:
3773         case READ_16:
3774                 first_block = get_unaligned_be64(&cmd->cmnd[2]);
3775                 break;
3776         default:
3777                 dev_err(&h->pdev->dev,
3778                         "ERROR: %s: size (0x%x) not supported for encryption\n",
3779                         __func__, cmd->cmnd[0]);
3780                 BUG();
3781                 break;
3782         }
3783
3784         if (le32_to_cpu(map->volume_blk_size) != 512)
3785                 first_block = first_block *
3786                                 le32_to_cpu(map->volume_blk_size)/512;
3787
3788         cp->tweak_lower = cpu_to_le32(first_block);
3789         cp->tweak_upper = cpu_to_le32(first_block >> 32);
3790 }
3791
3792 static int hpsa_scsi_ioaccel2_queue_command(struct ctlr_info *h,
3793         struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
3794         u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
3795 {
3796         struct scsi_cmnd *cmd = c->scsi_cmd;
3797         struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
3798         struct ioaccel2_sg_element *curr_sg;
3799         int use_sg, i;
3800         struct scatterlist *sg;
3801         u64 addr64;
3802         u32 len;
3803         u32 total_len = 0;
3804
3805         if (scsi_sg_count(cmd) > h->ioaccel_maxsg) {
3806                 atomic_dec(&phys_disk->ioaccel_cmds_out);
3807                 return IO_ACCEL_INELIGIBLE;
3808         }
3809
3810         if (fixup_ioaccel_cdb(cdb, &cdb_len)) {
3811                 atomic_dec(&phys_disk->ioaccel_cmds_out);
3812                 return IO_ACCEL_INELIGIBLE;
3813         }
3814
3815         c->cmd_type = CMD_IOACCEL2;
3816         /* Adjust the DMA address to point to the accelerated command buffer */
3817         c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle +
3818                                 (c->cmdindex * sizeof(*cp));
3819         BUG_ON(c->busaddr & 0x0000007F);
3820
3821         memset(cp, 0, sizeof(*cp));
3822         cp->IU_type = IOACCEL2_IU_TYPE;
3823
3824         use_sg = scsi_dma_map(cmd);
3825         if (use_sg < 0) {
3826                 atomic_dec(&phys_disk->ioaccel_cmds_out);
3827                 return use_sg;
3828         }
3829
3830         if (use_sg) {
3831                 BUG_ON(use_sg > IOACCEL2_MAXSGENTRIES);
3832                 curr_sg = cp->sg;
3833                 scsi_for_each_sg(cmd, sg, use_sg, i) {
3834                         addr64 = (u64) sg_dma_address(sg);
3835                         len  = sg_dma_len(sg);
3836                         total_len += len;
3837                         curr_sg->address = cpu_to_le64(addr64);
3838                         curr_sg->length = cpu_to_le32(len);
3839                         curr_sg->reserved[0] = 0;
3840                         curr_sg->reserved[1] = 0;
3841                         curr_sg->reserved[2] = 0;
3842                         curr_sg->chain_indicator = 0;
3843                         curr_sg++;
3844                 }
3845
3846                 switch (cmd->sc_data_direction) {
3847                 case DMA_TO_DEVICE:
3848                         cp->direction &= ~IOACCEL2_DIRECTION_MASK;
3849                         cp->direction |= IOACCEL2_DIR_DATA_OUT;
3850                         break;
3851                 case DMA_FROM_DEVICE:
3852                         cp->direction &= ~IOACCEL2_DIRECTION_MASK;
3853                         cp->direction |= IOACCEL2_DIR_DATA_IN;
3854                         break;
3855                 case DMA_NONE:
3856                         cp->direction &= ~IOACCEL2_DIRECTION_MASK;
3857                         cp->direction |= IOACCEL2_DIR_NO_DATA;
3858                         break;
3859                 default:
3860                         dev_err(&h->pdev->dev, "unknown data direction: %d\n",
3861                                 cmd->sc_data_direction);
3862                         BUG();
3863                         break;
3864                 }
3865         } else {
3866                 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
3867                 cp->direction |= IOACCEL2_DIR_NO_DATA;
3868         }
3869
3870         /* Set encryption parameters, if necessary */
3871         set_encrypt_ioaccel2(h, c, cp);
3872
3873         cp->scsi_nexus = cpu_to_le32(ioaccel_handle);
3874         cp->Tag = cpu_to_le32(c->cmdindex << DIRECT_LOOKUP_SHIFT);
3875         memcpy(cp->cdb, cdb, sizeof(cp->cdb));
3876
3877         /* fill in sg elements */
3878         cp->sg_count = (u8) use_sg;
3879
3880         cp->data_len = cpu_to_le32(total_len);
3881         cp->err_ptr = cpu_to_le64(c->busaddr +
3882                         offsetof(struct io_accel2_cmd, error_data));
3883         cp->err_len = cpu_to_le32(sizeof(cp->error_data));
3884
3885         enqueue_cmd_and_start_io(h, c);
3886         return 0;
3887 }
3888
3889 /*
3890  * Queue a command to the correct I/O accelerator path.
3891  */
3892 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
3893         struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
3894         u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
3895 {
3896         /* Try to honor the device's queue depth */
3897         if (atomic_inc_return(&phys_disk->ioaccel_cmds_out) >
3898                                         phys_disk->queue_depth) {
3899                 atomic_dec(&phys_disk->ioaccel_cmds_out);
3900                 return IO_ACCEL_INELIGIBLE;
3901         }
3902         if (h->transMethod & CFGTBL_Trans_io_accel1)
3903                 return hpsa_scsi_ioaccel1_queue_command(h, c, ioaccel_handle,
3904                                                 cdb, cdb_len, scsi3addr,
3905                                                 phys_disk);
3906         else
3907                 return hpsa_scsi_ioaccel2_queue_command(h, c, ioaccel_handle,
3908                                                 cdb, cdb_len, scsi3addr,
3909                                                 phys_disk);
3910 }
3911
3912 static void raid_map_helper(struct raid_map_data *map,
3913                 int offload_to_mirror, u32 *map_index, u32 *current_group)
3914 {
3915         if (offload_to_mirror == 0)  {
3916                 /* use physical disk in the first mirrored group. */
3917                 *map_index %= le16_to_cpu(map->data_disks_per_row);
3918                 return;
3919         }
3920         do {
3921                 /* determine mirror group that *map_index indicates */
3922                 *current_group = *map_index /
3923                         le16_to_cpu(map->data_disks_per_row);
3924                 if (offload_to_mirror == *current_group)
3925                         continue;
3926                 if (*current_group < le16_to_cpu(map->layout_map_count) - 1) {
3927                         /* select map index from next group */
3928                         *map_index += le16_to_cpu(map->data_disks_per_row);
3929                         (*current_group)++;
3930                 } else {
3931                         /* select map index from first group */
3932                         *map_index %= le16_to_cpu(map->data_disks_per_row);
3933                         *current_group = 0;
3934                 }
3935         } while (offload_to_mirror != *current_group);
3936 }
3937
3938 /*
3939  * Attempt to perform offload RAID mapping for a logical volume I/O.
3940  */
3941 static int hpsa_scsi_ioaccel_raid_map(struct ctlr_info *h,
3942         struct CommandList *c)
3943 {
3944         struct scsi_cmnd *cmd = c->scsi_cmd;
3945         struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
3946         struct raid_map_data *map = &dev->raid_map;
3947         struct raid_map_disk_data *dd = &map->data[0];
3948         int is_write = 0;
3949         u32 map_index;
3950         u64 first_block, last_block;
3951         u32 block_cnt;
3952         u32 blocks_per_row;
3953         u64 first_row, last_row;
3954         u32 first_row_offset, last_row_offset;
3955         u32 first_column, last_column;
3956         u64 r0_first_row, r0_last_row;
3957         u32 r5or6_blocks_per_row;
3958         u64 r5or6_first_row, r5or6_last_row;
3959         u32 r5or6_first_row_offset, r5or6_last_row_offset;
3960         u32 r5or6_first_column, r5or6_last_column;
3961         u32 total_disks_per_row;
3962         u32 stripesize;
3963         u32 first_group, last_group, current_group;
3964         u32 map_row;
3965         u32 disk_handle;
3966         u64 disk_block;
3967         u32 disk_block_cnt;
3968         u8 cdb[16];
3969         u8 cdb_len;
3970         u16 strip_size;
3971 #if BITS_PER_LONG == 32
3972         u64 tmpdiv;
3973 #endif
3974         int offload_to_mirror;
3975
3976         /* check for valid opcode, get LBA and block count */
3977         switch (cmd->cmnd[0]) {
3978         case WRITE_6:
3979                 is_write = 1;
3980         case READ_6:
3981                 first_block =
3982                         (((u64) cmd->cmnd[2]) << 8) |
3983                         cmd->cmnd[3];
3984                 block_cnt = cmd->cmnd[4];
3985                 if (block_cnt == 0)
3986                         block_cnt = 256;
3987                 break;
3988         case WRITE_10:
3989                 is_write = 1;
3990         case READ_10:
3991                 first_block =
3992                         (((u64) cmd->cmnd[2]) << 24) |
3993                         (((u64) cmd->cmnd[3]) << 16) |
3994                         (((u64) cmd->cmnd[4]) << 8) |
3995                         cmd->cmnd[5];
3996                 block_cnt =
3997                         (((u32) cmd->cmnd[7]) << 8) |
3998                         cmd->cmnd[8];
3999                 break;
4000         case WRITE_12:
4001                 is_write = 1;
4002         case READ_12:
4003                 first_block =
4004                         (((u64) cmd->cmnd[2]) << 24) |
4005                         (((u64) cmd->cmnd[3]) << 16) |
4006                         (((u64) cmd->cmnd[4]) << 8) |
4007                         cmd->cmnd[5];
4008                 block_cnt =
4009                         (((u32) cmd->cmnd[6]) << 24) |
4010                         (((u32) cmd->cmnd[7]) << 16) |
4011                         (((u32) cmd->cmnd[8]) << 8) |
4012                 cmd->cmnd[9];
4013                 break;
4014         case WRITE_16:
4015                 is_write = 1;
4016         case READ_16:
4017                 first_block =
4018                         (((u64) cmd->cmnd[2]) << 56) |
4019                         (((u64) cmd->cmnd[3]) << 48) |
4020                         (((u64) cmd->cmnd[4]) << 40) |
4021                         (((u64) cmd->cmnd[5]) << 32) |
4022                         (((u64) cmd->cmnd[6]) << 24) |
4023                         (((u64) cmd->cmnd[7]) << 16) |
4024                         (((u64) cmd->cmnd[8]) << 8) |
4025                         cmd->cmnd[9];
4026                 block_cnt =
4027                         (((u32) cmd->cmnd[10]) << 24) |
4028                         (((u32) cmd->cmnd[11]) << 16) |
4029                         (((u32) cmd->cmnd[12]) << 8) |
4030                         cmd->cmnd[13];
4031                 break;
4032         default:
4033                 return IO_ACCEL_INELIGIBLE; /* process via normal I/O path */
4034         }
4035         last_block = first_block + block_cnt - 1;
4036
4037         /* check for write to non-RAID-0 */
4038         if (is_write && dev->raid_level != 0)
4039                 return IO_ACCEL_INELIGIBLE;
4040
4041         /* check for invalid block or wraparound */
4042         if (last_block >= le64_to_cpu(map->volume_blk_cnt) ||
4043                 last_block < first_block)
4044                 return IO_ACCEL_INELIGIBLE;
4045
4046         /* calculate stripe information for the request */
4047         blocks_per_row = le16_to_cpu(map->data_disks_per_row) *
4048                                 le16_to_cpu(map->strip_size);
4049         strip_size = le16_to_cpu(map->strip_size);
4050 #if BITS_PER_LONG == 32
4051         tmpdiv = first_block;
4052         (void) do_div(tmpdiv, blocks_per_row);
4053         first_row = tmpdiv;
4054         tmpdiv = last_block;
4055         (void) do_div(tmpdiv, blocks_per_row);
4056         last_row = tmpdiv;
4057         first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
4058         last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
4059         tmpdiv = first_row_offset;
4060         (void) do_div(tmpdiv, strip_size);
4061         first_column = tmpdiv;
4062         tmpdiv = last_row_offset;
4063         (void) do_div(tmpdiv, strip_size);
4064         last_column = tmpdiv;
4065 #else
4066         first_row = first_block / blocks_per_row;
4067         last_row = last_block / blocks_per_row;
4068         first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
4069         last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
4070         first_column = first_row_offset / strip_size;
4071         last_column = last_row_offset / strip_size;
4072 #endif
4073
4074         /* if this isn't a single row/column then give to the controller */
4075         if ((first_row != last_row) || (first_column != last_column))
4076                 return IO_ACCEL_INELIGIBLE;
4077
4078         /* proceeding with driver mapping */
4079         total_disks_per_row = le16_to_cpu(map->data_disks_per_row) +
4080                                 le16_to_cpu(map->metadata_disks_per_row);
4081         map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
4082                                 le16_to_cpu(map->row_cnt);
4083         map_index = (map_row * total_disks_per_row) + first_column;
4084
4085         switch (dev->raid_level) {
4086         case HPSA_RAID_0:
4087                 break; /* nothing special to do */
4088         case HPSA_RAID_1:
4089                 /* Handles load balance across RAID 1 members.
4090                  * (2-drive R1 and R10 with even # of drives.)
4091                  * Appropriate for SSDs, not optimal for HDDs
4092                  */
4093                 BUG_ON(le16_to_cpu(map->layout_map_count) != 2);
4094                 if (dev->offload_to_mirror)
4095                         map_index += le16_to_cpu(map->data_disks_per_row);
4096                 dev->offload_to_mirror = !dev->offload_to_mirror;
4097                 break;
4098         case HPSA_RAID_ADM:
4099                 /* Handles N-way mirrors  (R1-ADM)
4100                  * and R10 with # of drives divisible by 3.)
4101                  */
4102                 BUG_ON(le16_to_cpu(map->layout_map_count) != 3);
4103
4104                 offload_to_mirror = dev->offload_to_mirror;
4105                 raid_map_helper(map, offload_to_mirror,
4106                                 &map_index, &current_group);
4107                 /* set mirror group to use next time */
4108                 offload_to_mirror =
4109                         (offload_to_mirror >=
4110                         le16_to_cpu(map->layout_map_count) - 1)
4111                         ? 0 : offload_to_mirror + 1;
4112                 dev->offload_to_mirror = offload_to_mirror;
4113                 /* Avoid direct use of dev->offload_to_mirror within this
4114                  * function since multiple threads might simultaneously
4115                  * increment it beyond the range of dev->layout_map_count -1.
4116                  */
4117                 break;
4118         case HPSA_RAID_5:
4119         case HPSA_RAID_6:
4120                 if (le16_to_cpu(map->layout_map_count) <= 1)
4121                         break;
4122
4123                 /* Verify first and last block are in same RAID group */
4124                 r5or6_blocks_per_row =
4125                         le16_to_cpu(map->strip_size) *
4126                         le16_to_cpu(map->data_disks_per_row);
4127                 BUG_ON(r5or6_blocks_per_row == 0);
4128                 stripesize = r5or6_blocks_per_row *
4129                         le16_to_cpu(map->layout_map_count);
4130 #if BITS_PER_LONG == 32
4131                 tmpdiv = first_block;
4132                 first_group = do_div(tmpdiv, stripesize);
4133                 tmpdiv = first_group;
4134                 (void) do_div(tmpdiv, r5or6_blocks_per_row);
4135                 first_group = tmpdiv;
4136                 tmpdiv = last_block;
4137                 last_group = do_div(tmpdiv, stripesize);
4138                 tmpdiv = last_group;
4139                 (void) do_div(tmpdiv, r5or6_blocks_per_row);
4140                 last_group = tmpdiv;
4141 #else
4142                 first_group = (first_block % stripesize) / r5or6_blocks_per_row;
4143                 last_group = (last_block % stripesize) / r5or6_blocks_per_row;
4144 #endif
4145                 if (first_group != last_group)
4146                         return IO_ACCEL_INELIGIBLE;
4147
4148                 /* Verify request is in a single row of RAID 5/6 */
4149 #if BITS_PER_LONG == 32
4150                 tmpdiv = first_block;
4151                 (void) do_div(tmpdiv, stripesize);
4152                 first_row = r5or6_first_row = r0_first_row = tmpdiv;
4153                 tmpdiv = last_block;
4154                 (void) do_div(tmpdiv, stripesize);
4155                 r5or6_last_row = r0_last_row = tmpdiv;
4156 #else
4157                 first_row = r5or6_first_row = r0_first_row =
4158                                                 first_block / stripesize;
4159                 r5or6_last_row = r0_last_row = last_block / stripesize;
4160 #endif
4161                 if (r5or6_first_row != r5or6_last_row)
4162                         return IO_ACCEL_INELIGIBLE;
4163
4164
4165                 /* Verify request is in a single column */
4166 #if BITS_PER_LONG == 32
4167                 tmpdiv = first_block;
4168                 first_row_offset = do_div(tmpdiv, stripesize);
4169                 tmpdiv = first_row_offset;
4170                 first_row_offset = (u32) do_div(tmpdiv, r5or6_blocks_per_row);
4171                 r5or6_first_row_offset = first_row_offset;
4172                 tmpdiv = last_block;
4173                 r5or6_last_row_offset = do_div(tmpdiv, stripesize);
4174                 tmpdiv = r5or6_last_row_offset;
4175                 r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row);
4176                 tmpdiv = r5or6_first_row_offset;
4177                 (void) do_div(tmpdiv, map->strip_size);
4178                 first_column = r5or6_first_column = tmpdiv;
4179                 tmpdiv = r5or6_last_row_offset;
4180                 (void) do_div(tmpdiv, map->strip_size);
4181                 r5or6_last_column = tmpdiv;
4182 #else
4183                 first_row_offset = r5or6_first_row_offset =
4184                         (u32)((first_block % stripesize) %
4185                                                 r5or6_blocks_per_row);
4186
4187                 r5or6_last_row_offset =
4188                         (u32)((last_block % stripesize) %
4189                                                 r5or6_blocks_per_row);
4190
4191                 first_column = r5or6_first_column =
4192                         r5or6_first_row_offset / le16_to_cpu(map->strip_size);
4193                 r5or6_last_column =
4194                         r5or6_last_row_offset / le16_to_cpu(map->strip_size);
4195 #endif
4196                 if (r5or6_first_column != r5or6_last_column)
4197                         return IO_ACCEL_INELIGIBLE;
4198
4199                 /* Request is eligible */
4200                 map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
4201                         le16_to_cpu(map->row_cnt);
4202
4203                 map_index = (first_group *
4204                         (le16_to_cpu(map->row_cnt) * total_disks_per_row)) +
4205                         (map_row * total_disks_per_row) + first_column;
4206                 break;
4207         default:
4208                 return IO_ACCEL_INELIGIBLE;
4209         }
4210
4211         if (unlikely(map_index >= RAID_MAP_MAX_ENTRIES))
4212                 return IO_ACCEL_INELIGIBLE;
4213
4214         c->phys_disk = dev->phys_disk[map_index];
4215
4216         disk_handle = dd[map_index].ioaccel_handle;
4217         disk_block = le64_to_cpu(map->disk_starting_blk) +
4218                         first_row * le16_to_cpu(map->strip_size) +
4219                         (first_row_offset - first_column *
4220                         le16_to_cpu(map->strip_size));
4221         disk_block_cnt = block_cnt;
4222
4223         /* handle differing logical/physical block sizes */
4224         if (map->phys_blk_shift) {
4225                 disk_block <<= map->phys_blk_shift;
4226                 disk_block_cnt <<= map->phys_blk_shift;
4227         }
4228         BUG_ON(disk_block_cnt > 0xffff);
4229
4230         /* build the new CDB for the physical disk I/O */
4231         if (disk_block > 0xffffffff) {
4232                 cdb[0] = is_write ? WRITE_16 : READ_16;
4233                 cdb[1] = 0;
4234                 cdb[2] = (u8) (disk_block >> 56);
4235                 cdb[3] = (u8) (disk_block >> 48);
4236                 cdb[4] = (u8) (disk_block >> 40);
4237                 cdb[5] = (u8) (disk_block >> 32);
4238                 cdb[6] = (u8) (disk_block >> 24);
4239                 cdb[7] = (u8) (disk_block >> 16);
4240                 cdb[8] = (u8) (disk_block >> 8);
4241                 cdb[9] = (u8) (disk_block);
4242                 cdb[10] = (u8) (disk_block_cnt >> 24);
4243                 cdb[11] = (u8) (disk_block_cnt >> 16);
4244                 cdb[12] = (u8) (disk_block_cnt >> 8);
4245                 cdb[13] = (u8) (disk_block_cnt);
4246                 cdb[14] = 0;
4247                 cdb[15] = 0;
4248                 cdb_len = 16;
4249         } else {
4250                 cdb[0] = is_write ? WRITE_10 : READ_10;
4251                 cdb[1] = 0;
4252                 cdb[2] = (u8) (disk_block >> 24);
4253                 cdb[3] = (u8) (disk_block >> 16);
4254                 cdb[4] = (u8) (disk_block >> 8);
4255                 cdb[5] = (u8) (disk_block);
4256                 cdb[6] = 0;
4257                 cdb[7] = (u8) (disk_block_cnt >> 8);
4258                 cdb[8] = (u8) (disk_block_cnt);
4259                 cdb[9] = 0;
4260                 cdb_len = 10;
4261         }
4262         return hpsa_scsi_ioaccel_queue_command(h, c, disk_handle, cdb, cdb_len,
4263                                                 dev->scsi3addr,
4264                                                 dev->phys_disk[map_index]);
4265 }
4266
4267 /*
4268  * Submit commands down the "normal" RAID stack path
4269  * All callers to hpsa_ciss_submit must check lockup_detected
4270  * beforehand, before (opt.) and after calling cmd_alloc
4271  */
4272 static int hpsa_ciss_submit(struct ctlr_info *h,
4273         struct CommandList *c, struct scsi_cmnd *cmd,
4274         unsigned char scsi3addr[])
4275 {
4276         cmd->host_scribble = (unsigned char *) c;
4277         c->cmd_type = CMD_SCSI;
4278         c->scsi_cmd = cmd;
4279         c->Header.ReplyQueue = 0;  /* unused in simple mode */
4280         memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
4281         c->Header.tag = cpu_to_le64((c->cmdindex << DIRECT_LOOKUP_SHIFT));
4282
4283         /* Fill in the request block... */
4284
4285         c->Request.Timeout = 0;
4286         BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
4287         c->Request.CDBLen = cmd->cmd_len;
4288         memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
4289         switch (cmd->sc_data_direction) {
4290         case DMA_TO_DEVICE:
4291                 c->Request.type_attr_dir =
4292                         TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_WRITE);
4293                 break;
4294         case DMA_FROM_DEVICE:
4295                 c->Request.type_attr_dir =
4296                         TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_READ);
4297                 break;
4298         case DMA_NONE:
4299                 c->Request.type_attr_dir =
4300                         TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_NONE);
4301                 break;
4302         case DMA_BIDIRECTIONAL:
4303                 /* This can happen if a buggy application does a scsi passthru
4304                  * and sets both inlen and outlen to non-zero. ( see
4305                  * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
4306                  */
4307
4308                 c->Request.type_attr_dir =
4309                         TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_RSVD);
4310                 /* This is technically wrong, and hpsa controllers should
4311                  * reject it with CMD_INVALID, which is the most correct
4312                  * response, but non-fibre backends appear to let it
4313                  * slide by, and give the same results as if this field
4314                  * were set correctly.  Either way is acceptable for
4315                  * our purposes here.
4316                  */
4317
4318                 break;
4319
4320         default:
4321                 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
4322                         cmd->sc_data_direction);
4323                 BUG();
4324                 break;
4325         }
4326
4327         if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
4328                 cmd_free(h, c);
4329                 return SCSI_MLQUEUE_HOST_BUSY;
4330         }
4331         enqueue_cmd_and_start_io(h, c);
4332         /* the cmd'll come back via intr handler in complete_scsi_command()  */
4333         return 0;
4334 }
4335
4336 static void hpsa_cmd_init(struct ctlr_info *h, int index,
4337                                 struct CommandList *c)
4338 {
4339         dma_addr_t cmd_dma_handle, err_dma_handle;
4340
4341         /* Zero out all of commandlist except the last field, refcount */
4342         memset(c, 0, offsetof(struct CommandList, refcount));
4343         c->Header.tag = cpu_to_le64((u64) (index << DIRECT_LOOKUP_SHIFT));
4344         cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c);
4345         c->err_info = h->errinfo_pool + index;
4346         memset(c->err_info, 0, sizeof(*c->err_info));
4347         err_dma_handle = h->errinfo_pool_dhandle
4348             + index * sizeof(*c->err_info);
4349         c->cmdindex = index;
4350         c->busaddr = (u32) cmd_dma_handle;
4351         c->ErrDesc.Addr = cpu_to_le64((u64) err_dma_handle);
4352         c->ErrDesc.Len = cpu_to_le32((u32) sizeof(*c->err_info));
4353         c->h = h;
4354 }
4355
4356 static void hpsa_preinitialize_commands(struct ctlr_info *h)
4357 {
4358         int i;
4359
4360         for (i = 0; i < h->nr_cmds; i++) {
4361                 struct CommandList *c = h->cmd_pool + i;
4362
4363                 hpsa_cmd_init(h, i, c);
4364                 atomic_set(&c->refcount, 0);
4365         }
4366 }
4367
4368 static inline void hpsa_cmd_partial_init(struct ctlr_info *h, int index,
4369                                 struct CommandList *c)
4370 {
4371         dma_addr_t cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c);
4372
4373         memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
4374         memset(c->err_info, 0, sizeof(*c->err_info));
4375         c->busaddr = (u32) cmd_dma_handle;
4376 }
4377
4378 static int hpsa_ioaccel_submit(struct ctlr_info *h,
4379                 struct CommandList *c, struct scsi_cmnd *cmd,
4380                 unsigned char *scsi3addr)
4381 {
4382         struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4383         int rc = IO_ACCEL_INELIGIBLE;
4384
4385         cmd->host_scribble = (unsigned char *) c;
4386
4387         if (dev->offload_enabled) {
4388                 hpsa_cmd_init(h, c->cmdindex, c);
4389                 c->cmd_type = CMD_SCSI;
4390                 c->scsi_cmd = cmd;
4391                 rc = hpsa_scsi_ioaccel_raid_map(h, c);
4392                 if (rc < 0)     /* scsi_dma_map failed. */
4393                         rc = SCSI_MLQUEUE_HOST_BUSY;
4394         } else if (dev->ioaccel_handle) {
4395                 hpsa_cmd_init(h, c->cmdindex, c);
4396                 c->cmd_type = CMD_SCSI;
4397                 c->scsi_cmd = cmd;
4398                 rc = hpsa_scsi_ioaccel_direct_map(h, c);
4399                 if (rc < 0)     /* scsi_dma_map failed. */
4400                         rc = SCSI_MLQUEUE_HOST_BUSY;
4401         }
4402         return rc;
4403 }
4404
4405 static void hpsa_command_resubmit_worker(struct work_struct *work)
4406 {
4407         struct scsi_cmnd *cmd;
4408         struct hpsa_scsi_dev_t *dev;
4409         struct CommandList *c =
4410                         container_of(work, struct CommandList, work);
4411
4412         cmd = c->scsi_cmd;
4413         dev = cmd->device->hostdata;
4414         if (!dev) {
4415                 cmd->result = DID_NO_CONNECT << 16;
4416                 cmd_free(c->h, c);
4417                 cmd->scsi_done(cmd);
4418                 return;
4419         }
4420         if (c->cmd_type == CMD_IOACCEL2) {
4421                 struct ctlr_info *h = c->h;
4422                 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
4423                 int rc;
4424
4425                 if (c2->error_data.serv_response ==
4426                                 IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL) {
4427                         rc = hpsa_ioaccel_submit(h, c, cmd, dev->scsi3addr);
4428                         if (rc == 0)
4429                                 return;
4430                         if (rc == SCSI_MLQUEUE_HOST_BUSY) {
4431                                 /*
4432                                  * If we get here, it means dma mapping failed.
4433                                  * Try again via scsi mid layer, which will
4434                                  * then get SCSI_MLQUEUE_HOST_BUSY.
4435                                  */
4436                                 cmd->result = DID_IMM_RETRY << 16;
4437                                 cmd->scsi_done(cmd);
4438                                 cmd_free(h, c); /* FIX-ME:  on merge, change
4439                                                  * to cmd_tagged_free() and
4440                                                  * ultimately to
4441                                                  * hpsa_cmd_free_and_done(). */
4442                                 return;
4443                         }
4444                         /* else, fall thru and resubmit down CISS path */
4445                 }
4446         }
4447         hpsa_cmd_partial_init(c->h, c->cmdindex, c);
4448         if (hpsa_ciss_submit(c->h, c, cmd, dev->scsi3addr)) {
4449                 /*
4450                  * If we get here, it means dma mapping failed. Try
4451                  * again via scsi mid layer, which will then get
4452                  * SCSI_MLQUEUE_HOST_BUSY.
4453                  *
4454                  * hpsa_ciss_submit will have already freed c
4455                  * if it encountered a dma mapping failure.
4456                  */
4457                 cmd->result = DID_IMM_RETRY << 16;
4458                 cmd->scsi_done(cmd);
4459         }
4460 }
4461
4462 /* Running in struct Scsi_Host->host_lock less mode */
4463 static int hpsa_scsi_queue_command(struct Scsi_Host *sh, struct scsi_cmnd *cmd)
4464 {
4465         struct ctlr_info *h;
4466         struct hpsa_scsi_dev_t *dev;
4467         unsigned char scsi3addr[8];
4468         struct CommandList *c;
4469         int rc = 0;
4470
4471         /* Get the ptr to our adapter structure out of cmd->host. */
4472         h = sdev_to_hba(cmd->device);
4473         dev = cmd->device->hostdata;
4474         if (!dev) {
4475                 cmd->result = DID_NO_CONNECT << 16;
4476                 cmd->scsi_done(cmd);
4477                 return 0;
4478         }
4479         memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
4480
4481         if (unlikely(lockup_detected(h))) {
4482                 cmd->result = DID_NO_CONNECT << 16;
4483                 cmd->scsi_done(cmd);
4484                 return 0;
4485         }
4486         c = cmd_alloc(h);
4487         if (c == NULL) {                        /* trouble... */
4488                 dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n");
4489                 return SCSI_MLQUEUE_HOST_BUSY;
4490         }
4491         if (unlikely(lockup_detected(h))) {
4492                 cmd->result = DID_NO_CONNECT << 16;
4493                 cmd_free(h, c);
4494                 cmd->scsi_done(cmd);
4495                 return 0;
4496         }
4497
4498         /*
4499          * Call alternate submit routine for I/O accelerated commands.
4500          * Retries always go down the normal I/O path.
4501          */
4502         if (likely(cmd->retries == 0 &&
4503                 cmd->request->cmd_type == REQ_TYPE_FS &&
4504                 h->acciopath_status)) {
4505                 rc = hpsa_ioaccel_submit(h, c, cmd, scsi3addr);
4506                 if (rc == 0)
4507                         return 0;
4508                 if (rc == SCSI_MLQUEUE_HOST_BUSY) {
4509                         cmd_free(h, c); /* FIX-ME:  on merge, change to
4510                                          * cmd_tagged_free(), and ultimately
4511                                          * to hpsa_cmd_resolve_and_free(). */
4512                         return SCSI_MLQUEUE_HOST_BUSY;
4513                 }
4514         }
4515         return hpsa_ciss_submit(h, c, cmd, scsi3addr);
4516 }
4517
4518 static void hpsa_scan_complete(struct ctlr_info *h)
4519 {
4520         unsigned long flags;
4521
4522         spin_lock_irqsave(&h->scan_lock, flags);
4523         h->scan_finished = 1;
4524         wake_up_all(&h->scan_wait_queue);
4525         spin_unlock_irqrestore(&h->scan_lock, flags);
4526 }
4527
4528 static void hpsa_scan_start(struct Scsi_Host *sh)
4529 {
4530         struct ctlr_info *h = shost_to_hba(sh);
4531         unsigned long flags;
4532
4533         /*
4534          * Don't let rescans be initiated on a controller known to be locked
4535          * up.  If the controller locks up *during* a rescan, that thread is
4536          * probably hosed, but at least we can prevent new rescan threads from
4537          * piling up on a locked up controller.
4538          */
4539         if (unlikely(lockup_detected(h)))
4540                 return hpsa_scan_complete(h);
4541
4542         /* wait until any scan already in progress is finished. */
4543         while (1) {
4544                 spin_lock_irqsave(&h->scan_lock, flags);
4545                 if (h->scan_finished)
4546                         break;
4547                 spin_unlock_irqrestore(&h->scan_lock, flags);
4548                 wait_event(h->scan_wait_queue, h->scan_finished);
4549                 /* Note: We don't need to worry about a race between this
4550                  * thread and driver unload because the midlayer will
4551                  * have incremented the reference count, so unload won't
4552                  * happen if we're in here.
4553                  */
4554         }
4555         h->scan_finished = 0; /* mark scan as in progress */
4556         spin_unlock_irqrestore(&h->scan_lock, flags);
4557
4558         if (unlikely(lockup_detected(h)))
4559                 return hpsa_scan_complete(h);
4560
4561         hpsa_update_scsi_devices(h, h->scsi_host->host_no);
4562
4563         hpsa_scan_complete(h);
4564 }
4565
4566 static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth)
4567 {
4568         struct hpsa_scsi_dev_t *logical_drive = sdev->hostdata;
4569
4570         if (!logical_drive)
4571                 return -ENODEV;
4572
4573         if (qdepth < 1)
4574                 qdepth = 1;
4575         else if (qdepth > logical_drive->queue_depth)
4576                 qdepth = logical_drive->queue_depth;
4577
4578         return scsi_change_queue_depth(sdev, qdepth);
4579 }
4580
4581 static int hpsa_scan_finished(struct Scsi_Host *sh,
4582         unsigned long elapsed_time)
4583 {
4584         struct ctlr_info *h = shost_to_hba(sh);
4585         unsigned long flags;
4586         int finished;
4587
4588         spin_lock_irqsave(&h->scan_lock, flags);
4589         finished = h->scan_finished;
4590         spin_unlock_irqrestore(&h->scan_lock, flags);
4591         return finished;
4592 }
4593
4594 static void hpsa_unregister_scsi(struct ctlr_info *h)
4595 {
4596         /* we are being forcibly unloaded, and may not refuse. */
4597         scsi_remove_host(h->scsi_host);
4598         scsi_host_put(h->scsi_host);
4599         h->scsi_host = NULL;
4600 }
4601
4602 static int hpsa_register_scsi(struct ctlr_info *h)
4603 {
4604         struct Scsi_Host *sh;
4605         int error;
4606
4607         sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
4608         if (sh == NULL)
4609                 goto fail;
4610
4611         sh->io_port = 0;
4612         sh->n_io_port = 0;
4613         sh->this_id = -1;
4614         sh->max_channel = 3;
4615         sh->max_cmd_len = MAX_COMMAND_SIZE;
4616         sh->max_lun = HPSA_MAX_LUN;
4617         sh->max_id = HPSA_MAX_LUN;
4618         sh->can_queue = h->nr_cmds - HPSA_NRESERVED_CMDS;
4619         sh->cmd_per_lun = sh->can_queue;
4620         sh->sg_tablesize = h->maxsgentries;
4621         h->scsi_host = sh;
4622         sh->hostdata[0] = (unsigned long) h;
4623         sh->irq = h->intr[h->intr_mode];
4624         sh->unique_id = sh->irq;
4625         error = scsi_add_host(sh, &h->pdev->dev);
4626         if (error)
4627                 goto fail_host_put;
4628         scsi_scan_host(sh);
4629         return 0;
4630
4631  fail_host_put:
4632         dev_err(&h->pdev->dev, "%s: scsi_add_host"
4633                 " failed for controller %d\n", __func__, h->ctlr);
4634         scsi_host_put(sh);
4635         return error;
4636  fail:
4637         dev_err(&h->pdev->dev, "%s: scsi_host_alloc"
4638                 " failed for controller %d\n", __func__, h->ctlr);
4639         return -ENOMEM;
4640 }
4641
4642 static int wait_for_device_to_become_ready(struct ctlr_info *h,
4643         unsigned char lunaddr[])
4644 {
4645         int rc;
4646         int count = 0;
4647         int waittime = 1; /* seconds */
4648         struct CommandList *c;
4649
4650         c = cmd_alloc(h);
4651         if (!c) {
4652                 dev_warn(&h->pdev->dev, "out of memory in "
4653                         "wait_for_device_to_become_ready.\n");
4654                 return IO_ERROR;
4655         }
4656
4657         /* Send test unit ready until device ready, or give up. */
4658         while (count < HPSA_TUR_RETRY_LIMIT) {
4659
4660                 /* Wait for a bit.  do this first, because if we send
4661                  * the TUR right away, the reset will just abort it.
4662                  */
4663                 msleep(1000 * waittime);
4664                 count++;
4665                 rc = 0; /* Device ready. */
4666
4667                 /* Increase wait time with each try, up to a point. */
4668                 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
4669                         waittime = waittime * 2;
4670
4671                 /* Send the Test Unit Ready, fill_cmd can't fail, no mapping */
4672                 (void) fill_cmd(c, TEST_UNIT_READY, h,
4673                                 NULL, 0, 0, lunaddr, TYPE_CMD);
4674                 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
4675                                                 NO_TIMEOUT);
4676                 if (rc)
4677                         goto do_it_again;
4678                 /* no unmap needed here because no data xfer. */
4679
4680                 if (c->err_info->CommandStatus == CMD_SUCCESS)
4681                         break;
4682
4683                 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
4684                         c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
4685                         (c->err_info->SenseInfo[2] == NO_SENSE ||
4686                         c->err_info->SenseInfo[2] == UNIT_ATTENTION))
4687                         break;
4688 do_it_again:
4689                 dev_warn(&h->pdev->dev, "waiting %d secs "
4690                         "for device to become ready.\n", waittime);
4691                 rc = 1; /* device not ready. */
4692         }
4693
4694         if (rc)
4695                 dev_warn(&h->pdev->dev, "giving up on device.\n");
4696         else
4697                 dev_warn(&h->pdev->dev, "device is ready.\n");
4698
4699         cmd_free(h, c);
4700         return rc;
4701 }
4702
4703 /* Need at least one of these error handlers to keep ../scsi/hosts.c from
4704  * complaining.  Doing a host- or bus-reset can't do anything good here.
4705  */
4706 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
4707 {
4708         int rc;
4709         struct ctlr_info *h;
4710         struct hpsa_scsi_dev_t *dev;
4711
4712         /* find the controller to which the command to be aborted was sent */
4713         h = sdev_to_hba(scsicmd->device);
4714         if (h == NULL) /* paranoia */
4715                 return FAILED;
4716
4717         if (lockup_detected(h))
4718                 return FAILED;
4719
4720         dev = scsicmd->device->hostdata;
4721         if (!dev) {
4722                 dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: "
4723                         "device lookup failed.\n");
4724                 return FAILED;
4725         }
4726
4727         /* if controller locked up, we can guarantee command won't complete */
4728         if (lockup_detected(h)) {
4729                 dev_warn(&h->pdev->dev,
4730                         "scsi %d:%d:%d:%d RESET FAILED, lockup detected\n",
4731                         h->scsi_host->host_no, dev->bus, dev->target,
4732                         dev->lun);
4733                 return FAILED;
4734         }
4735
4736         /* this reset request might be the result of a lockup; check */
4737         if (detect_controller_lockup(h)) {
4738                 dev_warn(&h->pdev->dev,
4739                          "scsi %d:%d:%d:%d RESET FAILED, new lockup detected\n",
4740                          h->scsi_host->host_no, dev->bus, dev->target,
4741                          dev->lun);
4742                 return FAILED;
4743         }
4744
4745         hpsa_show_dev_msg(KERN_WARNING, h, dev, "resetting");
4746
4747         /* send a reset to the SCSI LUN which the command was sent to */
4748         rc = hpsa_send_reset(h, dev->scsi3addr, HPSA_RESET_TYPE_LUN,
4749                              DEFAULT_REPLY_QUEUE);
4750         if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0)
4751                 return SUCCESS;
4752
4753         dev_warn(&h->pdev->dev,
4754                 "scsi %d:%d:%d:%d reset failed\n",
4755                 h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
4756         return FAILED;
4757 }
4758
4759 static void swizzle_abort_tag(u8 *tag)
4760 {
4761         u8 original_tag[8];
4762
4763         memcpy(original_tag, tag, 8);
4764         tag[0] = original_tag[3];
4765         tag[1] = original_tag[2];
4766         tag[2] = original_tag[1];
4767         tag[3] = original_tag[0];
4768         tag[4] = original_tag[7];
4769         tag[5] = original_tag[6];
4770         tag[6] = original_tag[5];
4771         tag[7] = original_tag[4];
4772 }
4773
4774 static void hpsa_get_tag(struct ctlr_info *h,
4775         struct CommandList *c, __le32 *taglower, __le32 *tagupper)
4776 {
4777         u64 tag;
4778         if (c->cmd_type == CMD_IOACCEL1) {
4779                 struct io_accel1_cmd *cm1 = (struct io_accel1_cmd *)
4780                         &h->ioaccel_cmd_pool[c->cmdindex];
4781                 tag = le64_to_cpu(cm1->tag);
4782                 *tagupper = cpu_to_le32(tag >> 32);
4783                 *taglower = cpu_to_le32(tag);
4784                 return;
4785         }
4786         if (c->cmd_type == CMD_IOACCEL2) {
4787                 struct io_accel2_cmd *cm2 = (struct io_accel2_cmd *)
4788                         &h->ioaccel2_cmd_pool[c->cmdindex];
4789                 /* upper tag not used in ioaccel2 mode */
4790                 memset(tagupper, 0, sizeof(*tagupper));
4791                 *taglower = cm2->Tag;
4792                 return;
4793         }
4794         tag = le64_to_cpu(c->Header.tag);
4795         *tagupper = cpu_to_le32(tag >> 32);
4796         *taglower = cpu_to_le32(tag);
4797 }
4798
4799 static int hpsa_send_abort(struct ctlr_info *h, unsigned char *scsi3addr,
4800         struct CommandList *abort, int reply_queue)
4801 {
4802         int rc = IO_OK;
4803         struct CommandList *c;
4804         struct ErrorInfo *ei;
4805         __le32 tagupper, taglower;
4806
4807         c = cmd_alloc(h);
4808         if (c == NULL) {        /* trouble... */
4809                 dev_warn(&h->pdev->dev, "cmd_alloc returned NULL!\n");
4810                 return -ENOMEM;
4811         }
4812
4813         /* fill_cmd can't fail here, no buffer to map */
4814         (void) fill_cmd(c, HPSA_ABORT_MSG, h, &abort->Header.tag,
4815                 0, 0, scsi3addr, TYPE_MSG);
4816         if (h->needs_abort_tags_swizzled)
4817                 swizzle_abort_tag(&c->Request.CDB[4]);
4818         (void) hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT);
4819         hpsa_get_tag(h, abort, &taglower, &tagupper);
4820         dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: do_simple_cmd(abort) completed.\n",
4821                 __func__, tagupper, taglower);
4822         /* no unmap needed here because no data xfer. */
4823
4824         ei = c->err_info;
4825         switch (ei->CommandStatus) {
4826         case CMD_SUCCESS:
4827                 break;
4828         case CMD_TMF_STATUS:
4829                 rc = hpsa_evaluate_tmf_status(h, c);
4830                 break;
4831         case CMD_UNABORTABLE: /* Very common, don't make noise. */
4832                 rc = -1;
4833                 break;
4834         default:
4835                 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: interpreting error.\n",
4836                         __func__, tagupper, taglower);
4837                 hpsa_scsi_interpret_error(h, c);
4838                 rc = -1;
4839                 break;
4840         }
4841         cmd_free(h, c);
4842         dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n",
4843                 __func__, tagupper, taglower);
4844         return rc;
4845 }
4846
4847 /* ioaccel2 path firmware cannot handle abort task requests.
4848  * Change abort requests to physical target reset, and send to the
4849  * address of the physical disk used for the ioaccel 2 command.
4850  * Return 0 on success (IO_OK)
4851  *       -1 on failure
4852  */
4853
4854 static int hpsa_send_reset_as_abort_ioaccel2(struct ctlr_info *h,
4855         unsigned char *scsi3addr, struct CommandList *abort, int reply_queue)
4856 {
4857         int rc = IO_OK;
4858         struct scsi_cmnd *scmd; /* scsi command within request being aborted */
4859         struct hpsa_scsi_dev_t *dev; /* device to which scsi cmd was sent */
4860         unsigned char phys_scsi3addr[8]; /* addr of phys disk with volume */
4861         unsigned char *psa = &phys_scsi3addr[0];
4862
4863         /* Get a pointer to the hpsa logical device. */
4864         scmd = abort->scsi_cmd;
4865         dev = (struct hpsa_scsi_dev_t *)(scmd->device->hostdata);
4866         if (dev == NULL) {
4867                 dev_warn(&h->pdev->dev,
4868                         "Cannot abort: no device pointer for command.\n");
4869                         return -1; /* not abortable */
4870         }
4871
4872         if (h->raid_offload_debug > 0)
4873                 dev_info(&h->pdev->dev,
4874                         "scsi %d:%d:%d:%d %s scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
4875                         h->scsi_host->host_no, dev->bus, dev->target, dev->lun,
4876                         "Reset as abort",
4877                         scsi3addr[0], scsi3addr[1], scsi3addr[2], scsi3addr[3],
4878                         scsi3addr[4], scsi3addr[5], scsi3addr[6], scsi3addr[7]);
4879
4880         if (!dev->offload_enabled) {
4881                 dev_warn(&h->pdev->dev,
4882                         "Can't abort: device is not operating in HP SSD Smart Path mode.\n");
4883                 return -1; /* not abortable */
4884         }
4885
4886         /* Incoming scsi3addr is logical addr. We need physical disk addr. */
4887         if (!hpsa_get_pdisk_of_ioaccel2(h, abort, psa)) {
4888                 dev_warn(&h->pdev->dev, "Can't abort: Failed lookup of physical address.\n");
4889                 return -1; /* not abortable */
4890         }
4891
4892         /* send the reset */
4893         if (h->raid_offload_debug > 0)
4894                 dev_info(&h->pdev->dev,
4895                         "Reset as abort: Resetting physical device at scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
4896                         psa[0], psa[1], psa[2], psa[3],
4897                         psa[4], psa[5], psa[6], psa[7]);
4898         rc = hpsa_send_reset(h, psa, HPSA_RESET_TYPE_TARGET, reply_queue);
4899         if (rc != 0) {
4900                 dev_warn(&h->pdev->dev,
4901                         "Reset as abort: Failed on physical device at scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
4902                         psa[0], psa[1], psa[2], psa[3],
4903                         psa[4], psa[5], psa[6], psa[7]);
4904                 return rc; /* failed to reset */
4905         }
4906
4907         /* wait for device to recover */
4908         if (wait_for_device_to_become_ready(h, psa) != 0) {
4909                 dev_warn(&h->pdev->dev,
4910                         "Reset as abort: Failed: Device never recovered from reset: 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
4911                         psa[0], psa[1], psa[2], psa[3],
4912                         psa[4], psa[5], psa[6], psa[7]);
4913                 return -1;  /* failed to recover */
4914         }
4915
4916         /* device recovered */
4917         dev_info(&h->pdev->dev,
4918                 "Reset as abort: Device recovered from reset: scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
4919                 psa[0], psa[1], psa[2], psa[3],
4920                 psa[4], psa[5], psa[6], psa[7]);
4921
4922         return rc; /* success */
4923 }
4924
4925 static int hpsa_send_abort_both_ways(struct ctlr_info *h,
4926         unsigned char *scsi3addr, struct CommandList *abort, int reply_queue)
4927 {
4928         /* ioccelerator mode 2 commands should be aborted via the
4929          * accelerated path, since RAID path is unaware of these commands,
4930          * but underlying firmware can't handle abort TMF.
4931          * Change abort to physical device reset.
4932          */
4933         if (abort->cmd_type == CMD_IOACCEL2)
4934                 return hpsa_send_reset_as_abort_ioaccel2(h, scsi3addr,
4935                                                         abort, reply_queue);
4936         return hpsa_send_abort(h, scsi3addr, abort, reply_queue);
4937 }
4938
4939 /* Find out which reply queue a command was meant to return on */
4940 static int hpsa_extract_reply_queue(struct ctlr_info *h,
4941                                         struct CommandList *c)
4942 {
4943         if (c->cmd_type == CMD_IOACCEL2)
4944                 return h->ioaccel2_cmd_pool[c->cmdindex].reply_queue;
4945         return c->Header.ReplyQueue;
4946 }
4947
4948 /*
4949  * Limit concurrency of abort commands to prevent
4950  * over-subscription of commands
4951  */
4952 static inline int wait_for_available_abort_cmd(struct ctlr_info *h)
4953 {
4954 #define ABORT_CMD_WAIT_MSECS 5000
4955         return !wait_event_timeout(h->abort_cmd_wait_queue,
4956                         atomic_dec_if_positive(&h->abort_cmds_available) >= 0,
4957                         msecs_to_jiffies(ABORT_CMD_WAIT_MSECS));
4958 }
4959
4960 /* Send an abort for the specified command.
4961  *      If the device and controller support it,
4962  *              send a task abort request.
4963  */
4964 static int hpsa_eh_abort_handler(struct scsi_cmnd *sc)
4965 {
4966
4967         int i, rc;
4968         struct ctlr_info *h;
4969         struct hpsa_scsi_dev_t *dev;
4970         struct CommandList *abort; /* pointer to command to be aborted */
4971         struct scsi_cmnd *as;   /* ptr to scsi cmd inside aborted command. */
4972         char msg[256];          /* For debug messaging. */
4973         int ml = 0;
4974         __le32 tagupper, taglower;
4975         int refcount, reply_queue;
4976
4977         if (sc == NULL)
4978                 return FAILED;
4979
4980         if (sc->device == NULL)
4981                 return FAILED;
4982
4983         /* Find the controller of the command to be aborted */
4984         h = sdev_to_hba(sc->device);
4985         if (h == NULL)
4986                 return FAILED;
4987
4988         /* Find the device of the command to be aborted */
4989         dev = sc->device->hostdata;
4990         if (!dev) {
4991                 dev_err(&h->pdev->dev, "%s FAILED, Device lookup failed.\n",
4992                                 msg);
4993                 return FAILED;
4994         }
4995
4996         /* If controller locked up, we can guarantee command won't complete */
4997         if (lockup_detected(h)) {
4998                 hpsa_show_dev_msg(KERN_WARNING, h, dev,
4999                                         "ABORT FAILED, lockup detected");
5000                 return FAILED;
5001         }
5002
5003         /* This is a good time to check if controller lockup has occurred */
5004         if (detect_controller_lockup(h)) {
5005                 hpsa_show_dev_msg(KERN_WARNING, h, dev,
5006                                         "ABORT FAILED, new lockup detected");
5007                 return FAILED;
5008         }
5009
5010         /* Check that controller supports some kind of task abort */
5011         if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags) &&
5012                 !(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
5013                 return FAILED;
5014
5015         memset(msg, 0, sizeof(msg));
5016         ml += sprintf(msg+ml, "scsi %d:%d:%d:%llu %s",
5017                 h->scsi_host->host_no, sc->device->channel,
5018                 sc->device->id, sc->device->lun,
5019                 "Aborting command");
5020
5021         /* Get SCSI command to be aborted */
5022         abort = (struct CommandList *) sc->host_scribble;
5023         if (abort == NULL) {
5024                 /* This can happen if the command already completed. */
5025                 return SUCCESS;
5026         }
5027         refcount = atomic_inc_return(&abort->refcount);
5028         if (refcount == 1) { /* Command is done already. */
5029                 cmd_free(h, abort);
5030                 return SUCCESS;
5031         }
5032
5033         /* Don't bother trying the abort if we know it won't work. */
5034         if (abort->cmd_type != CMD_IOACCEL2 &&
5035                 abort->cmd_type != CMD_IOACCEL1 && !dev->supports_aborts) {
5036                 cmd_free(h, abort);
5037                 return FAILED;
5038         }
5039
5040         hpsa_get_tag(h, abort, &taglower, &tagupper);
5041         reply_queue = hpsa_extract_reply_queue(h, abort);
5042         ml += sprintf(msg+ml, "Tag:0x%08x:%08x ", tagupper, taglower);
5043         as  = abort->scsi_cmd;
5044         if (as != NULL)
5045                 ml += sprintf(msg+ml, "Command:0x%x SN:0x%lx ",
5046                         as->cmnd[0], as->serial_number);
5047         dev_dbg(&h->pdev->dev, "%s\n", msg);
5048         hpsa_show_dev_msg(KERN_WARNING, h, dev, "Aborting command");
5049         /*
5050          * Command is in flight, or possibly already completed
5051          * by the firmware (but not to the scsi mid layer) but we can't
5052          * distinguish which.  Send the abort down.
5053          */
5054         if (wait_for_available_abort_cmd(h)) {
5055                 dev_warn(&h->pdev->dev,
5056                         "Timed out waiting for an abort command to become available.\n");
5057                 cmd_free(h, abort);
5058                 return FAILED;
5059         }
5060         rc = hpsa_send_abort_both_ways(h, dev->scsi3addr, abort, reply_queue);
5061         atomic_inc(&h->abort_cmds_available);
5062         wake_up_all(&h->abort_cmd_wait_queue);
5063         if (rc != 0) {
5064                 hpsa_show_dev_msg(KERN_WARNING, h, dev,
5065                                         "FAILED to abort command");
5066                 cmd_free(h, abort);
5067                 return FAILED;
5068         }
5069         dev_info(&h->pdev->dev, "%s REQUEST SUCCEEDED.\n", msg);
5070
5071         /* If the abort(s) above completed and actually aborted the
5072          * command, then the command to be aborted should already be
5073          * completed.  If not, wait around a bit more to see if they
5074          * manage to complete normally.
5075          */
5076 #define ABORT_COMPLETE_WAIT_SECS 30
5077         for (i = 0; i < ABORT_COMPLETE_WAIT_SECS * 10; i++) {
5078                 refcount = atomic_read(&abort->refcount);
5079                 if (refcount < 2) {
5080                         cmd_free(h, abort);
5081                         return SUCCESS;
5082                 } else {
5083                         msleep(100);
5084                 }
5085         }
5086         dev_warn(&h->pdev->dev, "%s FAILED. Aborted command has not completed after %d seconds.\n",
5087                 msg, ABORT_COMPLETE_WAIT_SECS);
5088         cmd_free(h, abort);
5089         return FAILED;
5090 }
5091
5092 /*
5093  * For operations that cannot sleep, a command block is allocated at init,
5094  * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
5095  * which ones are free or in use.  Lock must be held when calling this.
5096  * cmd_free() is the complement.
5097  */
5098
5099 static struct CommandList *cmd_alloc(struct ctlr_info *h)
5100 {
5101         struct CommandList *c;
5102         int refcount, i;
5103         unsigned long offset;
5104
5105         /*
5106          * There is some *extremely* small but non-zero chance that that
5107          * multiple threads could get in here, and one thread could
5108          * be scanning through the list of bits looking for a free
5109          * one, but the free ones are always behind him, and other
5110          * threads sneak in behind him and eat them before he can
5111          * get to them, so that while there is always a free one, a
5112          * very unlucky thread might be starved anyway, never able to
5113          * beat the other threads.  In reality, this happens so
5114          * infrequently as to be indistinguishable from never.
5115          */
5116
5117         offset = h->last_allocation; /* benignly racy */
5118         for (;;) {
5119                 i = find_next_zero_bit(h->cmd_pool_bits, h->nr_cmds, offset);
5120                 if (unlikely(i == h->nr_cmds)) {
5121                         offset = 0;
5122                         continue;
5123                 }
5124                 c = h->cmd_pool + i;
5125                 refcount = atomic_inc_return(&c->refcount);
5126                 if (unlikely(refcount > 1)) {
5127                         cmd_free(h, c); /* already in use */
5128                         offset = (i + 1) % h->nr_cmds;
5129                         continue;
5130                 }
5131                 set_bit(i & (BITS_PER_LONG - 1),
5132                         h->cmd_pool_bits + (i / BITS_PER_LONG));
5133                 break; /* it's ours now. */
5134         }
5135         h->last_allocation = i; /* benignly racy */
5136         hpsa_cmd_partial_init(h, i, c);
5137         return c;
5138 }
5139
5140 static void cmd_free(struct ctlr_info *h, struct CommandList *c)
5141 {
5142         if (atomic_dec_and_test(&c->refcount)) {
5143                 int i;
5144
5145                 i = c - h->cmd_pool;
5146                 clear_bit(i & (BITS_PER_LONG - 1),
5147                           h->cmd_pool_bits + (i / BITS_PER_LONG));
5148         }
5149 }
5150
5151 #ifdef CONFIG_COMPAT
5152
5153 static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd,
5154         void __user *arg)
5155 {
5156         IOCTL32_Command_struct __user *arg32 =
5157             (IOCTL32_Command_struct __user *) arg;
5158         IOCTL_Command_struct arg64;
5159         IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
5160         int err;
5161         u32 cp;
5162
5163         memset(&arg64, 0, sizeof(arg64));
5164         err = 0;
5165         err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
5166                            sizeof(arg64.LUN_info));
5167         err |= copy_from_user(&arg64.Request, &arg32->Request,
5168                            sizeof(arg64.Request));
5169         err |= copy_from_user(&arg64.error_info, &arg32->error_info,
5170                            sizeof(arg64.error_info));
5171         err |= get_user(arg64.buf_size, &arg32->buf_size);
5172         err |= get_user(cp, &arg32->buf);
5173         arg64.buf = compat_ptr(cp);
5174         err |= copy_to_user(p, &arg64, sizeof(arg64));
5175
5176         if (err)
5177                 return -EFAULT;
5178
5179         err = hpsa_ioctl(dev, CCISS_PASSTHRU, p);
5180         if (err)
5181                 return err;
5182         err |= copy_in_user(&arg32->error_info, &p->error_info,
5183                          sizeof(arg32->error_info));
5184         if (err)
5185                 return -EFAULT;
5186         return err;
5187 }
5188
5189 static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
5190         int cmd, void __user *arg)
5191 {
5192         BIG_IOCTL32_Command_struct __user *arg32 =
5193             (BIG_IOCTL32_Command_struct __user *) arg;
5194         BIG_IOCTL_Command_struct arg64;
5195         BIG_IOCTL_Command_struct __user *p =
5196             compat_alloc_user_space(sizeof(arg64));
5197         int err;
5198         u32 cp;
5199
5200         memset(&arg64, 0, sizeof(arg64));
5201         err = 0;
5202         err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
5203                            sizeof(arg64.LUN_info));
5204         err |= copy_from_user(&arg64.Request, &arg32->Request,
5205                            sizeof(arg64.Request));
5206         err |= copy_from_user(&arg64.error_info, &arg32->error_info,
5207                            sizeof(arg64.error_info));
5208         err |= get_user(arg64.buf_size, &arg32->buf_size);
5209         err |= get_user(arg64.malloc_size, &arg32->malloc_size);
5210         err |= get_user(cp, &arg32->buf);
5211         arg64.buf = compat_ptr(cp);
5212         err |= copy_to_user(p, &arg64, sizeof(arg64));
5213
5214         if (err)
5215                 return -EFAULT;
5216
5217         err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, p);
5218         if (err)
5219                 return err;
5220         err |= copy_in_user(&arg32->error_info, &p->error_info,
5221                          sizeof(arg32->error_info));
5222         if (err)
5223                 return -EFAULT;
5224         return err;
5225 }
5226
5227 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void __user *arg)
5228 {
5229         switch (cmd) {
5230         case CCISS_GETPCIINFO:
5231         case CCISS_GETINTINFO:
5232         case CCISS_SETINTINFO:
5233         case CCISS_GETNODENAME:
5234         case CCISS_SETNODENAME:
5235         case CCISS_GETHEARTBEAT:
5236         case CCISS_GETBUSTYPES:
5237         case CCISS_GETFIRMVER:
5238         case CCISS_GETDRIVVER:
5239         case CCISS_REVALIDVOLS:
5240         case CCISS_DEREGDISK:
5241         case CCISS_REGNEWDISK:
5242         case CCISS_REGNEWD:
5243         case CCISS_RESCANDISK:
5244         case CCISS_GETLUNINFO:
5245                 return hpsa_ioctl(dev, cmd, arg);
5246
5247         case CCISS_PASSTHRU32:
5248                 return hpsa_ioctl32_passthru(dev, cmd, arg);
5249         case CCISS_BIG_PASSTHRU32:
5250                 return hpsa_ioctl32_big_passthru(dev, cmd, arg);
5251
5252         default:
5253                 return -ENOIOCTLCMD;
5254         }
5255 }
5256 #endif
5257
5258 static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
5259 {
5260         struct hpsa_pci_info pciinfo;
5261
5262         if (!argp)
5263                 return -EINVAL;
5264         pciinfo.domain = pci_domain_nr(h->pdev->bus);
5265         pciinfo.bus = h->pdev->bus->number;
5266         pciinfo.dev_fn = h->pdev->devfn;
5267         pciinfo.board_id = h->board_id;
5268         if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
5269                 return -EFAULT;
5270         return 0;
5271 }
5272
5273 static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
5274 {
5275         DriverVer_type DriverVer;
5276         unsigned char vmaj, vmin, vsubmin;
5277         int rc;
5278
5279         rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
5280                 &vmaj, &vmin, &vsubmin);
5281         if (rc != 3) {
5282                 dev_info(&h->pdev->dev, "driver version string '%s' "
5283                         "unrecognized.", HPSA_DRIVER_VERSION);
5284                 vmaj = 0;
5285                 vmin = 0;
5286                 vsubmin = 0;
5287         }
5288         DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
5289         if (!argp)
5290                 return -EINVAL;
5291         if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
5292                 return -EFAULT;
5293         return 0;
5294 }
5295
5296 static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
5297 {
5298         IOCTL_Command_struct iocommand;
5299         struct CommandList *c;
5300         char *buff = NULL;
5301         u64 temp64;
5302         int rc = 0;
5303
5304         if (!argp)
5305                 return -EINVAL;
5306         if (!capable(CAP_SYS_RAWIO))
5307                 return -EPERM;
5308         if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
5309                 return -EFAULT;
5310         if ((iocommand.buf_size < 1) &&
5311             (iocommand.Request.Type.Direction != XFER_NONE)) {
5312                 return -EINVAL;
5313         }
5314         if (iocommand.buf_size > 0) {
5315                 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
5316                 if (buff == NULL)
5317                         return -EFAULT;
5318                 if (iocommand.Request.Type.Direction & XFER_WRITE) {
5319                         /* Copy the data into the buffer we created */
5320                         if (copy_from_user(buff, iocommand.buf,
5321                                 iocommand.buf_size)) {
5322                                 rc = -EFAULT;
5323                                 goto out_kfree;
5324                         }
5325                 } else {
5326                         memset(buff, 0, iocommand.buf_size);
5327                 }
5328         }
5329         c = cmd_alloc(h);
5330         if (c == NULL) {
5331                 rc = -ENOMEM;
5332                 goto out_kfree;
5333         }
5334         /* Fill in the command type */
5335         c->cmd_type = CMD_IOCTL_PEND;
5336         /* Fill in Command Header */
5337         c->Header.ReplyQueue = 0; /* unused in simple mode */
5338         if (iocommand.buf_size > 0) {   /* buffer to fill */
5339                 c->Header.SGList = 1;
5340                 c->Header.SGTotal = cpu_to_le16(1);
5341         } else  { /* no buffers to fill */
5342                 c->Header.SGList = 0;
5343                 c->Header.SGTotal = cpu_to_le16(0);
5344         }
5345         memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
5346
5347         /* Fill in Request block */
5348         memcpy(&c->Request, &iocommand.Request,
5349                 sizeof(c->Request));
5350
5351         /* Fill in the scatter gather information */
5352         if (iocommand.buf_size > 0) {
5353                 temp64 = pci_map_single(h->pdev, buff,
5354                         iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
5355                 if (dma_mapping_error(&h->pdev->dev, (dma_addr_t) temp64)) {
5356                         c->SG[0].Addr = cpu_to_le64(0);
5357                         c->SG[0].Len = cpu_to_le32(0);
5358                         rc = -ENOMEM;
5359                         goto out;
5360                 }
5361                 c->SG[0].Addr = cpu_to_le64(temp64);
5362                 c->SG[0].Len = cpu_to_le32(iocommand.buf_size);
5363                 c->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* not chaining */
5364         }
5365         rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, NO_TIMEOUT);
5366         if (iocommand.buf_size > 0)
5367                 hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
5368         check_ioctl_unit_attention(h, c);
5369         if (rc) {
5370                 rc = -EIO;
5371                 goto out;
5372         }
5373
5374         /* Copy the error information out */
5375         memcpy(&iocommand.error_info, c->err_info,
5376                 sizeof(iocommand.error_info));
5377         if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
5378                 rc = -EFAULT;
5379                 goto out;
5380         }
5381         if ((iocommand.Request.Type.Direction & XFER_READ) &&
5382                 iocommand.buf_size > 0) {
5383                 /* Copy the data out of the buffer we created */
5384                 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
5385                         rc = -EFAULT;
5386                         goto out;
5387                 }
5388         }
5389 out:
5390         cmd_free(h, c);
5391 out_kfree:
5392         kfree(buff);
5393         return rc;
5394 }
5395
5396 static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
5397 {
5398         BIG_IOCTL_Command_struct *ioc;
5399         struct CommandList *c;
5400         unsigned char **buff = NULL;
5401         int *buff_size = NULL;
5402         u64 temp64;
5403         BYTE sg_used = 0;
5404         int status = 0;
5405         u32 left;
5406         u32 sz;
5407         BYTE __user *data_ptr;
5408
5409         if (!argp)
5410                 return -EINVAL;
5411         if (!capable(CAP_SYS_RAWIO))
5412                 return -EPERM;
5413         ioc = (BIG_IOCTL_Command_struct *)
5414             kmalloc(sizeof(*ioc), GFP_KERNEL);
5415         if (!ioc) {
5416                 status = -ENOMEM;
5417                 goto cleanup1;
5418         }
5419         if (copy_from_user(ioc, argp, sizeof(*ioc))) {
5420                 status = -EFAULT;
5421                 goto cleanup1;
5422         }
5423         if ((ioc->buf_size < 1) &&
5424             (ioc->Request.Type.Direction != XFER_NONE)) {
5425                 status = -EINVAL;
5426                 goto cleanup1;
5427         }
5428         /* Check kmalloc limits  using all SGs */
5429         if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
5430                 status = -EINVAL;
5431                 goto cleanup1;
5432         }
5433         if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) {
5434                 status = -EINVAL;
5435                 goto cleanup1;
5436         }
5437         buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL);
5438         if (!buff) {
5439                 status = -ENOMEM;
5440                 goto cleanup1;
5441         }
5442         buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL);
5443         if (!buff_size) {
5444                 status = -ENOMEM;
5445                 goto cleanup1;
5446         }
5447         left = ioc->buf_size;
5448         data_ptr = ioc->buf;
5449         while (left) {
5450                 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
5451                 buff_size[sg_used] = sz;
5452                 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
5453                 if (buff[sg_used] == NULL) {
5454                         status = -ENOMEM;
5455                         goto cleanup1;
5456                 }
5457                 if (ioc->Request.Type.Direction & XFER_WRITE) {
5458                         if (copy_from_user(buff[sg_used], data_ptr, sz)) {
5459                                 status = -EFAULT;
5460                                 goto cleanup1;
5461                         }
5462                 } else
5463                         memset(buff[sg_used], 0, sz);
5464                 left -= sz;
5465                 data_ptr += sz;
5466                 sg_used++;
5467         }
5468         c = cmd_alloc(h);
5469         if (c == NULL) {
5470                 status = -ENOMEM;
5471                 goto cleanup1;
5472         }
5473         c->cmd_type = CMD_IOCTL_PEND;
5474         c->Header.ReplyQueue = 0;
5475         c->Header.SGList = (u8) sg_used;
5476         c->Header.SGTotal = cpu_to_le16(sg_used);
5477         memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
5478         memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
5479         if (ioc->buf_size > 0) {
5480                 int i;
5481                 for (i = 0; i < sg_used; i++) {
5482                         temp64 = pci_map_single(h->pdev, buff[i],
5483                                     buff_size[i], PCI_DMA_BIDIRECTIONAL);
5484                         if (dma_mapping_error(&h->pdev->dev,
5485                                                         (dma_addr_t) temp64)) {
5486                                 c->SG[i].Addr = cpu_to_le64(0);
5487                                 c->SG[i].Len = cpu_to_le32(0);
5488                                 hpsa_pci_unmap(h->pdev, c, i,
5489                                         PCI_DMA_BIDIRECTIONAL);
5490                                 status = -ENOMEM;
5491                                 goto cleanup0;
5492                         }
5493                         c->SG[i].Addr = cpu_to_le64(temp64);
5494                         c->SG[i].Len = cpu_to_le32(buff_size[i]);
5495                         c->SG[i].Ext = cpu_to_le32(0);
5496                 }
5497                 c->SG[--i].Ext = cpu_to_le32(HPSA_SG_LAST);
5498         }
5499         status = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, NO_TIMEOUT);
5500         if (sg_used)
5501                 hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
5502         check_ioctl_unit_attention(h, c);
5503         if (status) {
5504                 status = -EIO;
5505                 goto cleanup0;
5506         }
5507
5508         /* Copy the error information out */
5509         memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
5510         if (copy_to_user(argp, ioc, sizeof(*ioc))) {
5511                 status = -EFAULT;
5512                 goto cleanup0;
5513         }
5514         if ((ioc->Request.Type.Direction & XFER_READ) && ioc->buf_size > 0) {
5515                 int i;
5516
5517                 /* Copy the data out of the buffer we created */
5518                 BYTE __user *ptr = ioc->buf;
5519                 for (i = 0; i < sg_used; i++) {
5520                         if (copy_to_user(ptr, buff[i], buff_size[i])) {
5521                                 status = -EFAULT;
5522                                 goto cleanup0;
5523                         }
5524                         ptr += buff_size[i];
5525                 }
5526         }
5527         status = 0;
5528 cleanup0:
5529         cmd_free(h, c);
5530 cleanup1:
5531         if (buff) {
5532                 int i;
5533
5534                 for (i = 0; i < sg_used; i++)
5535                         kfree(buff[i]);
5536                 kfree(buff);
5537         }
5538         kfree(buff_size);
5539         kfree(ioc);
5540         return status;
5541 }
5542
5543 static void check_ioctl_unit_attention(struct ctlr_info *h,
5544         struct CommandList *c)
5545 {
5546         if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
5547                         c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
5548                 (void) check_for_unit_attention(h, c);
5549 }
5550
5551 /*
5552  * ioctl
5553  */
5554 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg)
5555 {
5556         struct ctlr_info *h;
5557         void __user *argp = (void __user *)arg;
5558         int rc;
5559
5560         h = sdev_to_hba(dev);
5561
5562         switch (cmd) {
5563         case CCISS_DEREGDISK:
5564         case CCISS_REGNEWDISK:
5565         case CCISS_REGNEWD:
5566                 hpsa_scan_start(h->scsi_host);
5567                 return 0;
5568         case CCISS_GETPCIINFO:
5569                 return hpsa_getpciinfo_ioctl(h, argp);
5570         case CCISS_GETDRIVVER:
5571                 return hpsa_getdrivver_ioctl(h, argp);
5572         case CCISS_PASSTHRU:
5573                 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
5574                         return -EAGAIN;
5575                 rc = hpsa_passthru_ioctl(h, argp);
5576                 atomic_inc(&h->passthru_cmds_avail);
5577                 return rc;
5578         case CCISS_BIG_PASSTHRU:
5579                 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
5580                         return -EAGAIN;
5581                 rc = hpsa_big_passthru_ioctl(h, argp);
5582                 atomic_inc(&h->passthru_cmds_avail);
5583                 return rc;
5584         default:
5585                 return -ENOTTY;
5586         }
5587 }
5588
5589 static int hpsa_send_host_reset(struct ctlr_info *h, unsigned char *scsi3addr,
5590                                 u8 reset_type)
5591 {
5592         struct CommandList *c;
5593
5594         c = cmd_alloc(h);
5595         if (!c)
5596                 return -ENOMEM;
5597         /* fill_cmd can't fail here, no data buffer to map */
5598         (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
5599                 RAID_CTLR_LUNID, TYPE_MSG);
5600         c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
5601         c->waiting = NULL;
5602         enqueue_cmd_and_start_io(h, c);
5603         /* Don't wait for completion, the reset won't complete.  Don't free
5604          * the command either.  This is the last command we will send before
5605          * re-initializing everything, so it doesn't matter and won't leak.
5606          */
5607         return 0;
5608 }
5609
5610 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
5611         void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
5612         int cmd_type)
5613 {
5614         int pci_dir = XFER_NONE;
5615         u64 tag; /* for commands to be aborted */
5616
5617         c->cmd_type = CMD_IOCTL_PEND;
5618         c->Header.ReplyQueue = 0;
5619         if (buff != NULL && size > 0) {
5620                 c->Header.SGList = 1;
5621                 c->Header.SGTotal = cpu_to_le16(1);
5622         } else {
5623                 c->Header.SGList = 0;
5624                 c->Header.SGTotal = cpu_to_le16(0);
5625         }
5626         memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
5627
5628         if (cmd_type == TYPE_CMD) {
5629                 switch (cmd) {
5630                 case HPSA_INQUIRY:
5631                         /* are we trying to read a vital product page */
5632                         if (page_code & VPD_PAGE) {
5633                                 c->Request.CDB[1] = 0x01;
5634                                 c->Request.CDB[2] = (page_code & 0xff);
5635                         }
5636                         c->Request.CDBLen = 6;
5637                         c->Request.type_attr_dir =
5638                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
5639                         c->Request.Timeout = 0;
5640                         c->Request.CDB[0] = HPSA_INQUIRY;
5641                         c->Request.CDB[4] = size & 0xFF;
5642                         break;
5643                 case HPSA_REPORT_LOG:
5644                 case HPSA_REPORT_PHYS:
5645                         /* Talking to controller so It's a physical command
5646                            mode = 00 target = 0.  Nothing to write.
5647                          */
5648                         c->Request.CDBLen = 12;
5649                         c->Request.type_attr_dir =
5650                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
5651                         c->Request.Timeout = 0;
5652                         c->Request.CDB[0] = cmd;
5653                         c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
5654                         c->Request.CDB[7] = (size >> 16) & 0xFF;
5655                         c->Request.CDB[8] = (size >> 8) & 0xFF;
5656                         c->Request.CDB[9] = size & 0xFF;
5657                         break;
5658                 case HPSA_CACHE_FLUSH:
5659                         c->Request.CDBLen = 12;
5660                         c->Request.type_attr_dir =
5661                                         TYPE_ATTR_DIR(cmd_type,
5662                                                 ATTR_SIMPLE, XFER_WRITE);
5663                         c->Request.Timeout = 0;
5664                         c->Request.CDB[0] = BMIC_WRITE;
5665                         c->Request.CDB[6] = BMIC_CACHE_FLUSH;
5666                         c->Request.CDB[7] = (size >> 8) & 0xFF;
5667                         c->Request.CDB[8] = size & 0xFF;
5668                         break;
5669                 case TEST_UNIT_READY:
5670                         c->Request.CDBLen = 6;
5671                         c->Request.type_attr_dir =
5672                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
5673                         c->Request.Timeout = 0;
5674                         break;
5675                 case HPSA_GET_RAID_MAP:
5676                         c->Request.CDBLen = 12;
5677                         c->Request.type_attr_dir =
5678                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
5679                         c->Request.Timeout = 0;
5680                         c->Request.CDB[0] = HPSA_CISS_READ;
5681                         c->Request.CDB[1] = cmd;
5682                         c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
5683                         c->Request.CDB[7] = (size >> 16) & 0xFF;
5684                         c->Request.CDB[8] = (size >> 8) & 0xFF;
5685                         c->Request.CDB[9] = size & 0xFF;
5686                         break;
5687                 case BMIC_SENSE_CONTROLLER_PARAMETERS:
5688                         c->Request.CDBLen = 10;
5689                         c->Request.type_attr_dir =
5690                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
5691                         c->Request.Timeout = 0;
5692                         c->Request.CDB[0] = BMIC_READ;
5693                         c->Request.CDB[6] = BMIC_SENSE_CONTROLLER_PARAMETERS;
5694                         c->Request.CDB[7] = (size >> 16) & 0xFF;
5695                         c->Request.CDB[8] = (size >> 8) & 0xFF;
5696                         break;
5697                 case BMIC_IDENTIFY_PHYSICAL_DEVICE:
5698                         c->Request.CDBLen = 10;
5699                         c->Request.type_attr_dir =
5700                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
5701                         c->Request.Timeout = 0;
5702                         c->Request.CDB[0] = BMIC_READ;
5703                         c->Request.CDB[6] = BMIC_IDENTIFY_PHYSICAL_DEVICE;
5704                         c->Request.CDB[7] = (size >> 16) & 0xFF;
5705                         c->Request.CDB[8] = (size >> 8) & 0XFF;
5706                         break;
5707                 default:
5708                         dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
5709                         BUG();
5710                         return -1;
5711                 }
5712         } else if (cmd_type == TYPE_MSG) {
5713                 switch (cmd) {
5714
5715                 case  HPSA_DEVICE_RESET_MSG:
5716                         c->Request.CDBLen = 16;
5717                         c->Request.type_attr_dir =
5718                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
5719                         c->Request.Timeout = 0; /* Don't time out */
5720                         memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
5721                         c->Request.CDB[0] =  cmd;
5722                         c->Request.CDB[1] = HPSA_RESET_TYPE_LUN;
5723                         /* If bytes 4-7 are zero, it means reset the */
5724                         /* LunID device */
5725                         c->Request.CDB[4] = 0x00;
5726                         c->Request.CDB[5] = 0x00;
5727                         c->Request.CDB[6] = 0x00;
5728                         c->Request.CDB[7] = 0x00;
5729                         break;
5730                 case  HPSA_ABORT_MSG:
5731                         memcpy(&tag, buff, sizeof(tag));
5732                         dev_dbg(&h->pdev->dev,
5733                                 "Abort Tag:0x%016llx using rqst Tag:0x%016llx",
5734                                 tag, c->Header.tag);
5735                         c->Request.CDBLen = 16;
5736                         c->Request.type_attr_dir =
5737                                         TYPE_ATTR_DIR(cmd_type,
5738                                                 ATTR_SIMPLE, XFER_WRITE);
5739                         c->Request.Timeout = 0; /* Don't time out */
5740                         c->Request.CDB[0] = HPSA_TASK_MANAGEMENT;
5741                         c->Request.CDB[1] = HPSA_TMF_ABORT_TASK;
5742                         c->Request.CDB[2] = 0x00; /* reserved */
5743                         c->Request.CDB[3] = 0x00; /* reserved */
5744                         /* Tag to abort goes in CDB[4]-CDB[11] */
5745                         memcpy(&c->Request.CDB[4], &tag, sizeof(tag));
5746                         c->Request.CDB[12] = 0x00; /* reserved */
5747                         c->Request.CDB[13] = 0x00; /* reserved */
5748                         c->Request.CDB[14] = 0x00; /* reserved */
5749                         c->Request.CDB[15] = 0x00; /* reserved */
5750                 break;
5751                 default:
5752                         dev_warn(&h->pdev->dev, "unknown message type %d\n",
5753                                 cmd);
5754                         BUG();
5755                 }
5756         } else {
5757                 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
5758                 BUG();
5759         }
5760
5761         switch (GET_DIR(c->Request.type_attr_dir)) {
5762         case XFER_READ:
5763                 pci_dir = PCI_DMA_FROMDEVICE;
5764                 break;
5765         case XFER_WRITE:
5766                 pci_dir = PCI_DMA_TODEVICE;
5767                 break;
5768         case XFER_NONE:
5769                 pci_dir = PCI_DMA_NONE;
5770                 break;
5771         default:
5772                 pci_dir = PCI_DMA_BIDIRECTIONAL;
5773         }
5774         if (hpsa_map_one(h->pdev, c, buff, size, pci_dir))
5775                 return -1;
5776         return 0;
5777 }
5778
5779 /*
5780  * Map (physical) PCI mem into (virtual) kernel space
5781  */
5782 static void __iomem *remap_pci_mem(ulong base, ulong size)
5783 {
5784         ulong page_base = ((ulong) base) & PAGE_MASK;
5785         ulong page_offs = ((ulong) base) - page_base;
5786         void __iomem *page_remapped = ioremap_nocache(page_base,
5787                 page_offs + size);
5788
5789         return page_remapped ? (page_remapped + page_offs) : NULL;
5790 }
5791
5792 static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q)
5793 {
5794         return h->access.command_completed(h, q);
5795 }
5796
5797 static inline bool interrupt_pending(struct ctlr_info *h)
5798 {
5799         return h->access.intr_pending(h);
5800 }
5801
5802 static inline long interrupt_not_for_us(struct ctlr_info *h)
5803 {
5804         return (h->access.intr_pending(h) == 0) ||
5805                 (h->interrupts_enabled == 0);
5806 }
5807
5808 static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
5809         u32 raw_tag)
5810 {
5811         if (unlikely(tag_index >= h->nr_cmds)) {
5812                 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
5813                 return 1;
5814         }
5815         return 0;
5816 }
5817
5818 static inline void finish_cmd(struct CommandList *c)
5819 {
5820         dial_up_lockup_detection_on_fw_flash_complete(c->h, c);
5821         if (likely(c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_SCSI
5822                         || c->cmd_type == CMD_IOACCEL2))
5823                 complete_scsi_command(c);
5824         else if (c->cmd_type == CMD_IOCTL_PEND)
5825                 complete(c->waiting);
5826 }
5827
5828
5829 static inline u32 hpsa_tag_discard_error_bits(struct ctlr_info *h, u32 tag)
5830 {
5831 #define HPSA_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1)
5832 #define HPSA_SIMPLE_ERROR_BITS 0x03
5833         if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
5834                 return tag & ~HPSA_SIMPLE_ERROR_BITS;
5835         return tag & ~HPSA_PERF_ERROR_BITS;
5836 }
5837
5838 /* process completion of an indexed ("direct lookup") command */
5839 static inline void process_indexed_cmd(struct ctlr_info *h,
5840         u32 raw_tag)
5841 {
5842         u32 tag_index;
5843         struct CommandList *c;
5844
5845         tag_index = raw_tag >> DIRECT_LOOKUP_SHIFT;
5846         if (!bad_tag(h, tag_index, raw_tag)) {
5847                 c = h->cmd_pool + tag_index;
5848                 finish_cmd(c);
5849         }
5850 }
5851
5852 /* Some controllers, like p400, will give us one interrupt
5853  * after a soft reset, even if we turned interrupts off.
5854  * Only need to check for this in the hpsa_xxx_discard_completions
5855  * functions.
5856  */
5857 static int ignore_bogus_interrupt(struct ctlr_info *h)
5858 {
5859         if (likely(!reset_devices))
5860                 return 0;
5861
5862         if (likely(h->interrupts_enabled))
5863                 return 0;
5864
5865         dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
5866                 "(known firmware bug.)  Ignoring.\n");
5867
5868         return 1;
5869 }
5870
5871 /*
5872  * Convert &h->q[x] (passed to interrupt handlers) back to h.
5873  * Relies on (h-q[x] == x) being true for x such that
5874  * 0 <= x < MAX_REPLY_QUEUES.
5875  */
5876 static struct ctlr_info *queue_to_hba(u8 *queue)
5877 {
5878         return container_of((queue - *queue), struct ctlr_info, q[0]);
5879 }
5880
5881 static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue)
5882 {
5883         struct ctlr_info *h = queue_to_hba(queue);
5884         u8 q = *(u8 *) queue;
5885         u32 raw_tag;
5886
5887         if (ignore_bogus_interrupt(h))
5888                 return IRQ_NONE;
5889
5890         if (interrupt_not_for_us(h))
5891                 return IRQ_NONE;
5892         h->last_intr_timestamp = get_jiffies_64();
5893         while (interrupt_pending(h)) {
5894                 raw_tag = get_next_completion(h, q);
5895                 while (raw_tag != FIFO_EMPTY)
5896                         raw_tag = next_command(h, q);
5897         }
5898         return IRQ_HANDLED;
5899 }
5900
5901 static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue)
5902 {
5903         struct ctlr_info *h = queue_to_hba(queue);
5904         u32 raw_tag;
5905         u8 q = *(u8 *) queue;
5906
5907         if (ignore_bogus_interrupt(h))
5908                 return IRQ_NONE;
5909
5910         h->last_intr_timestamp = get_jiffies_64();
5911         raw_tag = get_next_completion(h, q);
5912         while (raw_tag != FIFO_EMPTY)
5913                 raw_tag = next_command(h, q);
5914         return IRQ_HANDLED;
5915 }
5916
5917 static irqreturn_t do_hpsa_intr_intx(int irq, void *queue)
5918 {
5919         struct ctlr_info *h = queue_to_hba((u8 *) queue);
5920         u32 raw_tag;
5921         u8 q = *(u8 *) queue;
5922
5923         if (interrupt_not_for_us(h))
5924                 return IRQ_NONE;
5925         h->last_intr_timestamp = get_jiffies_64();
5926         while (interrupt_pending(h)) {
5927                 raw_tag = get_next_completion(h, q);
5928                 while (raw_tag != FIFO_EMPTY) {
5929                         process_indexed_cmd(h, raw_tag);
5930                         raw_tag = next_command(h, q);
5931                 }
5932         }
5933         return IRQ_HANDLED;
5934 }
5935
5936 static irqreturn_t do_hpsa_intr_msi(int irq, void *queue)
5937 {
5938         struct ctlr_info *h = queue_to_hba(queue);
5939         u32 raw_tag;
5940         u8 q = *(u8 *) queue;
5941
5942         h->last_intr_timestamp = get_jiffies_64();
5943         raw_tag = get_next_completion(h, q);
5944         while (raw_tag != FIFO_EMPTY) {
5945                 process_indexed_cmd(h, raw_tag);
5946                 raw_tag = next_command(h, q);
5947         }
5948         return IRQ_HANDLED;
5949 }
5950
5951 /* Send a message CDB to the firmware. Careful, this only works
5952  * in simple mode, not performant mode due to the tag lookup.
5953  * We only ever use this immediately after a controller reset.
5954  */
5955 static int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
5956                         unsigned char type)
5957 {
5958         struct Command {
5959                 struct CommandListHeader CommandHeader;
5960                 struct RequestBlock Request;
5961                 struct ErrDescriptor ErrorDescriptor;
5962         };
5963         struct Command *cmd;
5964         static const size_t cmd_sz = sizeof(*cmd) +
5965                                         sizeof(cmd->ErrorDescriptor);
5966         dma_addr_t paddr64;
5967         __le32 paddr32;
5968         u32 tag;
5969         void __iomem *vaddr;
5970         int i, err;
5971
5972         vaddr = pci_ioremap_bar(pdev, 0);
5973         if (vaddr == NULL)
5974                 return -ENOMEM;
5975
5976         /* The Inbound Post Queue only accepts 32-bit physical addresses for the
5977          * CCISS commands, so they must be allocated from the lower 4GiB of
5978          * memory.
5979          */
5980         err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
5981         if (err) {
5982                 iounmap(vaddr);
5983                 return err;
5984         }
5985
5986         cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
5987         if (cmd == NULL) {
5988                 iounmap(vaddr);
5989                 return -ENOMEM;
5990         }
5991
5992         /* This must fit, because of the 32-bit consistent DMA mask.  Also,
5993          * although there's no guarantee, we assume that the address is at
5994          * least 4-byte aligned (most likely, it's page-aligned).
5995          */
5996         paddr32 = cpu_to_le32(paddr64);
5997
5998         cmd->CommandHeader.ReplyQueue = 0;
5999         cmd->CommandHeader.SGList = 0;
6000         cmd->CommandHeader.SGTotal = cpu_to_le16(0);
6001         cmd->CommandHeader.tag = cpu_to_le64(paddr64);
6002         memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
6003
6004         cmd->Request.CDBLen = 16;
6005         cmd->Request.type_attr_dir =
6006                         TYPE_ATTR_DIR(TYPE_MSG, ATTR_HEADOFQUEUE, XFER_NONE);
6007         cmd->Request.Timeout = 0; /* Don't time out */
6008         cmd->Request.CDB[0] = opcode;
6009         cmd->Request.CDB[1] = type;
6010         memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
6011         cmd->ErrorDescriptor.Addr =
6012                         cpu_to_le64((le32_to_cpu(paddr32) + sizeof(*cmd)));
6013         cmd->ErrorDescriptor.Len = cpu_to_le32(sizeof(struct ErrorInfo));
6014
6015         writel(le32_to_cpu(paddr32), vaddr + SA5_REQUEST_PORT_OFFSET);
6016
6017         for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
6018                 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
6019                 if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr64)
6020                         break;
6021                 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
6022         }
6023
6024         iounmap(vaddr);
6025
6026         /* we leak the DMA buffer here ... no choice since the controller could
6027          *  still complete the command.
6028          */
6029         if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
6030                 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
6031                         opcode, type);
6032                 return -ETIMEDOUT;
6033         }
6034
6035         pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
6036
6037         if (tag & HPSA_ERROR_BIT) {
6038                 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
6039                         opcode, type);
6040                 return -EIO;
6041         }
6042
6043         dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
6044                 opcode, type);
6045         return 0;
6046 }
6047
6048 #define hpsa_noop(p) hpsa_message(p, 3, 0)
6049
6050 static int hpsa_controller_hard_reset(struct pci_dev *pdev,
6051         void __iomem *vaddr, u32 use_doorbell)
6052 {
6053
6054         if (use_doorbell) {
6055                 /* For everything after the P600, the PCI power state method
6056                  * of resetting the controller doesn't work, so we have this
6057                  * other way using the doorbell register.
6058                  */
6059                 dev_info(&pdev->dev, "using doorbell to reset controller\n");
6060                 writel(use_doorbell, vaddr + SA5_DOORBELL);
6061
6062                 /* PMC hardware guys tell us we need a 10 second delay after
6063                  * doorbell reset and before any attempt to talk to the board
6064                  * at all to ensure that this actually works and doesn't fall
6065                  * over in some weird corner cases.
6066                  */
6067                 msleep(10000);
6068         } else { /* Try to do it the PCI power state way */
6069
6070                 /* Quoting from the Open CISS Specification: "The Power
6071                  * Management Control/Status Register (CSR) controls the power
6072                  * state of the device.  The normal operating state is D0,
6073                  * CSR=00h.  The software off state is D3, CSR=03h.  To reset
6074                  * the controller, place the interface device in D3 then to D0,
6075                  * this causes a secondary PCI reset which will reset the
6076                  * controller." */
6077
6078                 int rc = 0;
6079
6080                 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
6081
6082                 /* enter the D3hot power management state */
6083                 rc = pci_set_power_state(pdev, PCI_D3hot);
6084                 if (rc)
6085                         return rc;
6086
6087                 msleep(500);
6088
6089                 /* enter the D0 power management state */
6090                 rc = pci_set_power_state(pdev, PCI_D0);
6091                 if (rc)
6092                         return rc;
6093
6094                 /*
6095                  * The P600 requires a small delay when changing states.
6096                  * Otherwise we may think the board did not reset and we bail.
6097                  * This for kdump only and is particular to the P600.
6098                  */
6099                 msleep(500);
6100         }
6101         return 0;
6102 }
6103
6104 static void init_driver_version(char *driver_version, int len)
6105 {
6106         memset(driver_version, 0, len);
6107         strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1);
6108 }
6109
6110 static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable)
6111 {
6112         char *driver_version;
6113         int i, size = sizeof(cfgtable->driver_version);
6114
6115         driver_version = kmalloc(size, GFP_KERNEL);
6116         if (!driver_version)
6117                 return -ENOMEM;
6118
6119         init_driver_version(driver_version, size);
6120         for (i = 0; i < size; i++)
6121                 writeb(driver_version[i], &cfgtable->driver_version[i]);
6122         kfree(driver_version);
6123         return 0;
6124 }
6125
6126 static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable,
6127                                           unsigned char *driver_ver)
6128 {
6129         int i;
6130
6131         for (i = 0; i < sizeof(cfgtable->driver_version); i++)
6132                 driver_ver[i] = readb(&cfgtable->driver_version[i]);
6133 }
6134
6135 static int controller_reset_failed(struct CfgTable __iomem *cfgtable)
6136 {
6137
6138         char *driver_ver, *old_driver_ver;
6139         int rc, size = sizeof(cfgtable->driver_version);
6140
6141         old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
6142         if (!old_driver_ver)
6143                 return -ENOMEM;
6144         driver_ver = old_driver_ver + size;
6145
6146         /* After a reset, the 32 bytes of "driver version" in the cfgtable
6147          * should have been changed, otherwise we know the reset failed.
6148          */
6149         init_driver_version(old_driver_ver, size);
6150         read_driver_ver_from_cfgtable(cfgtable, driver_ver);
6151         rc = !memcmp(driver_ver, old_driver_ver, size);
6152         kfree(old_driver_ver);
6153         return rc;
6154 }
6155 /* This does a hard reset of the controller using PCI power management
6156  * states or the using the doorbell register.
6157  */
6158 static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev, u32 board_id)
6159 {
6160         u64 cfg_offset;
6161         u32 cfg_base_addr;
6162         u64 cfg_base_addr_index;
6163         void __iomem *vaddr;
6164         unsigned long paddr;
6165         u32 misc_fw_support;
6166         int rc;
6167         struct CfgTable __iomem *cfgtable;
6168         u32 use_doorbell;
6169         u16 command_register;
6170
6171         /* For controllers as old as the P600, this is very nearly
6172          * the same thing as
6173          *
6174          * pci_save_state(pci_dev);
6175          * pci_set_power_state(pci_dev, PCI_D3hot);
6176          * pci_set_power_state(pci_dev, PCI_D0);
6177          * pci_restore_state(pci_dev);
6178          *
6179          * For controllers newer than the P600, the pci power state
6180          * method of resetting doesn't work so we have another way
6181          * using the doorbell register.
6182          */
6183
6184         if (!ctlr_is_resettable(board_id)) {
6185                 dev_warn(&pdev->dev, "Controller not resettable\n");
6186                 return -ENODEV;
6187         }
6188
6189         /* if controller is soft- but not hard resettable... */
6190         if (!ctlr_is_hard_resettable(board_id))
6191                 return -ENOTSUPP; /* try soft reset later. */
6192
6193         /* Save the PCI command register */
6194         pci_read_config_word(pdev, 4, &command_register);
6195         pci_save_state(pdev);
6196
6197         /* find the first memory BAR, so we can find the cfg table */
6198         rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
6199         if (rc)
6200                 return rc;
6201         vaddr = remap_pci_mem(paddr, 0x250);
6202         if (!vaddr)
6203                 return -ENOMEM;
6204
6205         /* find cfgtable in order to check if reset via doorbell is supported */
6206         rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
6207                                         &cfg_base_addr_index, &cfg_offset);
6208         if (rc)
6209                 goto unmap_vaddr;
6210         cfgtable = remap_pci_mem(pci_resource_start(pdev,
6211                        cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
6212         if (!cfgtable) {
6213                 rc = -ENOMEM;
6214                 goto unmap_vaddr;
6215         }
6216         rc = write_driver_ver_to_cfgtable(cfgtable);
6217         if (rc)
6218                 goto unmap_cfgtable;
6219
6220         /* If reset via doorbell register is supported, use that.
6221          * There are two such methods.  Favor the newest method.
6222          */
6223         misc_fw_support = readl(&cfgtable->misc_fw_support);
6224         use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
6225         if (use_doorbell) {
6226                 use_doorbell = DOORBELL_CTLR_RESET2;
6227         } else {
6228                 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
6229                 if (use_doorbell) {
6230                         dev_warn(&pdev->dev,
6231                                 "Soft reset not supported. Firmware update is required.\n");
6232                         rc = -ENOTSUPP; /* try soft reset */
6233                         goto unmap_cfgtable;
6234                 }
6235         }
6236
6237         rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
6238         if (rc)
6239                 goto unmap_cfgtable;
6240
6241         pci_restore_state(pdev);
6242         pci_write_config_word(pdev, 4, command_register);
6243
6244         /* Some devices (notably the HP Smart Array 5i Controller)
6245            need a little pause here */
6246         msleep(HPSA_POST_RESET_PAUSE_MSECS);
6247
6248         rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
6249         if (rc) {
6250                 dev_warn(&pdev->dev,
6251                         "Failed waiting for board to become ready after hard reset\n");
6252                 goto unmap_cfgtable;
6253         }
6254
6255         rc = controller_reset_failed(vaddr);
6256         if (rc < 0)
6257                 goto unmap_cfgtable;
6258         if (rc) {
6259                 dev_warn(&pdev->dev, "Unable to successfully reset "
6260                         "controller. Will try soft reset.\n");
6261                 rc = -ENOTSUPP;
6262         } else {
6263                 dev_info(&pdev->dev, "board ready after hard reset.\n");
6264         }
6265
6266 unmap_cfgtable:
6267         iounmap(cfgtable);
6268
6269 unmap_vaddr:
6270         iounmap(vaddr);
6271         return rc;
6272 }
6273
6274 /*
6275  *  We cannot read the structure directly, for portability we must use
6276  *   the io functions.
6277  *   This is for debug only.
6278  */
6279 static void print_cfg_table(struct device *dev, struct CfgTable __iomem *tb)
6280 {
6281 #ifdef HPSA_DEBUG
6282         int i;
6283         char temp_name[17];
6284
6285         dev_info(dev, "Controller Configuration information\n");
6286         dev_info(dev, "------------------------------------\n");
6287         for (i = 0; i < 4; i++)
6288                 temp_name[i] = readb(&(tb->Signature[i]));
6289         temp_name[4] = '\0';
6290         dev_info(dev, "   Signature = %s\n", temp_name);
6291         dev_info(dev, "   Spec Number = %d\n", readl(&(tb->SpecValence)));
6292         dev_info(dev, "   Transport methods supported = 0x%x\n",
6293                readl(&(tb->TransportSupport)));
6294         dev_info(dev, "   Transport methods active = 0x%x\n",
6295                readl(&(tb->TransportActive)));
6296         dev_info(dev, "   Requested transport Method = 0x%x\n",
6297                readl(&(tb->HostWrite.TransportRequest)));
6298         dev_info(dev, "   Coalesce Interrupt Delay = 0x%x\n",
6299                readl(&(tb->HostWrite.CoalIntDelay)));
6300         dev_info(dev, "   Coalesce Interrupt Count = 0x%x\n",
6301                readl(&(tb->HostWrite.CoalIntCount)));
6302         dev_info(dev, "   Max outstanding commands = %d\n",
6303                readl(&(tb->CmdsOutMax)));
6304         dev_info(dev, "   Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
6305         for (i = 0; i < 16; i++)
6306                 temp_name[i] = readb(&(tb->ServerName[i]));
6307         temp_name[16] = '\0';
6308         dev_info(dev, "   Server Name = %s\n", temp_name);
6309         dev_info(dev, "   Heartbeat Counter = 0x%x\n\n\n",
6310                 readl(&(tb->HeartBeat)));
6311 #endif                          /* HPSA_DEBUG */
6312 }
6313
6314 static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
6315 {
6316         int i, offset, mem_type, bar_type;
6317
6318         if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
6319                 return 0;
6320         offset = 0;
6321         for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
6322                 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
6323                 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
6324                         offset += 4;
6325                 else {
6326                         mem_type = pci_resource_flags(pdev, i) &
6327                             PCI_BASE_ADDRESS_MEM_TYPE_MASK;
6328                         switch (mem_type) {
6329                         case PCI_BASE_ADDRESS_MEM_TYPE_32:
6330                         case PCI_BASE_ADDRESS_MEM_TYPE_1M:
6331                                 offset += 4;    /* 32 bit */
6332                                 break;
6333                         case PCI_BASE_ADDRESS_MEM_TYPE_64:
6334                                 offset += 8;
6335                                 break;
6336                         default:        /* reserved in PCI 2.2 */
6337                                 dev_warn(&pdev->dev,
6338                                        "base address is invalid\n");
6339                                 return -1;
6340                                 break;
6341                         }
6342                 }
6343                 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
6344                         return i + 1;
6345         }
6346         return -1;
6347 }
6348
6349 /* If MSI/MSI-X is supported by the kernel we will try to enable it on
6350  * controllers that are capable. If not, we use legacy INTx mode.
6351  */
6352
6353 static void hpsa_interrupt_mode(struct ctlr_info *h)
6354 {
6355 #ifdef CONFIG_PCI_MSI
6356         int err, i;
6357         struct msix_entry hpsa_msix_entries[MAX_REPLY_QUEUES];
6358
6359         for (i = 0; i < MAX_REPLY_QUEUES; i++) {
6360                 hpsa_msix_entries[i].vector = 0;
6361                 hpsa_msix_entries[i].entry = i;
6362         }
6363
6364         /* Some boards advertise MSI but don't really support it */
6365         if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
6366             (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
6367                 goto default_int_mode;
6368         if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
6369                 dev_info(&h->pdev->dev, "MSI-X capable controller\n");
6370                 h->msix_vector = MAX_REPLY_QUEUES;
6371                 if (h->msix_vector > num_online_cpus())
6372                         h->msix_vector = num_online_cpus();
6373                 err = pci_enable_msix_range(h->pdev, hpsa_msix_entries,
6374                                             1, h->msix_vector);
6375                 if (err < 0) {
6376                         dev_warn(&h->pdev->dev, "MSI-X init failed %d\n", err);
6377                         h->msix_vector = 0;
6378                         goto single_msi_mode;
6379                 } else if (err < h->msix_vector) {
6380                         dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
6381                                "available\n", err);
6382                 }
6383                 h->msix_vector = err;
6384                 for (i = 0; i < h->msix_vector; i++)
6385                         h->intr[i] = hpsa_msix_entries[i].vector;
6386                 return;
6387         }
6388 single_msi_mode:
6389         if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
6390                 dev_info(&h->pdev->dev, "MSI capable controller\n");
6391                 if (!pci_enable_msi(h->pdev))
6392                         h->msi_vector = 1;
6393                 else
6394                         dev_warn(&h->pdev->dev, "MSI init failed\n");
6395         }
6396 default_int_mode:
6397 #endif                          /* CONFIG_PCI_MSI */
6398         /* if we get here we're going to use the default interrupt mode */
6399         h->intr[h->intr_mode] = h->pdev->irq;
6400 }
6401
6402 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
6403 {
6404         int i;
6405         u32 subsystem_vendor_id, subsystem_device_id;
6406
6407         subsystem_vendor_id = pdev->subsystem_vendor;
6408         subsystem_device_id = pdev->subsystem_device;
6409         *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
6410                     subsystem_vendor_id;
6411
6412         for (i = 0; i < ARRAY_SIZE(products); i++)
6413                 if (*board_id == products[i].board_id)
6414                         return i;
6415
6416         if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
6417                 subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
6418                 !hpsa_allow_any) {
6419                 dev_warn(&pdev->dev, "unrecognized board ID: "
6420                         "0x%08x, ignoring.\n", *board_id);
6421                         return -ENODEV;
6422         }
6423         return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
6424 }
6425
6426 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
6427                                     unsigned long *memory_bar)
6428 {
6429         int i;
6430
6431         for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
6432                 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
6433                         /* addressing mode bits already removed */
6434                         *memory_bar = pci_resource_start(pdev, i);
6435                         dev_dbg(&pdev->dev, "memory BAR = %lx\n",
6436                                 *memory_bar);
6437                         return 0;
6438                 }
6439         dev_warn(&pdev->dev, "no memory BAR found\n");
6440         return -ENODEV;
6441 }
6442
6443 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
6444                                      int wait_for_ready)
6445 {
6446         int i, iterations;
6447         u32 scratchpad;
6448         if (wait_for_ready)
6449                 iterations = HPSA_BOARD_READY_ITERATIONS;
6450         else
6451                 iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
6452
6453         for (i = 0; i < iterations; i++) {
6454                 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
6455                 if (wait_for_ready) {
6456                         if (scratchpad == HPSA_FIRMWARE_READY)
6457                                 return 0;
6458                 } else {
6459                         if (scratchpad != HPSA_FIRMWARE_READY)
6460                                 return 0;
6461                 }
6462                 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
6463         }
6464         dev_warn(&pdev->dev, "board not ready, timed out.\n");
6465         return -ENODEV;
6466 }
6467
6468 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
6469                                u32 *cfg_base_addr, u64 *cfg_base_addr_index,
6470                                u64 *cfg_offset)
6471 {
6472         *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
6473         *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
6474         *cfg_base_addr &= (u32) 0x0000ffff;
6475         *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
6476         if (*cfg_base_addr_index == -1) {
6477                 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
6478                 return -ENODEV;
6479         }
6480         return 0;
6481 }
6482
6483 static int hpsa_find_cfgtables(struct ctlr_info *h)
6484 {
6485         u64 cfg_offset;
6486         u32 cfg_base_addr;
6487         u64 cfg_base_addr_index;
6488         u32 trans_offset;
6489         int rc;
6490
6491         rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
6492                 &cfg_base_addr_index, &cfg_offset);
6493         if (rc)
6494                 return rc;
6495         h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
6496                        cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
6497         if (!h->cfgtable) {
6498                 dev_err(&h->pdev->dev, "Failed mapping cfgtable\n");
6499                 return -ENOMEM;
6500         }
6501         rc = write_driver_ver_to_cfgtable(h->cfgtable);
6502         if (rc)
6503                 return rc;
6504         /* Find performant mode table. */
6505         trans_offset = readl(&h->cfgtable->TransMethodOffset);
6506         h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
6507                                 cfg_base_addr_index)+cfg_offset+trans_offset,
6508                                 sizeof(*h->transtable));
6509         if (!h->transtable)
6510                 return -ENOMEM;
6511         return 0;
6512 }
6513
6514 static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
6515 {
6516 #define MIN_MAX_COMMANDS 16
6517         BUILD_BUG_ON(MIN_MAX_COMMANDS <= HPSA_NRESERVED_CMDS);
6518
6519         h->max_commands = readl(&h->cfgtable->MaxPerformantModeCommands);
6520
6521         /* Limit commands in memory limited kdump scenario. */
6522         if (reset_devices && h->max_commands > 32)
6523                 h->max_commands = 32;
6524
6525         if (h->max_commands < MIN_MAX_COMMANDS) {
6526                 dev_warn(&h->pdev->dev,
6527                         "Controller reports max supported commands of %d Using %d instead. Ensure that firmware is up to date.\n",
6528                         h->max_commands,
6529                         MIN_MAX_COMMANDS);
6530                 h->max_commands = MIN_MAX_COMMANDS;
6531         }
6532 }
6533
6534 /* If the controller reports that the total max sg entries is greater than 512,
6535  * then we know that chained SG blocks work.  (Original smart arrays did not
6536  * support chained SG blocks and would return zero for max sg entries.)
6537  */
6538 static int hpsa_supports_chained_sg_blocks(struct ctlr_info *h)
6539 {
6540         return h->maxsgentries > 512;
6541 }
6542
6543 /* Interrogate the hardware for some limits:
6544  * max commands, max SG elements without chaining, and with chaining,
6545  * SG chain block size, etc.
6546  */
6547 static void hpsa_find_board_params(struct ctlr_info *h)
6548 {
6549         hpsa_get_max_perf_mode_cmds(h);
6550         h->nr_cmds = h->max_commands;
6551         h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
6552         h->fw_support = readl(&(h->cfgtable->misc_fw_support));
6553         if (hpsa_supports_chained_sg_blocks(h)) {
6554                 /* Limit in-command s/g elements to 32 save dma'able memory. */
6555                 h->max_cmd_sg_entries = 32;
6556                 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries;
6557                 h->maxsgentries--; /* save one for chain pointer */
6558         } else {
6559                 /*
6560                  * Original smart arrays supported at most 31 s/g entries
6561                  * embedded inline in the command (trying to use more
6562                  * would lock up the controller)
6563                  */
6564                 h->max_cmd_sg_entries = 31;
6565                 h->maxsgentries = 31; /* default to traditional values */
6566                 h->chainsize = 0;
6567         }
6568
6569         /* Find out what task management functions are supported and cache */
6570         h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags));
6571         if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags))
6572                 dev_warn(&h->pdev->dev, "Physical aborts not supported\n");
6573         if (!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
6574                 dev_warn(&h->pdev->dev, "Logical aborts not supported\n");
6575 }
6576
6577 static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
6578 {
6579         if (!check_signature(h->cfgtable->Signature, "CISS", 4)) {
6580                 dev_err(&h->pdev->dev, "not a valid CISS config table\n");
6581                 return false;
6582         }
6583         return true;
6584 }
6585
6586 static inline void hpsa_set_driver_support_bits(struct ctlr_info *h)
6587 {
6588         u32 driver_support;
6589
6590         driver_support = readl(&(h->cfgtable->driver_support));
6591         /* Need to enable prefetch in the SCSI core for 6400 in x86 */
6592 #ifdef CONFIG_X86
6593         driver_support |= ENABLE_SCSI_PREFETCH;
6594 #endif
6595         driver_support |= ENABLE_UNIT_ATTN;
6596         writel(driver_support, &(h->cfgtable->driver_support));
6597 }
6598
6599 /* Disable DMA prefetch for the P600.  Otherwise an ASIC bug may result
6600  * in a prefetch beyond physical memory.
6601  */
6602 static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
6603 {
6604         u32 dma_prefetch;
6605
6606         if (h->board_id != 0x3225103C)
6607                 return;
6608         dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
6609         dma_prefetch |= 0x8000;
6610         writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
6611 }
6612
6613 static int hpsa_wait_for_clear_event_notify_ack(struct ctlr_info *h)
6614 {
6615         int i;
6616         u32 doorbell_value;
6617         unsigned long flags;
6618         /* wait until the clear_event_notify bit 6 is cleared by controller. */
6619         for (i = 0; i < MAX_CLEAR_EVENT_WAIT; i++) {
6620                 spin_lock_irqsave(&h->lock, flags);
6621                 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
6622                 spin_unlock_irqrestore(&h->lock, flags);
6623                 if (!(doorbell_value & DOORBELL_CLEAR_EVENTS))
6624                         goto done;
6625                 /* delay and try again */
6626                 msleep(CLEAR_EVENT_WAIT_INTERVAL);
6627         }
6628         return -ENODEV;
6629 done:
6630         return 0;
6631 }
6632
6633 static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
6634 {
6635         int i;
6636         u32 doorbell_value;
6637         unsigned long flags;
6638
6639         /* under certain very rare conditions, this can take awhile.
6640          * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
6641          * as we enter this code.)
6642          */
6643         for (i = 0; i < MAX_MODE_CHANGE_WAIT; i++) {
6644                 if (h->remove_in_progress)
6645                         goto done;
6646                 spin_lock_irqsave(&h->lock, flags);
6647                 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
6648                 spin_unlock_irqrestore(&h->lock, flags);
6649                 if (!(doorbell_value & CFGTBL_ChangeReq))
6650                         goto done;
6651                 /* delay and try again */
6652                 msleep(MODE_CHANGE_WAIT_INTERVAL);
6653         }
6654         return -ENODEV;
6655 done:
6656         return 0;
6657 }
6658
6659 /* return -ENODEV or other reason on error, 0 on success */
6660 static int hpsa_enter_simple_mode(struct ctlr_info *h)
6661 {
6662         u32 trans_support;
6663
6664         trans_support = readl(&(h->cfgtable->TransportSupport));
6665         if (!(trans_support & SIMPLE_MODE))
6666                 return -ENOTSUPP;
6667
6668         h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
6669
6670         /* Update the field, and then ring the doorbell */
6671         writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
6672         writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
6673         writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
6674         if (hpsa_wait_for_mode_change_ack(h))
6675                 goto error;
6676         print_cfg_table(&h->pdev->dev, h->cfgtable);
6677         if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple))
6678                 goto error;
6679         h->transMethod = CFGTBL_Trans_Simple;
6680         return 0;
6681 error:
6682         dev_err(&h->pdev->dev, "failed to enter simple mode\n");
6683         return -ENODEV;
6684 }
6685
6686 static int hpsa_pci_init(struct ctlr_info *h)
6687 {
6688         int prod_index, err;
6689
6690         prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
6691         if (prod_index < 0)
6692                 return prod_index;
6693         h->product_name = products[prod_index].product_name;
6694         h->access = *(products[prod_index].access);
6695
6696         h->needs_abort_tags_swizzled =
6697                 ctlr_needs_abort_tags_swizzled(h->board_id);
6698
6699         pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
6700                                PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
6701
6702         err = pci_enable_device(h->pdev);
6703         if (err) {
6704                 dev_warn(&h->pdev->dev, "unable to enable PCI device\n");
6705                 return err;
6706         }
6707
6708         err = pci_request_regions(h->pdev, HPSA);
6709         if (err) {
6710                 dev_err(&h->pdev->dev,
6711                         "cannot obtain PCI resources, aborting\n");
6712                 return err;
6713         }
6714
6715         pci_set_master(h->pdev);
6716
6717         hpsa_interrupt_mode(h);
6718         err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
6719         if (err)
6720                 goto err_out_free_res;
6721         h->vaddr = remap_pci_mem(h->paddr, 0x250);
6722         if (!h->vaddr) {
6723                 err = -ENOMEM;
6724                 goto err_out_free_res;
6725         }
6726         err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
6727         if (err)
6728                 goto err_out_free_res;
6729         err = hpsa_find_cfgtables(h);
6730         if (err)
6731                 goto err_out_free_res;
6732         hpsa_find_board_params(h);
6733
6734         if (!hpsa_CISS_signature_present(h)) {
6735                 err = -ENODEV;
6736                 goto err_out_free_res;
6737         }
6738         hpsa_set_driver_support_bits(h);
6739         hpsa_p600_dma_prefetch_quirk(h);
6740         err = hpsa_enter_simple_mode(h);
6741         if (err)
6742                 goto err_out_free_res;
6743         return 0;
6744
6745 err_out_free_res:
6746         if (h->transtable)
6747                 iounmap(h->transtable);
6748         if (h->cfgtable)
6749                 iounmap(h->cfgtable);
6750         if (h->vaddr)
6751                 iounmap(h->vaddr);
6752         pci_disable_device(h->pdev);
6753         pci_release_regions(h->pdev);
6754         return err;
6755 }
6756
6757 static void hpsa_hba_inquiry(struct ctlr_info *h)
6758 {
6759         int rc;
6760
6761 #define HBA_INQUIRY_BYTE_COUNT 64
6762         h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
6763         if (!h->hba_inquiry_data)
6764                 return;
6765         rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
6766                 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
6767         if (rc != 0) {
6768                 kfree(h->hba_inquiry_data);
6769                 h->hba_inquiry_data = NULL;
6770         }
6771 }
6772
6773 static int hpsa_init_reset_devices(struct pci_dev *pdev, u32 board_id)
6774 {
6775         int rc, i;
6776         void __iomem *vaddr;
6777
6778         if (!reset_devices)
6779                 return 0;
6780
6781         /* kdump kernel is loading, we don't know in which state is
6782          * the pci interface. The dev->enable_cnt is equal zero
6783          * so we call enable+disable, wait a while and switch it on.
6784          */
6785         rc = pci_enable_device(pdev);
6786         if (rc) {
6787                 dev_warn(&pdev->dev, "Failed to enable PCI device\n");
6788                 return -ENODEV;
6789         }
6790         pci_disable_device(pdev);
6791         msleep(260);                    /* a randomly chosen number */
6792         rc = pci_enable_device(pdev);
6793         if (rc) {
6794                 dev_warn(&pdev->dev, "failed to enable device.\n");
6795                 return -ENODEV;
6796         }
6797
6798         pci_set_master(pdev);
6799
6800         vaddr = pci_ioremap_bar(pdev, 0);
6801         if (vaddr == NULL) {
6802                 rc = -ENOMEM;
6803                 goto out_disable;
6804         }
6805         writel(SA5_INTR_OFF, vaddr + SA5_REPLY_INTR_MASK_OFFSET);
6806         iounmap(vaddr);
6807
6808         /* Reset the controller with a PCI power-cycle or via doorbell */
6809         rc = hpsa_kdump_hard_reset_controller(pdev, board_id);
6810
6811         /* -ENOTSUPP here means we cannot reset the controller
6812          * but it's already (and still) up and running in
6813          * "performant mode".  Or, it might be 640x, which can't reset
6814          * due to concerns about shared bbwc between 6402/6404 pair.
6815          */
6816         if (rc)
6817                 goto out_disable;
6818
6819         /* Now try to get the controller to respond to a no-op */
6820         dev_info(&pdev->dev, "Waiting for controller to respond to no-op\n");
6821         for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
6822                 if (hpsa_noop(pdev) == 0)
6823                         break;
6824                 else
6825                         dev_warn(&pdev->dev, "no-op failed%s\n",
6826                                         (i < 11 ? "; re-trying" : ""));
6827         }
6828
6829 out_disable:
6830
6831         pci_disable_device(pdev);
6832         return rc;
6833 }
6834
6835 static int hpsa_alloc_cmd_pool(struct ctlr_info *h)
6836 {
6837         h->cmd_pool_bits = kzalloc(
6838                 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) *
6839                 sizeof(unsigned long), GFP_KERNEL);
6840         h->cmd_pool = pci_alloc_consistent(h->pdev,
6841                     h->nr_cmds * sizeof(*h->cmd_pool),
6842                     &(h->cmd_pool_dhandle));
6843         h->errinfo_pool = pci_alloc_consistent(h->pdev,
6844                     h->nr_cmds * sizeof(*h->errinfo_pool),
6845                     &(h->errinfo_pool_dhandle));
6846         if ((h->cmd_pool_bits == NULL)
6847             || (h->cmd_pool == NULL)
6848             || (h->errinfo_pool == NULL)) {
6849                 dev_err(&h->pdev->dev, "out of memory in %s", __func__);
6850                 goto clean_up;
6851         }
6852         hpsa_preinitialize_commands(h);
6853         return 0;
6854 clean_up:
6855         hpsa_free_cmd_pool(h);
6856         return -ENOMEM;
6857 }
6858
6859 static void hpsa_free_cmd_pool(struct ctlr_info *h)
6860 {
6861         kfree(h->cmd_pool_bits);
6862         if (h->cmd_pool)
6863                 pci_free_consistent(h->pdev,
6864                             h->nr_cmds * sizeof(struct CommandList),
6865                             h->cmd_pool, h->cmd_pool_dhandle);
6866         if (h->ioaccel2_cmd_pool)
6867                 pci_free_consistent(h->pdev,
6868                         h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
6869                         h->ioaccel2_cmd_pool, h->ioaccel2_cmd_pool_dhandle);
6870         if (h->errinfo_pool)
6871                 pci_free_consistent(h->pdev,
6872                             h->nr_cmds * sizeof(struct ErrorInfo),
6873                             h->errinfo_pool,
6874                             h->errinfo_pool_dhandle);
6875         if (h->ioaccel_cmd_pool)
6876                 pci_free_consistent(h->pdev,
6877                         h->nr_cmds * sizeof(struct io_accel1_cmd),
6878                         h->ioaccel_cmd_pool, h->ioaccel_cmd_pool_dhandle);
6879 }
6880
6881 static void hpsa_irq_affinity_hints(struct ctlr_info *h)
6882 {
6883         int i, cpu;
6884
6885         cpu = cpumask_first(cpu_online_mask);
6886         for (i = 0; i < h->msix_vector; i++) {
6887                 irq_set_affinity_hint(h->intr[i], get_cpu_mask(cpu));
6888                 cpu = cpumask_next(cpu, cpu_online_mask);
6889         }
6890 }
6891
6892 /* clear affinity hints and free MSI-X, MSI, or legacy INTx vectors */
6893 static void hpsa_free_irqs(struct ctlr_info *h)
6894 {
6895         int i;
6896
6897         if (!h->msix_vector || h->intr_mode != PERF_MODE_INT) {
6898                 /* Single reply queue, only one irq to free */
6899                 i = h->intr_mode;
6900                 irq_set_affinity_hint(h->intr[i], NULL);
6901                 free_irq(h->intr[i], &h->q[i]);
6902                 return;
6903         }
6904
6905         for (i = 0; i < h->msix_vector; i++) {
6906                 irq_set_affinity_hint(h->intr[i], NULL);
6907                 free_irq(h->intr[i], &h->q[i]);
6908         }
6909         for (; i < MAX_REPLY_QUEUES; i++)
6910                 h->q[i] = 0;
6911 }
6912
6913 /* returns 0 on success; cleans up and returns -Enn on error */
6914 static int hpsa_request_irqs(struct ctlr_info *h,
6915         irqreturn_t (*msixhandler)(int, void *),
6916         irqreturn_t (*intxhandler)(int, void *))
6917 {
6918         int rc, i;
6919
6920         /*
6921          * initialize h->q[x] = x so that interrupt handlers know which
6922          * queue to process.
6923          */
6924         for (i = 0; i < MAX_REPLY_QUEUES; i++)
6925                 h->q[i] = (u8) i;
6926
6927         if (h->intr_mode == PERF_MODE_INT && h->msix_vector > 0) {
6928                 /* If performant mode and MSI-X, use multiple reply queues */
6929                 for (i = 0; i < h->msix_vector; i++) {
6930                         rc = request_irq(h->intr[i], msixhandler,
6931                                         0, h->devname,
6932                                         &h->q[i]);
6933                         if (rc) {
6934                                 int j;
6935
6936                                 dev_err(&h->pdev->dev,
6937                                         "failed to get irq %d for %s\n",
6938                                        h->intr[i], h->devname);
6939                                 for (j = 0; j < i; j++) {
6940                                         free_irq(h->intr[j], &h->q[j]);
6941                                         h->q[j] = 0;
6942                                 }
6943                                 for (; j < MAX_REPLY_QUEUES; j++)
6944                                         h->q[j] = 0;
6945                                 return rc;
6946                         }
6947                 }
6948                 hpsa_irq_affinity_hints(h);
6949         } else {
6950                 /* Use single reply pool */
6951                 if (h->msix_vector > 0 || h->msi_vector) {
6952                         rc = request_irq(h->intr[h->intr_mode],
6953                                 msixhandler, 0, h->devname,
6954                                 &h->q[h->intr_mode]);
6955                 } else {
6956                         rc = request_irq(h->intr[h->intr_mode],
6957                                 intxhandler, IRQF_SHARED, h->devname,
6958                                 &h->q[h->intr_mode]);
6959                 }
6960         }
6961         if (rc) {
6962                 dev_err(&h->pdev->dev, "unable to get irq %d for %s\n",
6963                        h->intr[h->intr_mode], h->devname);
6964                 return -ENODEV;
6965         }
6966         return 0;
6967 }
6968
6969 static int hpsa_kdump_soft_reset(struct ctlr_info *h)
6970 {
6971         if (hpsa_send_host_reset(h, RAID_CTLR_LUNID,
6972                 HPSA_RESET_TYPE_CONTROLLER)) {
6973                 dev_warn(&h->pdev->dev, "Resetting array controller failed.\n");
6974                 return -EIO;
6975         }
6976
6977         dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
6978         if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY)) {
6979                 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
6980                 return -1;
6981         }
6982
6983         dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
6984         if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY)) {
6985                 dev_warn(&h->pdev->dev, "Board failed to become ready "
6986                         "after soft reset.\n");
6987                 return -1;
6988         }
6989
6990         return 0;
6991 }
6992
6993 static void hpsa_free_irqs_and_disable_msix(struct ctlr_info *h)
6994 {
6995         hpsa_free_irqs(h);
6996 #ifdef CONFIG_PCI_MSI
6997         if (h->msix_vector) {
6998                 if (h->pdev->msix_enabled)
6999                         pci_disable_msix(h->pdev);
7000         } else if (h->msi_vector) {
7001                 if (h->pdev->msi_enabled)
7002                         pci_disable_msi(h->pdev);
7003         }
7004 #endif /* CONFIG_PCI_MSI */
7005 }
7006
7007 static void hpsa_free_reply_queues(struct ctlr_info *h)
7008 {
7009         int i;
7010
7011         for (i = 0; i < h->nreply_queues; i++) {
7012                 if (!h->reply_queue[i].head)
7013                         continue;
7014                 pci_free_consistent(h->pdev, h->reply_queue_size,
7015                         h->reply_queue[i].head, h->reply_queue[i].busaddr);
7016                 h->reply_queue[i].head = NULL;
7017                 h->reply_queue[i].busaddr = 0;
7018         }
7019 }
7020
7021 static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
7022 {
7023         hpsa_free_irqs_and_disable_msix(h);
7024         hpsa_free_sg_chain_blocks(h);
7025         hpsa_free_cmd_pool(h);
7026         kfree(h->ioaccel1_blockFetchTable);
7027         kfree(h->blockFetchTable);
7028         hpsa_free_reply_queues(h);
7029         if (h->vaddr)
7030                 iounmap(h->vaddr);
7031         if (h->transtable)
7032                 iounmap(h->transtable);
7033         if (h->cfgtable)
7034                 iounmap(h->cfgtable);
7035         pci_disable_device(h->pdev);
7036         pci_release_regions(h->pdev);
7037         kfree(h);
7038 }
7039
7040 /* Called when controller lockup detected. */
7041 static void fail_all_outstanding_cmds(struct ctlr_info *h)
7042 {
7043         int i, refcount;
7044         struct CommandList *c;
7045         int failcount = 0;
7046
7047         flush_workqueue(h->resubmit_wq); /* ensure all cmds are fully built */
7048         for (i = 0; i < h->nr_cmds; i++) {
7049                 c = h->cmd_pool + i;
7050                 refcount = atomic_inc_return(&c->refcount);
7051                 if (refcount > 1) {
7052                         c->err_info->CommandStatus = CMD_CTLR_LOCKUP;
7053                         finish_cmd(c);
7054                         atomic_dec(&h->commands_outstanding);
7055                         failcount++;
7056                 }
7057                 cmd_free(h, c);
7058         }
7059         dev_warn(&h->pdev->dev,
7060                 "failed %d commands in fail_all\n", failcount);
7061 }
7062
7063 static void set_lockup_detected_for_all_cpus(struct ctlr_info *h, u32 value)
7064 {
7065         int cpu;
7066
7067         for_each_online_cpu(cpu) {
7068                 u32 *lockup_detected;
7069                 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
7070                 *lockup_detected = value;
7071         }
7072         wmb(); /* be sure the per-cpu variables are out to memory */
7073 }
7074
7075 static void controller_lockup_detected(struct ctlr_info *h)
7076 {
7077         unsigned long flags;
7078         u32 lockup_detected;
7079
7080         h->access.set_intr_mask(h, HPSA_INTR_OFF);
7081         spin_lock_irqsave(&h->lock, flags);
7082         lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
7083         if (!lockup_detected) {
7084                 /* no heartbeat, but controller gave us a zero. */
7085                 dev_warn(&h->pdev->dev,
7086                         "lockup detected after %d but scratchpad register is zero\n",
7087                         h->heartbeat_sample_interval / HZ);
7088                 lockup_detected = 0xffffffff;
7089         }
7090         set_lockup_detected_for_all_cpus(h, lockup_detected);
7091         spin_unlock_irqrestore(&h->lock, flags);
7092         dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x after %d\n",
7093                         lockup_detected, h->heartbeat_sample_interval / HZ);
7094         pci_disable_device(h->pdev);
7095         fail_all_outstanding_cmds(h);
7096 }
7097
7098 static int detect_controller_lockup(struct ctlr_info *h)
7099 {
7100         u64 now;
7101         u32 heartbeat;
7102         unsigned long flags;
7103
7104         now = get_jiffies_64();
7105         /* If we've received an interrupt recently, we're ok. */
7106         if (time_after64(h->last_intr_timestamp +
7107                                 (h->heartbeat_sample_interval), now))
7108                 return false;
7109
7110         /*
7111          * If we've already checked the heartbeat recently, we're ok.
7112          * This could happen if someone sends us a signal. We
7113          * otherwise don't care about signals in this thread.
7114          */
7115         if (time_after64(h->last_heartbeat_timestamp +
7116                                 (h->heartbeat_sample_interval), now))
7117                 return false;
7118
7119         /* If heartbeat has not changed since we last looked, we're not ok. */
7120         spin_lock_irqsave(&h->lock, flags);
7121         heartbeat = readl(&h->cfgtable->HeartBeat);
7122         spin_unlock_irqrestore(&h->lock, flags);
7123         if (h->last_heartbeat == heartbeat) {
7124                 controller_lockup_detected(h);
7125                 return true;
7126         }
7127
7128         /* We're ok. */
7129         h->last_heartbeat = heartbeat;
7130         h->last_heartbeat_timestamp = now;
7131         return false;
7132 }
7133
7134 static void hpsa_ack_ctlr_events(struct ctlr_info *h)
7135 {
7136         int i;
7137         char *event_type;
7138
7139         if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
7140                 return;
7141
7142         /* Ask the controller to clear the events we're handling. */
7143         if ((h->transMethod & (CFGTBL_Trans_io_accel1
7144                         | CFGTBL_Trans_io_accel2)) &&
7145                 (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE ||
7146                  h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)) {
7147
7148                 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE)
7149                         event_type = "state change";
7150                 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)
7151                         event_type = "configuration change";
7152                 /* Stop sending new RAID offload reqs via the IO accelerator */
7153                 scsi_block_requests(h->scsi_host);
7154                 for (i = 0; i < h->ndevices; i++)
7155                         h->dev[i]->offload_enabled = 0;
7156                 hpsa_drain_accel_commands(h);
7157                 /* Set 'accelerator path config change' bit */
7158                 dev_warn(&h->pdev->dev,
7159                         "Acknowledging event: 0x%08x (HP SSD Smart Path %s)\n",
7160                         h->events, event_type);
7161                 writel(h->events, &(h->cfgtable->clear_event_notify));
7162                 /* Set the "clear event notify field update" bit 6 */
7163                 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
7164                 /* Wait until ctlr clears 'clear event notify field', bit 6 */
7165                 hpsa_wait_for_clear_event_notify_ack(h);
7166                 scsi_unblock_requests(h->scsi_host);
7167         } else {
7168                 /* Acknowledge controller notification events. */
7169                 writel(h->events, &(h->cfgtable->clear_event_notify));
7170                 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
7171                 hpsa_wait_for_clear_event_notify_ack(h);
7172 #if 0
7173                 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
7174                 hpsa_wait_for_mode_change_ack(h);
7175 #endif
7176         }
7177         return;
7178 }
7179
7180 /* Check a register on the controller to see if there are configuration
7181  * changes (added/changed/removed logical drives, etc.) which mean that
7182  * we should rescan the controller for devices.
7183  * Also check flag for driver-initiated rescan.
7184  */
7185 static int hpsa_ctlr_needs_rescan(struct ctlr_info *h)
7186 {
7187         if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
7188                 return 0;
7189
7190         h->events = readl(&(h->cfgtable->event_notify));
7191         return h->events & RESCAN_REQUIRED_EVENT_BITS;
7192 }
7193
7194 /*
7195  * Check if any of the offline devices have become ready
7196  */
7197 static int hpsa_offline_devices_ready(struct ctlr_info *h)
7198 {
7199         unsigned long flags;
7200         struct offline_device_entry *d;
7201         struct list_head *this, *tmp;
7202
7203         spin_lock_irqsave(&h->offline_device_lock, flags);
7204         list_for_each_safe(this, tmp, &h->offline_device_list) {
7205                 d = list_entry(this, struct offline_device_entry,
7206                                 offline_list);
7207                 spin_unlock_irqrestore(&h->offline_device_lock, flags);
7208                 if (!hpsa_volume_offline(h, d->scsi3addr)) {
7209                         spin_lock_irqsave(&h->offline_device_lock, flags);
7210                         list_del(&d->offline_list);
7211                         spin_unlock_irqrestore(&h->offline_device_lock, flags);
7212                         return 1;
7213                 }
7214                 spin_lock_irqsave(&h->offline_device_lock, flags);
7215         }
7216         spin_unlock_irqrestore(&h->offline_device_lock, flags);
7217         return 0;
7218 }
7219
7220 static void hpsa_rescan_ctlr_worker(struct work_struct *work)
7221 {
7222         unsigned long flags;
7223         struct ctlr_info *h = container_of(to_delayed_work(work),
7224                                         struct ctlr_info, rescan_ctlr_work);
7225
7226
7227         if (h->remove_in_progress)
7228                 return;
7229
7230         if (hpsa_ctlr_needs_rescan(h) || hpsa_offline_devices_ready(h)) {
7231                 scsi_host_get(h->scsi_host);
7232                 hpsa_ack_ctlr_events(h);
7233                 hpsa_scan_start(h->scsi_host);
7234                 scsi_host_put(h->scsi_host);
7235         }
7236         spin_lock_irqsave(&h->lock, flags);
7237         if (!h->remove_in_progress)
7238                 queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work,
7239                                 h->heartbeat_sample_interval);
7240         spin_unlock_irqrestore(&h->lock, flags);
7241 }
7242
7243 static void hpsa_monitor_ctlr_worker(struct work_struct *work)
7244 {
7245         unsigned long flags;
7246         struct ctlr_info *h = container_of(to_delayed_work(work),
7247                                         struct ctlr_info, monitor_ctlr_work);
7248
7249         detect_controller_lockup(h);
7250         if (lockup_detected(h))
7251                 return;
7252
7253         spin_lock_irqsave(&h->lock, flags);
7254         if (!h->remove_in_progress)
7255                 schedule_delayed_work(&h->monitor_ctlr_work,
7256                                 h->heartbeat_sample_interval);
7257         spin_unlock_irqrestore(&h->lock, flags);
7258 }
7259
7260 static struct workqueue_struct *hpsa_create_controller_wq(struct ctlr_info *h,
7261                                                 char *name)
7262 {
7263         struct workqueue_struct *wq = NULL;
7264
7265         wq = alloc_ordered_workqueue("%s_%d_hpsa", 0, name, h->ctlr);
7266         if (!wq)
7267                 dev_err(&h->pdev->dev, "failed to create %s workqueue\n", name);
7268
7269         return wq;
7270 }
7271
7272 static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
7273 {
7274         int dac, rc;
7275         struct ctlr_info *h;
7276         int try_soft_reset = 0;
7277         unsigned long flags;
7278         u32 board_id;
7279
7280         if (number_of_controllers == 0)
7281                 printk(KERN_INFO DRIVER_NAME "\n");
7282
7283         rc = hpsa_lookup_board_id(pdev, &board_id);
7284         if (rc < 0) {
7285                 dev_warn(&pdev->dev, "Board ID not found\n");
7286                 return rc;
7287         }
7288
7289         rc = hpsa_init_reset_devices(pdev, board_id);
7290         if (rc) {
7291                 if (rc != -ENOTSUPP)
7292                         return rc;
7293                 /* If the reset fails in a particular way (it has no way to do
7294                  * a proper hard reset, so returns -ENOTSUPP) we can try to do
7295                  * a soft reset once we get the controller configured up to the
7296                  * point that it can accept a command.
7297                  */
7298                 try_soft_reset = 1;
7299                 rc = 0;
7300         }
7301
7302 reinit_after_soft_reset:
7303
7304         /* Command structures must be aligned on a 32-byte boundary because
7305          * the 5 lower bits of the address are used by the hardware. and by
7306          * the driver.  See comments in hpsa.h for more info.
7307          */
7308         BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
7309         h = kzalloc(sizeof(*h), GFP_KERNEL);
7310         if (!h)
7311                 return -ENOMEM;
7312
7313         h->pdev = pdev;
7314         h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
7315         INIT_LIST_HEAD(&h->offline_device_list);
7316         spin_lock_init(&h->lock);
7317         spin_lock_init(&h->offline_device_lock);
7318         spin_lock_init(&h->scan_lock);
7319         atomic_set(&h->passthru_cmds_avail, HPSA_MAX_CONCURRENT_PASSTHRUS);
7320         atomic_set(&h->abort_cmds_available, HPSA_CMDS_RESERVED_FOR_ABORTS);
7321
7322         h->rescan_ctlr_wq = hpsa_create_controller_wq(h, "rescan");
7323         if (!h->rescan_ctlr_wq) {
7324                 rc = -ENOMEM;
7325                 goto clean1;
7326         }
7327
7328         h->resubmit_wq = hpsa_create_controller_wq(h, "resubmit");
7329         if (!h->resubmit_wq) {
7330                 rc = -ENOMEM;
7331                 goto clean1;
7332         }
7333
7334         /* Allocate and clear per-cpu variable lockup_detected */
7335         h->lockup_detected = alloc_percpu(u32);
7336         if (!h->lockup_detected) {
7337                 rc = -ENOMEM;
7338                 goto clean1;
7339         }
7340         set_lockup_detected_for_all_cpus(h, 0);
7341
7342         rc = hpsa_pci_init(h);
7343         if (rc != 0)
7344                 goto clean1;
7345
7346         sprintf(h->devname, HPSA "%d", number_of_controllers);
7347         h->ctlr = number_of_controllers;
7348         number_of_controllers++;
7349
7350         /* configure PCI DMA stuff */
7351         rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
7352         if (rc == 0) {
7353                 dac = 1;
7354         } else {
7355                 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
7356                 if (rc == 0) {
7357                         dac = 0;
7358                 } else {
7359                         dev_err(&pdev->dev, "no suitable DMA available\n");
7360                         goto clean1;
7361                 }
7362         }
7363
7364         /* make sure the board interrupts are off */
7365         h->access.set_intr_mask(h, HPSA_INTR_OFF);
7366
7367         if (hpsa_request_irqs(h, do_hpsa_intr_msi, do_hpsa_intr_intx))
7368                 goto clean2;
7369         dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n",
7370                h->devname, pdev->device,
7371                h->intr[h->intr_mode], dac ? "" : " not");
7372         rc = hpsa_alloc_cmd_pool(h);
7373         if (rc)
7374                 goto clean2_and_free_irqs;
7375         if (hpsa_allocate_sg_chain_blocks(h))
7376                 goto clean4;
7377         init_waitqueue_head(&h->scan_wait_queue);
7378         init_waitqueue_head(&h->abort_cmd_wait_queue);
7379         h->scan_finished = 1; /* no scan currently in progress */
7380
7381         pci_set_drvdata(pdev, h);
7382         h->ndevices = 0;
7383         h->hba_mode_enabled = 0;
7384         h->scsi_host = NULL;
7385         spin_lock_init(&h->devlock);
7386         hpsa_put_ctlr_into_performant_mode(h);
7387
7388         /* At this point, the controller is ready to take commands.
7389          * Now, if reset_devices and the hard reset didn't work, try
7390          * the soft reset and see if that works.
7391          */
7392         if (try_soft_reset) {
7393
7394                 /* This is kind of gross.  We may or may not get a completion
7395                  * from the soft reset command, and if we do, then the value
7396                  * from the fifo may or may not be valid.  So, we wait 10 secs
7397                  * after the reset throwing away any completions we get during
7398                  * that time.  Unregister the interrupt handler and register
7399                  * fake ones to scoop up any residual completions.
7400                  */
7401                 spin_lock_irqsave(&h->lock, flags);
7402                 h->access.set_intr_mask(h, HPSA_INTR_OFF);
7403                 spin_unlock_irqrestore(&h->lock, flags);
7404                 hpsa_free_irqs(h);
7405                 rc = hpsa_request_irqs(h, hpsa_msix_discard_completions,
7406                                         hpsa_intx_discard_completions);
7407                 if (rc) {
7408                         dev_warn(&h->pdev->dev,
7409                                 "Failed to request_irq after soft reset.\n");
7410                         goto clean4;
7411                 }
7412
7413                 rc = hpsa_kdump_soft_reset(h);
7414                 if (rc)
7415                         /* Neither hard nor soft reset worked, we're hosed. */
7416                         goto clean4;
7417
7418                 dev_info(&h->pdev->dev, "Board READY.\n");
7419                 dev_info(&h->pdev->dev,
7420                         "Waiting for stale completions to drain.\n");
7421                 h->access.set_intr_mask(h, HPSA_INTR_ON);
7422                 msleep(10000);
7423                 h->access.set_intr_mask(h, HPSA_INTR_OFF);
7424
7425                 rc = controller_reset_failed(h->cfgtable);
7426                 if (rc)
7427                         dev_info(&h->pdev->dev,
7428                                 "Soft reset appears to have failed.\n");
7429
7430                 /* since the controller's reset, we have to go back and re-init
7431                  * everything.  Easiest to just forget what we've done and do it
7432                  * all over again.
7433                  */
7434                 hpsa_undo_allocations_after_kdump_soft_reset(h);
7435                 try_soft_reset = 0;
7436                 if (rc)
7437                         /* don't go to clean4, we already unallocated */
7438                         return -ENODEV;
7439
7440                 goto reinit_after_soft_reset;
7441         }
7442
7443                 /* Enable Accelerated IO path at driver layer */
7444                 h->acciopath_status = 1;
7445
7446
7447         /* Turn the interrupts on so we can service requests */
7448         h->access.set_intr_mask(h, HPSA_INTR_ON);
7449
7450         hpsa_hba_inquiry(h);
7451         rc = hpsa_register_scsi(h); /* hook ourselves into SCSI subsystem */
7452         if (rc)
7453                 goto clean4;
7454
7455         /* Monitor the controller for firmware lockups */
7456         h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
7457         INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker);
7458         schedule_delayed_work(&h->monitor_ctlr_work,
7459                                 h->heartbeat_sample_interval);
7460         INIT_DELAYED_WORK(&h->rescan_ctlr_work, hpsa_rescan_ctlr_worker);
7461         queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work,
7462                                 h->heartbeat_sample_interval);
7463         return 0;
7464
7465 clean4:
7466         hpsa_free_sg_chain_blocks(h);
7467         hpsa_free_cmd_pool(h);
7468 clean2_and_free_irqs:
7469         hpsa_free_irqs(h);
7470 clean2:
7471 clean1:
7472         if (h->resubmit_wq)
7473                 destroy_workqueue(h->resubmit_wq);
7474         if (h->rescan_ctlr_wq)
7475                 destroy_workqueue(h->rescan_ctlr_wq);
7476         if (h->lockup_detected)
7477                 free_percpu(h->lockup_detected);
7478         kfree(h);
7479         return rc;
7480 }
7481
7482 static void hpsa_flush_cache(struct ctlr_info *h)
7483 {
7484         char *flush_buf;
7485         struct CommandList *c;
7486         int rc;
7487
7488         /* Don't bother trying to flush the cache if locked up */
7489         /* FIXME not necessary if do_simple_cmd does the check */
7490         if (unlikely(lockup_detected(h)))
7491                 return;
7492         flush_buf = kzalloc(4, GFP_KERNEL);
7493         if (!flush_buf)
7494                 return;
7495
7496         c = cmd_alloc(h);
7497         if (!c) {
7498                 dev_warn(&h->pdev->dev, "cmd_alloc returned NULL!\n");
7499                 goto out_of_memory;
7500         }
7501         if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
7502                 RAID_CTLR_LUNID, TYPE_CMD)) {
7503                 goto out;
7504         }
7505         rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
7506                                         PCI_DMA_TODEVICE, NO_TIMEOUT);
7507         if (rc)
7508                 goto out;
7509         if (c->err_info->CommandStatus != 0)
7510 out:
7511                 dev_warn(&h->pdev->dev,
7512                         "error flushing cache on controller\n");
7513         cmd_free(h, c);
7514 out_of_memory:
7515         kfree(flush_buf);
7516 }
7517
7518 static void hpsa_shutdown(struct pci_dev *pdev)
7519 {
7520         struct ctlr_info *h;
7521
7522         h = pci_get_drvdata(pdev);
7523         /* Turn board interrupts off  and send the flush cache command
7524          * sendcmd will turn off interrupt, and send the flush...
7525          * To write all data in the battery backed cache to disks
7526          */
7527         hpsa_flush_cache(h);
7528         h->access.set_intr_mask(h, HPSA_INTR_OFF);
7529         hpsa_free_irqs_and_disable_msix(h);
7530 }
7531
7532 static void hpsa_free_device_info(struct ctlr_info *h)
7533 {
7534         int i;
7535
7536         for (i = 0; i < h->ndevices; i++)
7537                 kfree(h->dev[i]);
7538 }
7539
7540 static void hpsa_remove_one(struct pci_dev *pdev)
7541 {
7542         struct ctlr_info *h;
7543         unsigned long flags;
7544
7545         if (pci_get_drvdata(pdev) == NULL) {
7546                 dev_err(&pdev->dev, "unable to remove device\n");
7547                 return;
7548         }
7549         h = pci_get_drvdata(pdev);
7550
7551         /* Get rid of any controller monitoring work items */
7552         spin_lock_irqsave(&h->lock, flags);
7553         h->remove_in_progress = 1;
7554         spin_unlock_irqrestore(&h->lock, flags);
7555         cancel_delayed_work_sync(&h->monitor_ctlr_work);
7556         cancel_delayed_work_sync(&h->rescan_ctlr_work);
7557         destroy_workqueue(h->rescan_ctlr_wq);
7558         destroy_workqueue(h->resubmit_wq);
7559         hpsa_unregister_scsi(h);        /* unhook from SCSI subsystem */
7560         hpsa_shutdown(pdev);
7561         iounmap(h->vaddr);
7562         iounmap(h->transtable);
7563         iounmap(h->cfgtable);
7564         hpsa_free_device_info(h);
7565         hpsa_free_sg_chain_blocks(h);
7566         pci_free_consistent(h->pdev,
7567                 h->nr_cmds * sizeof(struct CommandList),
7568                 h->cmd_pool, h->cmd_pool_dhandle);
7569         pci_free_consistent(h->pdev,
7570                 h->nr_cmds * sizeof(struct ErrorInfo),
7571                 h->errinfo_pool, h->errinfo_pool_dhandle);
7572         hpsa_free_reply_queues(h);
7573         kfree(h->cmd_pool_bits);
7574         kfree(h->blockFetchTable);
7575         kfree(h->ioaccel1_blockFetchTable);
7576         kfree(h->ioaccel2_blockFetchTable);
7577         kfree(h->hba_inquiry_data);
7578         pci_disable_device(pdev);
7579         pci_release_regions(pdev);
7580         free_percpu(h->lockup_detected);
7581         kfree(h);
7582 }
7583
7584 static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
7585         __attribute__((unused)) pm_message_t state)
7586 {
7587         return -ENOSYS;
7588 }
7589
7590 static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
7591 {
7592         return -ENOSYS;
7593 }
7594
7595 static struct pci_driver hpsa_pci_driver = {
7596         .name = HPSA,
7597         .probe = hpsa_init_one,
7598         .remove = hpsa_remove_one,
7599         .id_table = hpsa_pci_device_id, /* id_table */
7600         .shutdown = hpsa_shutdown,
7601         .suspend = hpsa_suspend,
7602         .resume = hpsa_resume,
7603 };
7604
7605 /* Fill in bucket_map[], given nsgs (the max number of
7606  * scatter gather elements supported) and bucket[],
7607  * which is an array of 8 integers.  The bucket[] array
7608  * contains 8 different DMA transfer sizes (in 16
7609  * byte increments) which the controller uses to fetch
7610  * commands.  This function fills in bucket_map[], which
7611  * maps a given number of scatter gather elements to one of
7612  * the 8 DMA transfer sizes.  The point of it is to allow the
7613  * controller to only do as much DMA as needed to fetch the
7614  * command, with the DMA transfer size encoded in the lower
7615  * bits of the command address.
7616  */
7617 static void  calc_bucket_map(int bucket[], int num_buckets,
7618         int nsgs, int min_blocks, u32 *bucket_map)
7619 {
7620         int i, j, b, size;
7621
7622         /* Note, bucket_map must have nsgs+1 entries. */
7623         for (i = 0; i <= nsgs; i++) {
7624                 /* Compute size of a command with i SG entries */
7625                 size = i + min_blocks;
7626                 b = num_buckets; /* Assume the biggest bucket */
7627                 /* Find the bucket that is just big enough */
7628                 for (j = 0; j < num_buckets; j++) {
7629                         if (bucket[j] >= size) {
7630                                 b = j;
7631                                 break;
7632                         }
7633                 }
7634                 /* for a command with i SG entries, use bucket b. */
7635                 bucket_map[i] = b;
7636         }
7637 }
7638
7639 /* return -ENODEV or other reason on error, 0 on success */
7640 static int hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support)
7641 {
7642         int i;
7643         unsigned long register_value;
7644         unsigned long transMethod = CFGTBL_Trans_Performant |
7645                         (trans_support & CFGTBL_Trans_use_short_tags) |
7646                                 CFGTBL_Trans_enable_directed_msix |
7647                         (trans_support & (CFGTBL_Trans_io_accel1 |
7648                                 CFGTBL_Trans_io_accel2));
7649         struct access_method access = SA5_performant_access;
7650
7651         /* This is a bit complicated.  There are 8 registers on
7652          * the controller which we write to to tell it 8 different
7653          * sizes of commands which there may be.  It's a way of
7654          * reducing the DMA done to fetch each command.  Encoded into
7655          * each command's tag are 3 bits which communicate to the controller
7656          * which of the eight sizes that command fits within.  The size of
7657          * each command depends on how many scatter gather entries there are.
7658          * Each SG entry requires 16 bytes.  The eight registers are programmed
7659          * with the number of 16-byte blocks a command of that size requires.
7660          * The smallest command possible requires 5 such 16 byte blocks.
7661          * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte
7662          * blocks.  Note, this only extends to the SG entries contained
7663          * within the command block, and does not extend to chained blocks
7664          * of SG elements.   bft[] contains the eight values we write to
7665          * the registers.  They are not evenly distributed, but have more
7666          * sizes for small commands, and fewer sizes for larger commands.
7667          */
7668         int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4};
7669 #define MIN_IOACCEL2_BFT_ENTRY 5
7670 #define HPSA_IOACCEL2_HEADER_SZ 4
7671         int bft2[16] = {MIN_IOACCEL2_BFT_ENTRY, 6, 7, 8, 9, 10, 11, 12,
7672                         13, 14, 15, 16, 17, 18, 19,
7673                         HPSA_IOACCEL2_HEADER_SZ + IOACCEL2_MAXSGENTRIES};
7674         BUILD_BUG_ON(ARRAY_SIZE(bft2) != 16);
7675         BUILD_BUG_ON(ARRAY_SIZE(bft) != 8);
7676         BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) >
7677                                  16 * MIN_IOACCEL2_BFT_ENTRY);
7678         BUILD_BUG_ON(sizeof(struct ioaccel2_sg_element) != 16);
7679         BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4);
7680         /*  5 = 1 s/g entry or 4k
7681          *  6 = 2 s/g entry or 8k
7682          *  8 = 4 s/g entry or 16k
7683          * 10 = 6 s/g entry or 24k
7684          */
7685
7686         /* If the controller supports either ioaccel method then
7687          * we can also use the RAID stack submit path that does not
7688          * perform the superfluous readl() after each command submission.
7689          */
7690         if (trans_support & (CFGTBL_Trans_io_accel1 | CFGTBL_Trans_io_accel2))
7691                 access = SA5_performant_access_no_read;
7692
7693         /* Controller spec: zero out this buffer. */
7694         for (i = 0; i < h->nreply_queues; i++)
7695                 memset(h->reply_queue[i].head, 0, h->reply_queue_size);
7696
7697         bft[7] = SG_ENTRIES_IN_CMD + 4;
7698         calc_bucket_map(bft, ARRAY_SIZE(bft),
7699                                 SG_ENTRIES_IN_CMD, 4, h->blockFetchTable);
7700         for (i = 0; i < 8; i++)
7701                 writel(bft[i], &h->transtable->BlockFetch[i]);
7702
7703         /* size of controller ring buffer */
7704         writel(h->max_commands, &h->transtable->RepQSize);
7705         writel(h->nreply_queues, &h->transtable->RepQCount);
7706         writel(0, &h->transtable->RepQCtrAddrLow32);
7707         writel(0, &h->transtable->RepQCtrAddrHigh32);
7708
7709         for (i = 0; i < h->nreply_queues; i++) {
7710                 writel(0, &h->transtable->RepQAddr[i].upper);
7711                 writel(h->reply_queue[i].busaddr,
7712                         &h->transtable->RepQAddr[i].lower);
7713         }
7714
7715         writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
7716         writel(transMethod, &(h->cfgtable->HostWrite.TransportRequest));
7717         /*
7718          * enable outbound interrupt coalescing in accelerator mode;
7719          */
7720         if (trans_support & CFGTBL_Trans_io_accel1) {
7721                 access = SA5_ioaccel_mode1_access;
7722                 writel(10, &h->cfgtable->HostWrite.CoalIntDelay);
7723                 writel(4, &h->cfgtable->HostWrite.CoalIntCount);
7724         } else {
7725                 if (trans_support & CFGTBL_Trans_io_accel2) {
7726                         access = SA5_ioaccel_mode2_access;
7727                         writel(10, &h->cfgtable->HostWrite.CoalIntDelay);
7728                         writel(4, &h->cfgtable->HostWrite.CoalIntCount);
7729                 }
7730         }
7731         writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
7732         if (hpsa_wait_for_mode_change_ack(h)) {
7733                 dev_err(&h->pdev->dev,
7734                         "performant mode problem - doorbell timeout\n");
7735                 return -ENODEV;
7736         }
7737         register_value = readl(&(h->cfgtable->TransportActive));
7738         if (!(register_value & CFGTBL_Trans_Performant)) {
7739                 dev_err(&h->pdev->dev,
7740                         "performant mode problem - transport not active\n");
7741                 return -ENODEV;
7742         }
7743         /* Change the access methods to the performant access methods */
7744         h->access = access;
7745         h->transMethod = transMethod;
7746
7747         if (!((trans_support & CFGTBL_Trans_io_accel1) ||
7748                 (trans_support & CFGTBL_Trans_io_accel2)))
7749                 return 0;
7750
7751         if (trans_support & CFGTBL_Trans_io_accel1) {
7752                 /* Set up I/O accelerator mode */
7753                 for (i = 0; i < h->nreply_queues; i++) {
7754                         writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX);
7755                         h->reply_queue[i].current_entry =
7756                                 readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX);
7757                 }
7758                 bft[7] = h->ioaccel_maxsg + 8;
7759                 calc_bucket_map(bft, ARRAY_SIZE(bft), h->ioaccel_maxsg, 8,
7760                                 h->ioaccel1_blockFetchTable);
7761
7762                 /* initialize all reply queue entries to unused */
7763                 for (i = 0; i < h->nreply_queues; i++)
7764                         memset(h->reply_queue[i].head,
7765                                 (u8) IOACCEL_MODE1_REPLY_UNUSED,
7766                                 h->reply_queue_size);
7767
7768                 /* set all the constant fields in the accelerator command
7769                  * frames once at init time to save CPU cycles later.
7770                  */
7771                 for (i = 0; i < h->nr_cmds; i++) {
7772                         struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[i];
7773
7774                         cp->function = IOACCEL1_FUNCTION_SCSIIO;
7775                         cp->err_info = (u32) (h->errinfo_pool_dhandle +
7776                                         (i * sizeof(struct ErrorInfo)));
7777                         cp->err_info_len = sizeof(struct ErrorInfo);
7778                         cp->sgl_offset = IOACCEL1_SGLOFFSET;
7779                         cp->host_context_flags =
7780                                 cpu_to_le16(IOACCEL1_HCFLAGS_CISS_FORMAT);
7781                         cp->timeout_sec = 0;
7782                         cp->ReplyQueue = 0;
7783                         cp->tag =
7784                                 cpu_to_le64((i << DIRECT_LOOKUP_SHIFT));
7785                         cp->host_addr =
7786                                 cpu_to_le64(h->ioaccel_cmd_pool_dhandle +
7787                                         (i * sizeof(struct io_accel1_cmd)));
7788                 }
7789         } else if (trans_support & CFGTBL_Trans_io_accel2) {
7790                 u64 cfg_offset, cfg_base_addr_index;
7791                 u32 bft2_offset, cfg_base_addr;
7792                 int rc;
7793
7794                 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
7795                         &cfg_base_addr_index, &cfg_offset);
7796                 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) != 64);
7797                 bft2[15] = h->ioaccel_maxsg + HPSA_IOACCEL2_HEADER_SZ;
7798                 calc_bucket_map(bft2, ARRAY_SIZE(bft2), h->ioaccel_maxsg,
7799                                 4, h->ioaccel2_blockFetchTable);
7800                 bft2_offset = readl(&h->cfgtable->io_accel_request_size_offset);
7801                 BUILD_BUG_ON(offsetof(struct CfgTable,
7802                                 io_accel_request_size_offset) != 0xb8);
7803                 h->ioaccel2_bft2_regs =
7804                         remap_pci_mem(pci_resource_start(h->pdev,
7805                                         cfg_base_addr_index) +
7806                                         cfg_offset + bft2_offset,
7807                                         ARRAY_SIZE(bft2) *
7808                                         sizeof(*h->ioaccel2_bft2_regs));
7809                 for (i = 0; i < ARRAY_SIZE(bft2); i++)
7810                         writel(bft2[i], &h->ioaccel2_bft2_regs[i]);
7811         }
7812         writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
7813         if (hpsa_wait_for_mode_change_ack(h)) {
7814                 dev_err(&h->pdev->dev,
7815                         "performant mode problem - enabling ioaccel mode\n");
7816                 return -ENODEV;
7817         }
7818         return 0;
7819 }
7820
7821 /* Allocate ioaccel1 mode command blocks and block fetch table */
7822 static int hpsa_alloc_ioaccel1_cmd_and_bft(struct ctlr_info *h)
7823 {
7824         h->ioaccel_maxsg =
7825                 readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
7826         if (h->ioaccel_maxsg > IOACCEL1_MAXSGENTRIES)
7827                 h->ioaccel_maxsg = IOACCEL1_MAXSGENTRIES;
7828
7829         /* Command structures must be aligned on a 128-byte boundary
7830          * because the 7 lower bits of the address are used by the
7831          * hardware.
7832          */
7833         BUILD_BUG_ON(sizeof(struct io_accel1_cmd) %
7834                         IOACCEL1_COMMANDLIST_ALIGNMENT);
7835         h->ioaccel_cmd_pool =
7836                 pci_alloc_consistent(h->pdev,
7837                         h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
7838                         &(h->ioaccel_cmd_pool_dhandle));
7839
7840         h->ioaccel1_blockFetchTable =
7841                 kmalloc(((h->ioaccel_maxsg + 1) *
7842                                 sizeof(u32)), GFP_KERNEL);
7843
7844         if ((h->ioaccel_cmd_pool == NULL) ||
7845                 (h->ioaccel1_blockFetchTable == NULL))
7846                 goto clean_up;
7847
7848         memset(h->ioaccel_cmd_pool, 0,
7849                 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool));
7850         return 0;
7851
7852 clean_up:
7853         if (h->ioaccel_cmd_pool)
7854                 pci_free_consistent(h->pdev,
7855                         h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
7856                         h->ioaccel_cmd_pool, h->ioaccel_cmd_pool_dhandle);
7857         kfree(h->ioaccel1_blockFetchTable);
7858         return 1;
7859 }
7860
7861 /* Allocate ioaccel2 mode command blocks and block fetch table */
7862 static int hpsa_alloc_ioaccel2_cmd_and_bft(struct ctlr_info *h)
7863 {
7864         /* Allocate ioaccel2 mode command blocks and block fetch table */
7865
7866         h->ioaccel_maxsg =
7867                 readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
7868         if (h->ioaccel_maxsg > IOACCEL2_MAXSGENTRIES)
7869                 h->ioaccel_maxsg = IOACCEL2_MAXSGENTRIES;
7870
7871         BUILD_BUG_ON(sizeof(struct io_accel2_cmd) %
7872                         IOACCEL2_COMMANDLIST_ALIGNMENT);
7873         h->ioaccel2_cmd_pool =
7874                 pci_alloc_consistent(h->pdev,
7875                         h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
7876                         &(h->ioaccel2_cmd_pool_dhandle));
7877
7878         h->ioaccel2_blockFetchTable =
7879                 kmalloc(((h->ioaccel_maxsg + 1) *
7880                                 sizeof(u32)), GFP_KERNEL);
7881
7882         if ((h->ioaccel2_cmd_pool == NULL) ||
7883                 (h->ioaccel2_blockFetchTable == NULL))
7884                 goto clean_up;
7885
7886         memset(h->ioaccel2_cmd_pool, 0,
7887                 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool));
7888         return 0;
7889
7890 clean_up:
7891         if (h->ioaccel2_cmd_pool)
7892                 pci_free_consistent(h->pdev,
7893                         h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
7894                         h->ioaccel2_cmd_pool, h->ioaccel2_cmd_pool_dhandle);
7895         kfree(h->ioaccel2_blockFetchTable);
7896         return 1;
7897 }
7898
7899 static void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
7900 {
7901         u32 trans_support;
7902         unsigned long transMethod = CFGTBL_Trans_Performant |
7903                                         CFGTBL_Trans_use_short_tags;
7904         int i;
7905
7906         if (hpsa_simple_mode)
7907                 return;
7908
7909         trans_support = readl(&(h->cfgtable->TransportSupport));
7910         if (!(trans_support & PERFORMANT_MODE))
7911                 return;
7912
7913         /* Check for I/O accelerator mode support */
7914         if (trans_support & CFGTBL_Trans_io_accel1) {
7915                 transMethod |= CFGTBL_Trans_io_accel1 |
7916                                 CFGTBL_Trans_enable_directed_msix;
7917                 if (hpsa_alloc_ioaccel1_cmd_and_bft(h))
7918                         goto clean_up;
7919         } else {
7920                 if (trans_support & CFGTBL_Trans_io_accel2) {
7921                                 transMethod |= CFGTBL_Trans_io_accel2 |
7922                                 CFGTBL_Trans_enable_directed_msix;
7923                 if (hpsa_alloc_ioaccel2_cmd_and_bft(h))
7924                         goto clean_up;
7925                 }
7926         }
7927
7928         h->nreply_queues = h->msix_vector > 0 ? h->msix_vector : 1;
7929         hpsa_get_max_perf_mode_cmds(h);
7930         /* Performant mode ring buffer and supporting data structures */
7931         h->reply_queue_size = h->max_commands * sizeof(u64);
7932
7933         for (i = 0; i < h->nreply_queues; i++) {
7934                 h->reply_queue[i].head = pci_alloc_consistent(h->pdev,
7935                                                 h->reply_queue_size,
7936                                                 &(h->reply_queue[i].busaddr));
7937                 if (!h->reply_queue[i].head)
7938                         goto clean_up;
7939                 h->reply_queue[i].size = h->max_commands;
7940                 h->reply_queue[i].wraparound = 1;  /* spec: init to 1 */
7941                 h->reply_queue[i].current_entry = 0;
7942         }
7943
7944         /* Need a block fetch table for performant mode */
7945         h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) *
7946                                 sizeof(u32)), GFP_KERNEL);
7947         if (!h->blockFetchTable)
7948                 goto clean_up;
7949
7950         hpsa_enter_performant_mode(h, trans_support);
7951         return;
7952
7953 clean_up:
7954         hpsa_free_reply_queues(h);
7955         kfree(h->blockFetchTable);
7956 }
7957
7958 static int is_accelerated_cmd(struct CommandList *c)
7959 {
7960         return c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_IOACCEL2;
7961 }
7962
7963 static void hpsa_drain_accel_commands(struct ctlr_info *h)
7964 {
7965         struct CommandList *c = NULL;
7966         int i, accel_cmds_out;
7967         int refcount;
7968
7969         do { /* wait for all outstanding ioaccel commands to drain out */
7970                 accel_cmds_out = 0;
7971                 for (i = 0; i < h->nr_cmds; i++) {
7972                         c = h->cmd_pool + i;
7973                         refcount = atomic_inc_return(&c->refcount);
7974                         if (refcount > 1) /* Command is allocated */
7975                                 accel_cmds_out += is_accelerated_cmd(c);
7976                         cmd_free(h, c);
7977                 }
7978                 if (accel_cmds_out <= 0)
7979                         break;
7980                 msleep(100);
7981         } while (1);
7982 }
7983
7984 /*
7985  *  This is it.  Register the PCI driver information for the cards we control
7986  *  the OS will call our registered routines when it finds one of our cards.
7987  */
7988 static int __init hpsa_init(void)
7989 {
7990         return pci_register_driver(&hpsa_pci_driver);
7991 }
7992
7993 static void __exit hpsa_cleanup(void)
7994 {
7995         pci_unregister_driver(&hpsa_pci_driver);
7996 }
7997
7998 static void __attribute__((unused)) verify_offsets(void)
7999 {
8000 #define VERIFY_OFFSET(member, offset) \
8001         BUILD_BUG_ON(offsetof(struct raid_map_data, member) != offset)
8002
8003         VERIFY_OFFSET(structure_size, 0);
8004         VERIFY_OFFSET(volume_blk_size, 4);
8005         VERIFY_OFFSET(volume_blk_cnt, 8);
8006         VERIFY_OFFSET(phys_blk_shift, 16);
8007         VERIFY_OFFSET(parity_rotation_shift, 17);
8008         VERIFY_OFFSET(strip_size, 18);
8009         VERIFY_OFFSET(disk_starting_blk, 20);
8010         VERIFY_OFFSET(disk_blk_cnt, 28);
8011         VERIFY_OFFSET(data_disks_per_row, 36);
8012         VERIFY_OFFSET(metadata_disks_per_row, 38);
8013         VERIFY_OFFSET(row_cnt, 40);
8014         VERIFY_OFFSET(layout_map_count, 42);
8015         VERIFY_OFFSET(flags, 44);
8016         VERIFY_OFFSET(dekindex, 46);
8017         /* VERIFY_OFFSET(reserved, 48 */
8018         VERIFY_OFFSET(data, 64);
8019
8020 #undef VERIFY_OFFSET
8021
8022 #define VERIFY_OFFSET(member, offset) \
8023         BUILD_BUG_ON(offsetof(struct io_accel2_cmd, member) != offset)
8024
8025         VERIFY_OFFSET(IU_type, 0);
8026         VERIFY_OFFSET(direction, 1);
8027         VERIFY_OFFSET(reply_queue, 2);
8028         /* VERIFY_OFFSET(reserved1, 3);  */
8029         VERIFY_OFFSET(scsi_nexus, 4);
8030         VERIFY_OFFSET(Tag, 8);
8031         VERIFY_OFFSET(cdb, 16);
8032         VERIFY_OFFSET(cciss_lun, 32);
8033         VERIFY_OFFSET(data_len, 40);
8034         VERIFY_OFFSET(cmd_priority_task_attr, 44);
8035         VERIFY_OFFSET(sg_count, 45);
8036         /* VERIFY_OFFSET(reserved3 */
8037         VERIFY_OFFSET(err_ptr, 48);
8038         VERIFY_OFFSET(err_len, 56);
8039         /* VERIFY_OFFSET(reserved4  */
8040         VERIFY_OFFSET(sg, 64);
8041
8042 #undef VERIFY_OFFSET
8043
8044 #define VERIFY_OFFSET(member, offset) \
8045         BUILD_BUG_ON(offsetof(struct io_accel1_cmd, member) != offset)
8046
8047         VERIFY_OFFSET(dev_handle, 0x00);
8048         VERIFY_OFFSET(reserved1, 0x02);
8049         VERIFY_OFFSET(function, 0x03);
8050         VERIFY_OFFSET(reserved2, 0x04);
8051         VERIFY_OFFSET(err_info, 0x0C);
8052         VERIFY_OFFSET(reserved3, 0x10);
8053         VERIFY_OFFSET(err_info_len, 0x12);
8054         VERIFY_OFFSET(reserved4, 0x13);
8055         VERIFY_OFFSET(sgl_offset, 0x14);
8056         VERIFY_OFFSET(reserved5, 0x15);
8057         VERIFY_OFFSET(transfer_len, 0x1C);
8058         VERIFY_OFFSET(reserved6, 0x20);
8059         VERIFY_OFFSET(io_flags, 0x24);
8060         VERIFY_OFFSET(reserved7, 0x26);
8061         VERIFY_OFFSET(LUN, 0x34);
8062         VERIFY_OFFSET(control, 0x3C);
8063         VERIFY_OFFSET(CDB, 0x40);
8064         VERIFY_OFFSET(reserved8, 0x50);
8065         VERIFY_OFFSET(host_context_flags, 0x60);
8066         VERIFY_OFFSET(timeout_sec, 0x62);
8067         VERIFY_OFFSET(ReplyQueue, 0x64);
8068         VERIFY_OFFSET(reserved9, 0x65);
8069         VERIFY_OFFSET(tag, 0x68);
8070         VERIFY_OFFSET(host_addr, 0x70);
8071         VERIFY_OFFSET(CISS_LUN, 0x78);
8072         VERIFY_OFFSET(SG, 0x78 + 8);
8073 #undef VERIFY_OFFSET
8074 }
8075
8076 module_init(hpsa_init);
8077 module_exit(hpsa_cleanup);