drivers/scsi/qla2xxx/qla_os.c

   1 /*
   2  * QLogic Fibre Channel HBA Driver
   3  * Copyright (c)  2003-2013 QLogic Corporation
   4  *
   5  * See LICENSE.qla2xxx for copyright and licensing details.
   6  */
   7 #include "qla_def.h"
   8
   9 #include <linux/moduleparam.h>
  10 #include <linux/vmalloc.h>
  11 #include <linux/delay.h>
  12 #include <linux/kthread.h>
  13 #include <linux/mutex.h>
  14 #include <linux/kobject.h>
  15 #include <linux/slab.h>
  16 #include <scsi/scsi_tcq.h>
  17 #include <scsi/scsicam.h>
  18 #include <scsi/scsi_transport.h>
  19 #include <scsi/scsi_transport_fc.h>
  20
  21 #include "qla_target.h"
  22
  23 /*
  24  * Driver version
  25  */
  26 char qla2x00_version_str[40];
  27
  28 static int apidev_major;
  29
  30 /*
  31  * SRB allocation cache
  32  */
  33 static struct kmem_cache *srb_cachep;
  34
  35 /*
  36  * CT6 CTX allocation cache
  37  */
  38 static struct kmem_cache *ctx_cachep;
  39 /*
  40  * error level for logging
  41  */
  42 int ql_errlev = ql_log_all;
  43
  44 static int ql2xenableclass2;
  45 module_param(ql2xenableclass2, int, S_IRUGO|S_IRUSR);
  46 MODULE_PARM_DESC(ql2xenableclass2,
  47                 "Specify if Class 2 operations are supported from the very "
  48                 "beginning. Default is 0 - class 2 not supported.");
  49
  50
  51 int ql2xlogintimeout = 20;
  52 module_param(ql2xlogintimeout, int, S_IRUGO);
  53 MODULE_PARM_DESC(ql2xlogintimeout,
  54                 "Login timeout value in seconds.");
  55
  56 int qlport_down_retry;
  57 module_param(qlport_down_retry, int, S_IRUGO);
  58 MODULE_PARM_DESC(qlport_down_retry,
  59                 "Maximum number of command retries to a port that returns "
  60                 "a PORT-DOWN status.");
  61
  62 int ql2xplogiabsentdevice;
  63 module_param(ql2xplogiabsentdevice, int, S_IRUGO|S_IWUSR);
  64 MODULE_PARM_DESC(ql2xplogiabsentdevice,
  65                 "Option to enable PLOGI to devices that are not present after "
  66                 "a Fabric scan.  This is needed for several broken switches. "
  67                 "Default is 0 - no PLOGI. 1 - perfom PLOGI.");
  68
  69 int ql2xloginretrycount = 0;
  70 module_param(ql2xloginretrycount, int, S_IRUGO);
  71 MODULE_PARM_DESC(ql2xloginretrycount,
  72                 "Specify an alternate value for the NVRAM login retry count.");
  73
  74 int ql2xallocfwdump = 1;
  75 module_param(ql2xallocfwdump, int, S_IRUGO);
  76 MODULE_PARM_DESC(ql2xallocfwdump,
  77                 "Option to enable allocation of memory for a firmware dump "
  78                 "during HBA initialization.  Memory allocation requirements "
  79                 "vary by ISP type.  Default is 1 - allocate memory.");
  80
  81 int ql2xextended_error_logging;
  82 module_param(ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
  83 MODULE_PARM_DESC(ql2xextended_error_logging,
  84                 "Option to enable extended error logging,\n"
  85                 "\t\tDefault is 0 - no logging.  0x40000000 - Module Init & Probe.\n"
  86                 "\t\t0x20000000 - Mailbox Cmnds. 0x10000000 - Device Discovery.\n"
  87                 "\t\t0x08000000 - IO tracing.    0x04000000 - DPC Thread.\n"
  88                 "\t\t0x02000000 - Async events.  0x01000000 - Timer routines.\n"
  89                 "\t\t0x00800000 - User space.    0x00400000 - Task Management.\n"
  90                 "\t\t0x00200000 - AER/EEH.       0x00100000 - Multi Q.\n"
  91                 "\t\t0x00080000 - P3P Specific.  0x00040000 - Virtual Port.\n"
  92                 "\t\t0x00020000 - Buffer Dump.   0x00010000 - Misc.\n"
  93                 "\t\t0x00008000 - Verbose.       0x00004000 - Target.\n"
  94                 "\t\t0x00002000 - Target Mgmt.   0x00001000 - Target TMF.\n"
  95                 "\t\t0x7fffffff - For enabling all logs, can be too many logs.\n"
  96                 "\t\t0x1e400000 - Preferred value for capturing essential "
  97                 "debug information (equivalent to old "
  98                 "ql2xextended_error_logging=1).\n"
  99                 "\t\tDo LOGICAL OR of the value to enable more than one level");
 100
 101 int ql2xshiftctondsd = 6;
 102 module_param(ql2xshiftctondsd, int, S_IRUGO);
 103 MODULE_PARM_DESC(ql2xshiftctondsd,
 104                 "Set to control shifting of command type processing "
 105                 "based on total number of SG elements.");
 106
 107 int ql2xfdmienable=1;
 108 module_param(ql2xfdmienable, int, S_IRUGO);
 109 MODULE_PARM_DESC(ql2xfdmienable,
 110                 "Enables FDMI registrations. "
 111                 "0 - no FDMI. Default is 1 - perform FDMI.");
 112
 113 #define MAX_Q_DEPTH     32
 114 static int ql2xmaxqdepth = MAX_Q_DEPTH;
 115 module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR);
 116 MODULE_PARM_DESC(ql2xmaxqdepth,
 117                 "Maximum queue depth to set for each LUN. "
 118                 "Default is 32.");
 119
 120 int ql2xenabledif = 2;
 121 module_param(ql2xenabledif, int, S_IRUGO);
 122 MODULE_PARM_DESC(ql2xenabledif,
 123                 " Enable T10-CRC-DIF "
 124                 " Default is 0 - No DIF Support. 1 - Enable it"
 125                 ", 2 - Enable DIF for all types, except Type 0.");
 126
 127 int ql2xenablehba_err_chk = 2;
 128 module_param(ql2xenablehba_err_chk, int, S_IRUGO|S_IWUSR);
 129 MODULE_PARM_DESC(ql2xenablehba_err_chk,
 130                 " Enable T10-CRC-DIF Error isolation by HBA:\n"
 131                 " Default is 1.\n"
 132                 "  0 -- Error isolation disabled\n"
 133                 "  1 -- Error isolation enabled only for DIX Type 0\n"
 134                 "  2 -- Error isolation enabled for all Types\n");
 135
 136 int ql2xiidmaenable=1;
 137 module_param(ql2xiidmaenable, int, S_IRUGO);
 138 MODULE_PARM_DESC(ql2xiidmaenable,
 139                 "Enables iIDMA settings "
 140                 "Default is 1 - perform iIDMA. 0 - no iIDMA.");
 141
 142 int ql2xmaxqueues = 1;
 143 module_param(ql2xmaxqueues, int, S_IRUGO);
 144 MODULE_PARM_DESC(ql2xmaxqueues,
 145                 "Enables MQ settings "
 146                 "Default is 1 for single queue. Set it to number "
 147                 "of queues in MQ mode.");
 148
 149 int ql2xmultique_tag;
 150 module_param(ql2xmultique_tag, int, S_IRUGO);
 151 MODULE_PARM_DESC(ql2xmultique_tag,
 152                 "Enables CPU affinity settings for the driver "
 153                 "Default is 0 for no affinity of request and response IO. "
 154                 "Set it to 1 to turn on the cpu affinity.");
 155
 156 int ql2xfwloadbin;
 157 module_param(ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
 158 MODULE_PARM_DESC(ql2xfwloadbin,
 159                 "Option to specify location from which to load ISP firmware:.\n"
 160                 " 2 -- load firmware via the request_firmware() (hotplug).\n"
 161                 "      interface.\n"
 162                 " 1 -- load firmware from flash.\n"
 163                 " 0 -- use default semantics.\n");
 164
 165 int ql2xetsenable;
 166 module_param(ql2xetsenable, int, S_IRUGO);
 167 MODULE_PARM_DESC(ql2xetsenable,
 168                 "Enables firmware ETS burst."
 169                 "Default is 0 - skip ETS enablement.");
 170
 171 int ql2xdbwr = 1;
 172 module_param(ql2xdbwr, int, S_IRUGO|S_IWUSR);
 173 MODULE_PARM_DESC(ql2xdbwr,
 174                 "Option to specify scheme for request queue posting.\n"
 175                 " 0 -- Regular doorbell.\n"
 176                 " 1 -- CAMRAM doorbell (faster).\n");
 177
 178 int ql2xtargetreset = 1;
 179 module_param(ql2xtargetreset, int, S_IRUGO);
 180 MODULE_PARM_DESC(ql2xtargetreset,
 181                  "Enable target reset."
 182                  "Default is 1 - use hw defaults.");
 183
 184 int ql2xgffidenable;
 185 module_param(ql2xgffidenable, int, S_IRUGO);
 186 MODULE_PARM_DESC(ql2xgffidenable,
 187                 "Enables GFF_ID checks of port type. "
 188                 "Default is 0 - Do not use GFF_ID information.");
 189
 190 int ql2xasynctmfenable;
 191 module_param(ql2xasynctmfenable, int, S_IRUGO);
 192 MODULE_PARM_DESC(ql2xasynctmfenable,
 193                 "Enables issue of TM IOCBs asynchronously via IOCB mechanism"
 194                 "Default is 0 - Issue TM IOCBs via mailbox mechanism.");
 195
 196 int ql2xdontresethba;
 197 module_param(ql2xdontresethba, int, S_IRUGO|S_IWUSR);
 198 MODULE_PARM_DESC(ql2xdontresethba,
 199                 "Option to specify reset behaviour.\n"
 200                 " 0 (Default) -- Reset on failure.\n"
 201                 " 1 -- Do not reset on failure.\n");
 202
 203 uint ql2xmaxlun = MAX_LUNS;
 204 module_param(ql2xmaxlun, uint, S_IRUGO);
 205 MODULE_PARM_DESC(ql2xmaxlun,
 206                 "Defines the maximum LU number to register with the SCSI "
 207                 "midlayer. Default is 65535.");
 208
 209 int ql2xmdcapmask = 0x1F;
 210 module_param(ql2xmdcapmask, int, S_IRUGO);
 211 MODULE_PARM_DESC(ql2xmdcapmask,
 212                 "Set the Minidump driver capture mask level. "
 213                 "Default is 0x1F - Can be set to 0x3, 0x7, 0xF, 0x1F, 0x7F.");
 214
 215 int ql2xmdenable = 1;
 216 module_param(ql2xmdenable, int, S_IRUGO);
 217 MODULE_PARM_DESC(ql2xmdenable,
 218                 "Enable/disable MiniDump. "
 219                 "0 - MiniDump disabled. "
 220                 "1 (Default) - MiniDump enabled.");
 221
 222 /*
 223  * SCSI host template entry points
 224  */
 225 static int qla2xxx_slave_configure(struct scsi_device * device);
 226 static int qla2xxx_slave_alloc(struct scsi_device *);
 227 static int qla2xxx_scan_finished(struct Scsi_Host *, unsigned long time);
 228 static void qla2xxx_scan_start(struct Scsi_Host *);
 229 static void qla2xxx_slave_destroy(struct scsi_device *);
 230 static int qla2xxx_queuecommand(struct Scsi_Host *h, struct scsi_cmnd *cmd);
 231 static int qla2xxx_eh_abort(struct scsi_cmnd *);
 232 static int qla2xxx_eh_device_reset(struct scsi_cmnd *);
 233 static int qla2xxx_eh_target_reset(struct scsi_cmnd *);
 234 static int qla2xxx_eh_bus_reset(struct scsi_cmnd *);
 235 static int qla2xxx_eh_host_reset(struct scsi_cmnd *);
 236
 237 static int qla2x00_change_queue_depth(struct scsi_device *, int, int);
 238 static int qla2x00_change_queue_type(struct scsi_device *, int);
 239 static void qla2x00_free_device(scsi_qla_host_t *);
 240
 241 struct scsi_host_template qla2xxx_driver_template = {
 242         .module                 = THIS_MODULE,
 243         .name                   = QLA2XXX_DRIVER_NAME,
 244         .queuecommand           = qla2xxx_queuecommand,
 245
 246         .eh_abort_handler       = qla2xxx_eh_abort,
 247         .eh_device_reset_handler = qla2xxx_eh_device_reset,
 248         .eh_target_reset_handler = qla2xxx_eh_target_reset,
 249         .eh_bus_reset_handler   = qla2xxx_eh_bus_reset,
 250         .eh_host_reset_handler  = qla2xxx_eh_host_reset,
 251
 252         .slave_configure        = qla2xxx_slave_configure,
 253
 254         .slave_alloc            = qla2xxx_slave_alloc,
 255         .slave_destroy          = qla2xxx_slave_destroy,
 256         .scan_finished          = qla2xxx_scan_finished,
 257         .scan_start             = qla2xxx_scan_start,
 258         .change_queue_depth     = qla2x00_change_queue_depth,
 259         .change_queue_type      = qla2x00_change_queue_type,
 260         .this_id                = -1,
 261         .cmd_per_lun            = 3,
 262         .use_clustering         = ENABLE_CLUSTERING,
 263         .sg_tablesize           = SG_ALL,
 264
 265         .max_sectors            = 0xFFFF,
 266         .shost_attrs            = qla2x00_host_attrs,
 267
 268         .supported_mode         = MODE_INITIATOR,
 269 };
 270
 271 static struct scsi_transport_template *qla2xxx_transport_template = NULL;
 272 struct scsi_transport_template *qla2xxx_transport_vport_template = NULL;
 273
 274 /* TODO Convert to inlines
 275  *
 276  * Timer routines
 277  */
 278
 279 __inline__ void
 280 qla2x00_start_timer(scsi_qla_host_t *vha, void *func, unsigned long interval)
 281 {
 282         init_timer(&vha->timer);
 283         vha->timer.expires = jiffies + interval * HZ;
 284         vha->timer.data = (unsigned long)vha;
 285         vha->timer.function = (void (*)(unsigned long))func;
 286         add_timer(&vha->timer);
 287         vha->timer_active = 1;
 288 }
 289
 290 static inline void
 291 qla2x00_restart_timer(scsi_qla_host_t *vha, unsigned long interval)
 292 {
 293         /* Currently used for 82XX only. */
 294         if (vha->device_flags & DFLG_DEV_FAILED) {
 295                 ql_dbg(ql_dbg_timer, vha, 0x600d,
 296                     "Device in a failed state, returning.\n");
 297                 return;
 298         }
 299
 300         mod_timer(&vha->timer, jiffies + interval * HZ);
 301 }
 302
 303 static __inline__ void
 304 qla2x00_stop_timer(scsi_qla_host_t *vha)
 305 {
 306         del_timer_sync(&vha->timer);
 307         vha->timer_active = 0;
 308 }
 309
 310 static int qla2x00_do_dpc(void *data);
 311
 312 static void qla2x00_rst_aen(scsi_qla_host_t *);
 313
 314 static int qla2x00_mem_alloc(struct qla_hw_data *, uint16_t, uint16_t,
 315         struct req_que **, struct rsp_que **);
 316 static void qla2x00_free_fw_dump(struct qla_hw_data *);
 317 static void qla2x00_mem_free(struct qla_hw_data *);
 318
 319 /* -------------------------------------------------------------------------- */
 320 static int qla2x00_alloc_queues(struct qla_hw_data *ha, struct req_que *req,
 321                                 struct rsp_que *rsp)
 322 {
 323         scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
 324         ha->req_q_map = kzalloc(sizeof(struct req_que *) * ha->max_req_queues,
 325                                 GFP_KERNEL);
 326         if (!ha->req_q_map) {
 327                 ql_log(ql_log_fatal, vha, 0x003b,
 328                     "Unable to allocate memory for request queue ptrs.\n");
 329                 goto fail_req_map;
 330         }
 331
 332         ha->rsp_q_map = kzalloc(sizeof(struct rsp_que *) * ha->max_rsp_queues,
 333                                 GFP_KERNEL);
 334         if (!ha->rsp_q_map) {
 335                 ql_log(ql_log_fatal, vha, 0x003c,
 336                     "Unable to allocate memory for response queue ptrs.\n");
 337                 goto fail_rsp_map;
 338         }
 339         /*
 340          * Make sure we record at least the request and response queue zero in
 341          * case we need to free them if part of the probe fails.
 342          */
 343         ha->rsp_q_map[0] = rsp;
 344         ha->req_q_map[0] = req;
 345         set_bit(0, ha->rsp_qid_map);
 346         set_bit(0, ha->req_qid_map);
 347         return 1;
 348
 349 fail_rsp_map:
 350         kfree(ha->req_q_map);
 351         ha->req_q_map = NULL;
 352 fail_req_map:
 353         return -ENOMEM;
 354 }
 355
 356 static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req)
 357 {
 358         if (IS_QLAFX00(ha)) {
 359                 if (req && req->ring_fx00)
 360                         dma_free_coherent(&ha->pdev->dev,
 361                             (req->length_fx00 + 1) * sizeof(request_t),
 362                             req->ring_fx00, req->dma_fx00);
 363         } else if (req && req->ring)
 364                 dma_free_coherent(&ha->pdev->dev,
 365                 (req->length + 1) * sizeof(request_t),
 366                 req->ring, req->dma);
 367
 368         if (req)
 369                 kfree(req->outstanding_cmds);
 370
 371         kfree(req);
 372         req = NULL;
 373 }
 374
 375 static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp)
 376 {
 377         if (IS_QLAFX00(ha)) {
 378                 if (rsp && rsp->ring)
 379                         dma_free_coherent(&ha->pdev->dev,
 380                             (rsp->length_fx00 + 1) * sizeof(request_t),
 381                             rsp->ring_fx00, rsp->dma_fx00);
 382         } else if (rsp && rsp->ring) {
 383                 dma_free_coherent(&ha->pdev->dev,
 384                 (rsp->length + 1) * sizeof(response_t),
 385                 rsp->ring, rsp->dma);
 386         }
 387         kfree(rsp);
 388         rsp = NULL;
 389 }
 390
 391 static void qla2x00_free_queues(struct qla_hw_data *ha)
 392 {
 393         struct req_que *req;
 394         struct rsp_que *rsp;
 395         int cnt;
 396
 397         for (cnt = 0; cnt < ha->max_req_queues; cnt++) {
 398                 req = ha->req_q_map[cnt];
 399                 qla2x00_free_req_que(ha, req);
 400         }
 401         kfree(ha->req_q_map);
 402         ha->req_q_map = NULL;
 403
 404         for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) {
 405                 rsp = ha->rsp_q_map[cnt];
 406                 qla2x00_free_rsp_que(ha, rsp);
 407         }
 408         kfree(ha->rsp_q_map);
 409         ha->rsp_q_map = NULL;
 410 }
 411
 412 static int qla25xx_setup_mode(struct scsi_qla_host *vha)
 413 {
 414         uint16_t options = 0;
 415         int ques, req, ret;
 416         struct qla_hw_data *ha = vha->hw;
 417
 418         if (!(ha->fw_attributes & BIT_6)) {
 419                 ql_log(ql_log_warn, vha, 0x00d8,
 420                     "Firmware is not multi-queue capable.\n");
 421                 goto fail;
 422         }
 423         if (ql2xmultique_tag) {
 424                 /* create a request queue for IO */
 425                 options |= BIT_7;
 426                 req = qla25xx_create_req_que(ha, options, 0, 0, -1,
 427                         QLA_DEFAULT_QUE_QOS);
 428                 if (!req) {
 429                         ql_log(ql_log_warn, vha, 0x00e0,
 430                             "Failed to create request queue.\n");
 431                         goto fail;
 432                 }
 433                 ha->wq = alloc_workqueue("qla2xxx_wq", WQ_MEM_RECLAIM, 1);
 434                 vha->req = ha->req_q_map[req];
 435                 options |= BIT_1;
 436                 for (ques = 1; ques < ha->max_rsp_queues; ques++) {
 437                         ret = qla25xx_create_rsp_que(ha, options, 0, 0, req);
 438                         if (!ret) {
 439                                 ql_log(ql_log_warn, vha, 0x00e8,
 440                                     "Failed to create response queue.\n");
 441                                 goto fail2;
 442                         }
 443                 }
 444                 ha->flags.cpu_affinity_enabled = 1;
 445                 ql_dbg(ql_dbg_multiq, vha, 0xc007,
 446                     "CPU affinity mode enalbed, "
 447                     "no. of response queues:%d no. of request queues:%d.\n",
 448                     ha->max_rsp_queues, ha->max_req_queues);
 449                 ql_dbg(ql_dbg_init, vha, 0x00e9,
 450                     "CPU affinity mode enalbed, "
 451                     "no. of response queues:%d no. of request queues:%d.\n",
 452                     ha->max_rsp_queues, ha->max_req_queues);
 453         }
 454         return 0;
 455 fail2:
 456         qla25xx_delete_queues(vha);
 457         destroy_workqueue(ha->wq);
 458         ha->wq = NULL;
 459         vha->req = ha->req_q_map[0];
 460 fail:
 461         ha->mqenable = 0;
 462         kfree(ha->req_q_map);
 463         kfree(ha->rsp_q_map);
 464         ha->max_req_queues = ha->max_rsp_queues = 1;
 465         return 1;
 466 }
 467
 468 static char *
 469 qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str)
 470 {
 471         struct qla_hw_data *ha = vha->hw;
 472         static char *pci_bus_modes[] = {
 473                 "33", "66", "100", "133",
 474         };
 475         uint16_t pci_bus;
 476
 477         strcpy(str, "PCI");
 478         pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9;
 479         if (pci_bus) {
 480                 strcat(str, "-X (");
 481                 strcat(str, pci_bus_modes[pci_bus]);
 482         } else {
 483                 pci_bus = (ha->pci_attr & BIT_8) >> 8;
 484                 strcat(str, " (");
 485                 strcat(str, pci_bus_modes[pci_bus]);
 486         }
 487         strcat(str, " MHz)");
 488
 489         return (str);
 490 }
 491
 492 static char *
 493 qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str)
 494 {
 495         static char *pci_bus_modes[] = { "33", "66", "100", "133", };
 496         struct qla_hw_data *ha = vha->hw;
 497         uint32_t pci_bus;
 498
 499         if (pci_is_pcie(ha->pdev)) {
 500                 char lwstr[6];
 501                 uint32_t lstat, lspeed, lwidth;
 502
 503                 pcie_capability_read_dword(ha->pdev, PCI_EXP_LNKCAP, &lstat);
 504                 lspeed = lstat & PCI_EXP_LNKCAP_SLS;
 505                 lwidth = (lstat & PCI_EXP_LNKCAP_MLW) >> 4;
 506
 507                 strcpy(str, "PCIe (");
 508                 switch (lspeed) {
 509                 case 1:
 510                         strcat(str, "2.5GT/s ");
 511                         break;
 512                 case 2:
 513                         strcat(str, "5.0GT/s ");
 514                         break;
 515                 case 3:
 516                         strcat(str, "8.0GT/s ");
 517                         break;
 518                 default:
 519                         strcat(str, "<unknown> ");
 520                         break;
 521                 }
 522                 snprintf(lwstr, sizeof(lwstr), "x%d)", lwidth);
 523                 strcat(str, lwstr);
 524
 525                 return str;
 526         }
 527
 528         strcpy(str, "PCI");
 529         pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8;
 530         if (pci_bus == 0 || pci_bus == 8) {
 531                 strcat(str, " (");
 532                 strcat(str, pci_bus_modes[pci_bus >> 3]);
 533         } else {
 534                 strcat(str, "-X ");
 535                 if (pci_bus & BIT_2)
 536                         strcat(str, "Mode 2");
 537                 else
 538                         strcat(str, "Mode 1");
 539                 strcat(str, " (");
 540                 strcat(str, pci_bus_modes[pci_bus & ~BIT_2]);
 541         }
 542         strcat(str, " MHz)");
 543
 544         return str;
 545 }
 546
 547 static char *
 548 qla2x00_fw_version_str(struct scsi_qla_host *vha, char *str)
 549 {
 550         char un_str[10];
 551         struct qla_hw_data *ha = vha->hw;
 552
 553         sprintf(str, "%d.%02d.%02d ", ha->fw_major_version,
 554             ha->fw_minor_version,
 555             ha->fw_subminor_version);
 556
 557         if (ha->fw_attributes & BIT_9) {
 558                 strcat(str, "FLX");
 559                 return (str);
 560         }
 561
 562         switch (ha->fw_attributes & 0xFF) {
 563         case 0x7:
 564                 strcat(str, "EF");
 565                 break;
 566         case 0x17:
 567                 strcat(str, "TP");
 568                 break;
 569         case 0x37:
 570                 strcat(str, "IP");
 571                 break;
 572         case 0x77:
 573                 strcat(str, "VI");
 574                 break;
 575         default:
 576                 sprintf(un_str, "(%x)", ha->fw_attributes);
 577                 strcat(str, un_str);
 578                 break;
 579         }
 580         if (ha->fw_attributes & 0x100)
 581                 strcat(str, "X");
 582
 583         return (str);
 584 }
 585
 586 static char *
 587 qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str)
 588 {
 589         struct qla_hw_data *ha = vha->hw;
 590
 591         sprintf(str, "%d.%02d.%02d (%x)", ha->fw_major_version,
 592             ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes);
 593         return str;
 594 }
 595
 596 void
 597 qla2x00_sp_free_dma(void *vha, void *ptr)
 598 {
 599         srb_t *sp = (srb_t *)ptr;
 600         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 601         struct qla_hw_data *ha = sp->fcport->vha->hw;
 602         void *ctx = GET_CMD_CTX_SP(sp);
 603
 604         if (sp->flags & SRB_DMA_VALID) {
 605                 scsi_dma_unmap(cmd);
 606                 sp->flags &= ~SRB_DMA_VALID;
 607         }
 608
 609         if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
 610                 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
 611                     scsi_prot_sg_count(cmd), cmd->sc_data_direction);
 612                 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
 613         }
 614
 615         if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
 616                 /* List assured to be having elements */
 617                 qla2x00_clean_dsd_pool(ha, sp);
 618                 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
 619         }
 620
 621         if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
 622                 dma_pool_free(ha->dl_dma_pool, ctx,
 623                     ((struct crc_context *)ctx)->crc_ctx_dma);
 624                 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
 625         }
 626
 627         if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
 628                 struct ct6_dsd *ctx1 = (struct ct6_dsd *)ctx;
 629
 630                 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
 631                         ctx1->fcp_cmnd_dma);
 632                 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
 633                 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
 634                 ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
 635                 mempool_free(ctx1, ha->ctx_mempool);
 636                 ctx1 = NULL;
 637         }
 638
 639         CMD_SP(cmd) = NULL;
 640         qla2x00_rel_sp(sp->fcport->vha, sp);
 641 }
 642
 643 static void
 644 qla2x00_sp_compl(void *data, void *ptr, int res)
 645 {
 646         struct qla_hw_data *ha = (struct qla_hw_data *)data;
 647         srb_t *sp = (srb_t *)ptr;
 648         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 649
 650         cmd->result = res;
 651
 652         if (atomic_read(&sp->ref_count) == 0) {
 653                 ql_dbg(ql_dbg_io, sp->fcport->vha, 0x3015,
 654                     "SP reference-count to ZERO -- sp=%p cmd=%p.\n",
 655                     sp, GET_CMD_SP(sp));
 656                 if (ql2xextended_error_logging & ql_dbg_io)
 657                         BUG();
 658                 return;
 659         }
 660         if (!atomic_dec_and_test(&sp->ref_count))
 661                 return;
 662
 663         qla2x00_sp_free_dma(ha, sp);
 664         cmd->scsi_done(cmd);
 665 }
 666
 667 /* If we are SP1 here, we need to still take and release the host_lock as SP1
 668  * does not have the changes necessary to avoid taking host->host_lock.
 669  */
 670 static int
 671 qla2xxx_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
 672 {
 673         scsi_qla_host_t *vha = shost_priv(host);
 674         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
 675         struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
 676         struct qla_hw_data *ha = vha->hw;
 677         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
 678         srb_t *sp;
 679         int rval;
 680
 681         if (ha->flags.eeh_busy) {
 682                 if (ha->flags.pci_channel_io_perm_failure) {
 683                         ql_dbg(ql_dbg_aer, vha, 0x9010,
 684                             "PCI Channel IO permanent failure, exiting "
 685                             "cmd=%p.\n", cmd);
 686                         cmd->result = DID_NO_CONNECT << 16;
 687                 } else {
 688                         ql_dbg(ql_dbg_aer, vha, 0x9011,
 689                             "EEH_Busy, Requeuing the cmd=%p.\n", cmd);
 690                         cmd->result = DID_REQUEUE << 16;
 691                 }
 692                 goto qc24_fail_command;
 693         }
 694
 695         rval = fc_remote_port_chkready(rport);
 696         if (rval) {
 697                 cmd->result = rval;
 698                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3003,
 699                     "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
 700                     cmd, rval);
 701                 goto qc24_fail_command;
 702         }
 703
 704         if (!vha->flags.difdix_supported &&
 705                 scsi_get_prot_op(cmd) != SCSI_PROT_NORMAL) {
 706                         ql_dbg(ql_dbg_io, vha, 0x3004,
 707                             "DIF Cap not reg, fail DIF capable cmd's:%p.\n",
 708                             cmd);
 709                         cmd->result = DID_NO_CONNECT << 16;
 710                         goto qc24_fail_command;
 711         }
 712
 713         if (!fcport) {
 714                 cmd->result = DID_NO_CONNECT << 16;
 715                 goto qc24_fail_command;
 716         }
 717
 718         if (atomic_read(&fcport->state) != FCS_ONLINE) {
 719                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
 720                         atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
 721                         ql_dbg(ql_dbg_io, vha, 0x3005,
 722                             "Returning DNC, fcport_state=%d loop_state=%d.\n",
 723                             atomic_read(&fcport->state),
 724                             atomic_read(&base_vha->loop_state));
 725                         cmd->result = DID_NO_CONNECT << 16;
 726                         goto qc24_fail_command;
 727                 }
 728                 goto qc24_target_busy;
 729         }
 730
 731         sp = qla2x00_get_sp(vha, fcport, GFP_ATOMIC);
 732         if (!sp)
 733                 goto qc24_host_busy;
 734
 735         sp->u.scmd.cmd = cmd;
 736         sp->type = SRB_SCSI_CMD;
 737         atomic_set(&sp->ref_count, 1);
 738         CMD_SP(cmd) = (void *)sp;
 739         sp->free = qla2x00_sp_free_dma;
 740         sp->done = qla2x00_sp_compl;
 741
 742         rval = ha->isp_ops->start_scsi(sp);
 743         if (rval != QLA_SUCCESS) {
 744                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3013,
 745                     "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
 746                 goto qc24_host_busy_free_sp;
 747         }
 748
 749         return 0;
 750
 751 qc24_host_busy_free_sp:
 752         qla2x00_sp_free_dma(ha, sp);
 753
 754 qc24_host_busy:
 755         return SCSI_MLQUEUE_HOST_BUSY;
 756
 757 qc24_target_busy:
 758         return SCSI_MLQUEUE_TARGET_BUSY;
 759
 760 qc24_fail_command:
 761         cmd->scsi_done(cmd);
 762
 763         return 0;
 764 }
 765
 766 /*
 767  * qla2x00_eh_wait_on_command
 768  *    Waits for the command to be returned by the Firmware for some
 769  *    max time.
 770  *
 771  * Input:
 772  *    cmd = Scsi Command to wait on.
 773  *
 774  * Return:
 775  *    Not Found : 0
 776  *    Found : 1
 777  */
 778 static int
 779 qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd)
 780 {
 781 #define ABORT_POLLING_PERIOD    1000
 782 #define ABORT_WAIT_ITER         ((10 * 1000) / (ABORT_POLLING_PERIOD))
 783         unsigned long wait_iter = ABORT_WAIT_ITER;
 784         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
 785         struct qla_hw_data *ha = vha->hw;
 786         int ret = QLA_SUCCESS;
 787
 788         if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) {
 789                 ql_dbg(ql_dbg_taskm, vha, 0x8005,
 790                     "Return:eh_wait.\n");
 791                 return ret;
 792         }
 793
 794         while (CMD_SP(cmd) && wait_iter--) {
 795                 msleep(ABORT_POLLING_PERIOD);
 796         }
 797         if (CMD_SP(cmd))
 798                 ret = QLA_FUNCTION_FAILED;
 799
 800         return ret;
 801 }
 802
 803 /*
 804  * qla2x00_wait_for_hba_online
 805  *    Wait till the HBA is online after going through
 806  *    <= MAX_RETRIES_OF_ISP_ABORT  or
 807  *    finally HBA is disabled ie marked offline
 808  *
 809  * Input:
 810  *     ha - pointer to host adapter structure
 811  *
 812  * Note:
 813  *    Does context switching-Release SPIN_LOCK
 814  *    (if any) before calling this routine.
 815  *
 816  * Return:
 817  *    Success (Adapter is online) : 0
 818  *    Failed  (Adapter is offline/disabled) : 1
 819  */
 820 int
 821 qla2x00_wait_for_hba_online(scsi_qla_host_t *vha)
 822 {
 823         int             return_status;
 824         unsigned long   wait_online;
 825         struct qla_hw_data *ha = vha->hw;
 826         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
 827
 828         wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
 829         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
 830             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
 831             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
 832             ha->dpc_active) && time_before(jiffies, wait_online)) {
 833
 834                 msleep(1000);
 835         }
 836         if (base_vha->flags.online)
 837                 return_status = QLA_SUCCESS;
 838         else
 839                 return_status = QLA_FUNCTION_FAILED;
 840
 841         return (return_status);
 842 }
 843
 844 /*
 845  * qla2x00_wait_for_reset_ready
 846  *    Wait till the HBA is online after going through
 847  *    <= MAX_RETRIES_OF_ISP_ABORT  or
 848  *    finally HBA is disabled ie marked offline or flash
 849  *    operations are in progress.
 850  *
 851  * Input:
 852  *     ha - pointer to host adapter structure
 853  *
 854  * Note:
 855  *    Does context switching-Release SPIN_LOCK
 856  *    (if any) before calling this routine.
 857  *
 858  * Return:
 859  *    Success (Adapter is online/no flash ops) : 0
 860  *    Failed  (Adapter is offline/disabled/flash ops in progress) : 1
 861  */
 862 static int
 863 qla2x00_wait_for_reset_ready(scsi_qla_host_t *vha)
 864 {
 865         int             return_status;
 866         unsigned long   wait_online;
 867         struct qla_hw_data *ha = vha->hw;
 868         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
 869
 870         wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
 871         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
 872             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
 873             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
 874             ha->optrom_state != QLA_SWAITING ||
 875             ha->dpc_active) && time_before(jiffies, wait_online))
 876                 msleep(1000);
 877
 878         if (base_vha->flags.online &&  ha->optrom_state == QLA_SWAITING)
 879                 return_status = QLA_SUCCESS;
 880         else
 881                 return_status = QLA_FUNCTION_FAILED;
 882
 883         ql_dbg(ql_dbg_taskm, vha, 0x8019,
 884             "%s return status=%d.\n", __func__, return_status);
 885
 886         return return_status;
 887 }
 888
 889 int
 890 qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha)
 891 {
 892         int             return_status;
 893         unsigned long   wait_reset;
 894         struct qla_hw_data *ha = vha->hw;
 895         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
 896
 897         wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ);
 898         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
 899             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
 900             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
 901             ha->dpc_active) && time_before(jiffies, wait_reset)) {
 902
 903                 msleep(1000);
 904
 905                 if (!test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
 906                     ha->flags.chip_reset_done)
 907                         break;
 908         }
 909         if (ha->flags.chip_reset_done)
 910                 return_status = QLA_SUCCESS;
 911         else
 912                 return_status = QLA_FUNCTION_FAILED;
 913
 914         return return_status;
 915 }
 916
 917 static void
 918 sp_get(struct srb *sp)
 919 {
 920         atomic_inc(&sp->ref_count);
 921 }
 922
 923 /**************************************************************************
 924 * qla2xxx_eh_abort
 925 *
 926 * Description:
 927 *    The abort function will abort the specified command.
 928 *
 929 * Input:
 930 *    cmd = Linux SCSI command packet to be aborted.
 931 *
 932 * Returns:
 933 *    Either SUCCESS or FAILED.
 934 *
 935 * Note:
 936 *    Only return FAILED if command not returned by firmware.
 937 **************************************************************************/
 938 static int
 939 qla2xxx_eh_abort(struct scsi_cmnd *cmd)
 940 {
 941         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
 942         srb_t *sp;
 943         int ret;
 944         unsigned int id, lun;
 945         unsigned long flags;
 946         int wait = 0;
 947         struct qla_hw_data *ha = vha->hw;
 948
 949         if (!CMD_SP(cmd))
 950                 return SUCCESS;
 951
 952         ret = fc_block_scsi_eh(cmd);
 953         if (ret != 0)
 954                 return ret;
 955         ret = SUCCESS;
 956
 957         id = cmd->device->id;
 958         lun = cmd->device->lun;
 959
 960         spin_lock_irqsave(&ha->hardware_lock, flags);
 961         sp = (srb_t *) CMD_SP(cmd);
 962         if (!sp) {
 963                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
 964                 return SUCCESS;
 965         }
 966
 967         ql_dbg(ql_dbg_taskm, vha, 0x8002,
 968             "Aborting from RISC nexus=%ld:%d:%d sp=%p cmd=%p\n",
 969             vha->host_no, id, lun, sp, cmd);
 970
 971         /* Get a reference to the sp and drop the lock.*/
 972         sp_get(sp);
 973
 974         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 975         if (ha->isp_ops->abort_command(sp)) {
 976                 ret = FAILED;
 977                 ql_dbg(ql_dbg_taskm, vha, 0x8003,
 978                     "Abort command mbx failed cmd=%p.\n", cmd);
 979         } else {
 980                 ql_dbg(ql_dbg_taskm, vha, 0x8004,
 981                     "Abort command mbx success cmd=%p.\n", cmd);
 982                 wait = 1;
 983         }
 984
 985         spin_lock_irqsave(&ha->hardware_lock, flags);
 986         sp->done(ha, sp, 0);
 987         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 988
 989         /* Did the command return during mailbox execution? */
 990         if (ret == FAILED && !CMD_SP(cmd))
 991                 ret = SUCCESS;
 992
 993         /* Wait for the command to be returned. */
 994         if (wait) {
 995                 if (qla2x00_eh_wait_on_command(cmd) != QLA_SUCCESS) {
 996                         ql_log(ql_log_warn, vha, 0x8006,
 997                             "Abort handler timed out cmd=%p.\n", cmd);
 998                         ret = FAILED;
 999                 }
1000         }
1001
1002         ql_log(ql_log_info, vha, 0x801c,
1003             "Abort command issued nexus=%ld:%d:%d --  %d %x.\n",
1004             vha->host_no, id, lun, wait, ret);
1005
1006         return ret;
1007 }
1008
1009 int
1010 qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t,
1011         unsigned int l, enum nexus_wait_type type)
1012 {
1013         int cnt, match, status;
1014         unsigned long flags;
1015         struct qla_hw_data *ha = vha->hw;
1016         struct req_que *req;
1017         srb_t *sp;
1018         struct scsi_cmnd *cmd;
1019
1020         status = QLA_SUCCESS;
1021
1022         spin_lock_irqsave(&ha->hardware_lock, flags);
1023         req = vha->req;
1024         for (cnt = 1; status == QLA_SUCCESS &&
1025                 cnt < req->num_outstanding_cmds; cnt++) {
1026                 sp = req->outstanding_cmds[cnt];
1027                 if (!sp)
1028                         continue;
1029                 if (sp->type != SRB_SCSI_CMD)
1030                         continue;
1031                 if (vha->vp_idx != sp->fcport->vha->vp_idx)
1032                         continue;
1033                 match = 0;
1034                 cmd = GET_CMD_SP(sp);
1035                 switch (type) {
1036                 case WAIT_HOST:
1037                         match = 1;
1038                         break;
1039                 case WAIT_TARGET:
1040                         match = cmd->device->id == t;
1041                         break;
1042                 case WAIT_LUN:
1043                         match = (cmd->device->id == t &&
1044                                 cmd->device->lun == l);
1045                         break;
1046                 }
1047                 if (!match)
1048                         continue;
1049
1050                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1051                 status = qla2x00_eh_wait_on_command(cmd);
1052                 spin_lock_irqsave(&ha->hardware_lock, flags);
1053         }
1054         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1055
1056         return status;
1057 }
1058
1059 static char *reset_errors[] = {
1060         "HBA not online",
1061         "HBA not ready",
1062         "Task management failed",
1063         "Waiting for command completions",
1064 };
1065
1066 static int
1067 __qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type,
1068     struct scsi_cmnd *cmd, int (*do_reset)(struct fc_port *, unsigned int, int))
1069 {
1070         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1071         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1072         int err;
1073
1074         if (!fcport) {
1075                 return FAILED;
1076         }
1077
1078         err = fc_block_scsi_eh(cmd);
1079         if (err != 0)
1080                 return err;
1081
1082         ql_log(ql_log_info, vha, 0x8009,
1083             "%s RESET ISSUED nexus=%ld:%d:%d cmd=%p.\n", name, vha->host_no,
1084             cmd->device->id, cmd->device->lun, cmd);
1085
1086         err = 0;
1087         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1088                 ql_log(ql_log_warn, vha, 0x800a,
1089                     "Wait for hba online failed for cmd=%p.\n", cmd);
1090                 goto eh_reset_failed;
1091         }
1092         err = 2;
1093         if (do_reset(fcport, cmd->device->lun, cmd->request->cpu + 1)
1094                 != QLA_SUCCESS) {
1095                 ql_log(ql_log_warn, vha, 0x800c,
1096                     "do_reset failed for cmd=%p.\n", cmd);
1097                 goto eh_reset_failed;
1098         }
1099         err = 3;
1100         if (qla2x00_eh_wait_for_pending_commands(vha, cmd->device->id,
1101             cmd->device->lun, type) != QLA_SUCCESS) {
1102                 ql_log(ql_log_warn, vha, 0x800d,
1103                     "wait for pending cmds failed for cmd=%p.\n", cmd);
1104                 goto eh_reset_failed;
1105         }
1106
1107         ql_log(ql_log_info, vha, 0x800e,
1108             "%s RESET SUCCEEDED nexus:%ld:%d:%d cmd=%p.\n", name,
1109             vha->host_no, cmd->device->id, cmd->device->lun, cmd);
1110
1111         return SUCCESS;
1112
1113 eh_reset_failed:
1114         ql_log(ql_log_info, vha, 0x800f,
1115             "%s RESET FAILED: %s nexus=%ld:%d:%d cmd=%p.\n", name,
1116             reset_errors[err], vha->host_no, cmd->device->id, cmd->device->lun,
1117             cmd);
1118         return FAILED;
1119 }
1120
1121 static int
1122 qla2xxx_eh_device_reset(struct scsi_cmnd *cmd)
1123 {
1124         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1125         struct qla_hw_data *ha = vha->hw;
1126
1127         return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN, cmd,
1128             ha->isp_ops->lun_reset);
1129 }
1130
1131 static int
1132 qla2xxx_eh_target_reset(struct scsi_cmnd *cmd)
1133 {
1134         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1135         struct qla_hw_data *ha = vha->hw;
1136
1137         return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET, cmd,
1138             ha->isp_ops->target_reset);
1139 }
1140
1141 /**************************************************************************
1142 * qla2xxx_eh_bus_reset
1143 *
1144 * Description:
1145 *    The bus reset function will reset the bus and abort any executing
1146 *    commands.
1147 *
1148 * Input:
1149 *    cmd = Linux SCSI command packet of the command that cause the
1150 *          bus reset.
1151 *
1152 * Returns:
1153 *    SUCCESS/FAILURE (defined as macro in scsi.h).
1154 *
1155 **************************************************************************/
1156 static int
1157 qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd)
1158 {
1159         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1160         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1161         int ret = FAILED;
1162         unsigned int id, lun;
1163
1164         id = cmd->device->id;
1165         lun = cmd->device->lun;
1166
1167         if (!fcport) {
1168                 return ret;
1169         }
1170
1171         ret = fc_block_scsi_eh(cmd);
1172         if (ret != 0)
1173                 return ret;
1174         ret = FAILED;
1175
1176         ql_log(ql_log_info, vha, 0x8012,
1177             "BUS RESET ISSUED nexus=%ld:%d:%d.\n", vha->host_no, id, lun);
1178
1179         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1180                 ql_log(ql_log_fatal, vha, 0x8013,
1181                     "Wait for hba online failed board disabled.\n");
1182                 goto eh_bus_reset_done;
1183         }
1184
1185         if (qla2x00_loop_reset(vha) == QLA_SUCCESS)
1186                 ret = SUCCESS;
1187
1188         if (ret == FAILED)
1189                 goto eh_bus_reset_done;
1190
1191         /* Flush outstanding commands. */
1192         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) !=
1193             QLA_SUCCESS) {
1194                 ql_log(ql_log_warn, vha, 0x8014,
1195                     "Wait for pending commands failed.\n");
1196                 ret = FAILED;
1197         }
1198
1199 eh_bus_reset_done:
1200         ql_log(ql_log_warn, vha, 0x802b,
1201             "BUS RESET %s nexus=%ld:%d:%d.\n",
1202             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1203
1204         return ret;
1205 }
1206
1207 /**************************************************************************
1208 * qla2xxx_eh_host_reset
1209 *
1210 * Description:
1211 *    The reset function will reset the Adapter.
1212 *
1213 * Input:
1214 *      cmd = Linux SCSI command packet of the command that cause the
1215 *            adapter reset.
1216 *
1217 * Returns:
1218 *      Either SUCCESS or FAILED.
1219 *
1220 * Note:
1221 **************************************************************************/
1222 static int
1223 qla2xxx_eh_host_reset(struct scsi_cmnd *cmd)
1224 {
1225         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1226         struct qla_hw_data *ha = vha->hw;
1227         int ret = FAILED;
1228         unsigned int id, lun;
1229         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1230
1231         id = cmd->device->id;
1232         lun = cmd->device->lun;
1233
1234         ql_log(ql_log_info, vha, 0x8018,
1235             "ADAPTER RESET ISSUED nexus=%ld:%d:%d.\n", vha->host_no, id, lun);
1236
1237         if (qla2x00_wait_for_reset_ready(vha) != QLA_SUCCESS)
1238                 goto eh_host_reset_lock;
1239
1240         if (vha != base_vha) {
1241                 if (qla2x00_vp_abort_isp(vha))
1242                         goto eh_host_reset_lock;
1243         } else {
1244                 if (IS_P3P_TYPE(vha->hw)) {
1245                         if (!qla82xx_fcoe_ctx_reset(vha)) {
1246                                 /* Ctx reset success */
1247                                 ret = SUCCESS;
1248                                 goto eh_host_reset_lock;
1249                         }
1250                         /* fall thru if ctx reset failed */
1251                 }
1252                 if (ha->wq)
1253                         flush_workqueue(ha->wq);
1254
1255                 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1256                 if (ha->isp_ops->abort_isp(base_vha)) {
1257                         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1258                         /* failed. schedule dpc to try */
1259                         set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
1260
1261                         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1262                                 ql_log(ql_log_warn, vha, 0x802a,
1263                                     "wait for hba online failed.\n");
1264                                 goto eh_host_reset_lock;
1265                         }
1266                 }
1267                 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1268         }
1269
1270         /* Waiting for command to be returned to OS.*/
1271         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) ==
1272                 QLA_SUCCESS)
1273                 ret = SUCCESS;
1274
1275 eh_host_reset_lock:
1276         ql_log(ql_log_info, vha, 0x8017,
1277             "ADAPTER RESET %s nexus=%ld:%d:%d.\n",
1278             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1279
1280         return ret;
1281 }
1282
1283 /*
1284 * qla2x00_loop_reset
1285 *      Issue loop reset.
1286 *
1287 * Input:
1288 *      ha = adapter block pointer.
1289 *
1290 * Returns:
1291 *      0 = success
1292 */
1293 int
1294 qla2x00_loop_reset(scsi_qla_host_t *vha)
1295 {
1296         int ret;
1297         struct fc_port *fcport;
1298         struct qla_hw_data *ha = vha->hw;
1299
1300         if (IS_QLAFX00(ha)) {
1301                 return qlafx00_loop_reset(vha);
1302         }
1303
1304         if (ql2xtargetreset == 1 && ha->flags.enable_target_reset) {
1305                 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1306                         if (fcport->port_type != FCT_TARGET)
1307                                 continue;
1308
1309                         ret = ha->isp_ops->target_reset(fcport, 0, 0);
1310                         if (ret != QLA_SUCCESS) {
1311                                 ql_dbg(ql_dbg_taskm, vha, 0x802c,
1312                                     "Bus Reset failed: Reset=%d "
1313                                     "d_id=%x.\n", ret, fcport->d_id.b24);
1314                         }
1315                 }
1316         }
1317
1318
1319         if (ha->flags.enable_lip_full_login && !IS_CNA_CAPABLE(ha)) {
1320                 atomic_set(&vha->loop_state, LOOP_DOWN);
1321                 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1322                 qla2x00_mark_all_devices_lost(vha, 0);
1323                 ret = qla2x00_full_login_lip(vha);
1324                 if (ret != QLA_SUCCESS) {
1325                         ql_dbg(ql_dbg_taskm, vha, 0x802d,
1326                             "full_login_lip=%d.\n", ret);
1327                 }
1328         }
1329
1330         if (ha->flags.enable_lip_reset) {
1331                 ret = qla2x00_lip_reset(vha);
1332                 if (ret != QLA_SUCCESS)
1333                         ql_dbg(ql_dbg_taskm, vha, 0x802e,
1334                             "lip_reset failed (%d).\n", ret);
1335         }
1336
1337         /* Issue marker command only when we are going to start the I/O */
1338         vha->marker_needed = 1;
1339
1340         return QLA_SUCCESS;
1341 }
1342
1343 void
1344 qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
1345 {
1346         int que, cnt;
1347         unsigned long flags;
1348         srb_t *sp;
1349         struct qla_hw_data *ha = vha->hw;
1350         struct req_que *req;
1351
1352         spin_lock_irqsave(&ha->hardware_lock, flags);
1353         for (que = 0; que < ha->max_req_queues; que++) {
1354                 req = ha->req_q_map[que];
1355                 if (!req)
1356                         continue;
1357                 if (!req->outstanding_cmds)
1358                         continue;
1359                 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) {
1360                         sp = req->outstanding_cmds[cnt];
1361                         if (sp) {
1362                                 req->outstanding_cmds[cnt] = NULL;
1363                                 sp->done(vha, sp, res);
1364                         }
1365                 }
1366         }
1367         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1368 }
1369
1370 static int
1371 qla2xxx_slave_alloc(struct scsi_device *sdev)
1372 {
1373         struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
1374
1375         if (!rport || fc_remote_port_chkready(rport))
1376                 return -ENXIO;
1377
1378         sdev->hostdata = *(fc_port_t **)rport->dd_data;
1379
1380         return 0;
1381 }
1382
1383 static int
1384 qla2xxx_slave_configure(struct scsi_device *sdev)
1385 {
1386         scsi_qla_host_t *vha = shost_priv(sdev->host);
1387         struct req_que *req = vha->req;
1388
1389         if (IS_T10_PI_CAPABLE(vha->hw))
1390                 blk_queue_update_dma_alignment(sdev->request_queue, 0x7);
1391
1392         if (sdev->tagged_supported)
1393                 scsi_activate_tcq(sdev, req->max_q_depth);
1394         else
1395                 scsi_deactivate_tcq(sdev, req->max_q_depth);
1396         return 0;
1397 }
1398
1399 static void
1400 qla2xxx_slave_destroy(struct scsi_device *sdev)
1401 {
1402         sdev->hostdata = NULL;
1403 }
1404
1405 static void qla2x00_handle_queue_full(struct scsi_device *sdev, int qdepth)
1406 {
1407         fc_port_t *fcport = (struct fc_port *) sdev->hostdata;
1408
1409         if (!scsi_track_queue_full(sdev, qdepth))
1410                 return;
1411
1412         ql_dbg(ql_dbg_io, fcport->vha, 0x3029,
1413             "Queue depth adjusted-down to %d for nexus=%ld:%d:%d.\n",
1414             sdev->queue_depth, fcport->vha->host_no, sdev->id, sdev->lun);
1415 }
1416
1417 static void qla2x00_adjust_sdev_qdepth_up(struct scsi_device *sdev, int qdepth)
1418 {
1419         fc_port_t *fcport = sdev->hostdata;
1420         struct scsi_qla_host *vha = fcport->vha;
1421         struct req_que *req = NULL;
1422
1423         req = vha->req;
1424         if (!req)
1425                 return;
1426
1427         if (req->max_q_depth <= sdev->queue_depth || req->max_q_depth < qdepth)
1428                 return;
1429
1430         if (sdev->ordered_tags)
1431                 scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG, qdepth);
1432         else
1433                 scsi_adjust_queue_depth(sdev, MSG_SIMPLE_TAG, qdepth);
1434
1435         ql_dbg(ql_dbg_io, vha, 0x302a,
1436             "Queue depth adjusted-up to %d for nexus=%ld:%d:%d.\n",
1437             sdev->queue_depth, fcport->vha->host_no, sdev->id, sdev->lun);
1438 }
1439
1440 static int
1441 qla2x00_change_queue_depth(struct scsi_device *sdev, int qdepth, int reason)
1442 {
1443         switch (reason) {
1444         case SCSI_QDEPTH_DEFAULT:
1445                 scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
1446                 break;
1447         case SCSI_QDEPTH_QFULL:
1448                 qla2x00_handle_queue_full(sdev, qdepth);
1449                 break;
1450         case SCSI_QDEPTH_RAMP_UP:
1451                 qla2x00_adjust_sdev_qdepth_up(sdev, qdepth);
1452                 break;
1453         default:
1454                 return -EOPNOTSUPP;
1455         }
1456
1457         return sdev->queue_depth;
1458 }
1459
1460 static int
1461 qla2x00_change_queue_type(struct scsi_device *sdev, int tag_type)
1462 {
1463         if (sdev->tagged_supported) {
1464                 scsi_set_tag_type(sdev, tag_type);
1465                 if (tag_type)
1466                         scsi_activate_tcq(sdev, sdev->queue_depth);
1467                 else
1468                         scsi_deactivate_tcq(sdev, sdev->queue_depth);
1469         } else
1470                 tag_type = 0;
1471
1472         return tag_type;
1473 }
1474
1475 /**
1476  * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
1477  * @ha: HA context
1478  *
1479  * At exit, the @ha's flags.enable_64bit_addressing set to indicated
1480  * supported addressing method.
1481  */
1482 static void
1483 qla2x00_config_dma_addressing(struct qla_hw_data *ha)
1484 {
1485         /* Assume a 32bit DMA mask. */
1486         ha->flags.enable_64bit_addressing = 0;
1487
1488         if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
1489                 /* Any upper-dword bits set? */
1490                 if (MSD(dma_get_required_mask(&ha->pdev->dev)) &&
1491                     !pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(64))) {
1492                         /* Ok, a 64bit DMA mask is applicable. */
1493                         ha->flags.enable_64bit_addressing = 1;
1494                         ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64;
1495                         ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64;
1496                         return;
1497                 }
1498         }
1499
1500         dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
1501         pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(32));
1502 }
1503
1504 static void
1505 qla2x00_enable_intrs(struct qla_hw_data *ha)
1506 {
1507         unsigned long flags = 0;
1508         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1509
1510         spin_lock_irqsave(&ha->hardware_lock, flags);
1511         ha->interrupts_on = 1;
1512         /* enable risc and host interrupts */
1513         WRT_REG_WORD(&reg->ictrl, ICR_EN_INT | ICR_EN_RISC);
1514         RD_REG_WORD(&reg->ictrl);
1515         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1516
1517 }
1518
1519 static void
1520 qla2x00_disable_intrs(struct qla_hw_data *ha)
1521 {
1522         unsigned long flags = 0;
1523         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1524
1525         spin_lock_irqsave(&ha->hardware_lock, flags);
1526         ha->interrupts_on = 0;
1527         /* disable risc and host interrupts */
1528         WRT_REG_WORD(&reg->ictrl, 0);
1529         RD_REG_WORD(&reg->ictrl);
1530         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1531 }
1532
1533 static void
1534 qla24xx_enable_intrs(struct qla_hw_data *ha)
1535 {
1536         unsigned long flags = 0;
1537         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1538
1539         spin_lock_irqsave(&ha->hardware_lock, flags);
1540         ha->interrupts_on = 1;
1541         WRT_REG_DWORD(&reg->ictrl, ICRX_EN_RISC_INT);
1542         RD_REG_DWORD(&reg->ictrl);
1543         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1544 }
1545
1546 static void
1547 qla24xx_disable_intrs(struct qla_hw_data *ha)
1548 {
1549         unsigned long flags = 0;
1550         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1551
1552         if (IS_NOPOLLING_TYPE(ha))
1553                 return;
1554         spin_lock_irqsave(&ha->hardware_lock, flags);
1555         ha->interrupts_on = 0;
1556         WRT_REG_DWORD(&reg->ictrl, 0);
1557         RD_REG_DWORD(&reg->ictrl);
1558         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1559 }
1560
1561 static int
1562 qla2x00_iospace_config(struct qla_hw_data *ha)
1563 {
1564         resource_size_t pio;
1565         uint16_t msix;
1566         int cpus;
1567
1568         if (pci_request_selected_regions(ha->pdev, ha->bars,
1569             QLA2XXX_DRIVER_NAME)) {
1570                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0011,
1571                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1572                     pci_name(ha->pdev));
1573                 goto iospace_error_exit;
1574         }
1575         if (!(ha->bars & 1))
1576                 goto skip_pio;
1577
1578         /* We only need PIO for Flash operations on ISP2312 v2 chips. */
1579         pio = pci_resource_start(ha->pdev, 0);
1580         if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) {
1581                 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1582                         ql_log_pci(ql_log_warn, ha->pdev, 0x0012,
1583                             "Invalid pci I/O region size (%s).\n",
1584                             pci_name(ha->pdev));
1585                         pio = 0;
1586                 }
1587         } else {
1588                 ql_log_pci(ql_log_warn, ha->pdev, 0x0013,
1589                     "Region #0 no a PIO resource (%s).\n",
1590                     pci_name(ha->pdev));
1591                 pio = 0;
1592         }
1593         ha->pio_address = pio;
1594         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0014,
1595             "PIO address=%llu.\n",
1596             (unsigned long long)ha->pio_address);
1597
1598 skip_pio:
1599         /* Use MMIO operations for all accesses. */
1600         if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) {
1601                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0015,
1602                     "Region #1 not an MMIO resource (%s), aborting.\n",
1603                     pci_name(ha->pdev));
1604                 goto iospace_error_exit;
1605         }
1606         if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) {
1607                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0016,
1608                     "Invalid PCI mem region size (%s), aborting.\n",
1609                     pci_name(ha->pdev));
1610                 goto iospace_error_exit;
1611         }
1612
1613         ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN);
1614         if (!ha->iobase) {
1615                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0017,
1616                     "Cannot remap MMIO (%s), aborting.\n",
1617                     pci_name(ha->pdev));
1618                 goto iospace_error_exit;
1619         }
1620
1621         /* Determine queue resources */
1622         ha->max_req_queues = ha->max_rsp_queues = 1;
1623         if ((ql2xmaxqueues <= 1 && !ql2xmultique_tag) ||
1624                 (ql2xmaxqueues > 1 && ql2xmultique_tag) ||
1625                 (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)))
1626                 goto mqiobase_exit;
1627
1628         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3),
1629                         pci_resource_len(ha->pdev, 3));
1630         if (ha->mqiobase) {
1631                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0018,
1632                     "MQIO Base=%p.\n", ha->mqiobase);
1633                 /* Read MSIX vector size of the board */
1634                 pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix);
1635                 ha->msix_count = msix;
1636                 /* Max queues are bounded by available msix vectors */
1637                 /* queue 0 uses two msix vectors */
1638                 if (ql2xmultique_tag) {
1639                         cpus = num_online_cpus();
1640                         ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ?
1641                                 (cpus + 1) : (ha->msix_count - 1);
1642                         ha->max_req_queues = 2;
1643                 } else if (ql2xmaxqueues > 1) {
1644                         ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ?
1645                             QLA_MQ_SIZE : ql2xmaxqueues;
1646                         ql_dbg_pci(ql_dbg_multiq, ha->pdev, 0xc008,
1647                             "QoS mode set, max no of request queues:%d.\n",
1648                             ha->max_req_queues);
1649                         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0019,
1650                             "QoS mode set, max no of request queues:%d.\n",
1651                             ha->max_req_queues);
1652                 }
1653                 ql_log_pci(ql_log_info, ha->pdev, 0x001a,
1654                     "MSI-X vector count: %d.\n", msix);
1655         } else
1656                 ql_log_pci(ql_log_info, ha->pdev, 0x001b,
1657                     "BAR 3 not enabled.\n");
1658
1659 mqiobase_exit:
1660         ha->msix_count = ha->max_rsp_queues + 1;
1661         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x001c,
1662             "MSIX Count:%d.\n", ha->msix_count);
1663         return (0);
1664
1665 iospace_error_exit:
1666         return (-ENOMEM);
1667 }
1668
1669
1670 static int
1671 qla83xx_iospace_config(struct qla_hw_data *ha)
1672 {
1673         uint16_t msix;
1674         int cpus;
1675
1676         if (pci_request_selected_regions(ha->pdev, ha->bars,
1677             QLA2XXX_DRIVER_NAME)) {
1678                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0117,
1679                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1680                     pci_name(ha->pdev));
1681
1682                 goto iospace_error_exit;
1683         }
1684
1685         /* Use MMIO operations for all accesses. */
1686         if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) {
1687                 ql_log_pci(ql_log_warn, ha->pdev, 0x0118,
1688                     "Invalid pci I/O region size (%s).\n",
1689                     pci_name(ha->pdev));
1690                 goto iospace_error_exit;
1691         }
1692         if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1693                 ql_log_pci(ql_log_warn, ha->pdev, 0x0119,
1694                     "Invalid PCI mem region size (%s), aborting\n",
1695                         pci_name(ha->pdev));
1696                 goto iospace_error_exit;
1697         }
1698
1699         ha->iobase = ioremap(pci_resource_start(ha->pdev, 0), MIN_IOBASE_LEN);
1700         if (!ha->iobase) {
1701                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011a,
1702                     "Cannot remap MMIO (%s), aborting.\n",
1703                     pci_name(ha->pdev));
1704                 goto iospace_error_exit;
1705         }
1706
1707         /* 64bit PCI BAR - BAR2 will correspoond to region 4 */
1708         /* 83XX 26XX always use MQ type access for queues
1709          * - mbar 2, a.k.a region 4 */
1710         ha->max_req_queues = ha->max_rsp_queues = 1;
1711         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 4),
1712                         pci_resource_len(ha->pdev, 4));
1713
1714         if (!ha->mqiobase) {
1715                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011d,
1716                     "BAR2/region4 not enabled\n");
1717                 goto mqiobase_exit;
1718         }
1719
1720         ha->msixbase = ioremap(pci_resource_start(ha->pdev, 2),
1721                         pci_resource_len(ha->pdev, 2));
1722         if (ha->msixbase) {
1723                 /* Read MSIX vector size of the board */
1724                 pci_read_config_word(ha->pdev,
1725                     QLA_83XX_PCI_MSIX_CONTROL, &msix);
1726                 ha->msix_count = msix;
1727                 /* Max queues are bounded by available msix vectors */
1728                 /* queue 0 uses two msix vectors */
1729                 if (ql2xmultique_tag) {
1730                         cpus = num_online_cpus();
1731                         ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ?
1732                                 (cpus + 1) : (ha->msix_count - 1);
1733                         ha->max_req_queues = 2;
1734                 } else if (ql2xmaxqueues > 1) {
1735                         ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ?
1736                                                 QLA_MQ_SIZE : ql2xmaxqueues;
1737                         ql_dbg_pci(ql_dbg_multiq, ha->pdev, 0xc00c,
1738                             "QoS mode set, max no of request queues:%d.\n",
1739                             ha->max_req_queues);
1740                         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011b,
1741                             "QoS mode set, max no of request queues:%d.\n",
1742                             ha->max_req_queues);
1743                 }
1744                 ql_log_pci(ql_log_info, ha->pdev, 0x011c,
1745                     "MSI-X vector count: %d.\n", msix);
1746         } else
1747                 ql_log_pci(ql_log_info, ha->pdev, 0x011e,
1748                     "BAR 1 not enabled.\n");
1749
1750 mqiobase_exit:
1751         ha->msix_count = ha->max_rsp_queues + 1;
1752
1753         qlt_83xx_iospace_config(ha);
1754
1755         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011f,
1756             "MSIX Count:%d.\n", ha->msix_count);
1757         return 0;
1758
1759 iospace_error_exit:
1760         return -ENOMEM;
1761 }
1762
1763 static struct isp_operations qla2100_isp_ops = {
1764         .pci_config             = qla2100_pci_config,
1765         .reset_chip             = qla2x00_reset_chip,
1766         .chip_diag              = qla2x00_chip_diag,
1767         .config_rings           = qla2x00_config_rings,
1768         .reset_adapter          = qla2x00_reset_adapter,
1769         .nvram_config           = qla2x00_nvram_config,
1770         .update_fw_options      = qla2x00_update_fw_options,
1771         .load_risc              = qla2x00_load_risc,
1772         .pci_info_str           = qla2x00_pci_info_str,
1773         .fw_version_str         = qla2x00_fw_version_str,
1774         .intr_handler           = qla2100_intr_handler,
1775         .enable_intrs           = qla2x00_enable_intrs,
1776         .disable_intrs          = qla2x00_disable_intrs,
1777         .abort_command          = qla2x00_abort_command,
1778         .target_reset           = qla2x00_abort_target,
1779         .lun_reset              = qla2x00_lun_reset,
1780         .fabric_login           = qla2x00_login_fabric,
1781         .fabric_logout          = qla2x00_fabric_logout,
1782         .calc_req_entries       = qla2x00_calc_iocbs_32,
1783         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
1784         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
1785         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
1786         .read_nvram             = qla2x00_read_nvram_data,
1787         .write_nvram            = qla2x00_write_nvram_data,
1788         .fw_dump                = qla2100_fw_dump,
1789         .beacon_on              = NULL,
1790         .beacon_off             = NULL,
1791         .beacon_blink           = NULL,
1792         .read_optrom            = qla2x00_read_optrom_data,
1793         .write_optrom           = qla2x00_write_optrom_data,
1794         .get_flash_version      = qla2x00_get_flash_version,
1795         .start_scsi             = qla2x00_start_scsi,
1796         .abort_isp              = qla2x00_abort_isp,
1797         .iospace_config         = qla2x00_iospace_config,
1798         .initialize_adapter     = qla2x00_initialize_adapter,
1799 };
1800
1801 static struct isp_operations qla2300_isp_ops = {
1802         .pci_config             = qla2300_pci_config,
1803         .reset_chip             = qla2x00_reset_chip,
1804         .chip_diag              = qla2x00_chip_diag,
1805         .config_rings           = qla2x00_config_rings,
1806         .reset_adapter          = qla2x00_reset_adapter,
1807         .nvram_config           = qla2x00_nvram_config,
1808         .update_fw_options      = qla2x00_update_fw_options,
1809         .load_risc              = qla2x00_load_risc,
1810         .pci_info_str           = qla2x00_pci_info_str,
1811         .fw_version_str         = qla2x00_fw_version_str,
1812         .intr_handler           = qla2300_intr_handler,
1813         .enable_intrs           = qla2x00_enable_intrs,
1814         .disable_intrs          = qla2x00_disable_intrs,
1815         .abort_command          = qla2x00_abort_command,
1816         .target_reset           = qla2x00_abort_target,
1817         .lun_reset              = qla2x00_lun_reset,
1818         .fabric_login           = qla2x00_login_fabric,
1819         .fabric_logout          = qla2x00_fabric_logout,
1820         .calc_req_entries       = qla2x00_calc_iocbs_32,
1821         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
1822         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
1823         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
1824         .read_nvram             = qla2x00_read_nvram_data,
1825         .write_nvram            = qla2x00_write_nvram_data,
1826         .fw_dump                = qla2300_fw_dump,
1827         .beacon_on              = qla2x00_beacon_on,
1828         .beacon_off             = qla2x00_beacon_off,
1829         .beacon_blink           = qla2x00_beacon_blink,
1830         .read_optrom            = qla2x00_read_optrom_data,
1831         .write_optrom           = qla2x00_write_optrom_data,
1832         .get_flash_version      = qla2x00_get_flash_version,
1833         .start_scsi             = qla2x00_start_scsi,
1834         .abort_isp              = qla2x00_abort_isp,
1835         .iospace_config         = qla2x00_iospace_config,
1836         .initialize_adapter     = qla2x00_initialize_adapter,
1837 };
1838
1839 static struct isp_operations qla24xx_isp_ops = {
1840         .pci_config             = qla24xx_pci_config,
1841         .reset_chip             = qla24xx_reset_chip,
1842         .chip_diag              = qla24xx_chip_diag,
1843         .config_rings           = qla24xx_config_rings,
1844         .reset_adapter          = qla24xx_reset_adapter,
1845         .nvram_config           = qla24xx_nvram_config,
1846         .update_fw_options      = qla24xx_update_fw_options,
1847         .load_risc              = qla24xx_load_risc,
1848         .pci_info_str           = qla24xx_pci_info_str,
1849         .fw_version_str         = qla24xx_fw_version_str,
1850         .intr_handler           = qla24xx_intr_handler,
1851         .enable_intrs           = qla24xx_enable_intrs,
1852         .disable_intrs          = qla24xx_disable_intrs,
1853         .abort_command          = qla24xx_abort_command,
1854         .target_reset           = qla24xx_abort_target,
1855         .lun_reset              = qla24xx_lun_reset,
1856         .fabric_login           = qla24xx_login_fabric,
1857         .fabric_logout          = qla24xx_fabric_logout,
1858         .calc_req_entries       = NULL,
1859         .build_iocbs            = NULL,
1860         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1861         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1862         .read_nvram             = qla24xx_read_nvram_data,
1863         .write_nvram            = qla24xx_write_nvram_data,
1864         .fw_dump                = qla24xx_fw_dump,
1865         .beacon_on              = qla24xx_beacon_on,
1866         .beacon_off             = qla24xx_beacon_off,
1867         .beacon_blink           = qla24xx_beacon_blink,
1868         .read_optrom            = qla24xx_read_optrom_data,
1869         .write_optrom           = qla24xx_write_optrom_data,
1870         .get_flash_version      = qla24xx_get_flash_version,
1871         .start_scsi             = qla24xx_start_scsi,
1872         .abort_isp              = qla2x00_abort_isp,
1873         .iospace_config         = qla2x00_iospace_config,
1874         .initialize_adapter     = qla2x00_initialize_adapter,
1875 };
1876
1877 static struct isp_operations qla25xx_isp_ops = {
1878         .pci_config             = qla25xx_pci_config,
1879         .reset_chip             = qla24xx_reset_chip,
1880         .chip_diag              = qla24xx_chip_diag,
1881         .config_rings           = qla24xx_config_rings,
1882         .reset_adapter          = qla24xx_reset_adapter,
1883         .nvram_config           = qla24xx_nvram_config,
1884         .update_fw_options      = qla24xx_update_fw_options,
1885         .load_risc              = qla24xx_load_risc,
1886         .pci_info_str           = qla24xx_pci_info_str,
1887         .fw_version_str         = qla24xx_fw_version_str,
1888         .intr_handler           = qla24xx_intr_handler,
1889         .enable_intrs           = qla24xx_enable_intrs,
1890         .disable_intrs          = qla24xx_disable_intrs,
1891         .abort_command          = qla24xx_abort_command,
1892         .target_reset           = qla24xx_abort_target,
1893         .lun_reset              = qla24xx_lun_reset,
1894         .fabric_login           = qla24xx_login_fabric,
1895         .fabric_logout          = qla24xx_fabric_logout,
1896         .calc_req_entries       = NULL,
1897         .build_iocbs            = NULL,
1898         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1899         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1900         .read_nvram             = qla25xx_read_nvram_data,
1901         .write_nvram            = qla25xx_write_nvram_data,
1902         .fw_dump                = qla25xx_fw_dump,
1903         .beacon_on              = qla24xx_beacon_on,
1904         .beacon_off             = qla24xx_beacon_off,
1905         .beacon_blink           = qla24xx_beacon_blink,
1906         .read_optrom            = qla25xx_read_optrom_data,
1907         .write_optrom           = qla24xx_write_optrom_data,
1908         .get_flash_version      = qla24xx_get_flash_version,
1909         .start_scsi             = qla24xx_dif_start_scsi,
1910         .abort_isp              = qla2x00_abort_isp,
1911         .iospace_config         = qla2x00_iospace_config,
1912         .initialize_adapter     = qla2x00_initialize_adapter,
1913 };
1914
1915 static struct isp_operations qla81xx_isp_ops = {
1916         .pci_config             = qla25xx_pci_config,
1917         .reset_chip             = qla24xx_reset_chip,
1918         .chip_diag              = qla24xx_chip_diag,
1919         .config_rings           = qla24xx_config_rings,
1920         .reset_adapter          = qla24xx_reset_adapter,
1921         .nvram_config           = qla81xx_nvram_config,
1922         .update_fw_options      = qla81xx_update_fw_options,
1923         .load_risc              = qla81xx_load_risc,
1924         .pci_info_str           = qla24xx_pci_info_str,
1925         .fw_version_str         = qla24xx_fw_version_str,
1926         .intr_handler           = qla24xx_intr_handler,
1927         .enable_intrs           = qla24xx_enable_intrs,
1928         .disable_intrs          = qla24xx_disable_intrs,
1929         .abort_command          = qla24xx_abort_command,
1930         .target_reset           = qla24xx_abort_target,
1931         .lun_reset              = qla24xx_lun_reset,
1932         .fabric_login           = qla24xx_login_fabric,
1933         .fabric_logout          = qla24xx_fabric_logout,
1934         .calc_req_entries       = NULL,
1935         .build_iocbs            = NULL,
1936         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1937         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1938         .read_nvram             = NULL,
1939         .write_nvram            = NULL,
1940         .fw_dump                = qla81xx_fw_dump,
1941         .beacon_on              = qla24xx_beacon_on,
1942         .beacon_off             = qla24xx_beacon_off,
1943         .beacon_blink           = qla83xx_beacon_blink,
1944         .read_optrom            = qla25xx_read_optrom_data,
1945         .write_optrom           = qla24xx_write_optrom_data,
1946         .get_flash_version      = qla24xx_get_flash_version,
1947         .start_scsi             = qla24xx_dif_start_scsi,
1948         .abort_isp              = qla2x00_abort_isp,
1949         .iospace_config         = qla2x00_iospace_config,
1950         .initialize_adapter     = qla2x00_initialize_adapter,
1951 };
1952
1953 static struct isp_operations qla82xx_isp_ops = {
1954         .pci_config             = qla82xx_pci_config,
1955         .reset_chip             = qla82xx_reset_chip,
1956         .chip_diag              = qla24xx_chip_diag,
1957         .config_rings           = qla82xx_config_rings,
1958         .reset_adapter          = qla24xx_reset_adapter,
1959         .nvram_config           = qla81xx_nvram_config,
1960         .update_fw_options      = qla24xx_update_fw_options,
1961         .load_risc              = qla82xx_load_risc,
1962         .pci_info_str           = qla24xx_pci_info_str,
1963         .fw_version_str         = qla24xx_fw_version_str,
1964         .intr_handler           = qla82xx_intr_handler,
1965         .enable_intrs           = qla82xx_enable_intrs,
1966         .disable_intrs          = qla82xx_disable_intrs,
1967         .abort_command          = qla24xx_abort_command,
1968         .target_reset           = qla24xx_abort_target,
1969         .lun_reset              = qla24xx_lun_reset,
1970         .fabric_login           = qla24xx_login_fabric,
1971         .fabric_logout          = qla24xx_fabric_logout,
1972         .calc_req_entries       = NULL,
1973         .build_iocbs            = NULL,
1974         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1975         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1976         .read_nvram             = qla24xx_read_nvram_data,
1977         .write_nvram            = qla24xx_write_nvram_data,
1978         .fw_dump                = qla24xx_fw_dump,
1979         .beacon_on              = qla82xx_beacon_on,
1980         .beacon_off             = qla82xx_beacon_off,
1981         .beacon_blink           = NULL,
1982         .read_optrom            = qla82xx_read_optrom_data,
1983         .write_optrom           = qla82xx_write_optrom_data,
1984         .get_flash_version      = qla82xx_get_flash_version,
1985         .start_scsi             = qla82xx_start_scsi,
1986         .abort_isp              = qla82xx_abort_isp,
1987         .iospace_config         = qla82xx_iospace_config,
1988         .initialize_adapter     = qla2x00_initialize_adapter,
1989 };
1990
1991 static struct isp_operations qla8044_isp_ops = {
1992         .pci_config             = qla82xx_pci_config,
1993         .reset_chip             = qla82xx_reset_chip,
1994         .chip_diag              = qla24xx_chip_diag,
1995         .config_rings           = qla82xx_config_rings,
1996         .reset_adapter          = qla24xx_reset_adapter,
1997         .nvram_config           = qla81xx_nvram_config,
1998         .update_fw_options      = qla24xx_update_fw_options,
1999         .load_risc              = qla82xx_load_risc,
2000         .pci_info_str           = qla24xx_pci_info_str,
2001         .fw_version_str         = qla24xx_fw_version_str,
2002         .intr_handler           = qla8044_intr_handler,
2003         .enable_intrs           = qla82xx_enable_intrs,
2004         .disable_intrs          = qla82xx_disable_intrs,
2005         .abort_command          = qla24xx_abort_command,
2006         .target_reset           = qla24xx_abort_target,
2007         .lun_reset              = qla24xx_lun_reset,
2008         .fabric_login           = qla24xx_login_fabric,
2009         .fabric_logout          = qla24xx_fabric_logout,
2010         .calc_req_entries       = NULL,
2011         .build_iocbs            = NULL,
2012         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2013         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2014         .read_nvram             = NULL,
2015         .write_nvram            = NULL,
2016         .fw_dump                = qla24xx_fw_dump,
2017         .beacon_on              = qla82xx_beacon_on,
2018         .beacon_off             = qla82xx_beacon_off,
2019         .beacon_blink           = NULL,
2020         .read_optrom            = qla82xx_read_optrom_data,
2021         .write_optrom           = qla8044_write_optrom_data,
2022         .get_flash_version      = qla82xx_get_flash_version,
2023         .start_scsi             = qla82xx_start_scsi,
2024         .abort_isp              = qla8044_abort_isp,
2025         .iospace_config         = qla82xx_iospace_config,
2026         .initialize_adapter     = qla2x00_initialize_adapter,
2027 };
2028
2029 static struct isp_operations qla83xx_isp_ops = {
2030         .pci_config             = qla25xx_pci_config,
2031         .reset_chip             = qla24xx_reset_chip,
2032         .chip_diag              = qla24xx_chip_diag,
2033         .config_rings           = qla24xx_config_rings,
2034         .reset_adapter          = qla24xx_reset_adapter,
2035         .nvram_config           = qla81xx_nvram_config,
2036         .update_fw_options      = qla81xx_update_fw_options,
2037         .load_risc              = qla81xx_load_risc,
2038         .pci_info_str           = qla24xx_pci_info_str,
2039         .fw_version_str         = qla24xx_fw_version_str,
2040         .intr_handler           = qla24xx_intr_handler,
2041         .enable_intrs           = qla24xx_enable_intrs,
2042         .disable_intrs          = qla24xx_disable_intrs,
2043         .abort_command          = qla24xx_abort_command,
2044         .target_reset           = qla24xx_abort_target,
2045         .lun_reset              = qla24xx_lun_reset,
2046         .fabric_login           = qla24xx_login_fabric,
2047         .fabric_logout          = qla24xx_fabric_logout,
2048         .calc_req_entries       = NULL,
2049         .build_iocbs            = NULL,
2050         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2051         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2052         .read_nvram             = NULL,
2053         .write_nvram            = NULL,
2054         .fw_dump                = qla83xx_fw_dump,
2055         .beacon_on              = qla24xx_beacon_on,
2056         .beacon_off             = qla24xx_beacon_off,
2057         .beacon_blink           = qla83xx_beacon_blink,
2058         .read_optrom            = qla25xx_read_optrom_data,
2059         .write_optrom           = qla24xx_write_optrom_data,
2060         .get_flash_version      = qla24xx_get_flash_version,
2061         .start_scsi             = qla24xx_dif_start_scsi,
2062         .abort_isp              = qla2x00_abort_isp,
2063         .iospace_config         = qla83xx_iospace_config,
2064         .initialize_adapter     = qla2x00_initialize_adapter,
2065 };
2066
2067 static struct isp_operations qlafx00_isp_ops = {
2068         .pci_config             = qlafx00_pci_config,
2069         .reset_chip             = qlafx00_soft_reset,
2070         .chip_diag              = qlafx00_chip_diag,
2071         .config_rings           = qlafx00_config_rings,
2072         .reset_adapter          = qlafx00_soft_reset,
2073         .nvram_config           = NULL,
2074         .update_fw_options      = NULL,
2075         .load_risc              = NULL,
2076         .pci_info_str           = qlafx00_pci_info_str,
2077         .fw_version_str         = qlafx00_fw_version_str,
2078         .intr_handler           = qlafx00_intr_handler,
2079         .enable_intrs           = qlafx00_enable_intrs,
2080         .disable_intrs          = qlafx00_disable_intrs,
2081         .abort_command          = qlafx00_abort_command,
2082         .target_reset           = qlafx00_abort_target,
2083         .lun_reset              = qlafx00_lun_reset,
2084         .fabric_login           = NULL,
2085         .fabric_logout          = NULL,
2086         .calc_req_entries       = NULL,
2087         .build_iocbs            = NULL,
2088         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2089         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2090         .read_nvram             = qla24xx_read_nvram_data,
2091         .write_nvram            = qla24xx_write_nvram_data,
2092         .fw_dump                = NULL,
2093         .beacon_on              = qla24xx_beacon_on,
2094         .beacon_off             = qla24xx_beacon_off,
2095         .beacon_blink           = NULL,
2096         .read_optrom            = qla24xx_read_optrom_data,
2097         .write_optrom           = qla24xx_write_optrom_data,
2098         .get_flash_version      = qla24xx_get_flash_version,
2099         .start_scsi             = qlafx00_start_scsi,
2100         .abort_isp              = qlafx00_abort_isp,
2101         .iospace_config         = qlafx00_iospace_config,
2102         .initialize_adapter     = qlafx00_initialize_adapter,
2103 };
2104
2105 static inline void
2106 qla2x00_set_isp_flags(struct qla_hw_data *ha)
2107 {
2108         ha->device_type = DT_EXTENDED_IDS;
2109         switch (ha->pdev->device) {
2110         case PCI_DEVICE_ID_QLOGIC_ISP2100:
2111                 ha->device_type |= DT_ISP2100;
2112                 ha->device_type &= ~DT_EXTENDED_IDS;
2113                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2114                 break;
2115         case PCI_DEVICE_ID_QLOGIC_ISP2200:
2116                 ha->device_type |= DT_ISP2200;
2117                 ha->device_type &= ~DT_EXTENDED_IDS;
2118                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2119                 break;
2120         case PCI_DEVICE_ID_QLOGIC_ISP2300:
2121                 ha->device_type |= DT_ISP2300;
2122                 ha->device_type |= DT_ZIO_SUPPORTED;
2123                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2124                 break;
2125         case PCI_DEVICE_ID_QLOGIC_ISP2312:
2126                 ha->device_type |= DT_ISP2312;
2127                 ha->device_type |= DT_ZIO_SUPPORTED;
2128                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2129                 break;
2130         case PCI_DEVICE_ID_QLOGIC_ISP2322:
2131                 ha->device_type |= DT_ISP2322;
2132                 ha->device_type |= DT_ZIO_SUPPORTED;
2133                 if (ha->pdev->subsystem_vendor == 0x1028 &&
2134                     ha->pdev->subsystem_device == 0x0170)
2135                         ha->device_type |= DT_OEM_001;
2136                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2137                 break;
2138         case PCI_DEVICE_ID_QLOGIC_ISP6312:
2139                 ha->device_type |= DT_ISP6312;
2140                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2141                 break;
2142         case PCI_DEVICE_ID_QLOGIC_ISP6322:
2143                 ha->device_type |= DT_ISP6322;
2144                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2145                 break;
2146         case PCI_DEVICE_ID_QLOGIC_ISP2422:
2147                 ha->device_type |= DT_ISP2422;
2148                 ha->device_type |= DT_ZIO_SUPPORTED;
2149                 ha->device_type |= DT_FWI2;
2150                 ha->device_type |= DT_IIDMA;
2151                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2152                 break;
2153         case PCI_DEVICE_ID_QLOGIC_ISP2432:
2154                 ha->device_type |= DT_ISP2432;
2155                 ha->device_type |= DT_ZIO_SUPPORTED;
2156                 ha->device_type |= DT_FWI2;
2157                 ha->device_type |= DT_IIDMA;
2158                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2159                 break;
2160         case PCI_DEVICE_ID_QLOGIC_ISP8432:
2161                 ha->device_type |= DT_ISP8432;
2162                 ha->device_type |= DT_ZIO_SUPPORTED;
2163                 ha->device_type |= DT_FWI2;
2164                 ha->device_type |= DT_IIDMA;
2165                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2166                 break;
2167         case PCI_DEVICE_ID_QLOGIC_ISP5422:
2168                 ha->device_type |= DT_ISP5422;
2169                 ha->device_type |= DT_FWI2;
2170                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2171                 break;
2172         case PCI_DEVICE_ID_QLOGIC_ISP5432:
2173                 ha->device_type |= DT_ISP5432;
2174                 ha->device_type |= DT_FWI2;
2175                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2176                 break;
2177         case PCI_DEVICE_ID_QLOGIC_ISP2532:
2178                 ha->device_type |= DT_ISP2532;
2179                 ha->device_type |= DT_ZIO_SUPPORTED;
2180                 ha->device_type |= DT_FWI2;
2181                 ha->device_type |= DT_IIDMA;
2182                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2183                 break;
2184         case PCI_DEVICE_ID_QLOGIC_ISP8001:
2185                 ha->device_type |= DT_ISP8001;
2186                 ha->device_type |= DT_ZIO_SUPPORTED;
2187                 ha->device_type |= DT_FWI2;
2188                 ha->device_type |= DT_IIDMA;
2189                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2190                 break;
2191         case PCI_DEVICE_ID_QLOGIC_ISP8021:
2192                 ha->device_type |= DT_ISP8021;
2193                 ha->device_type |= DT_ZIO_SUPPORTED;
2194                 ha->device_type |= DT_FWI2;
2195                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2196                 /* Initialize 82XX ISP flags */
2197                 qla82xx_init_flags(ha);
2198                 break;
2199          case PCI_DEVICE_ID_QLOGIC_ISP8044:
2200                 ha->device_type |= DT_ISP8044;
2201                 ha->device_type |= DT_ZIO_SUPPORTED;
2202                 ha->device_type |= DT_FWI2;
2203                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2204                 /* Initialize 82XX ISP flags */
2205                 qla82xx_init_flags(ha);
2206                 break;
2207         case PCI_DEVICE_ID_QLOGIC_ISP2031:
2208                 ha->device_type |= DT_ISP2031;
2209                 ha->device_type |= DT_ZIO_SUPPORTED;
2210                 ha->device_type |= DT_FWI2;
2211                 ha->device_type |= DT_IIDMA;
2212                 ha->device_type |= DT_T10_PI;
2213                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2214                 break;
2215         case PCI_DEVICE_ID_QLOGIC_ISP8031:
2216                 ha->device_type |= DT_ISP8031;
2217                 ha->device_type |= DT_ZIO_SUPPORTED;
2218                 ha->device_type |= DT_FWI2;
2219                 ha->device_type |= DT_IIDMA;
2220                 ha->device_type |= DT_T10_PI;
2221                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2222                 break;
2223         case PCI_DEVICE_ID_QLOGIC_ISPF001:
2224                 ha->device_type |= DT_ISPFX00;
2225                 break;
2226         }
2227
2228         if (IS_QLA82XX(ha))
2229                 ha->port_no = !(ha->portnum & 1);
2230         else
2231                 /* Get adapter physical port no from interrupt pin register. */
2232                 pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no);
2233
2234         if (ha->port_no & 1)
2235                 ha->flags.port0 = 1;
2236         else
2237                 ha->flags.port0 = 0;
2238         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x000b,
2239             "device_type=0x%x port=%d fw_srisc_address=0x%x.\n",
2240             ha->device_type, ha->flags.port0, ha->fw_srisc_address);
2241 }
2242
2243 static void
2244 qla2xxx_scan_start(struct Scsi_Host *shost)
2245 {
2246         scsi_qla_host_t *vha = shost_priv(shost);
2247
2248         if (vha->hw->flags.running_gold_fw)
2249                 return;
2250
2251         set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
2252         set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
2253         set_bit(RSCN_UPDATE, &vha->dpc_flags);
2254         set_bit(NPIV_CONFIG_NEEDED, &vha->dpc_flags);
2255 }
2256
2257 static int
2258 qla2xxx_scan_finished(struct Scsi_Host *shost, unsigned long time)
2259 {
2260         scsi_qla_host_t *vha = shost_priv(shost);
2261
2262         if (!vha->host)
2263                 return 1;
2264         if (time > vha->hw->loop_reset_delay * HZ)
2265                 return 1;
2266
2267         return atomic_read(&vha->loop_state) == LOOP_READY;
2268 }
2269
2270 /*
2271  * PCI driver interface
2272  */
2273 static int
2274 qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
2275 {
2276         int     ret = -ENODEV;
2277         struct Scsi_Host *host;
2278         scsi_qla_host_t *base_vha = NULL;
2279         struct qla_hw_data *ha;
2280         char pci_info[30];
2281         char fw_str[30], wq_name[30];
2282         struct scsi_host_template *sht;
2283         int bars, mem_only = 0;
2284         uint16_t req_length = 0, rsp_length = 0;
2285         struct req_que *req = NULL;
2286         struct rsp_que *rsp = NULL;
2287         bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
2288         sht = &qla2xxx_driver_template;
2289         if (pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422 ||
2290             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432 ||
2291             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 ||
2292             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 ||
2293             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 ||
2294             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 ||
2295             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 ||
2296             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021 ||
2297             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2031 ||
2298             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8031 ||
2299             pdev->device == PCI_DEVICE_ID_QLOGIC_ISPF001 ||
2300             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8044) {
2301                 bars = pci_select_bars(pdev, IORESOURCE_MEM);
2302                 mem_only = 1;
2303                 ql_dbg_pci(ql_dbg_init, pdev, 0x0007,
2304                     "Mem only adapter.\n");
2305         }
2306         ql_dbg_pci(ql_dbg_init, pdev, 0x0008,
2307             "Bars=%d.\n", bars);
2308
2309         if (mem_only) {
2310                 if (pci_enable_device_mem(pdev))
2311                         goto probe_out;
2312         } else {
2313                 if (pci_enable_device(pdev))
2314                         goto probe_out;
2315         }
2316
2317         /* This may fail but that's ok */
2318         pci_enable_pcie_error_reporting(pdev);
2319
2320         ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL);
2321         if (!ha) {
2322                 ql_log_pci(ql_log_fatal, pdev, 0x0009,
2323                     "Unable to allocate memory for ha.\n");
2324                 goto probe_out;
2325         }
2326         ql_dbg_pci(ql_dbg_init, pdev, 0x000a,
2327             "Memory allocated for ha=%p.\n", ha);
2328         ha->pdev = pdev;
2329         ha->tgt.enable_class_2 = ql2xenableclass2;
2330
2331         /* Clear our data area */
2332         ha->bars = bars;
2333         ha->mem_only = mem_only;
2334         spin_lock_init(&ha->hardware_lock);
2335         spin_lock_init(&ha->vport_slock);
2336         mutex_init(&ha->selflogin_lock);
2337
2338         /* Set ISP-type information. */
2339         qla2x00_set_isp_flags(ha);
2340
2341         /* Set EEH reset type to fundamental if required by hba */
2342         if (IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha) ||
2343             IS_QLA83XX(ha))
2344                 pdev->needs_freset = 1;
2345
2346         ha->prev_topology = 0;
2347         ha->init_cb_size = sizeof(init_cb_t);
2348         ha->link_data_rate = PORT_SPEED_UNKNOWN;
2349         ha->optrom_size = OPTROM_SIZE_2300;
2350
2351         /* Assign ISP specific operations. */
2352         if (IS_QLA2100(ha)) {
2353                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2354                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2100;
2355                 req_length = REQUEST_ENTRY_CNT_2100;
2356                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2357                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2358                 ha->gid_list_info_size = 4;
2359                 ha->flash_conf_off = ~0;
2360                 ha->flash_data_off = ~0;
2361                 ha->nvram_conf_off = ~0;
2362                 ha->nvram_data_off = ~0;
2363                 ha->isp_ops = &qla2100_isp_ops;
2364         } else if (IS_QLA2200(ha)) {
2365                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2366                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2200;
2367                 req_length = REQUEST_ENTRY_CNT_2200;
2368                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2369                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2370                 ha->gid_list_info_size = 4;
2371                 ha->flash_conf_off = ~0;
2372                 ha->flash_data_off = ~0;
2373                 ha->nvram_conf_off = ~0;
2374                 ha->nvram_data_off = ~0;
2375                 ha->isp_ops = &qla2100_isp_ops;
2376         } else if (IS_QLA23XX(ha)) {
2377                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2378                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2379                 req_length = REQUEST_ENTRY_CNT_2200;
2380                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2381                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2382                 ha->gid_list_info_size = 6;
2383                 if (IS_QLA2322(ha) || IS_QLA6322(ha))
2384                         ha->optrom_size = OPTROM_SIZE_2322;
2385                 ha->flash_conf_off = ~0;
2386                 ha->flash_data_off = ~0;
2387                 ha->nvram_conf_off = ~0;
2388                 ha->nvram_data_off = ~0;
2389                 ha->isp_ops = &qla2300_isp_ops;
2390         } else if (IS_QLA24XX_TYPE(ha)) {
2391                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2392                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2393                 req_length = REQUEST_ENTRY_CNT_24XX;
2394                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2395                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2396                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2397                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2398                 ha->gid_list_info_size = 8;
2399                 ha->optrom_size = OPTROM_SIZE_24XX;
2400                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX;
2401                 ha->isp_ops = &qla24xx_isp_ops;
2402                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2403                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2404                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2405                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2406         } else if (IS_QLA25XX(ha)) {
2407                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2408                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2409                 req_length = REQUEST_ENTRY_CNT_24XX;
2410                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2411                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2412                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2413                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2414                 ha->gid_list_info_size = 8;
2415                 ha->optrom_size = OPTROM_SIZE_25XX;
2416                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2417                 ha->isp_ops = &qla25xx_isp_ops;
2418                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2419                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2420                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2421                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2422         } else if (IS_QLA81XX(ha)) {
2423                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2424                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2425                 req_length = REQUEST_ENTRY_CNT_24XX;
2426                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2427                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2428                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2429                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2430                 ha->gid_list_info_size = 8;
2431                 ha->optrom_size = OPTROM_SIZE_81XX;
2432                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2433                 ha->isp_ops = &qla81xx_isp_ops;
2434                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2435                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2436                 ha->nvram_conf_off = ~0;
2437                 ha->nvram_data_off = ~0;
2438         } else if (IS_QLA82XX(ha)) {
2439                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2440                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2441                 req_length = REQUEST_ENTRY_CNT_82XX;
2442                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2443                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2444                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2445                 ha->gid_list_info_size = 8;
2446                 ha->optrom_size = OPTROM_SIZE_82XX;
2447                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2448                 ha->isp_ops = &qla82xx_isp_ops;
2449                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2450                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2451                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2452                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2453         } else if (IS_QLA8044(ha)) {
2454                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2455                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2456                 req_length = REQUEST_ENTRY_CNT_82XX;
2457                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2458                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2459                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2460                 ha->gid_list_info_size = 8;
2461                 ha->optrom_size = OPTROM_SIZE_83XX;
2462                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2463                 ha->isp_ops = &qla8044_isp_ops;
2464                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2465                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2466                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2467                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2468         } else if (IS_QLA83XX(ha)) {
2469                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
2470                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2471                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2472                 req_length = REQUEST_ENTRY_CNT_24XX;
2473                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2474                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2475                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2476                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2477                 ha->gid_list_info_size = 8;
2478                 ha->optrom_size = OPTROM_SIZE_83XX;
2479                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2480                 ha->isp_ops = &qla83xx_isp_ops;
2481                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2482                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2483                 ha->nvram_conf_off = ~0;
2484                 ha->nvram_data_off = ~0;
2485         }  else if (IS_QLAFX00(ha)) {
2486                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_FX00;
2487                 ha->mbx_count = MAILBOX_REGISTER_COUNT_FX00;
2488                 ha->aen_mbx_count = AEN_MAILBOX_REGISTER_COUNT_FX00;
2489                 req_length = REQUEST_ENTRY_CNT_FX00;
2490                 rsp_length = RESPONSE_ENTRY_CNT_FX00;
2491                 ha->init_cb_size = sizeof(struct init_cb_fx);
2492                 ha->isp_ops = &qlafx00_isp_ops;
2493                 ha->port_down_retry_count = 30; /* default value */
2494                 ha->mr.fw_hbt_cnt = QLAFX00_HEARTBEAT_INTERVAL;
2495                 ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL;
2496                 ha->mr.fw_critemp_timer_tick = QLAFX00_CRITEMP_INTERVAL;
2497                 ha->mr.fw_hbt_en = 1;
2498         }
2499
2500         ql_dbg_pci(ql_dbg_init, pdev, 0x001e,
2501             "mbx_count=%d, req_length=%d, "
2502             "rsp_length=%d, max_loop_id=%d, init_cb_size=%d, "
2503             "gid_list_info_size=%d, optrom_size=%d, nvram_npiv_size=%d, "
2504             "max_fibre_devices=%d.\n",
2505             ha->mbx_count, req_length, rsp_length, ha->max_loop_id,
2506             ha->init_cb_size, ha->gid_list_info_size, ha->optrom_size,
2507             ha->nvram_npiv_size, ha->max_fibre_devices);
2508         ql_dbg_pci(ql_dbg_init, pdev, 0x001f,
2509             "isp_ops=%p, flash_conf_off=%d, "
2510             "flash_data_off=%d, nvram_conf_off=%d, nvram_data_off=%d.\n",
2511             ha->isp_ops, ha->flash_conf_off, ha->flash_data_off,
2512             ha->nvram_conf_off, ha->nvram_data_off);
2513
2514         /* Configure PCI I/O space */
2515         ret = ha->isp_ops->iospace_config(ha);
2516         if (ret)
2517                 goto iospace_config_failed;
2518
2519         ql_log_pci(ql_log_info, pdev, 0x001d,
2520             "Found an ISP%04X irq %d iobase 0x%p.\n",
2521             pdev->device, pdev->irq, ha->iobase);
2522         mutex_init(&ha->vport_lock);
2523         init_completion(&ha->mbx_cmd_comp);
2524         complete(&ha->mbx_cmd_comp);
2525         init_completion(&ha->mbx_intr_comp);
2526         init_completion(&ha->dcbx_comp);
2527         init_completion(&ha->lb_portup_comp);
2528
2529         set_bit(0, (unsigned long *) ha->vp_idx_map);
2530
2531         qla2x00_config_dma_addressing(ha);
2532         ql_dbg_pci(ql_dbg_init, pdev, 0x0020,
2533             "64 Bit addressing is %s.\n",
2534             ha->flags.enable_64bit_addressing ? "enable" :
2535             "disable");
2536         ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp);
2537         if (!ret) {
2538                 ql_log_pci(ql_log_fatal, pdev, 0x0031,
2539                     "Failed to allocate memory for adapter, aborting.\n");
2540
2541                 goto probe_hw_failed;
2542         }
2543
2544         req->max_q_depth = MAX_Q_DEPTH;
2545         if (ql2xmaxqdepth != 0 && ql2xmaxqdepth <= 0xffffU)
2546                 req->max_q_depth = ql2xmaxqdepth;
2547
2548
2549         base_vha = qla2x00_create_host(sht, ha);
2550         if (!base_vha) {
2551                 ret = -ENOMEM;
2552                 qla2x00_mem_free(ha);
2553                 qla2x00_free_req_que(ha, req);
2554                 qla2x00_free_rsp_que(ha, rsp);
2555                 goto probe_hw_failed;
2556         }
2557
2558         pci_set_drvdata(pdev, base_vha);
2559
2560         host = base_vha->host;
2561         base_vha->req = req;
2562         if (IS_QLAFX00(ha))
2563                 host->can_queue = 1024;
2564         else
2565                 host->can_queue = req->length + 128;
2566         if (IS_QLA2XXX_MIDTYPE(ha))
2567                 base_vha->mgmt_svr_loop_id = 10 + base_vha->vp_idx;
2568         else
2569                 base_vha->mgmt_svr_loop_id = MANAGEMENT_SERVER +
2570                                                 base_vha->vp_idx;
2571
2572         /* Setup fcport template structure. */
2573         ha->mr.fcport.vha = base_vha;
2574         ha->mr.fcport.port_type = FCT_UNKNOWN;
2575         ha->mr.fcport.loop_id = FC_NO_LOOP_ID;
2576         qla2x00_set_fcport_state(&ha->mr.fcport, FCS_UNCONFIGURED);
2577         ha->mr.fcport.supported_classes = FC_COS_UNSPECIFIED;
2578         ha->mr.fcport.scan_state = 1;
2579
2580         /* Set the SG table size based on ISP type */
2581         if (!IS_FWI2_CAPABLE(ha)) {
2582                 if (IS_QLA2100(ha))
2583                         host->sg_tablesize = 32;
2584         } else {
2585                 if (!IS_QLA82XX(ha))
2586                         host->sg_tablesize = QLA_SG_ALL;
2587         }
2588         ql_dbg(ql_dbg_init, base_vha, 0x0032,
2589             "can_queue=%d, req=%p, "
2590             "mgmt_svr_loop_id=%d, sg_tablesize=%d.\n",
2591             host->can_queue, base_vha->req,
2592             base_vha->mgmt_svr_loop_id, host->sg_tablesize);
2593         host->max_id = ha->max_fibre_devices;
2594         host->cmd_per_lun = 3;
2595         host->unique_id = host->host_no;
2596         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif)
2597                 host->max_cmd_len = 32;
2598         else
2599                 host->max_cmd_len = MAX_CMDSZ;
2600         host->max_channel = MAX_BUSES - 1;
2601         host->max_lun = ql2xmaxlun;
2602         host->transportt = qla2xxx_transport_template;
2603         sht->vendor_id = (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_QLOGIC);
2604
2605         ql_dbg(ql_dbg_init, base_vha, 0x0033,
2606             "max_id=%d this_id=%d "
2607             "cmd_per_len=%d unique_id=%d max_cmd_len=%d max_channel=%d "
2608             "max_lun=%d transportt=%p, vendor_id=%llu.\n", host->max_id,
2609             host->this_id, host->cmd_per_lun, host->unique_id,
2610             host->max_cmd_len, host->max_channel, host->max_lun,
2611             host->transportt, sht->vendor_id);
2612
2613 que_init:
2614         /* Alloc arrays of request and response ring ptrs */
2615         if (!qla2x00_alloc_queues(ha, req, rsp)) {
2616                 ql_log(ql_log_fatal, base_vha, 0x003d,
2617                     "Failed to allocate memory for queue pointers..."
2618                     "aborting.\n");
2619                 goto probe_init_failed;
2620         }
2621
2622         qlt_probe_one_stage1(base_vha, ha);
2623
2624         /* Set up the irqs */
2625         ret = qla2x00_request_irqs(ha, rsp);
2626         if (ret)
2627                 goto probe_init_failed;
2628
2629         pci_save_state(pdev);
2630
2631         /* Assign back pointers */
2632         rsp->req = req;
2633         req->rsp = rsp;
2634
2635         if (IS_QLAFX00(ha)) {
2636                 ha->rsp_q_map[0] = rsp;
2637                 ha->req_q_map[0] = req;
2638                 set_bit(0, ha->req_qid_map);
2639                 set_bit(0, ha->rsp_qid_map);
2640         }
2641
2642         /* FWI2-capable only. */
2643         req->req_q_in = &ha->iobase->isp24.req_q_in;
2644         req->req_q_out = &ha->iobase->isp24.req_q_out;
2645         rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in;
2646         rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out;
2647         if (ha->mqenable || IS_QLA83XX(ha)) {
2648                 req->req_q_in = &ha->mqiobase->isp25mq.req_q_in;
2649                 req->req_q_out = &ha->mqiobase->isp25mq.req_q_out;
2650                 rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in;
2651                 rsp->rsp_q_out =  &ha->mqiobase->isp25mq.rsp_q_out;
2652         }
2653
2654         if (IS_QLAFX00(ha)) {
2655                 req->req_q_in = &ha->iobase->ispfx00.req_q_in;
2656                 req->req_q_out = &ha->iobase->ispfx00.req_q_out;
2657                 rsp->rsp_q_in = &ha->iobase->ispfx00.rsp_q_in;
2658                 rsp->rsp_q_out = &ha->iobase->ispfx00.rsp_q_out;
2659         }
2660
2661         if (IS_P3P_TYPE(ha)) {
2662                 req->req_q_out = &ha->iobase->isp82.req_q_out[0];
2663                 rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0];
2664                 rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0];
2665         }
2666
2667         ql_dbg(ql_dbg_multiq, base_vha, 0xc009,
2668             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
2669             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
2670         ql_dbg(ql_dbg_multiq, base_vha, 0xc00a,
2671             "req->req_q_in=%p req->req_q_out=%p "
2672             "rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
2673             req->req_q_in, req->req_q_out,
2674             rsp->rsp_q_in, rsp->rsp_q_out);
2675         ql_dbg(ql_dbg_init, base_vha, 0x003e,
2676             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
2677             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
2678         ql_dbg(ql_dbg_init, base_vha, 0x003f,
2679             "req->req_q_in=%p req->req_q_out=%p rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
2680             req->req_q_in, req->req_q_out, rsp->rsp_q_in, rsp->rsp_q_out);
2681
2682         if (ha->isp_ops->initialize_adapter(base_vha)) {
2683                 ql_log(ql_log_fatal, base_vha, 0x00d6,
2684                     "Failed to initialize adapter - Adapter flags %x.\n",
2685                     base_vha->device_flags);
2686
2687                 if (IS_QLA82XX(ha)) {
2688                         qla82xx_idc_lock(ha);
2689                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
2690                                 QLA8XXX_DEV_FAILED);
2691                         qla82xx_idc_unlock(ha);
2692                         ql_log(ql_log_fatal, base_vha, 0x00d7,
2693                             "HW State: FAILED.\n");
2694                 } else if (IS_QLA8044(ha)) {
2695                         qla8044_idc_lock(ha);
2696                         qla8044_wr_direct(base_vha,
2697                                 QLA8044_CRB_DEV_STATE_INDEX,
2698                                 QLA8XXX_DEV_FAILED);
2699                         qla8044_idc_unlock(ha);
2700                         ql_log(ql_log_fatal, base_vha, 0x0150,
2701                             "HW State: FAILED.\n");
2702                 }
2703
2704                 ret = -ENODEV;
2705                 goto probe_failed;
2706         }
2707
2708         if (ha->mqenable) {
2709                 if (qla25xx_setup_mode(base_vha)) {
2710                         ql_log(ql_log_warn, base_vha, 0x00ec,
2711                             "Failed to create queues, falling back to single queue mode.\n");
2712                         goto que_init;
2713                 }
2714         }
2715
2716         if (ha->flags.running_gold_fw)
2717                 goto skip_dpc;
2718
2719         /*
2720          * Startup the kernel thread for this host adapter
2721          */
2722         ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha,
2723             "%s_dpc", base_vha->host_str);
2724         if (IS_ERR(ha->dpc_thread)) {
2725                 ql_log(ql_log_fatal, base_vha, 0x00ed,
2726                     "Failed to start DPC thread.\n");
2727                 ret = PTR_ERR(ha->dpc_thread);
2728                 goto probe_failed;
2729         }
2730         ql_dbg(ql_dbg_init, base_vha, 0x00ee,
2731             "DPC thread started successfully.\n");
2732
2733         /*
2734          * If we're not coming up in initiator mode, we might sit for
2735          * a while without waking up the dpc thread, which leads to a
2736          * stuck process warning.  So just kick the dpc once here and
2737          * let the kthread start (and go back to sleep in qla2x00_do_dpc).
2738          */
2739         qla2xxx_wake_dpc(base_vha);
2740
2741         if (IS_QLA8031(ha) || IS_MCTP_CAPABLE(ha)) {
2742                 sprintf(wq_name, "qla2xxx_%lu_dpc_lp_wq", base_vha->host_no);
2743                 ha->dpc_lp_wq = create_singlethread_workqueue(wq_name);
2744                 INIT_WORK(&ha->idc_aen, qla83xx_service_idc_aen);
2745
2746                 sprintf(wq_name, "qla2xxx_%lu_dpc_hp_wq", base_vha->host_no);
2747                 ha->dpc_hp_wq = create_singlethread_workqueue(wq_name);
2748                 INIT_WORK(&ha->nic_core_reset, qla83xx_nic_core_reset_work);
2749                 INIT_WORK(&ha->idc_state_handler,
2750                     qla83xx_idc_state_handler_work);
2751                 INIT_WORK(&ha->nic_core_unrecoverable,
2752                     qla83xx_nic_core_unrecoverable_work);
2753         }
2754
2755 skip_dpc:
2756         list_add_tail(&base_vha->list, &ha->vp_list);
2757         base_vha->host->irq = ha->pdev->irq;
2758
2759         /* Initialized the timer */
2760         qla2x00_start_timer(base_vha, qla2x00_timer, WATCH_INTERVAL);
2761         ql_dbg(ql_dbg_init, base_vha, 0x00ef,
2762             "Started qla2x00_timer with "
2763             "interval=%d.\n", WATCH_INTERVAL);
2764         ql_dbg(ql_dbg_init, base_vha, 0x00f0,
2765             "Detected hba at address=%p.\n",
2766             ha);
2767
2768         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
2769                 if (ha->fw_attributes & BIT_4) {
2770                         int prot = 0, guard;
2771                         base_vha->flags.difdix_supported = 1;
2772                         ql_dbg(ql_dbg_init, base_vha, 0x00f1,
2773                             "Registering for DIF/DIX type 1 and 3 protection.\n");
2774                         if (ql2xenabledif == 1)
2775                                 prot = SHOST_DIX_TYPE0_PROTECTION;
2776                         scsi_host_set_prot(host,
2777                             prot | SHOST_DIF_TYPE1_PROTECTION
2778                             | SHOST_DIF_TYPE2_PROTECTION
2779                             | SHOST_DIF_TYPE3_PROTECTION
2780                             | SHOST_DIX_TYPE1_PROTECTION
2781                             | SHOST_DIX_TYPE2_PROTECTION
2782                             | SHOST_DIX_TYPE3_PROTECTION);
2783
2784                         guard = SHOST_DIX_GUARD_CRC;
2785
2786                         if (IS_PI_IPGUARD_CAPABLE(ha) &&
2787                             (ql2xenabledif > 1 || IS_PI_DIFB_DIX0_CAPABLE(ha)))
2788                                 guard |= SHOST_DIX_GUARD_IP;
2789
2790                         scsi_host_set_guard(host, guard);
2791                 } else
2792                         base_vha->flags.difdix_supported = 0;
2793         }
2794
2795         ha->isp_ops->enable_intrs(ha);
2796
2797         if (IS_QLAFX00(ha)) {
2798                 ret = qlafx00_fx_disc(base_vha,
2799                         &base_vha->hw->mr.fcport, FXDISC_GET_CONFIG_INFO);
2800                 host->sg_tablesize = (ha->mr.extended_io_enabled) ?
2801                     QLA_SG_ALL : 128;
2802         }
2803
2804         ret = scsi_add_host(host, &pdev->dev);
2805         if (ret)
2806                 goto probe_failed;
2807
2808         base_vha->flags.init_done = 1;
2809         base_vha->flags.online = 1;
2810
2811         ql_dbg(ql_dbg_init, base_vha, 0x00f2,
2812             "Init done and hba is online.\n");
2813
2814         if (qla_ini_mode_enabled(base_vha))
2815                 scsi_scan_host(host);
2816         else
2817                 ql_dbg(ql_dbg_init, base_vha, 0x0122,
2818                         "skipping scsi_scan_host() for non-initiator port\n");
2819
2820         qla2x00_alloc_sysfs_attr(base_vha);
2821
2822         if (IS_QLAFX00(ha)) {
2823                 ret = qlafx00_fx_disc(base_vha,
2824                         &base_vha->hw->mr.fcport, FXDISC_GET_PORT_INFO);
2825
2826                 /* Register system information */
2827                 ret =  qlafx00_fx_disc(base_vha,
2828                         &base_vha->hw->mr.fcport, FXDISC_REG_HOST_INFO);
2829         }
2830
2831         qla2x00_init_host_attr(base_vha);
2832
2833         qla2x00_dfs_setup(base_vha);
2834
2835         if (IS_QLAFX00(ha))
2836                 ql_log(ql_log_info, base_vha, 0x015a,
2837                     "QLogic %s.\n", ha->mr.product_name);
2838         else
2839                 ql_log(ql_log_info, base_vha, 0x00fb,
2840                     "QLogic %s - %s.\n", ha->model_number, ha->model_desc);
2841         ql_log(ql_log_info, base_vha, 0x00fc,
2842             "ISP%04X: %s @ %s hdma%c host#=%ld fw=%s.\n",
2843             pdev->device, ha->isp_ops->pci_info_str(base_vha, pci_info),
2844             pci_name(pdev), ha->flags.enable_64bit_addressing ? '+' : '-',
2845             base_vha->host_no,
2846             ha->isp_ops->fw_version_str(base_vha, fw_str));
2847
2848         qlt_add_target(ha, base_vha);
2849
2850         return 0;
2851
2852 probe_init_failed:
2853         qla2x00_free_req_que(ha, req);
2854         ha->req_q_map[0] = NULL;
2855         clear_bit(0, ha->req_qid_map);
2856         qla2x00_free_rsp_que(ha, rsp);
2857         ha->rsp_q_map[0] = NULL;
2858         clear_bit(0, ha->rsp_qid_map);
2859         ha->max_req_queues = ha->max_rsp_queues = 0;
2860
2861 probe_failed:
2862         if (base_vha->timer_active)
2863                 qla2x00_stop_timer(base_vha);
2864         base_vha->flags.online = 0;
2865         if (ha->dpc_thread) {
2866                 struct task_struct *t = ha->dpc_thread;
2867
2868                 ha->dpc_thread = NULL;
2869                 kthread_stop(t);
2870         }
2871
2872         qla2x00_free_device(base_vha);
2873
2874         scsi_host_put(base_vha->host);
2875
2876 probe_hw_failed:
2877         if (IS_QLA82XX(ha)) {
2878                 qla82xx_idc_lock(ha);
2879                 qla82xx_clear_drv_active(ha);
2880                 qla82xx_idc_unlock(ha);
2881         }
2882         if (IS_QLA8044(ha)) {
2883                 qla8044_idc_lock(ha);
2884                 qla8044_clear_drv_active(base_vha);
2885                 qla8044_idc_unlock(ha);
2886         }
2887 iospace_config_failed:
2888         if (IS_P3P_TYPE(ha)) {
2889                 if (!ha->nx_pcibase)
2890                         iounmap((device_reg_t __iomem *)ha->nx_pcibase);
2891                 if (!ql2xdbwr)
2892                         iounmap((device_reg_t __iomem *)ha->nxdb_wr_ptr);
2893         } else {
2894                 if (ha->iobase)
2895                         iounmap(ha->iobase);
2896                 if (ha->cregbase)
2897                         iounmap(ha->cregbase);
2898         }
2899         pci_release_selected_regions(ha->pdev, ha->bars);
2900         kfree(ha);
2901         ha = NULL;
2902
2903 probe_out:
2904         pci_disable_device(pdev);
2905         return ret;
2906 }
2907
2908 static void
2909 qla2x00_stop_dpc_thread(scsi_qla_host_t *vha)
2910 {
2911         struct qla_hw_data *ha = vha->hw;
2912         struct task_struct *t = ha->dpc_thread;
2913
2914         if (ha->dpc_thread == NULL)
2915                 return;
2916         /*
2917          * qla2xxx_wake_dpc checks for ->dpc_thread
2918          * so we need to zero it out.
2919          */
2920         ha->dpc_thread = NULL;
2921         kthread_stop(t);
2922 }
2923
2924 static void
2925 qla2x00_shutdown(struct pci_dev *pdev)
2926 {
2927         scsi_qla_host_t *vha;
2928         struct qla_hw_data  *ha;
2929
2930         if (!atomic_read(&pdev->enable_cnt))
2931                 return;
2932
2933         vha = pci_get_drvdata(pdev);
2934         ha = vha->hw;
2935
2936         /* Notify ISPFX00 firmware */
2937         if (IS_QLAFX00(ha))
2938                 qlafx00_driver_shutdown(vha, 20);
2939
2940         /* Turn-off FCE trace */
2941         if (ha->flags.fce_enabled) {
2942                 qla2x00_disable_fce_trace(vha, NULL, NULL);
2943                 ha->flags.fce_enabled = 0;
2944         }
2945
2946         /* Turn-off EFT trace */
2947         if (ha->eft)
2948                 qla2x00_disable_eft_trace(vha);
2949
2950         /* Stop currently executing firmware. */
2951         qla2x00_try_to_stop_firmware(vha);
2952
2953         /* Turn adapter off line */
2954         vha->flags.online = 0;
2955
2956         /* turn-off interrupts on the card */
2957         if (ha->interrupts_on) {
2958                 vha->flags.init_done = 0;
2959                 ha->isp_ops->disable_intrs(ha);
2960         }
2961
2962         qla2x00_free_irqs(vha);
2963
2964         qla2x00_free_fw_dump(ha);
2965 }
2966
2967 static void
2968 qla2x00_remove_one(struct pci_dev *pdev)
2969 {
2970         scsi_qla_host_t *base_vha, *vha;
2971         struct qla_hw_data  *ha;
2972         unsigned long flags;
2973
2974         /*
2975          * If the PCI device is disabled that means that probe failed and any
2976          * resources should be have cleaned up on probe exit.
2977          */
2978         if (!atomic_read(&pdev->enable_cnt))
2979                 return;
2980
2981         base_vha = pci_get_drvdata(pdev);
2982         ha = base_vha->hw;
2983
2984         ha->flags.host_shutting_down = 1;
2985
2986         set_bit(UNLOADING, &base_vha->dpc_flags);
2987         if (IS_QLAFX00(ha))
2988                 qlafx00_driver_shutdown(base_vha, 20);
2989
2990         mutex_lock(&ha->vport_lock);
2991         while (ha->cur_vport_count) {
2992                 spin_lock_irqsave(&ha->vport_slock, flags);
2993
2994                 BUG_ON(base_vha->list.next == &ha->vp_list);
2995                 /* This assumes first entry in ha->vp_list is always base vha */
2996                 vha = list_first_entry(&base_vha->list, scsi_qla_host_t, list);
2997                 scsi_host_get(vha->host);
2998
2999                 spin_unlock_irqrestore(&ha->vport_slock, flags);
3000                 mutex_unlock(&ha->vport_lock);
3001
3002                 fc_vport_terminate(vha->fc_vport);
3003                 scsi_host_put(vha->host);
3004
3005                 mutex_lock(&ha->vport_lock);
3006         }
3007         mutex_unlock(&ha->vport_lock);
3008
3009         if (IS_QLA8031(ha)) {
3010                 ql_dbg(ql_dbg_p3p, base_vha, 0xb07e,
3011                     "Clearing fcoe driver presence.\n");
3012                 if (qla83xx_clear_drv_presence(base_vha) != QLA_SUCCESS)
3013                         ql_dbg(ql_dbg_p3p, base_vha, 0xb079,
3014                             "Error while clearing DRV-Presence.\n");
3015         }
3016
3017         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
3018
3019         qla2x00_dfs_remove(base_vha);
3020
3021         qla84xx_put_chip(base_vha);
3022
3023         /* Disable timer */
3024         if (base_vha->timer_active)
3025                 qla2x00_stop_timer(base_vha);
3026
3027         base_vha->flags.online = 0;
3028
3029         /* Flush the work queue and remove it */
3030         if (ha->wq) {
3031                 flush_workqueue(ha->wq);
3032                 destroy_workqueue(ha->wq);
3033                 ha->wq = NULL;
3034         }
3035
3036         /* Cancel all work and destroy DPC workqueues */
3037         if (ha->dpc_lp_wq) {
3038                 cancel_work_sync(&ha->idc_aen);
3039                 destroy_workqueue(ha->dpc_lp_wq);
3040                 ha->dpc_lp_wq = NULL;
3041         }
3042
3043         if (ha->dpc_hp_wq) {
3044                 cancel_work_sync(&ha->nic_core_reset);
3045                 cancel_work_sync(&ha->idc_state_handler);
3046                 cancel_work_sync(&ha->nic_core_unrecoverable);
3047                 destroy_workqueue(ha->dpc_hp_wq);
3048                 ha->dpc_hp_wq = NULL;
3049         }
3050
3051         /* Kill the kernel thread for this host */
3052         if (ha->dpc_thread) {
3053                 struct task_struct *t = ha->dpc_thread;
3054
3055                 /*
3056                  * qla2xxx_wake_dpc checks for ->dpc_thread
3057                  * so we need to zero it out.
3058                  */
3059                 ha->dpc_thread = NULL;
3060                 kthread_stop(t);
3061         }
3062         qlt_remove_target(ha, base_vha);
3063
3064         qla2x00_free_sysfs_attr(base_vha);
3065
3066         fc_remove_host(base_vha->host);
3067
3068         scsi_remove_host(base_vha->host);
3069
3070         qla2x00_free_device(base_vha);
3071
3072         scsi_host_put(base_vha->host);
3073
3074         if (IS_QLA8044(ha)) {
3075                 qla8044_idc_lock(ha);
3076                 qla8044_clear_drv_active(base_vha);
3077                 qla8044_idc_unlock(ha);
3078         }
3079         if (IS_QLA82XX(ha)) {
3080                 qla82xx_idc_lock(ha);
3081                 qla82xx_clear_drv_active(ha);
3082                 qla82xx_idc_unlock(ha);
3083
3084                 iounmap((device_reg_t __iomem *)ha->nx_pcibase);
3085                 if (!ql2xdbwr)
3086                         iounmap((device_reg_t __iomem *)ha->nxdb_wr_ptr);
3087         } else {
3088                 if (ha->iobase)
3089                         iounmap(ha->iobase);
3090
3091                 if (ha->cregbase)
3092                         iounmap(ha->cregbase);
3093
3094                 if (ha->mqiobase)
3095                         iounmap(ha->mqiobase);
3096
3097                 if (IS_QLA83XX(ha) && ha->msixbase)
3098                         iounmap(ha->msixbase);
3099         }
3100
3101         pci_release_selected_regions(ha->pdev, ha->bars);
3102         kfree(ha);
3103         ha = NULL;
3104
3105         pci_disable_pcie_error_reporting(pdev);
3106
3107         pci_disable_device(pdev);
3108 }
3109
3110 static void
3111 qla2x00_free_device(scsi_qla_host_t *vha)
3112 {
3113         struct qla_hw_data *ha = vha->hw;
3114
3115         qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
3116
3117         /* Disable timer */
3118         if (vha->timer_active)
3119                 qla2x00_stop_timer(vha);
3120
3121         qla2x00_stop_dpc_thread(vha);
3122
3123         qla25xx_delete_queues(vha);
3124         if (ha->flags.fce_enabled)
3125                 qla2x00_disable_fce_trace(vha, NULL, NULL);
3126
3127         if (ha->eft)
3128                 qla2x00_disable_eft_trace(vha);
3129
3130         /* Stop currently executing firmware. */
3131         qla2x00_try_to_stop_firmware(vha);
3132
3133         vha->flags.online = 0;
3134
3135         /* turn-off interrupts on the card */
3136         if (ha->interrupts_on) {
3137                 vha->flags.init_done = 0;
3138                 ha->isp_ops->disable_intrs(ha);
3139         }
3140
3141         qla2x00_free_irqs(vha);
3142
3143         qla2x00_free_fcports(vha);
3144
3145         qla2x00_mem_free(ha);
3146
3147         qla82xx_md_free(vha);
3148
3149         qla2x00_free_queues(ha);
3150 }
3151
3152 void qla2x00_free_fcports(struct scsi_qla_host *vha)
3153 {
3154         fc_port_t *fcport, *tfcport;
3155
3156         list_for_each_entry_safe(fcport, tfcport, &vha->vp_fcports, list) {
3157                 list_del(&fcport->list);
3158                 qla2x00_clear_loop_id(fcport);
3159                 kfree(fcport);
3160                 fcport = NULL;
3161         }
3162 }
3163
3164 static inline void
3165 qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport,
3166     int defer)
3167 {
3168         struct fc_rport *rport;
3169         scsi_qla_host_t *base_vha;
3170         unsigned long flags;
3171
3172         if (!fcport->rport)
3173                 return;
3174
3175         rport = fcport->rport;
3176         if (defer) {
3177                 base_vha = pci_get_drvdata(vha->hw->pdev);
3178                 spin_lock_irqsave(vha->host->host_lock, flags);
3179                 fcport->drport = rport;
3180                 spin_unlock_irqrestore(vha->host->host_lock, flags);
3181                 set_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
3182                 qla2xxx_wake_dpc(base_vha);
3183         } else {
3184                 fc_remote_port_delete(rport);
3185                 qlt_fc_port_deleted(vha, fcport);
3186         }
3187 }
3188
3189 /*
3190  * qla2x00_mark_device_lost Updates fcport state when device goes offline.
3191  *
3192  * Input: ha = adapter block pointer.  fcport = port structure pointer.
3193  *
3194  * Return: None.
3195  *
3196  * Context:
3197  */
3198 void qla2x00_mark_device_lost(scsi_qla_host_t *vha, fc_port_t *fcport,
3199     int do_login, int defer)
3200 {
3201         if (IS_QLAFX00(vha->hw)) {
3202                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3203                 qla2x00_schedule_rport_del(vha, fcport, defer);
3204                 return;
3205         }
3206
3207         if (atomic_read(&fcport->state) == FCS_ONLINE &&
3208             vha->vp_idx == fcport->vha->vp_idx) {
3209                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3210                 qla2x00_schedule_rport_del(vha, fcport, defer);
3211         }
3212         /*
3213          * We may need to retry the login, so don't change the state of the
3214          * port but do the retries.
3215          */
3216         if (atomic_read(&fcport->state) != FCS_DEVICE_DEAD)
3217                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3218
3219         if (!do_login)
3220                 return;
3221
3222         if (fcport->login_retry == 0) {
3223                 fcport->login_retry = vha->hw->login_retry_count;
3224                 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
3225
3226                 ql_dbg(ql_dbg_disc, vha, 0x2067,
3227                     "Port login retry %8phN, id = 0x%04x retry cnt=%d.\n",
3228                     fcport->port_name, fcport->loop_id, fcport->login_retry);
3229         }
3230 }
3231
3232 /*
3233  * qla2x00_mark_all_devices_lost
3234  *      Updates fcport state when device goes offline.
3235  *
3236  * Input:
3237  *      ha = adapter block pointer.
3238  *      fcport = port structure pointer.
3239  *
3240  * Return:
3241  *      None.
3242  *
3243  * Context:
3244  */
3245 void
3246 qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha, int defer)
3247 {
3248         fc_port_t *fcport;
3249
3250         list_for_each_entry(fcport, &vha->vp_fcports, list) {
3251                 if (vha->vp_idx != 0 && vha->vp_idx != fcport->vha->vp_idx)
3252                         continue;
3253
3254                 /*
3255                  * No point in marking the device as lost, if the device is
3256                  * already DEAD.
3257                  */
3258                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD)
3259                         continue;
3260                 if (atomic_read(&fcport->state) == FCS_ONLINE) {
3261                         qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3262                         if (defer)
3263                                 qla2x00_schedule_rport_del(vha, fcport, defer);
3264                         else if (vha->vp_idx == fcport->vha->vp_idx)
3265                                 qla2x00_schedule_rport_del(vha, fcport, defer);
3266                 }
3267         }
3268 }
3269
3270 /*
3271 * qla2x00_mem_alloc
3272 *      Allocates adapter memory.
3273 *
3274 * Returns:
3275 *      0  = success.
3276 *      !0  = failure.
3277 */
3278 static int
3279 qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
3280         struct req_que **req, struct rsp_que **rsp)
3281 {
3282         char    name[16];
3283
3284         ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size,
3285                 &ha->init_cb_dma, GFP_KERNEL);
3286         if (!ha->init_cb)
3287                 goto fail;
3288
3289         if (qlt_mem_alloc(ha) < 0)
3290                 goto fail_free_init_cb;
3291
3292         ha->gid_list = dma_alloc_coherent(&ha->pdev->dev,
3293                 qla2x00_gid_list_size(ha), &ha->gid_list_dma, GFP_KERNEL);
3294         if (!ha->gid_list)
3295                 goto fail_free_tgt_mem;
3296
3297         ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
3298         if (!ha->srb_mempool)
3299                 goto fail_free_gid_list;
3300
3301         if (IS_P3P_TYPE(ha)) {
3302                 /* Allocate cache for CT6 Ctx. */
3303                 if (!ctx_cachep) {
3304                         ctx_cachep = kmem_cache_create("qla2xxx_ctx",
3305                                 sizeof(struct ct6_dsd), 0,
3306                                 SLAB_HWCACHE_ALIGN, NULL);
3307                         if (!ctx_cachep)
3308                                 goto fail_free_gid_list;
3309                 }
3310                 ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ,
3311                         ctx_cachep);
3312                 if (!ha->ctx_mempool)
3313                         goto fail_free_srb_mempool;
3314                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0021,
3315                     "ctx_cachep=%p ctx_mempool=%p.\n",
3316                     ctx_cachep, ha->ctx_mempool);
3317         }
3318
3319         /* Get memory for cached NVRAM */
3320         ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL);
3321         if (!ha->nvram)
3322                 goto fail_free_ctx_mempool;
3323
3324         snprintf(name, sizeof(name), "%s_%d", QLA2XXX_DRIVER_NAME,
3325                 ha->pdev->device);
3326         ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3327                 DMA_POOL_SIZE, 8, 0);
3328         if (!ha->s_dma_pool)
3329                 goto fail_free_nvram;
3330
3331         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0022,
3332             "init_cb=%p gid_list=%p, srb_mempool=%p s_dma_pool=%p.\n",
3333             ha->init_cb, ha->gid_list, ha->srb_mempool, ha->s_dma_pool);
3334
3335         if (IS_P3P_TYPE(ha) || ql2xenabledif) {
3336                 ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3337                         DSD_LIST_DMA_POOL_SIZE, 8, 0);
3338                 if (!ha->dl_dma_pool) {
3339                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0023,
3340                             "Failed to allocate memory for dl_dma_pool.\n");
3341                         goto fail_s_dma_pool;
3342                 }
3343
3344                 ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3345                         FCP_CMND_DMA_POOL_SIZE, 8, 0);
3346                 if (!ha->fcp_cmnd_dma_pool) {
3347                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0024,
3348                             "Failed to allocate memory for fcp_cmnd_dma_pool.\n");
3349                         goto fail_dl_dma_pool;
3350                 }
3351                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0025,
3352                     "dl_dma_pool=%p fcp_cmnd_dma_pool=%p.\n",
3353                     ha->dl_dma_pool, ha->fcp_cmnd_dma_pool);
3354         }
3355
3356         /* Allocate memory for SNS commands */
3357         if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
3358         /* Get consistent memory allocated for SNS commands */
3359                 ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev,
3360                 sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL);
3361                 if (!ha->sns_cmd)
3362                         goto fail_dma_pool;
3363                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0026,
3364                     "sns_cmd: %p.\n", ha->sns_cmd);
3365         } else {
3366         /* Get consistent memory allocated for MS IOCB */
3367                 ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3368                         &ha->ms_iocb_dma);
3369                 if (!ha->ms_iocb)
3370                         goto fail_dma_pool;
3371         /* Get consistent memory allocated for CT SNS commands */
3372                 ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev,
3373                         sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL);
3374                 if (!ha->ct_sns)
3375                         goto fail_free_ms_iocb;
3376                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0027,
3377                     "ms_iocb=%p ct_sns=%p.\n",
3378                     ha->ms_iocb, ha->ct_sns);
3379         }
3380
3381         /* Allocate memory for request ring */
3382         *req = kzalloc(sizeof(struct req_que), GFP_KERNEL);
3383         if (!*req) {
3384                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0028,
3385                     "Failed to allocate memory for req.\n");
3386                 goto fail_req;
3387         }
3388         (*req)->length = req_len;
3389         (*req)->ring = dma_alloc_coherent(&ha->pdev->dev,
3390                 ((*req)->length + 1) * sizeof(request_t),
3391                 &(*req)->dma, GFP_KERNEL);
3392         if (!(*req)->ring) {
3393                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0029,
3394                     "Failed to allocate memory for req_ring.\n");
3395                 goto fail_req_ring;
3396         }
3397         /* Allocate memory for response ring */
3398         *rsp = kzalloc(sizeof(struct rsp_que), GFP_KERNEL);
3399         if (!*rsp) {
3400                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002a,
3401                     "Failed to allocate memory for rsp.\n");
3402                 goto fail_rsp;
3403         }
3404         (*rsp)->hw = ha;
3405         (*rsp)->length = rsp_len;
3406         (*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev,
3407                 ((*rsp)->length + 1) * sizeof(response_t),
3408                 &(*rsp)->dma, GFP_KERNEL);
3409         if (!(*rsp)->ring) {
3410                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002b,
3411                     "Failed to allocate memory for rsp_ring.\n");
3412                 goto fail_rsp_ring;
3413         }
3414         (*req)->rsp = *rsp;
3415         (*rsp)->req = *req;
3416         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002c,
3417             "req=%p req->length=%d req->ring=%p rsp=%p "
3418             "rsp->length=%d rsp->ring=%p.\n",
3419             *req, (*req)->length, (*req)->ring, *rsp, (*rsp)->length,
3420             (*rsp)->ring);
3421         /* Allocate memory for NVRAM data for vports */
3422         if (ha->nvram_npiv_size) {
3423                 ha->npiv_info = kzalloc(sizeof(struct qla_npiv_entry) *
3424                     ha->nvram_npiv_size, GFP_KERNEL);
3425                 if (!ha->npiv_info) {
3426                         ql_log_pci(ql_log_fatal, ha->pdev, 0x002d,
3427                             "Failed to allocate memory for npiv_info.\n");
3428                         goto fail_npiv_info;
3429                 }
3430         } else
3431                 ha->npiv_info = NULL;
3432
3433         /* Get consistent memory allocated for EX-INIT-CB. */
3434         if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha)) {
3435                 ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3436                     &ha->ex_init_cb_dma);
3437                 if (!ha->ex_init_cb)
3438                         goto fail_ex_init_cb;
3439                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002e,
3440                     "ex_init_cb=%p.\n", ha->ex_init_cb);
3441         }
3442
3443         INIT_LIST_HEAD(&ha->gbl_dsd_list);
3444
3445         /* Get consistent memory allocated for Async Port-Database. */
3446         if (!IS_FWI2_CAPABLE(ha)) {
3447                 ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3448                         &ha->async_pd_dma);
3449                 if (!ha->async_pd)
3450                         goto fail_async_pd;
3451                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002f,
3452                     "async_pd=%p.\n", ha->async_pd);
3453         }
3454
3455         INIT_LIST_HEAD(&ha->vp_list);
3456
3457         /* Allocate memory for our loop_id bitmap */
3458         ha->loop_id_map = kzalloc(BITS_TO_LONGS(LOOPID_MAP_SIZE) * sizeof(long),
3459             GFP_KERNEL);
3460         if (!ha->loop_id_map)
3461                 goto fail_async_pd;
3462         else {
3463                 qla2x00_set_reserved_loop_ids(ha);
3464                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0123,
3465                     "loop_id_map=%p. \n", ha->loop_id_map);
3466         }
3467
3468         return 1;
3469
3470 fail_async_pd:
3471         dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma);
3472 fail_ex_init_cb:
3473         kfree(ha->npiv_info);
3474 fail_npiv_info:
3475         dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) *
3476                 sizeof(response_t), (*rsp)->ring, (*rsp)->dma);
3477         (*rsp)->ring = NULL;
3478         (*rsp)->dma = 0;
3479 fail_rsp_ring:
3480         kfree(*rsp);
3481 fail_rsp:
3482         dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) *
3483                 sizeof(request_t), (*req)->ring, (*req)->dma);
3484         (*req)->ring = NULL;
3485         (*req)->dma = 0;
3486 fail_req_ring:
3487         kfree(*req);
3488 fail_req:
3489         dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
3490                 ha->ct_sns, ha->ct_sns_dma);
3491         ha->ct_sns = NULL;
3492         ha->ct_sns_dma = 0;
3493 fail_free_ms_iocb:
3494         dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
3495         ha->ms_iocb = NULL;
3496         ha->ms_iocb_dma = 0;
3497 fail_dma_pool:
3498         if (IS_QLA82XX(ha) || ql2xenabledif) {
3499                 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
3500                 ha->fcp_cmnd_dma_pool = NULL;
3501         }
3502 fail_dl_dma_pool:
3503         if (IS_QLA82XX(ha) || ql2xenabledif) {
3504                 dma_pool_destroy(ha->dl_dma_pool);
3505                 ha->dl_dma_pool = NULL;
3506         }
3507 fail_s_dma_pool:
3508         dma_pool_destroy(ha->s_dma_pool);
3509         ha->s_dma_pool = NULL;
3510 fail_free_nvram:
3511         kfree(ha->nvram);
3512         ha->nvram = NULL;
3513 fail_free_ctx_mempool:
3514         mempool_destroy(ha->ctx_mempool);
3515         ha->ctx_mempool = NULL;
3516 fail_free_srb_mempool:
3517         mempool_destroy(ha->srb_mempool);
3518         ha->srb_mempool = NULL;
3519 fail_free_gid_list:
3520         dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
3521         ha->gid_list,
3522         ha->gid_list_dma);
3523         ha->gid_list = NULL;
3524         ha->gid_list_dma = 0;
3525 fail_free_tgt_mem:
3526         qlt_mem_free(ha);
3527 fail_free_init_cb:
3528         dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb,
3529         ha->init_cb_dma);
3530         ha->init_cb = NULL;
3531         ha->init_cb_dma = 0;
3532 fail:
3533         ql_log(ql_log_fatal, NULL, 0x0030,
3534             "Memory allocation failure.\n");
3535         return -ENOMEM;
3536 }
3537
3538 /*
3539 * qla2x00_free_fw_dump
3540 *       Frees fw dump stuff.
3541 *
3542 * Input:
3543 *       ha = adapter block pointer
3544 */
3545 static void
3546 qla2x00_free_fw_dump(struct qla_hw_data *ha)
3547 {
3548         if (ha->fce)
3549                 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, ha->fce,
3550                     ha->fce_dma);
3551
3552         if (ha->fw_dump) {
3553                 if (ha->eft)
3554                         dma_free_coherent(&ha->pdev->dev,
3555                             ntohl(ha->fw_dump->eft_size), ha->eft, ha->eft_dma);
3556                 vfree(ha->fw_dump);
3557         }
3558         ha->fce = NULL;
3559         ha->fce_dma = 0;
3560         ha->eft = NULL;
3561         ha->eft_dma = 0;
3562         ha->fw_dump = NULL;
3563         ha->fw_dumped = 0;
3564         ha->fw_dump_reading = 0;
3565 }
3566
3567 /*
3568 * qla2x00_mem_free
3569 *      Frees all adapter allocated memory.
3570 *
3571 * Input:
3572 *      ha = adapter block pointer.
3573 */
3574 static void
3575 qla2x00_mem_free(struct qla_hw_data *ha)
3576 {
3577         qla2x00_free_fw_dump(ha);
3578
3579         if (ha->mctp_dump)
3580                 dma_free_coherent(&ha->pdev->dev, MCTP_DUMP_SIZE, ha->mctp_dump,
3581                     ha->mctp_dump_dma);
3582
3583         if (ha->srb_mempool)
3584                 mempool_destroy(ha->srb_mempool);
3585
3586         if (ha->dcbx_tlv)
3587                 dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE,
3588                     ha->dcbx_tlv, ha->dcbx_tlv_dma);
3589
3590         if (ha->xgmac_data)
3591                 dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE,
3592                     ha->xgmac_data, ha->xgmac_data_dma);
3593
3594         if (ha->sns_cmd)
3595                 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
3596                 ha->sns_cmd, ha->sns_cmd_dma);
3597
3598         if (ha->ct_sns)
3599                 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
3600                 ha->ct_sns, ha->ct_sns_dma);
3601
3602         if (ha->sfp_data)
3603                 dma_pool_free(ha->s_dma_pool, ha->sfp_data, ha->sfp_data_dma);
3604
3605         if (ha->ms_iocb)
3606                 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
3607
3608         if (ha->ex_init_cb)
3609                 dma_pool_free(ha->s_dma_pool,
3610                         ha->ex_init_cb, ha->ex_init_cb_dma);
3611
3612         if (ha->async_pd)
3613                 dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
3614
3615         if (ha->s_dma_pool)
3616                 dma_pool_destroy(ha->s_dma_pool);
3617
3618         if (ha->gid_list)
3619                 dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
3620                 ha->gid_list, ha->gid_list_dma);
3621
3622         if (IS_QLA82XX(ha)) {
3623                 if (!list_empty(&ha->gbl_dsd_list)) {
3624                         struct dsd_dma *dsd_ptr, *tdsd_ptr;
3625
3626                         /* clean up allocated prev pool */
3627                         list_for_each_entry_safe(dsd_ptr,
3628                                 tdsd_ptr, &ha->gbl_dsd_list, list) {
3629                                 dma_pool_free(ha->dl_dma_pool,
3630                                 dsd_ptr->dsd_addr, dsd_ptr->dsd_list_dma);
3631                                 list_del(&dsd_ptr->list);
3632                                 kfree(dsd_ptr);
3633                         }
3634                 }
3635         }
3636
3637         if (ha->dl_dma_pool)
3638                 dma_pool_destroy(ha->dl_dma_pool);
3639
3640         if (ha->fcp_cmnd_dma_pool)
3641                 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
3642
3643         if (ha->ctx_mempool)
3644                 mempool_destroy(ha->ctx_mempool);
3645
3646         qlt_mem_free(ha);
3647
3648         if (ha->init_cb)
3649                 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size,
3650                         ha->init_cb, ha->init_cb_dma);
3651         vfree(ha->optrom_buffer);
3652         kfree(ha->nvram);
3653         kfree(ha->npiv_info);
3654         kfree(ha->swl);
3655         kfree(ha->loop_id_map);
3656
3657         ha->srb_mempool = NULL;
3658         ha->ctx_mempool = NULL;
3659         ha->sns_cmd = NULL;
3660         ha->sns_cmd_dma = 0;
3661         ha->ct_sns = NULL;
3662         ha->ct_sns_dma = 0;
3663         ha->ms_iocb = NULL;
3664         ha->ms_iocb_dma = 0;
3665         ha->init_cb = NULL;
3666         ha->init_cb_dma = 0;
3667         ha->ex_init_cb = NULL;
3668         ha->ex_init_cb_dma = 0;
3669         ha->async_pd = NULL;
3670         ha->async_pd_dma = 0;
3671
3672         ha->s_dma_pool = NULL;
3673         ha->dl_dma_pool = NULL;
3674         ha->fcp_cmnd_dma_pool = NULL;
3675
3676         ha->gid_list = NULL;
3677         ha->gid_list_dma = 0;
3678
3679         ha->tgt.atio_ring = NULL;
3680         ha->tgt.atio_dma = 0;
3681         ha->tgt.tgt_vp_map = NULL;
3682 }
3683
3684 struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *sht,
3685                                                 struct qla_hw_data *ha)
3686 {
3687         struct Scsi_Host *host;
3688         struct scsi_qla_host *vha = NULL;
3689
3690         host = scsi_host_alloc(sht, sizeof(scsi_qla_host_t));
3691         if (host == NULL) {
3692                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0107,
3693                     "Failed to allocate host from the scsi layer, aborting.\n");
3694                 goto fail;
3695         }
3696
3697         /* Clear our data area */
3698         vha = shost_priv(host);
3699         memset(vha, 0, sizeof(scsi_qla_host_t));
3700
3701         vha->host = host;
3702         vha->host_no = host->host_no;
3703         vha->hw = ha;
3704
3705         INIT_LIST_HEAD(&vha->vp_fcports);
3706         INIT_LIST_HEAD(&vha->work_list);
3707         INIT_LIST_HEAD(&vha->list);
3708
3709         spin_lock_init(&vha->work_lock);
3710
3711         sprintf(vha->host_str, "%s_%ld", QLA2XXX_DRIVER_NAME, vha->host_no);
3712         ql_dbg(ql_dbg_init, vha, 0x0041,
3713             "Allocated the host=%p hw=%p vha=%p dev_name=%s",
3714             vha->host, vha->hw, vha,
3715             dev_name(&(ha->pdev->dev)));
3716
3717         return vha;
3718
3719 fail:
3720         return vha;
3721 }
3722
3723 static struct qla_work_evt *
3724 qla2x00_alloc_work(struct scsi_qla_host *vha, enum qla_work_type type)
3725 {
3726         struct qla_work_evt *e;
3727         uint8_t bail;
3728
3729         QLA_VHA_MARK_BUSY(vha, bail);
3730         if (bail)
3731                 return NULL;
3732
3733         e = kzalloc(sizeof(struct qla_work_evt), GFP_ATOMIC);
3734         if (!e) {
3735                 QLA_VHA_MARK_NOT_BUSY(vha);
3736                 return NULL;
3737         }
3738
3739         INIT_LIST_HEAD(&e->list);
3740         e->type = type;
3741         e->flags = QLA_EVT_FLAG_FREE;
3742         return e;
3743 }
3744
3745 static int
3746 qla2x00_post_work(struct scsi_qla_host *vha, struct qla_work_evt *e)
3747 {
3748         unsigned long flags;
3749
3750         spin_lock_irqsave(&vha->work_lock, flags);
3751         list_add_tail(&e->list, &vha->work_list);
3752         spin_unlock_irqrestore(&vha->work_lock, flags);
3753         qla2xxx_wake_dpc(vha);
3754
3755         return QLA_SUCCESS;
3756 }
3757
3758 int
3759 qla2x00_post_aen_work(struct scsi_qla_host *vha, enum fc_host_event_code code,
3760     u32 data)
3761 {
3762         struct qla_work_evt *e;
3763
3764         e = qla2x00_alloc_work(vha, QLA_EVT_AEN);
3765         if (!e)
3766                 return QLA_FUNCTION_FAILED;
3767
3768         e->u.aen.code = code;
3769         e->u.aen.data = data;
3770         return qla2x00_post_work(vha, e);
3771 }
3772
3773 int
3774 qla2x00_post_idc_ack_work(struct scsi_qla_host *vha, uint16_t *mb)
3775 {
3776         struct qla_work_evt *e;
3777
3778         e = qla2x00_alloc_work(vha, QLA_EVT_IDC_ACK);
3779         if (!e)
3780                 return QLA_FUNCTION_FAILED;
3781
3782         memcpy(e->u.idc_ack.mb, mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
3783         return qla2x00_post_work(vha, e);
3784 }
3785
3786 #define qla2x00_post_async_work(name, type)     \
3787 int qla2x00_post_async_##name##_work(           \
3788     struct scsi_qla_host *vha,                  \
3789     fc_port_t *fcport, uint16_t *data)          \
3790 {                                               \
3791         struct qla_work_evt *e;                 \
3792                                                 \
3793         e = qla2x00_alloc_work(vha, type);      \
3794         if (!e)                                 \
3795                 return QLA_FUNCTION_FAILED;     \
3796                                                 \
3797         e->u.logio.fcport = fcport;             \
3798         if (data) {                             \
3799                 e->u.logio.data[0] = data[0];   \
3800                 e->u.logio.data[1] = data[1];   \
3801         }                                       \
3802         return qla2x00_post_work(vha, e);       \
3803 }
3804
3805 qla2x00_post_async_work(login, QLA_EVT_ASYNC_LOGIN);
3806 qla2x00_post_async_work(login_done, QLA_EVT_ASYNC_LOGIN_DONE);
3807 qla2x00_post_async_work(logout, QLA_EVT_ASYNC_LOGOUT);
3808 qla2x00_post_async_work(logout_done, QLA_EVT_ASYNC_LOGOUT_DONE);
3809 qla2x00_post_async_work(adisc, QLA_EVT_ASYNC_ADISC);
3810 qla2x00_post_async_work(adisc_done, QLA_EVT_ASYNC_ADISC_DONE);
3811
3812 int
3813 qla2x00_post_uevent_work(struct scsi_qla_host *vha, u32 code)
3814 {
3815         struct qla_work_evt *e;
3816
3817         e = qla2x00_alloc_work(vha, QLA_EVT_UEVENT);
3818         if (!e)
3819                 return QLA_FUNCTION_FAILED;
3820
3821         e->u.uevent.code = code;
3822         return qla2x00_post_work(vha, e);
3823 }
3824
3825 static void
3826 qla2x00_uevent_emit(struct scsi_qla_host *vha, u32 code)
3827 {
3828         char event_string[40];
3829         char *envp[] = { event_string, NULL };
3830
3831         switch (code) {
3832         case QLA_UEVENT_CODE_FW_DUMP:
3833                 snprintf(event_string, sizeof(event_string), "FW_DUMP=%ld",
3834                     vha->host_no);
3835                 break;
3836         default:
3837                 /* do nothing */
3838                 break;
3839         }
3840         kobject_uevent_env(&vha->hw->pdev->dev.kobj, KOBJ_CHANGE, envp);
3841 }
3842
3843 int
3844 qlafx00_post_aenfx_work(struct scsi_qla_host *vha,  uint32_t evtcode,
3845                         uint32_t *data, int cnt)
3846 {
3847         struct qla_work_evt *e;
3848
3849         e = qla2x00_alloc_work(vha, QLA_EVT_AENFX);
3850         if (!e)
3851                 return QLA_FUNCTION_FAILED;
3852
3853         e->u.aenfx.evtcode = evtcode;
3854         e->u.aenfx.count = cnt;
3855         memcpy(e->u.aenfx.mbx, data, sizeof(*data) * cnt);
3856         return qla2x00_post_work(vha, e);
3857 }
3858
3859 void
3860 qla2x00_do_work(struct scsi_qla_host *vha)
3861 {
3862         struct qla_work_evt *e, *tmp;
3863         unsigned long flags;
3864         LIST_HEAD(work);
3865
3866         spin_lock_irqsave(&vha->work_lock, flags);
3867         list_splice_init(&vha->work_list, &work);
3868         spin_unlock_irqrestore(&vha->work_lock, flags);
3869
3870         list_for_each_entry_safe(e, tmp, &work, list) {
3871                 list_del_init(&e->list);
3872
3873                 switch (e->type) {
3874                 case QLA_EVT_AEN:
3875                         fc_host_post_event(vha->host, fc_get_event_number(),
3876                             e->u.aen.code, e->u.aen.data);
3877                         break;
3878                 case QLA_EVT_IDC_ACK:
3879                         qla81xx_idc_ack(vha, e->u.idc_ack.mb);
3880                         break;
3881                 case QLA_EVT_ASYNC_LOGIN:
3882                         qla2x00_async_login(vha, e->u.logio.fcport,
3883                             e->u.logio.data);
3884                         break;
3885                 case QLA_EVT_ASYNC_LOGIN_DONE:
3886                         qla2x00_async_login_done(vha, e->u.logio.fcport,
3887                             e->u.logio.data);
3888                         break;
3889                 case QLA_EVT_ASYNC_LOGOUT:
3890                         qla2x00_async_logout(vha, e->u.logio.fcport);
3891                         break;
3892                 case QLA_EVT_ASYNC_LOGOUT_DONE:
3893                         qla2x00_async_logout_done(vha, e->u.logio.fcport,
3894                             e->u.logio.data);
3895                         break;
3896                 case QLA_EVT_ASYNC_ADISC:
3897                         qla2x00_async_adisc(vha, e->u.logio.fcport,
3898                             e->u.logio.data);
3899                         break;
3900                 case QLA_EVT_ASYNC_ADISC_DONE:
3901                         qla2x00_async_adisc_done(vha, e->u.logio.fcport,
3902                             e->u.logio.data);
3903                         break;
3904                 case QLA_EVT_UEVENT:
3905                         qla2x00_uevent_emit(vha, e->u.uevent.code);
3906                         break;
3907                 case QLA_EVT_AENFX:
3908                         qlafx00_process_aen(vha, e);
3909                         break;
3910                 }
3911                 if (e->flags & QLA_EVT_FLAG_FREE)
3912                         kfree(e);
3913
3914                 /* For each work completed decrement vha ref count */
3915                 QLA_VHA_MARK_NOT_BUSY(vha);
3916         }
3917 }
3918
3919 /* Relogins all the fcports of a vport
3920  * Context: dpc thread
3921  */
3922 void qla2x00_relogin(struct scsi_qla_host *vha)
3923 {
3924         fc_port_t       *fcport;
3925         int status;
3926         uint16_t        next_loopid = 0;
3927         struct qla_hw_data *ha = vha->hw;
3928         uint16_t data[2];
3929
3930         list_for_each_entry(fcport, &vha->vp_fcports, list) {
3931         /*
3932          * If the port is not ONLINE then try to login
3933          * to it if we haven't run out of retries.
3934          */
3935                 if (atomic_read(&fcport->state) != FCS_ONLINE &&
3936                     fcport->login_retry && !(fcport->flags & FCF_ASYNC_SENT)) {
3937                         fcport->login_retry--;
3938                         if (fcport->flags & FCF_FABRIC_DEVICE) {
3939                                 if (fcport->flags & FCF_FCP2_DEVICE)
3940                                         ha->isp_ops->fabric_logout(vha,
3941                                                         fcport->loop_id,
3942                                                         fcport->d_id.b.domain,
3943                                                         fcport->d_id.b.area,
3944                                                         fcport->d_id.b.al_pa);
3945
3946                                 if (fcport->loop_id == FC_NO_LOOP_ID) {
3947                                         fcport->loop_id = next_loopid =
3948                                             ha->min_external_loopid;
3949                                         status = qla2x00_find_new_loop_id(
3950                                             vha, fcport);
3951                                         if (status != QLA_SUCCESS) {
3952                                                 /* Ran out of IDs to use */
3953                                                 break;
3954                                         }
3955                                 }
3956
3957                                 if (IS_ALOGIO_CAPABLE(ha)) {
3958                                         fcport->flags |= FCF_ASYNC_SENT;
3959                                         data[0] = 0;
3960                                         data[1] = QLA_LOGIO_LOGIN_RETRIED;
3961                                         status = qla2x00_post_async_login_work(
3962                                             vha, fcport, data);
3963                                         if (status == QLA_SUCCESS)
3964                                                 continue;
3965                                         /* Attempt a retry. */
3966                                         status = 1;
3967                                 } else {
3968                                         status = qla2x00_fabric_login(vha,
3969                                             fcport, &next_loopid);
3970                                         if (status ==  QLA_SUCCESS) {
3971                                                 int status2;
3972                                                 uint8_t opts;
3973
3974                                                 opts = 0;
3975                                                 if (fcport->flags &
3976                                                     FCF_FCP2_DEVICE)
3977                                                         opts |= BIT_1;
3978                                                 status2 =
3979                                                     qla2x00_get_port_database(
3980                                                         vha, fcport, opts);
3981                                                 if (status2 != QLA_SUCCESS)
3982                                                         status = 1;
3983                                         }
3984                                 }
3985                         } else
3986                                 status = qla2x00_local_device_login(vha,
3987                                                                 fcport);
3988
3989                         if (status == QLA_SUCCESS) {
3990                                 fcport->old_loop_id = fcport->loop_id;
3991
3992                                 ql_dbg(ql_dbg_disc, vha, 0x2003,
3993                                     "Port login OK: logged in ID 0x%x.\n",
3994                                     fcport->loop_id);
3995
3996                                 qla2x00_update_fcport(vha, fcport);
3997
3998                         } else if (status == 1) {
3999                                 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
4000                                 /* retry the login again */
4001                                 ql_dbg(ql_dbg_disc, vha, 0x2007,
4002                                     "Retrying %d login again loop_id 0x%x.\n",
4003                                     fcport->login_retry, fcport->loop_id);
4004                         } else {
4005                                 fcport->login_retry = 0;
4006                         }
4007
4008                         if (fcport->login_retry == 0 && status != QLA_SUCCESS)
4009                                 qla2x00_clear_loop_id(fcport);
4010                 }
4011                 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
4012                         break;
4013         }
4014 }
4015
4016 /* Schedule work on any of the dpc-workqueues */
4017 void
4018 qla83xx_schedule_work(scsi_qla_host_t *base_vha, int work_code)
4019 {
4020         struct qla_hw_data *ha = base_vha->hw;
4021
4022         switch (work_code) {
4023         case MBA_IDC_AEN: /* 0x8200 */
4024                 if (ha->dpc_lp_wq)
4025                         queue_work(ha->dpc_lp_wq, &ha->idc_aen);
4026                 break;
4027
4028         case QLA83XX_NIC_CORE_RESET: /* 0x1 */
4029                 if (!ha->flags.nic_core_reset_hdlr_active) {
4030                         if (ha->dpc_hp_wq)
4031                                 queue_work(ha->dpc_hp_wq, &ha->nic_core_reset);
4032                 } else
4033                         ql_dbg(ql_dbg_p3p, base_vha, 0xb05e,
4034                             "NIC Core reset is already active. Skip "
4035                             "scheduling it again.\n");
4036                 break;
4037         case QLA83XX_IDC_STATE_HANDLER: /* 0x2 */
4038                 if (ha->dpc_hp_wq)
4039                         queue_work(ha->dpc_hp_wq, &ha->idc_state_handler);
4040                 break;
4041         case QLA83XX_NIC_CORE_UNRECOVERABLE: /* 0x3 */
4042                 if (ha->dpc_hp_wq)
4043                         queue_work(ha->dpc_hp_wq, &ha->nic_core_unrecoverable);
4044                 break;
4045         default:
4046                 ql_log(ql_log_warn, base_vha, 0xb05f,
4047                     "Unknow work-code=0x%x.\n", work_code);
4048         }
4049
4050         return;
4051 }
4052
4053 /* Work: Perform NIC Core Unrecoverable state handling */
4054 void
4055 qla83xx_nic_core_unrecoverable_work(struct work_struct *work)
4056 {
4057         struct qla_hw_data *ha =
4058                 container_of(work, struct qla_hw_data, nic_core_unrecoverable);
4059         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4060         uint32_t dev_state = 0;
4061
4062         qla83xx_idc_lock(base_vha, 0);
4063         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4064         qla83xx_reset_ownership(base_vha);
4065         if (ha->flags.nic_core_reset_owner) {
4066                 ha->flags.nic_core_reset_owner = 0;
4067                 qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
4068                     QLA8XXX_DEV_FAILED);
4069                 ql_log(ql_log_info, base_vha, 0xb060, "HW State: FAILED.\n");
4070                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
4071         }
4072         qla83xx_idc_unlock(base_vha, 0);
4073 }
4074
4075 /* Work: Execute IDC state handler */
4076 void
4077 qla83xx_idc_state_handler_work(struct work_struct *work)
4078 {
4079         struct qla_hw_data *ha =
4080                 container_of(work, struct qla_hw_data, idc_state_handler);
4081         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4082         uint32_t dev_state = 0;
4083
4084         qla83xx_idc_lock(base_vha, 0);
4085         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4086         if (dev_state == QLA8XXX_DEV_FAILED ||
4087                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT)
4088                 qla83xx_idc_state_handler(base_vha);
4089         qla83xx_idc_unlock(base_vha, 0);
4090 }
4091
4092 static int
4093 qla83xx_check_nic_core_fw_alive(scsi_qla_host_t *base_vha)
4094 {
4095         int rval = QLA_SUCCESS;
4096         unsigned long heart_beat_wait = jiffies + (1 * HZ);
4097         uint32_t heart_beat_counter1, heart_beat_counter2;
4098
4099         do {
4100                 if (time_after(jiffies, heart_beat_wait)) {
4101                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07c,
4102                             "Nic Core f/w is not alive.\n");
4103                         rval = QLA_FUNCTION_FAILED;
4104                         break;
4105                 }
4106
4107                 qla83xx_idc_lock(base_vha, 0);
4108                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
4109                     &heart_beat_counter1);
4110                 qla83xx_idc_unlock(base_vha, 0);
4111                 msleep(100);
4112                 qla83xx_idc_lock(base_vha, 0);
4113                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
4114                     &heart_beat_counter2);
4115                 qla83xx_idc_unlock(base_vha, 0);
4116         } while (heart_beat_counter1 == heart_beat_counter2);
4117
4118         return rval;
4119 }
4120
4121 /* Work: Perform NIC Core Reset handling */
4122 void
4123 qla83xx_nic_core_reset_work(struct work_struct *work)
4124 {
4125         struct qla_hw_data *ha =
4126                 container_of(work, struct qla_hw_data, nic_core_reset);
4127         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4128         uint32_t dev_state = 0;
4129
4130         if (IS_QLA2031(ha)) {
4131                 if (qla2xxx_mctp_dump(base_vha) != QLA_SUCCESS)
4132                         ql_log(ql_log_warn, base_vha, 0xb081,
4133                             "Failed to dump mctp\n");
4134                 return;
4135         }
4136
4137         if (!ha->flags.nic_core_reset_hdlr_active) {
4138                 if (qla83xx_check_nic_core_fw_alive(base_vha) == QLA_SUCCESS) {
4139                         qla83xx_idc_lock(base_vha, 0);
4140                         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE,
4141                             &dev_state);
4142                         qla83xx_idc_unlock(base_vha, 0);
4143                         if (dev_state != QLA8XXX_DEV_NEED_RESET) {
4144                                 ql_dbg(ql_dbg_p3p, base_vha, 0xb07a,
4145                                     "Nic Core f/w is alive.\n");
4146                                 return;
4147                         }
4148                 }
4149
4150                 ha->flags.nic_core_reset_hdlr_active = 1;
4151                 if (qla83xx_nic_core_reset(base_vha)) {
4152                         /* NIC Core reset failed. */
4153                         ql_dbg(ql_dbg_p3p, base_vha, 0xb061,
4154                             "NIC Core reset failed.\n");
4155                 }
4156                 ha->flags.nic_core_reset_hdlr_active = 0;
4157         }
4158 }
4159
4160 /* Work: Handle 8200 IDC aens */
4161 void
4162 qla83xx_service_idc_aen(struct work_struct *work)
4163 {
4164         struct qla_hw_data *ha =
4165                 container_of(work, struct qla_hw_data, idc_aen);
4166         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4167         uint32_t dev_state, idc_control;
4168
4169         qla83xx_idc_lock(base_vha, 0);
4170         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4171         qla83xx_rd_reg(base_vha, QLA83XX_IDC_CONTROL, &idc_control);
4172         qla83xx_idc_unlock(base_vha, 0);
4173         if (dev_state == QLA8XXX_DEV_NEED_RESET) {
4174                 if (idc_control & QLA83XX_IDC_GRACEFUL_RESET) {
4175                         ql_dbg(ql_dbg_p3p, base_vha, 0xb062,
4176                             "Application requested NIC Core Reset.\n");
4177                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
4178                 } else if (qla83xx_check_nic_core_fw_alive(base_vha) ==
4179                     QLA_SUCCESS) {
4180                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07b,
4181                             "Other protocol driver requested NIC Core Reset.\n");
4182                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
4183                 }
4184         } else if (dev_state == QLA8XXX_DEV_FAILED ||
4185                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT) {
4186                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
4187         }
4188 }
4189
4190 static void
4191 qla83xx_wait_logic(void)
4192 {
4193         int i;
4194
4195         /* Yield CPU */
4196         if (!in_interrupt()) {
4197                 /*
4198                  * Wait about 200ms before retrying again.
4199                  * This controls the number of retries for single
4200                  * lock operation.
4201                  */
4202                 msleep(100);
4203                 schedule();
4204         } else {
4205                 for (i = 0; i < 20; i++)
4206                         cpu_relax(); /* This a nop instr on i386 */
4207         }
4208 }
4209
4210 static int
4211 qla83xx_force_lock_recovery(scsi_qla_host_t *base_vha)
4212 {
4213         int rval;
4214         uint32_t data;
4215         uint32_t idc_lck_rcvry_stage_mask = 0x3;
4216         uint32_t idc_lck_rcvry_owner_mask = 0x3c;
4217         struct qla_hw_data *ha = base_vha->hw;
4218         ql_dbg(ql_dbg_p3p, base_vha, 0xb086,
4219             "Trying force recovery of the IDC lock.\n");
4220
4221         rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY, &data);
4222         if (rval)
4223                 return rval;
4224
4225         if ((data & idc_lck_rcvry_stage_mask) > 0) {
4226                 return QLA_SUCCESS;
4227         } else {
4228                 data = (IDC_LOCK_RECOVERY_STAGE1) | (ha->portnum << 2);
4229                 rval = qla83xx_wr_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
4230                     data);
4231                 if (rval)
4232                         return rval;
4233
4234                 msleep(200);
4235
4236                 rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
4237                     &data);
4238                 if (rval)
4239                         return rval;
4240
4241                 if (((data & idc_lck_rcvry_owner_mask) >> 2) == ha->portnum) {
4242                         data &= (IDC_LOCK_RECOVERY_STAGE2 |
4243                                         ~(idc_lck_rcvry_stage_mask));
4244                         rval = qla83xx_wr_reg(base_vha,
4245                             QLA83XX_IDC_LOCK_RECOVERY, data);
4246                         if (rval)
4247                                 return rval;
4248
4249                         /* Forcefully perform IDC UnLock */
4250                         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK,
4251                             &data);
4252                         if (rval)
4253                                 return rval;
4254                         /* Clear lock-id by setting 0xff */
4255                         rval = qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
4256                             0xff);
4257                         if (rval)
4258                                 return rval;
4259                         /* Clear lock-recovery by setting 0x0 */
4260                         rval = qla83xx_wr_reg(base_vha,
4261                             QLA83XX_IDC_LOCK_RECOVERY, 0x0);
4262                         if (rval)
4263                                 return rval;
4264                 } else
4265                         return QLA_SUCCESS;
4266         }
4267
4268         return rval;
4269 }
4270
4271 static int
4272 qla83xx_idc_lock_recovery(scsi_qla_host_t *base_vha)
4273 {
4274         int rval = QLA_SUCCESS;
4275         uint32_t o_drv_lockid, n_drv_lockid;
4276         unsigned long lock_recovery_timeout;
4277
4278         lock_recovery_timeout = jiffies + QLA83XX_MAX_LOCK_RECOVERY_WAIT;
4279 retry_lockid:
4280         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &o_drv_lockid);
4281         if (rval)
4282                 goto exit;
4283
4284         /* MAX wait time before forcing IDC Lock recovery = 2 secs */
4285         if (time_after_eq(jiffies, lock_recovery_timeout)) {
4286                 if (qla83xx_force_lock_recovery(base_vha) == QLA_SUCCESS)
4287                         return QLA_SUCCESS;
4288                 else
4289                         return QLA_FUNCTION_FAILED;
4290         }
4291
4292         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &n_drv_lockid);
4293         if (rval)
4294                 goto exit;
4295
4296         if (o_drv_lockid == n_drv_lockid) {
4297                 qla83xx_wait_logic();
4298                 goto retry_lockid;
4299         } else
4300                 return QLA_SUCCESS;
4301
4302 exit:
4303         return rval;
4304 }
4305
4306 void
4307 qla83xx_idc_lock(scsi_qla_host_t *base_vha, uint16_t requester_id)
4308 {
4309         uint16_t options = (requester_id << 15) | BIT_6;
4310         uint32_t data;
4311         uint32_t lock_owner;
4312         struct qla_hw_data *ha = base_vha->hw;
4313
4314         /* IDC-lock implementation using driver-lock/lock-id remote registers */
4315 retry_lock:
4316         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCK, &data)
4317             == QLA_SUCCESS) {
4318                 if (data) {
4319                         /* Setting lock-id to our function-number */
4320                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
4321                             ha->portnum);
4322                 } else {
4323                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID,
4324                             &lock_owner);
4325                         ql_dbg(ql_dbg_p3p, base_vha, 0xb063,
4326                             "Failed to acquire IDC lock, acquired by %d, "
4327                             "retrying...\n", lock_owner);
4328
4329                         /* Retry/Perform IDC-Lock recovery */
4330                         if (qla83xx_idc_lock_recovery(base_vha)
4331                             == QLA_SUCCESS) {
4332                                 qla83xx_wait_logic();
4333                                 goto retry_lock;
4334                         } else
4335                                 ql_log(ql_log_warn, base_vha, 0xb075,
4336                                     "IDC Lock recovery FAILED.\n");
4337                 }
4338
4339         }
4340
4341         return;
4342
4343         /* XXX: IDC-lock implementation using access-control mbx */
4344 retry_lock2:
4345         if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
4346                 ql_dbg(ql_dbg_p3p, base_vha, 0xb072,
4347                     "Failed to acquire IDC lock. retrying...\n");
4348                 /* Retry/Perform IDC-Lock recovery */
4349                 if (qla83xx_idc_lock_recovery(base_vha) == QLA_SUCCESS) {
4350                         qla83xx_wait_logic();
4351                         goto retry_lock2;
4352                 } else
4353                         ql_log(ql_log_warn, base_vha, 0xb076,
4354                             "IDC Lock recovery FAILED.\n");
4355         }
4356
4357         return;
4358 }
4359
4360 void
4361 qla83xx_idc_unlock(scsi_qla_host_t *base_vha, uint16_t requester_id)
4362 {
4363         uint16_t options = (requester_id << 15) | BIT_7, retry;
4364         uint32_t data;
4365         struct qla_hw_data *ha = base_vha->hw;
4366
4367         /* IDC-unlock implementation using driver-unlock/lock-id
4368          * remote registers
4369          */
4370         retry = 0;
4371 retry_unlock:
4372         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &data)
4373             == QLA_SUCCESS) {
4374                 if (data == ha->portnum) {
4375                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK, &data);
4376                         /* Clearing lock-id by setting 0xff */
4377                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID, 0xff);
4378                 } else if (retry < 10) {
4379                         /* SV: XXX: IDC unlock retrying needed here? */
4380
4381                         /* Retry for IDC-unlock */
4382                         qla83xx_wait_logic();
4383                         retry++;
4384                         ql_dbg(ql_dbg_p3p, base_vha, 0xb064,
4385                             "Failed to release IDC lock, retyring=%d\n", retry);
4386                         goto retry_unlock;
4387                 }
4388         } else if (retry < 10) {
4389                 /* Retry for IDC-unlock */
4390                 qla83xx_wait_logic();
4391                 retry++;
4392                 ql_dbg(ql_dbg_p3p, base_vha, 0xb065,
4393                     "Failed to read drv-lockid, retyring=%d\n", retry);
4394                 goto retry_unlock;
4395         }
4396
4397         return;
4398
4399         /* XXX: IDC-unlock implementation using access-control mbx */
4400         retry = 0;
4401 retry_unlock2:
4402         if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
4403                 if (retry < 10) {
4404                         /* Retry for IDC-unlock */
4405                         qla83xx_wait_logic();
4406                         retry++;
4407                         ql_dbg(ql_dbg_p3p, base_vha, 0xb066,
4408                             "Failed to release IDC lock, retyring=%d\n", retry);
4409                         goto retry_unlock2;
4410                 }
4411         }
4412
4413         return;
4414 }
4415
4416 int
4417 __qla83xx_set_drv_presence(scsi_qla_host_t *vha)
4418 {
4419         int rval = QLA_SUCCESS;
4420         struct qla_hw_data *ha = vha->hw;
4421         uint32_t drv_presence;
4422
4423         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4424         if (rval == QLA_SUCCESS) {
4425                 drv_presence |= (1 << ha->portnum);
4426                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
4427                     drv_presence);
4428         }
4429
4430         return rval;
4431 }
4432
4433 int
4434 qla83xx_set_drv_presence(scsi_qla_host_t *vha)
4435 {
4436         int rval = QLA_SUCCESS;
4437
4438         qla83xx_idc_lock(vha, 0);
4439         rval = __qla83xx_set_drv_presence(vha);
4440         qla83xx_idc_unlock(vha, 0);
4441
4442         return rval;
4443 }
4444
4445 int
4446 __qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
4447 {
4448         int rval = QLA_SUCCESS;
4449         struct qla_hw_data *ha = vha->hw;
4450         uint32_t drv_presence;
4451
4452         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4453         if (rval == QLA_SUCCESS) {
4454                 drv_presence &= ~(1 << ha->portnum);
4455                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
4456                     drv_presence);
4457         }
4458
4459         return rval;
4460 }
4461
4462 int
4463 qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
4464 {
4465         int rval = QLA_SUCCESS;
4466
4467         qla83xx_idc_lock(vha, 0);
4468         rval = __qla83xx_clear_drv_presence(vha);
4469         qla83xx_idc_unlock(vha, 0);
4470
4471         return rval;
4472 }
4473
4474 static void
4475 qla83xx_need_reset_handler(scsi_qla_host_t *vha)
4476 {
4477         struct qla_hw_data *ha = vha->hw;
4478         uint32_t drv_ack, drv_presence;
4479         unsigned long ack_timeout;
4480
4481         /* Wait for IDC ACK from all functions (DRV-ACK == DRV-PRESENCE) */
4482         ack_timeout = jiffies + (ha->fcoe_reset_timeout * HZ);
4483         while (1) {
4484                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
4485                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4486                 if ((drv_ack & drv_presence) == drv_presence)
4487                         break;
4488
4489                 if (time_after_eq(jiffies, ack_timeout)) {
4490                         ql_log(ql_log_warn, vha, 0xb067,
4491                             "RESET ACK TIMEOUT! drv_presence=0x%x "
4492                             "drv_ack=0x%x\n", drv_presence, drv_ack);
4493                         /*
4494                          * The function(s) which did not ack in time are forced
4495                          * to withdraw any further participation in the IDC
4496                          * reset.
4497                          */
4498                         if (drv_ack != drv_presence)
4499                                 qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
4500                                     drv_ack);
4501                         break;
4502                 }
4503
4504                 qla83xx_idc_unlock(vha, 0);
4505                 msleep(1000);
4506                 qla83xx_idc_lock(vha, 0);
4507         }
4508
4509         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_COLD);
4510         ql_log(ql_log_info, vha, 0xb068, "HW State: COLD/RE-INIT.\n");
4511 }
4512
4513 static int
4514 qla83xx_device_bootstrap(scsi_qla_host_t *vha)
4515 {
4516         int rval = QLA_SUCCESS;
4517         uint32_t idc_control;
4518
4519         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_INITIALIZING);
4520         ql_log(ql_log_info, vha, 0xb069, "HW State: INITIALIZING.\n");
4521
4522         /* Clearing IDC-Control Graceful-Reset Bit before resetting f/w */
4523         __qla83xx_get_idc_control(vha, &idc_control);
4524         idc_control &= ~QLA83XX_IDC_GRACEFUL_RESET;
4525         __qla83xx_set_idc_control(vha, 0);
4526
4527         qla83xx_idc_unlock(vha, 0);
4528         rval = qla83xx_restart_nic_firmware(vha);
4529         qla83xx_idc_lock(vha, 0);
4530
4531         if (rval != QLA_SUCCESS) {
4532                 ql_log(ql_log_fatal, vha, 0xb06a,
4533                     "Failed to restart NIC f/w.\n");
4534                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_FAILED);
4535                 ql_log(ql_log_info, vha, 0xb06b, "HW State: FAILED.\n");
4536         } else {
4537                 ql_dbg(ql_dbg_p3p, vha, 0xb06c,
4538                     "Success in restarting nic f/w.\n");
4539                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_READY);
4540                 ql_log(ql_log_info, vha, 0xb06d, "HW State: READY.\n");
4541         }
4542
4543         return rval;
4544 }
4545
4546 /* Assumes idc_lock always held on entry */
4547 int
4548 qla83xx_idc_state_handler(scsi_qla_host_t *base_vha)
4549 {
4550         struct qla_hw_data *ha = base_vha->hw;
4551         int rval = QLA_SUCCESS;
4552         unsigned long dev_init_timeout;
4553         uint32_t dev_state;
4554
4555         /* Wait for MAX-INIT-TIMEOUT for the device to go ready */
4556         dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout * HZ);
4557
4558         while (1) {
4559
4560                 if (time_after_eq(jiffies, dev_init_timeout)) {
4561                         ql_log(ql_log_warn, base_vha, 0xb06e,
4562                             "Initialization TIMEOUT!\n");
4563                         /* Init timeout. Disable further NIC Core
4564                          * communication.
4565                          */
4566                         qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
4567                                 QLA8XXX_DEV_FAILED);
4568                         ql_log(ql_log_info, base_vha, 0xb06f,
4569                             "HW State: FAILED.\n");
4570                 }
4571
4572                 qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4573                 switch (dev_state) {
4574                 case QLA8XXX_DEV_READY:
4575                         if (ha->flags.nic_core_reset_owner)
4576                                 qla83xx_idc_audit(base_vha,
4577                                     IDC_AUDIT_COMPLETION);
4578                         ha->flags.nic_core_reset_owner = 0;
4579                         ql_dbg(ql_dbg_p3p, base_vha, 0xb070,
4580                             "Reset_owner reset by 0x%x.\n",
4581                             ha->portnum);
4582                         goto exit;
4583                 case QLA8XXX_DEV_COLD:
4584                         if (ha->flags.nic_core_reset_owner)
4585                                 rval = qla83xx_device_bootstrap(base_vha);
4586                         else {
4587                         /* Wait for AEN to change device-state */
4588                                 qla83xx_idc_unlock(base_vha, 0);
4589                                 msleep(1000);
4590                                 qla83xx_idc_lock(base_vha, 0);
4591                         }
4592                         break;
4593                 case QLA8XXX_DEV_INITIALIZING:
4594                         /* Wait for AEN to change device-state */
4595                         qla83xx_idc_unlock(base_vha, 0);
4596                         msleep(1000);
4597                         qla83xx_idc_lock(base_vha, 0);
4598                         break;
4599                 case QLA8XXX_DEV_NEED_RESET:
4600                         if (!ql2xdontresethba && ha->flags.nic_core_reset_owner)
4601                                 qla83xx_need_reset_handler(base_vha);
4602                         else {
4603                                 /* Wait for AEN to change device-state */
4604                                 qla83xx_idc_unlock(base_vha, 0);
4605                                 msleep(1000);
4606                                 qla83xx_idc_lock(base_vha, 0);
4607                         }
4608                         /* reset timeout value after need reset handler */
4609                         dev_init_timeout = jiffies +
4610                             (ha->fcoe_dev_init_timeout * HZ);
4611                         break;
4612                 case QLA8XXX_DEV_NEED_QUIESCENT:
4613                         /* XXX: DEBUG for now */
4614                         qla83xx_idc_unlock(base_vha, 0);
4615                         msleep(1000);
4616                         qla83xx_idc_lock(base_vha, 0);
4617                         break;
4618                 case QLA8XXX_DEV_QUIESCENT:
4619                         /* XXX: DEBUG for now */
4620                         if (ha->flags.quiesce_owner)
4621                                 goto exit;
4622
4623                         qla83xx_idc_unlock(base_vha, 0);
4624                         msleep(1000);
4625                         qla83xx_idc_lock(base_vha, 0);
4626                         dev_init_timeout = jiffies +
4627                             (ha->fcoe_dev_init_timeout * HZ);
4628                         break;
4629                 case QLA8XXX_DEV_FAILED:
4630                         if (ha->flags.nic_core_reset_owner)
4631                                 qla83xx_idc_audit(base_vha,
4632                                     IDC_AUDIT_COMPLETION);
4633                         ha->flags.nic_core_reset_owner = 0;
4634                         __qla83xx_clear_drv_presence(base_vha);
4635                         qla83xx_idc_unlock(base_vha, 0);
4636                         qla8xxx_dev_failed_handler(base_vha);
4637                         rval = QLA_FUNCTION_FAILED;
4638                         qla83xx_idc_lock(base_vha, 0);
4639                         goto exit;
4640                 case QLA8XXX_BAD_VALUE:
4641                         qla83xx_idc_unlock(base_vha, 0);
4642                         msleep(1000);
4643                         qla83xx_idc_lock(base_vha, 0);
4644                         break;
4645                 default:
4646                         ql_log(ql_log_warn, base_vha, 0xb071,
4647                             "Unknow Device State: %x.\n", dev_state);
4648                         qla83xx_idc_unlock(base_vha, 0);
4649                         qla8xxx_dev_failed_handler(base_vha);
4650                         rval = QLA_FUNCTION_FAILED;
4651                         qla83xx_idc_lock(base_vha, 0);
4652                         goto exit;
4653                 }
4654         }
4655
4656 exit:
4657         return rval;
4658 }
4659
4660 /**************************************************************************
4661 * qla2x00_do_dpc
4662 *   This kernel thread is a task that is schedule by the interrupt handler
4663 *   to perform the background processing for interrupts.
4664 *
4665 * Notes:
4666 * This task always run in the context of a kernel thread.  It
4667 * is kick-off by the driver's detect code and starts up
4668 * up one per adapter. It immediately goes to sleep and waits for
4669 * some fibre event.  When either the interrupt handler or
4670 * the timer routine detects a event it will one of the task
4671 * bits then wake us up.
4672 **************************************************************************/
4673 static int
4674 qla2x00_do_dpc(void *data)
4675 {
4676         int             rval;
4677         scsi_qla_host_t *base_vha;
4678         struct qla_hw_data *ha;
4679
4680         ha = (struct qla_hw_data *)data;
4681         base_vha = pci_get_drvdata(ha->pdev);
4682
4683         set_user_nice(current, -20);
4684
4685         set_current_state(TASK_INTERRUPTIBLE);
4686         while (!kthread_should_stop()) {
4687                 ql_dbg(ql_dbg_dpc, base_vha, 0x4000,
4688                     "DPC handler sleeping.\n");
4689
4690                 schedule();
4691                 __set_current_state(TASK_RUNNING);
4692
4693                 if (!base_vha->flags.init_done || ha->flags.mbox_busy)
4694                         goto end_loop;
4695
4696                 if (ha->flags.eeh_busy) {
4697                         ql_dbg(ql_dbg_dpc, base_vha, 0x4003,
4698                             "eeh_busy=%d.\n", ha->flags.eeh_busy);
4699                         goto end_loop;
4700                 }
4701
4702                 ha->dpc_active = 1;
4703
4704                 ql_dbg(ql_dbg_dpc + ql_dbg_verbose, base_vha, 0x4001,
4705                     "DPC handler waking up, dpc_flags=0x%lx.\n",
4706                     base_vha->dpc_flags);
4707
4708                 qla2x00_do_work(base_vha);
4709
4710                 if (IS_P3P_TYPE(ha)) {
4711                         if (IS_QLA8044(ha)) {
4712                                 if (test_and_clear_bit(ISP_UNRECOVERABLE,
4713                                         &base_vha->dpc_flags)) {
4714                                         qla8044_idc_lock(ha);
4715                                         qla8044_wr_direct(base_vha,
4716                                                 QLA8044_CRB_DEV_STATE_INDEX,
4717                                                 QLA8XXX_DEV_FAILED);
4718                                         qla8044_idc_unlock(ha);
4719                                         ql_log(ql_log_info, base_vha, 0x4004,
4720                                                 "HW State: FAILED.\n");
4721                                         qla8044_device_state_handler(base_vha);
4722                                         continue;
4723                                 }
4724
4725                         } else {
4726                                 if (test_and_clear_bit(ISP_UNRECOVERABLE,
4727                                         &base_vha->dpc_flags)) {
4728                                         qla82xx_idc_lock(ha);
4729                                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
4730                                                 QLA8XXX_DEV_FAILED);
4731                                         qla82xx_idc_unlock(ha);
4732                                         ql_log(ql_log_info, base_vha, 0x0151,
4733                                                 "HW State: FAILED.\n");
4734                                         qla82xx_device_state_handler(base_vha);
4735                                         continue;
4736                                 }
4737                         }
4738
4739                         if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED,
4740                                 &base_vha->dpc_flags)) {
4741
4742                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4005,
4743                                     "FCoE context reset scheduled.\n");
4744                                 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
4745                                         &base_vha->dpc_flags))) {
4746                                         if (qla82xx_fcoe_ctx_reset(base_vha)) {
4747                                                 /* FCoE-ctx reset failed.
4748                                                  * Escalate to chip-reset
4749                                                  */
4750                                                 set_bit(ISP_ABORT_NEEDED,
4751                                                         &base_vha->dpc_flags);
4752                                         }
4753                                         clear_bit(ABORT_ISP_ACTIVE,
4754                                                 &base_vha->dpc_flags);
4755                                 }
4756
4757                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4006,
4758                                     "FCoE context reset end.\n");
4759                         }
4760                 } else if (IS_QLAFX00(ha)) {
4761                         if (test_and_clear_bit(ISP_UNRECOVERABLE,
4762                                 &base_vha->dpc_flags)) {
4763                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4020,
4764                                     "Firmware Reset Recovery\n");
4765                                 if (qlafx00_reset_initialize(base_vha)) {
4766                                         /* Failed. Abort isp later. */
4767                                         if (!test_bit(UNLOADING,
4768                                             &base_vha->dpc_flags))
4769                                                 set_bit(ISP_UNRECOVERABLE,
4770                                                     &base_vha->dpc_flags);
4771                                                 ql_dbg(ql_dbg_dpc, base_vha,
4772                                                     0x4021,
4773                                                     "Reset Recovery Failed\n");
4774                                 }
4775                         }
4776
4777                         if (test_and_clear_bit(FX00_TARGET_SCAN,
4778                                 &base_vha->dpc_flags)) {
4779                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4022,
4780                                     "ISPFx00 Target Scan scheduled\n");
4781                                 if (qlafx00_rescan_isp(base_vha)) {
4782                                         if (!test_bit(UNLOADING,
4783                                             &base_vha->dpc_flags))
4784                                                 set_bit(ISP_UNRECOVERABLE,
4785                                                     &base_vha->dpc_flags);
4786                                         ql_dbg(ql_dbg_dpc, base_vha, 0x401e,
4787                                             "ISPFx00 Target Scan Failed\n");
4788                                 }
4789                                 ql_dbg(ql_dbg_dpc, base_vha, 0x401f,
4790                                     "ISPFx00 Target Scan End\n");
4791                         }
4792                 }
4793
4794                 if (test_and_clear_bit(ISP_ABORT_NEEDED,
4795                                                 &base_vha->dpc_flags)) {
4796
4797                         ql_dbg(ql_dbg_dpc, base_vha, 0x4007,
4798                             "ISP abort scheduled.\n");
4799                         if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
4800                             &base_vha->dpc_flags))) {
4801
4802                                 if (ha->isp_ops->abort_isp(base_vha)) {
4803                                         /* failed. retry later */
4804                                         set_bit(ISP_ABORT_NEEDED,
4805                                             &base_vha->dpc_flags);
4806                                 }
4807                                 clear_bit(ABORT_ISP_ACTIVE,
4808                                                 &base_vha->dpc_flags);
4809                         }
4810
4811                         ql_dbg(ql_dbg_dpc, base_vha, 0x4008,
4812                             "ISP abort end.\n");
4813                 }
4814
4815                 if (test_and_clear_bit(FCPORT_UPDATE_NEEDED,
4816                     &base_vha->dpc_flags)) {
4817                         qla2x00_update_fcports(base_vha);
4818                 }
4819
4820                 if (test_bit(SCR_PENDING, &base_vha->dpc_flags)) {
4821                         int ret;
4822                         ret = qla2x00_send_change_request(base_vha, 0x3, 0);
4823                         if (ret != QLA_SUCCESS)
4824                                 ql_log(ql_log_warn, base_vha, 0x121,
4825                                     "Failed to enable receiving of RSCN "
4826                                     "requests: 0x%x.\n", ret);
4827                         clear_bit(SCR_PENDING, &base_vha->dpc_flags);
4828                 }
4829
4830                 if (IS_QLAFX00(ha))
4831                         goto loop_resync_check;
4832
4833                 if (test_bit(ISP_QUIESCE_NEEDED, &base_vha->dpc_flags)) {
4834                         ql_dbg(ql_dbg_dpc, base_vha, 0x4009,
4835                             "Quiescence mode scheduled.\n");
4836                         if (IS_P3P_TYPE(ha)) {
4837                                 if (IS_QLA82XX(ha))
4838                                         qla82xx_device_state_handler(base_vha);
4839                                 if (IS_QLA8044(ha))
4840                                         qla8044_device_state_handler(base_vha);
4841                                 clear_bit(ISP_QUIESCE_NEEDED,
4842                                     &base_vha->dpc_flags);
4843                                 if (!ha->flags.quiesce_owner) {
4844                                         qla2x00_perform_loop_resync(base_vha);
4845                                         if (IS_QLA82XX(ha)) {
4846                                                 qla82xx_idc_lock(ha);
4847                                                 qla82xx_clear_qsnt_ready(
4848                                                     base_vha);
4849                                                 qla82xx_idc_unlock(ha);
4850                                         } else if (IS_QLA8044(ha)) {
4851                                                 qla8044_idc_lock(ha);
4852                                                 qla8044_clear_qsnt_ready(
4853                                                     base_vha);
4854                                                 qla8044_idc_unlock(ha);
4855                                         }
4856                                 }
4857                         } else {
4858                                 clear_bit(ISP_QUIESCE_NEEDED,
4859                                     &base_vha->dpc_flags);
4860                                 qla2x00_quiesce_io(base_vha);
4861                         }
4862                         ql_dbg(ql_dbg_dpc, base_vha, 0x400a,
4863                             "Quiescence mode end.\n");
4864                 }
4865
4866                 if (test_and_clear_bit(RESET_MARKER_NEEDED,
4867                                 &base_vha->dpc_flags) &&
4868                     (!(test_and_set_bit(RESET_ACTIVE, &base_vha->dpc_flags)))) {
4869
4870                         ql_dbg(ql_dbg_dpc, base_vha, 0x400b,
4871                             "Reset marker scheduled.\n");
4872                         qla2x00_rst_aen(base_vha);
4873                         clear_bit(RESET_ACTIVE, &base_vha->dpc_flags);
4874                         ql_dbg(ql_dbg_dpc, base_vha, 0x400c,
4875                             "Reset marker end.\n");
4876                 }
4877
4878                 /* Retry each device up to login retry count */
4879                 if ((test_and_clear_bit(RELOGIN_NEEDED,
4880                                                 &base_vha->dpc_flags)) &&
4881                     !test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags) &&
4882                     atomic_read(&base_vha->loop_state) != LOOP_DOWN) {
4883
4884                         ql_dbg(ql_dbg_dpc, base_vha, 0x400d,
4885                             "Relogin scheduled.\n");
4886                         qla2x00_relogin(base_vha);
4887                         ql_dbg(ql_dbg_dpc, base_vha, 0x400e,
4888                             "Relogin end.\n");
4889                 }
4890 loop_resync_check:
4891                 if (test_and_clear_bit(LOOP_RESYNC_NEEDED,
4892                     &base_vha->dpc_flags)) {
4893
4894                         ql_dbg(ql_dbg_dpc, base_vha, 0x400f,
4895                             "Loop resync scheduled.\n");
4896
4897                         if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE,
4898                             &base_vha->dpc_flags))) {
4899
4900                                 rval = qla2x00_loop_resync(base_vha);
4901
4902                                 clear_bit(LOOP_RESYNC_ACTIVE,
4903                                                 &base_vha->dpc_flags);
4904                         }
4905
4906                         ql_dbg(ql_dbg_dpc, base_vha, 0x4010,
4907                             "Loop resync end.\n");
4908                 }
4909
4910                 if (IS_QLAFX00(ha))
4911                         goto intr_on_check;
4912
4913                 if (test_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags) &&
4914                     atomic_read(&base_vha->loop_state) == LOOP_READY) {
4915                         clear_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags);
4916                         qla2xxx_flash_npiv_conf(base_vha);
4917                 }
4918
4919 intr_on_check:
4920                 if (!ha->interrupts_on)
4921                         ha->isp_ops->enable_intrs(ha);
4922
4923                 if (test_and_clear_bit(BEACON_BLINK_NEEDED,
4924                                         &base_vha->dpc_flags))
4925                         ha->isp_ops->beacon_blink(base_vha);
4926
4927                 if (!IS_QLAFX00(ha))
4928                         qla2x00_do_dpc_all_vps(base_vha);
4929
4930                 ha->dpc_active = 0;
4931 end_loop:
4932                 set_current_state(TASK_INTERRUPTIBLE);
4933         } /* End of while(1) */
4934         __set_current_state(TASK_RUNNING);
4935
4936         ql_dbg(ql_dbg_dpc, base_vha, 0x4011,
4937             "DPC handler exiting.\n");
4938
4939         /*
4940          * Make sure that nobody tries to wake us up again.
4941          */
4942         ha->dpc_active = 0;
4943
4944         /* Cleanup any residual CTX SRBs. */
4945         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
4946
4947         return 0;
4948 }
4949
4950 void
4951 qla2xxx_wake_dpc(struct scsi_qla_host *vha)
4952 {
4953         struct qla_hw_data *ha = vha->hw;
4954         struct task_struct *t = ha->dpc_thread;
4955
4956         if (!test_bit(UNLOADING, &vha->dpc_flags) && t)
4957                 wake_up_process(t);
4958 }
4959
4960 /*
4961 *  qla2x00_rst_aen
4962 *      Processes asynchronous reset.
4963 *
4964 * Input:
4965 *      ha  = adapter block pointer.
4966 */
4967 static void
4968 qla2x00_rst_aen(scsi_qla_host_t *vha)
4969 {
4970         if (vha->flags.online && !vha->flags.reset_active &&
4971             !atomic_read(&vha->loop_down_timer) &&
4972             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) {
4973                 do {
4974                         clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
4975
4976                         /*
4977                          * Issue marker command only when we are going to start
4978                          * the I/O.
4979                          */
4980                         vha->marker_needed = 1;
4981                 } while (!atomic_read(&vha->loop_down_timer) &&
4982                     (test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags)));
4983         }
4984 }
4985
4986 /**************************************************************************
4987 *   qla2x00_timer
4988 *
4989 * Description:
4990 *   One second timer
4991 *
4992 * Context: Interrupt
4993 ***************************************************************************/
4994 void
4995 qla2x00_timer(scsi_qla_host_t *vha)
4996 {
4997         unsigned long   cpu_flags = 0;
4998         int             start_dpc = 0;
4999         int             index;
5000         srb_t           *sp;
5001         uint16_t        w;
5002         struct qla_hw_data *ha = vha->hw;
5003         struct req_que *req;
5004
5005         if (ha->flags.eeh_busy) {
5006                 ql_dbg(ql_dbg_timer, vha, 0x6000,
5007                     "EEH = %d, restarting timer.\n",
5008                     ha->flags.eeh_busy);
5009                 qla2x00_restart_timer(vha, WATCH_INTERVAL);
5010                 return;
5011         }
5012
5013         /* Hardware read to raise pending EEH errors during mailbox waits. */
5014         if (!pci_channel_offline(ha->pdev))
5015                 pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
5016
5017         /* Make sure qla82xx_watchdog is run only for physical port */
5018         if (!vha->vp_idx && IS_P3P_TYPE(ha)) {
5019                 if (test_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags))
5020                         start_dpc++;
5021                 if (IS_QLA82XX(ha))
5022                         qla82xx_watchdog(vha);
5023                 else if (IS_QLA8044(ha))
5024                         qla8044_watchdog(vha);
5025         }
5026
5027         if (!vha->vp_idx && IS_QLAFX00(ha))
5028                 qlafx00_timer_routine(vha);
5029
5030         /* Loop down handler. */
5031         if (atomic_read(&vha->loop_down_timer) > 0 &&
5032             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) &&
5033             !(test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags))
5034                 && vha->flags.online) {
5035
5036                 if (atomic_read(&vha->loop_down_timer) ==
5037                     vha->loop_down_abort_time) {
5038
5039                         ql_log(ql_log_info, vha, 0x6008,
5040                             "Loop down - aborting the queues before time expires.\n");
5041
5042                         if (!IS_QLA2100(ha) && vha->link_down_timeout)
5043                                 atomic_set(&vha->loop_state, LOOP_DEAD);
5044
5045                         /*
5046                          * Schedule an ISP abort to return any FCP2-device
5047                          * commands.
5048                          */
5049                         /* NPIV - scan physical port only */
5050                         if (!vha->vp_idx) {
5051                                 spin_lock_irqsave(&ha->hardware_lock,
5052                                     cpu_flags);
5053                                 req = ha->req_q_map[0];
5054                                 for (index = 1;
5055                                     index < req->num_outstanding_cmds;
5056                                     index++) {
5057                                         fc_port_t *sfcp;
5058
5059                                         sp = req->outstanding_cmds[index];
5060                                         if (!sp)
5061                                                 continue;
5062                                         if (sp->type != SRB_SCSI_CMD)
5063                                                 continue;
5064                                         sfcp = sp->fcport;
5065                                         if (!(sfcp->flags & FCF_FCP2_DEVICE))
5066                                                 continue;
5067
5068                                         if (IS_QLA82XX(ha))
5069                                                 set_bit(FCOE_CTX_RESET_NEEDED,
5070                                                         &vha->dpc_flags);
5071                                         else
5072                                                 set_bit(ISP_ABORT_NEEDED,
5073                                                         &vha->dpc_flags);
5074                                         break;
5075                                 }
5076                                 spin_unlock_irqrestore(&ha->hardware_lock,
5077                                                                 cpu_flags);
5078                         }
5079                         start_dpc++;
5080                 }
5081
5082                 /* if the loop has been down for 4 minutes, reinit adapter */
5083                 if (atomic_dec_and_test(&vha->loop_down_timer) != 0) {
5084                         if (!(vha->device_flags & DFLG_NO_CABLE)) {
5085                                 ql_log(ql_log_warn, vha, 0x6009,
5086                                     "Loop down - aborting ISP.\n");
5087
5088                                 if (IS_QLA82XX(ha))
5089                                         set_bit(FCOE_CTX_RESET_NEEDED,
5090                                                 &vha->dpc_flags);
5091                                 else
5092                                         set_bit(ISP_ABORT_NEEDED,
5093                                                 &vha->dpc_flags);
5094                         }
5095                 }
5096                 ql_dbg(ql_dbg_timer, vha, 0x600a,
5097                     "Loop down - seconds remaining %d.\n",
5098                     atomic_read(&vha->loop_down_timer));
5099         }
5100         /* Check if beacon LED needs to be blinked for physical host only */
5101         if (!vha->vp_idx && (ha->beacon_blink_led == 1)) {
5102                 /* There is no beacon_blink function for ISP82xx */
5103                 if (!IS_P3P_TYPE(ha)) {
5104                         set_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags);
5105                         start_dpc++;
5106                 }
5107         }
5108
5109         /* Process any deferred work. */
5110         if (!list_empty(&vha->work_list))
5111                 start_dpc++;
5112
5113         /* Schedule the DPC routine if needed */
5114         if ((test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
5115             test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) ||
5116             test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags) ||
5117             start_dpc ||
5118             test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags) ||
5119             test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags) ||
5120             test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) ||
5121             test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) ||
5122             test_bit(VP_DPC_NEEDED, &vha->dpc_flags) ||
5123             test_bit(RELOGIN_NEEDED, &vha->dpc_flags))) {
5124                 ql_dbg(ql_dbg_timer, vha, 0x600b,
5125                     "isp_abort_needed=%d loop_resync_needed=%d "
5126                     "fcport_update_needed=%d start_dpc=%d "
5127                     "reset_marker_needed=%d",
5128                     test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags),
5129                     test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags),
5130                     test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags),
5131                     start_dpc,
5132                     test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags));
5133                 ql_dbg(ql_dbg_timer, vha, 0x600c,
5134                     "beacon_blink_needed=%d isp_unrecoverable=%d "
5135                     "fcoe_ctx_reset_needed=%d vp_dpc_needed=%d "
5136                     "relogin_needed=%d.\n",
5137                     test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags),
5138                     test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags),
5139                     test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags),
5140                     test_bit(VP_DPC_NEEDED, &vha->dpc_flags),
5141                     test_bit(RELOGIN_NEEDED, &vha->dpc_flags));
5142                 qla2xxx_wake_dpc(vha);
5143         }
5144
5145         qla2x00_restart_timer(vha, WATCH_INTERVAL);
5146 }
5147
5148 /* Firmware interface routines. */
5149
5150 #define FW_BLOBS        10
5151 #define FW_ISP21XX      0
5152 #define FW_ISP22XX      1
5153 #define FW_ISP2300      2
5154 #define FW_ISP2322      3
5155 #define FW_ISP24XX      4
5156 #define FW_ISP25XX      5
5157 #define FW_ISP81XX      6
5158 #define FW_ISP82XX      7
5159 #define FW_ISP2031      8
5160 #define FW_ISP8031      9
5161
5162 #define FW_FILE_ISP21XX "ql2100_fw.bin"
5163 #define FW_FILE_ISP22XX "ql2200_fw.bin"
5164 #define FW_FILE_ISP2300 "ql2300_fw.bin"
5165 #define FW_FILE_ISP2322 "ql2322_fw.bin"
5166 #define FW_FILE_ISP24XX "ql2400_fw.bin"
5167 #define FW_FILE_ISP25XX "ql2500_fw.bin"
5168 #define FW_FILE_ISP81XX "ql8100_fw.bin"
5169 #define FW_FILE_ISP82XX "ql8200_fw.bin"
5170 #define FW_FILE_ISP2031 "ql2600_fw.bin"
5171 #define FW_FILE_ISP8031 "ql8300_fw.bin"
5172
5173 static DEFINE_MUTEX(qla_fw_lock);
5174
5175 static struct fw_blob qla_fw_blobs[FW_BLOBS] = {
5176         { .name = FW_FILE_ISP21XX, .segs = { 0x1000, 0 }, },
5177         { .name = FW_FILE_ISP22XX, .segs = { 0x1000, 0 }, },
5178         { .name = FW_FILE_ISP2300, .segs = { 0x800, 0 }, },
5179         { .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, },
5180         { .name = FW_FILE_ISP24XX, },
5181         { .name = FW_FILE_ISP25XX, },
5182         { .name = FW_FILE_ISP81XX, },
5183         { .name = FW_FILE_ISP82XX, },
5184         { .name = FW_FILE_ISP2031, },
5185         { .name = FW_FILE_ISP8031, },
5186 };
5187
5188 struct fw_blob *
5189 qla2x00_request_firmware(scsi_qla_host_t *vha)
5190 {
5191         struct qla_hw_data *ha = vha->hw;
5192         struct fw_blob *blob;
5193
5194         if (IS_QLA2100(ha)) {
5195                 blob = &qla_fw_blobs[FW_ISP21XX];
5196         } else if (IS_QLA2200(ha)) {
5197                 blob = &qla_fw_blobs[FW_ISP22XX];
5198         } else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
5199                 blob = &qla_fw_blobs[FW_ISP2300];
5200         } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
5201                 blob = &qla_fw_blobs[FW_ISP2322];
5202         } else if (IS_QLA24XX_TYPE(ha)) {
5203                 blob = &qla_fw_blobs[FW_ISP24XX];
5204         } else if (IS_QLA25XX(ha)) {
5205                 blob = &qla_fw_blobs[FW_ISP25XX];
5206         } else if (IS_QLA81XX(ha)) {
5207                 blob = &qla_fw_blobs[FW_ISP81XX];
5208         } else if (IS_QLA82XX(ha)) {
5209                 blob = &qla_fw_blobs[FW_ISP82XX];
5210         } else if (IS_QLA2031(ha)) {
5211                 blob = &qla_fw_blobs[FW_ISP2031];
5212         } else if (IS_QLA8031(ha)) {
5213                 blob = &qla_fw_blobs[FW_ISP8031];
5214         } else {
5215                 return NULL;
5216         }
5217
5218         mutex_lock(&qla_fw_lock);
5219         if (blob->fw)
5220                 goto out;
5221
5222         if (request_firmware(&blob->fw, blob->name, &ha->pdev->dev)) {
5223                 ql_log(ql_log_warn, vha, 0x0063,
5224                     "Failed to load firmware image (%s).\n", blob->name);
5225                 blob->fw = NULL;
5226                 blob = NULL;
5227                 goto out;
5228         }
5229
5230 out:
5231         mutex_unlock(&qla_fw_lock);
5232         return blob;
5233 }
5234
5235 static void
5236 qla2x00_release_firmware(void)
5237 {
5238         int idx;
5239
5240         mutex_lock(&qla_fw_lock);
5241         for (idx = 0; idx < FW_BLOBS; idx++)
5242                 release_firmware(qla_fw_blobs[idx].fw);
5243         mutex_unlock(&qla_fw_lock);
5244 }
5245
5246 static pci_ers_result_t
5247 qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
5248 {
5249         scsi_qla_host_t *vha = pci_get_drvdata(pdev);
5250         struct qla_hw_data *ha = vha->hw;
5251
5252         ql_dbg(ql_dbg_aer, vha, 0x9000,
5253             "PCI error detected, state %x.\n", state);
5254
5255         switch (state) {
5256         case pci_channel_io_normal:
5257                 ha->flags.eeh_busy = 0;
5258                 return PCI_ERS_RESULT_CAN_RECOVER;
5259         case pci_channel_io_frozen:
5260                 ha->flags.eeh_busy = 1;
5261                 /* For ISP82XX complete any pending mailbox cmd */
5262                 if (IS_QLA82XX(ha)) {
5263                         ha->flags.isp82xx_fw_hung = 1;
5264                         ql_dbg(ql_dbg_aer, vha, 0x9001, "Pci channel io frozen\n");
5265                         qla82xx_clear_pending_mbx(vha);
5266                 }
5267                 qla2x00_free_irqs(vha);
5268                 pci_disable_device(pdev);
5269                 /* Return back all IOs */
5270                 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
5271                 return PCI_ERS_RESULT_NEED_RESET;
5272         case pci_channel_io_perm_failure:
5273                 ha->flags.pci_channel_io_perm_failure = 1;
5274                 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
5275                 return PCI_ERS_RESULT_DISCONNECT;
5276         }
5277         return PCI_ERS_RESULT_NEED_RESET;
5278 }
5279
5280 static pci_ers_result_t
5281 qla2xxx_pci_mmio_enabled(struct pci_dev *pdev)
5282 {
5283         int risc_paused = 0;
5284         uint32_t stat;
5285         unsigned long flags;
5286         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
5287         struct qla_hw_data *ha = base_vha->hw;
5288         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
5289         struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
5290
5291         if (IS_QLA82XX(ha))
5292                 return PCI_ERS_RESULT_RECOVERED;
5293
5294         spin_lock_irqsave(&ha->hardware_lock, flags);
5295         if (IS_QLA2100(ha) || IS_QLA2200(ha)){
5296                 stat = RD_REG_DWORD(&reg->hccr);
5297                 if (stat & HCCR_RISC_PAUSE)
5298                         risc_paused = 1;
5299         } else if (IS_QLA23XX(ha)) {
5300                 stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
5301                 if (stat & HSR_RISC_PAUSED)
5302                         risc_paused = 1;
5303         } else if (IS_FWI2_CAPABLE(ha)) {
5304                 stat = RD_REG_DWORD(&reg24->host_status);
5305                 if (stat & HSRX_RISC_PAUSED)
5306                         risc_paused = 1;
5307         }
5308         spin_unlock_irqrestore(&ha->hardware_lock, flags);
5309
5310         if (risc_paused) {
5311                 ql_log(ql_log_info, base_vha, 0x9003,
5312                     "RISC paused -- mmio_enabled, Dumping firmware.\n");
5313                 ha->isp_ops->fw_dump(base_vha, 0);
5314
5315                 return PCI_ERS_RESULT_NEED_RESET;
5316         } else
5317                 return PCI_ERS_RESULT_RECOVERED;
5318 }
5319
5320 static uint32_t
5321 qla82xx_error_recovery(scsi_qla_host_t *base_vha)
5322 {
5323         uint32_t rval = QLA_FUNCTION_FAILED;
5324         uint32_t drv_active = 0;
5325         struct qla_hw_data *ha = base_vha->hw;
5326         int fn;
5327         struct pci_dev *other_pdev = NULL;
5328
5329         ql_dbg(ql_dbg_aer, base_vha, 0x9006,
5330             "Entered %s.\n", __func__);
5331
5332         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5333
5334         if (base_vha->flags.online) {
5335                 /* Abort all outstanding commands,
5336                  * so as to be requeued later */
5337                 qla2x00_abort_isp_cleanup(base_vha);
5338         }
5339
5340
5341         fn = PCI_FUNC(ha->pdev->devfn);
5342         while (fn > 0) {
5343                 fn--;
5344                 ql_dbg(ql_dbg_aer, base_vha, 0x9007,
5345                     "Finding pci device at function = 0x%x.\n", fn);
5346                 other_pdev =
5347                     pci_get_domain_bus_and_slot(pci_domain_nr(ha->pdev->bus),
5348                     ha->pdev->bus->number, PCI_DEVFN(PCI_SLOT(ha->pdev->devfn),
5349                     fn));
5350
5351                 if (!other_pdev)
5352                         continue;
5353                 if (atomic_read(&other_pdev->enable_cnt)) {
5354                         ql_dbg(ql_dbg_aer, base_vha, 0x9008,
5355                             "Found PCI func available and enable at 0x%x.\n",
5356                             fn);
5357                         pci_dev_put(other_pdev);
5358                         break;
5359                 }
5360                 pci_dev_put(other_pdev);
5361         }
5362
5363         if (!fn) {
5364                 /* Reset owner */
5365                 ql_dbg(ql_dbg_aer, base_vha, 0x9009,
5366                     "This devfn is reset owner = 0x%x.\n",
5367                     ha->pdev->devfn);
5368                 qla82xx_idc_lock(ha);
5369
5370                 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5371                     QLA8XXX_DEV_INITIALIZING);
5372
5373                 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_IDC_VERSION,
5374                     QLA82XX_IDC_VERSION);
5375
5376                 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE);
5377                 ql_dbg(ql_dbg_aer, base_vha, 0x900a,
5378                     "drv_active = 0x%x.\n", drv_active);
5379
5380                 qla82xx_idc_unlock(ha);
5381                 /* Reset if device is not already reset
5382                  * drv_active would be 0 if a reset has already been done
5383                  */
5384                 if (drv_active)
5385                         rval = qla82xx_start_firmware(base_vha);
5386                 else
5387                         rval = QLA_SUCCESS;
5388                 qla82xx_idc_lock(ha);
5389
5390                 if (rval != QLA_SUCCESS) {
5391                         ql_log(ql_log_info, base_vha, 0x900b,
5392                             "HW State: FAILED.\n");
5393                         qla82xx_clear_drv_active(ha);
5394                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5395                             QLA8XXX_DEV_FAILED);
5396                 } else {
5397                         ql_log(ql_log_info, base_vha, 0x900c,
5398                             "HW State: READY.\n");
5399                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5400                             QLA8XXX_DEV_READY);
5401                         qla82xx_idc_unlock(ha);
5402                         ha->flags.isp82xx_fw_hung = 0;
5403                         rval = qla82xx_restart_isp(base_vha);
5404                         qla82xx_idc_lock(ha);
5405                         /* Clear driver state register */
5406                         qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, 0);
5407                         qla82xx_set_drv_active(base_vha);
5408                 }
5409                 qla82xx_idc_unlock(ha);
5410         } else {
5411                 ql_dbg(ql_dbg_aer, base_vha, 0x900d,
5412                     "This devfn is not reset owner = 0x%x.\n",
5413                     ha->pdev->devfn);
5414                 if ((qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE) ==
5415                     QLA8XXX_DEV_READY)) {
5416                         ha->flags.isp82xx_fw_hung = 0;
5417                         rval = qla82xx_restart_isp(base_vha);
5418                         qla82xx_idc_lock(ha);
5419                         qla82xx_set_drv_active(base_vha);
5420                         qla82xx_idc_unlock(ha);
5421                 }
5422         }
5423         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5424
5425         return rval;
5426 }
5427
5428 static pci_ers_result_t
5429 qla2xxx_pci_slot_reset(struct pci_dev *pdev)
5430 {
5431         pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT;
5432         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
5433         struct qla_hw_data *ha = base_vha->hw;
5434         struct rsp_que *rsp;
5435         int rc, retries = 10;
5436
5437         ql_dbg(ql_dbg_aer, base_vha, 0x9004,
5438             "Slot Reset.\n");
5439
5440         /* Workaround: qla2xxx driver which access hardware earlier
5441          * needs error state to be pci_channel_io_online.
5442          * Otherwise mailbox command timesout.
5443          */
5444         pdev->error_state = pci_channel_io_normal;
5445
5446         pci_restore_state(pdev);
5447
5448         /* pci_restore_state() clears the saved_state flag of the device
5449          * save restored state which resets saved_state flag
5450          */
5451         pci_save_state(pdev);
5452
5453         if (ha->mem_only)
5454                 rc = pci_enable_device_mem(pdev);
5455         else
5456                 rc = pci_enable_device(pdev);
5457
5458         if (rc) {
5459                 ql_log(ql_log_warn, base_vha, 0x9005,
5460                     "Can't re-enable PCI device after reset.\n");
5461                 goto exit_slot_reset;
5462         }
5463
5464         rsp = ha->rsp_q_map[0];
5465         if (qla2x00_request_irqs(ha, rsp))
5466                 goto exit_slot_reset;
5467
5468         if (ha->isp_ops->pci_config(base_vha))
5469                 goto exit_slot_reset;
5470
5471         if (IS_QLA82XX(ha)) {
5472                 if (qla82xx_error_recovery(base_vha) == QLA_SUCCESS) {
5473                         ret = PCI_ERS_RESULT_RECOVERED;
5474                         goto exit_slot_reset;
5475                 } else
5476                         goto exit_slot_reset;
5477         }
5478
5479         while (ha->flags.mbox_busy && retries--)
5480                 msleep(1000);
5481
5482         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5483         if (ha->isp_ops->abort_isp(base_vha) == QLA_SUCCESS)
5484                 ret =  PCI_ERS_RESULT_RECOVERED;
5485         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5486
5487
5488 exit_slot_reset:
5489         ql_dbg(ql_dbg_aer, base_vha, 0x900e,
5490             "slot_reset return %x.\n", ret);
5491
5492         return ret;
5493 }
5494
5495 static void
5496 qla2xxx_pci_resume(struct pci_dev *pdev)
5497 {
5498         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
5499         struct qla_hw_data *ha = base_vha->hw;
5500         int ret;
5501
5502         ql_dbg(ql_dbg_aer, base_vha, 0x900f,
5503             "pci_resume.\n");
5504
5505         ret = qla2x00_wait_for_hba_online(base_vha);
5506         if (ret != QLA_SUCCESS) {
5507                 ql_log(ql_log_fatal, base_vha, 0x9002,
5508                     "The device failed to resume I/O from slot/link_reset.\n");
5509         }
5510
5511         pci_cleanup_aer_uncorrect_error_status(pdev);
5512
5513         ha->flags.eeh_busy = 0;
5514 }
5515
5516 static const struct pci_error_handlers qla2xxx_err_handler = {
5517         .error_detected = qla2xxx_pci_error_detected,
5518         .mmio_enabled = qla2xxx_pci_mmio_enabled,
5519         .slot_reset = qla2xxx_pci_slot_reset,
5520         .resume = qla2xxx_pci_resume,
5521 };
5522
5523 static struct pci_device_id qla2xxx_pci_tbl[] = {
5524         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100) },
5525         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200) },
5526         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2300) },
5527         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2312) },
5528         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2322) },
5529         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6312) },
5530         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6322) },
5531         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2422) },
5532         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2432) },
5533         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8432) },
5534         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) },
5535         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) },
5536         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) },
5537         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2031) },
5538         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) },
5539         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8021) },
5540         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8031) },
5541         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISPF001) },
5542         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8044) },
5543         { 0 },
5544 };
5545 MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl);
5546
5547 static struct pci_driver qla2xxx_pci_driver = {
5548         .name           = QLA2XXX_DRIVER_NAME,
5549         .driver         = {
5550                 .owner          = THIS_MODULE,
5551         },
5552         .id_table       = qla2xxx_pci_tbl,
5553         .probe          = qla2x00_probe_one,
5554         .remove         = qla2x00_remove_one,
5555         .shutdown       = qla2x00_shutdown,
5556         .err_handler    = &qla2xxx_err_handler,
5557 };
5558
5559 static const struct file_operations apidev_fops = {
5560         .owner = THIS_MODULE,
5561         .llseek = noop_llseek,
5562 };
5563
5564 /**
5565  * qla2x00_module_init - Module initialization.
5566  **/
5567 static int __init
5568 qla2x00_module_init(void)
5569 {
5570         int ret = 0;
5571
5572         /* Allocate cache for SRBs. */
5573         srb_cachep = kmem_cache_create("qla2xxx_srbs", sizeof(srb_t), 0,
5574             SLAB_HWCACHE_ALIGN, NULL);
5575         if (srb_cachep == NULL) {
5576                 ql_log(ql_log_fatal, NULL, 0x0001,
5577                     "Unable to allocate SRB cache...Failing load!.\n");
5578                 return -ENOMEM;
5579         }
5580
5581         /* Initialize target kmem_cache and mem_pools */
5582         ret = qlt_init();
5583         if (ret < 0) {
5584                 kmem_cache_destroy(srb_cachep);
5585                 return ret;
5586         } else if (ret > 0) {
5587                 /*
5588                  * If initiator mode is explictly disabled by qlt_init(),
5589                  * prevent scsi_transport_fc.c:fc_scsi_scan_rport() from
5590                  * performing scsi_scan_target() during LOOP UP event.
5591                  */
5592                 qla2xxx_transport_functions.disable_target_scan = 1;
5593                 qla2xxx_transport_vport_functions.disable_target_scan = 1;
5594         }
5595
5596         /* Derive version string. */
5597         strcpy(qla2x00_version_str, QLA2XXX_VERSION);
5598         if (ql2xextended_error_logging)
5599                 strcat(qla2x00_version_str, "-debug");
5600
5601         qla2xxx_transport_template =
5602             fc_attach_transport(&qla2xxx_transport_functions);
5603         if (!qla2xxx_transport_template) {
5604                 kmem_cache_destroy(srb_cachep);
5605                 ql_log(ql_log_fatal, NULL, 0x0002,
5606                     "fc_attach_transport failed...Failing load!.\n");
5607                 qlt_exit();
5608                 return -ENODEV;
5609         }
5610
5611         apidev_major = register_chrdev(0, QLA2XXX_APIDEV, &apidev_fops);
5612         if (apidev_major < 0) {
5613                 ql_log(ql_log_fatal, NULL, 0x0003,
5614                     "Unable to register char device %s.\n", QLA2XXX_APIDEV);
5615         }
5616
5617         qla2xxx_transport_vport_template =
5618             fc_attach_transport(&qla2xxx_transport_vport_functions);
5619         if (!qla2xxx_transport_vport_template) {
5620                 kmem_cache_destroy(srb_cachep);
5621                 qlt_exit();
5622                 fc_release_transport(qla2xxx_transport_template);
5623                 ql_log(ql_log_fatal, NULL, 0x0004,
5624                     "fc_attach_transport vport failed...Failing load!.\n");
5625                 return -ENODEV;
5626         }
5627         ql_log(ql_log_info, NULL, 0x0005,
5628             "QLogic Fibre Channel HBA Driver: %s.\n",
5629             qla2x00_version_str);
5630         ret = pci_register_driver(&qla2xxx_pci_driver);
5631         if (ret) {
5632                 kmem_cache_destroy(srb_cachep);
5633                 qlt_exit();
5634                 fc_release_transport(qla2xxx_transport_template);
5635                 fc_release_transport(qla2xxx_transport_vport_template);
5636                 ql_log(ql_log_fatal, NULL, 0x0006,
5637                     "pci_register_driver failed...ret=%d Failing load!.\n",
5638                     ret);
5639         }
5640         return ret;
5641 }
5642
5643 /**
5644  * qla2x00_module_exit - Module cleanup.
5645  **/
5646 static void __exit
5647 qla2x00_module_exit(void)
5648 {
5649         unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
5650         pci_unregister_driver(&qla2xxx_pci_driver);
5651         qla2x00_release_firmware();
5652         kmem_cache_destroy(srb_cachep);
5653         qlt_exit();
5654         if (ctx_cachep)
5655                 kmem_cache_destroy(ctx_cachep);
5656         fc_release_transport(qla2xxx_transport_template);
5657         fc_release_transport(qla2xxx_transport_vport_template);
5658 }
5659
5660 module_init(qla2x00_module_init);
5661 module_exit(qla2x00_module_exit);
5662
5663 MODULE_AUTHOR("QLogic Corporation");
5664 MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
5665 MODULE_LICENSE("GPL");
5666 MODULE_VERSION(QLA2XXX_VERSION);
5667 MODULE_FIRMWARE(FW_FILE_ISP21XX);
5668 MODULE_FIRMWARE(FW_FILE_ISP22XX);
5669 MODULE_FIRMWARE(FW_FILE_ISP2300);
5670 MODULE_FIRMWARE(FW_FILE_ISP2322);
5671 MODULE_FIRMWARE(FW_FILE_ISP24XX);
5672 MODULE_FIRMWARE(FW_FILE_ISP25XX);