drivers/staging/tm6000/tm6000-core.c

   1 /*
   2    tm6000-core.c - driver for TM5600/TM6000 USB video capture devices
   3
   4    Copyright (C) 2006-2007 Mauro Carvalho Chehab <mchehab@infradead.org>
   5
   6    Copyright (C) 2007 Michel Ludwig <michel.ludwig@gmail.com>
   7        - DVB-T support
   8
   9    This program is free software; you can redistribute it and/or modify
  10    it under the terms of the GNU General Public License as published by
  11    the Free Software Foundation version 2
  12
  13    This program is distributed in the hope that it will be useful,
  14    but WITHOUT ANY WARRANTY; without even the implied warranty of
  15    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16    GNU General Public License for more details.
  17
  18    You should have received a copy of the GNU General Public License
  19    along with this program; if not, write to the Free Software
  20    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21  */
  22
  23 #include <linux/module.h>
  24 #include <linux/kernel.h>
  25 #include <linux/usb.h>
  26 #include <linux/i2c.h>
  27 #include <linux/video_decoder.h>
  28 #include "tm6000.h"
  29 #include "tm6000-regs.h"
  30 #include <media/v4l2-common.h>
  31 #include <media/tuner.h>
  32
  33 #define USB_TIMEOUT     5*HZ /* ms */
  34
  35 int tm6000_read_write_usb (struct tm6000_core *dev, u8 req_type, u8 req,
  36                            u16 value, u16 index, u8 *buf, u16 len)
  37 {
  38         int          ret, i;
  39         unsigned int pipe;
  40         static int   ini=0, last=0, n=0;
  41         u8           *data=NULL;
  42
  43         if (len)
  44                 data = kzalloc(len, GFP_KERNEL);
  45
  46
  47         if (req_type & USB_DIR_IN)
  48                 pipe=usb_rcvctrlpipe(dev->udev, 0);
  49         else {
  50                 pipe=usb_sndctrlpipe(dev->udev, 0);
  51                 memcpy(data, buf, len);
  52         }
  53
  54         if (tm6000_debug & V4L2_DEBUG_I2C) {
  55                 if (!ini)
  56                         last=ini=jiffies;
  57
  58                 printk("%06i (dev %p, pipe %08x): ", n, dev->udev, pipe);
  59
  60                 printk( "%s: %06u ms %06u ms %02x %02x %02x %02x %02x %02x %02x %02x ",
  61                         (req_type & USB_DIR_IN)?" IN":"OUT",
  62                         jiffies_to_msecs(jiffies-last),
  63                         jiffies_to_msecs(jiffies-ini),
  64                         req_type, req,value&0xff,value>>8, index&0xff, index>>8,
  65                         len&0xff, len>>8);
  66                 last=jiffies;
  67                 n++;
  68
  69                 if ( !(req_type & USB_DIR_IN) ) {
  70                         printk(">>> ");
  71                         for (i=0;i<len;i++) {
  72                                 printk(" %02x",buf[i]);
  73                         }
  74                 printk("\n");
  75                 }
  76         }
  77
  78         ret = usb_control_msg(dev->udev, pipe, req, req_type, value, index, data,
  79                               len, USB_TIMEOUT);
  80
  81         if (req_type &  USB_DIR_IN)
  82                 memcpy(buf, data, len);
  83
  84         if (tm6000_debug & V4L2_DEBUG_I2C) {
  85                 if (ret<0) {
  86                         if (req_type &  USB_DIR_IN)
  87                                 printk("<<< (len=%d)\n",len);
  88
  89                         printk("%s: Error #%d\n", __FUNCTION__, ret);
  90                 } else if (req_type &  USB_DIR_IN) {
  91                         printk("<<< ");
  92                         for (i=0;i<len;i++) {
  93                                 printk(" %02x",buf[i]);
  94                         }
  95                         printk("\n");
  96                 }
  97         }
  98
  99         kfree(data);
 100
 101         msleep(5);
 102
 103         return ret;
 104 }
 105
 106 int tm6000_set_reg (struct tm6000_core *dev, u8 req, u16 value, u16 index)
 107 {
 108         return
 109                 tm6000_read_write_usb (dev, USB_DIR_OUT | USB_TYPE_VENDOR,
 110                                        req, value, index, NULL, 0);
 111 }
 112
 113 int tm6000_get_reg (struct tm6000_core *dev, u8 req, u16 value, u16 index)
 114 {
 115         int rc;
 116         u8 buf[1];
 117
 118         rc=tm6000_read_write_usb (dev, USB_DIR_IN | USB_TYPE_VENDOR, req,
 119                                        value, index, buf, 1);
 120
 121         if (rc<0)
 122                 return rc;
 123
 124         return *buf;
 125 }
 126
 127 int tm6000_get_reg16 (struct tm6000_core *dev, u8 req, u16 value, u16 index)
 128 {
 129         int rc;
 130         u8 buf[2];
 131
 132         rc=tm6000_read_write_usb (dev, USB_DIR_IN | USB_TYPE_VENDOR, req,
 133                                        value, index, buf, 2);
 134
 135         if (rc<0)
 136                 return rc;
 137
 138         return buf[1]|buf[0]<<8;
 139 }
 140
 141 void tm6000_set_fourcc_format(struct tm6000_core *dev)
 142 {
 143         if (dev->dev_type == TM6010) {
 144                 if (dev->fourcc == V4L2_PIX_FMT_UYVY)
 145                         tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0xc1, 0xfc);
 146                 else
 147                         tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0xc1, 0xfd);
 148         } else {
 149                 if (dev->fourcc == V4L2_PIX_FMT_UYVY)
 150                         tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0xc1, 0xd0);
 151                 else
 152                         tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0xc1, 0x90);
 153         }
 154 }
 155
 156 int tm6000_init_analog_mode (struct tm6000_core *dev)
 157 {
 158         if (dev->dev_type == TM6010) {
 159                 int val;
 160
 161                 /* Enable video */
 162                 val = tm6000_get_reg(dev, REQ_07_SET_GET_AVREG, 0xcc, 0);
 163                 val |= 0x60;
 164                 tm6000_set_reg(dev, REQ_07_SET_GET_AVREG, 0xcc, val);
 165                 tm6000_set_reg(dev, REQ_07_SET_GET_AVREG, 0xfe, 0xcf);
 166
 167         } else {
 168                 /* Enables soft reset */
 169                 tm6000_set_reg(dev, REQ_07_SET_GET_AVREG, 0x3f, 0x01);
 170
 171                 if (dev->scaler) {
 172                         tm6000_set_reg(dev, REQ_07_SET_GET_AVREG, 0xc0, 0x20);
 173                 } else {
 174                         /* Enable Hfilter and disable TS Drop err */
 175                         tm6000_set_reg(dev, REQ_07_SET_GET_AVREG, 0xc0, 0x80);
 176                 }
 177
 178                 tm6000_set_reg(dev, REQ_07_SET_GET_AVREG, 0xc3, 0x88);
 179                 tm6000_set_reg(dev, REQ_07_SET_GET_AVREG, 0xda, 0x23);
 180                 tm6000_set_reg(dev, REQ_07_SET_GET_AVREG, 0xd1, 0xc0);
 181                 tm6000_set_reg(dev, REQ_07_SET_GET_AVREG, 0xd2, 0xd8);
 182                 tm6000_set_reg(dev, REQ_07_SET_GET_AVREG, 0xd6, 0x06);
 183                 tm6000_set_reg(dev, REQ_07_SET_GET_AVREG, 0xdf, 0x1f);
 184
 185                 /* AP Software reset */
 186                 tm6000_set_reg(dev, REQ_07_SET_GET_AVREG, 0xff, 0x08);
 187                 tm6000_set_reg(dev, REQ_07_SET_GET_AVREG, 0xff, 0x00);
 188
 189                 tm6000_set_fourcc_format(dev);
 190
 191                 /* Disables soft reset */
 192                 tm6000_set_reg(dev, REQ_07_SET_GET_AVREG, 0x3f, 0x00);
 193
 194                 /* E3: Select input 0 - TV tuner */
 195                 tm6000_set_reg(dev, REQ_07_SET_GET_AVREG, 0xe3, 0x00);
 196                 tm6000_set_reg(dev, REQ_07_SET_GET_AVREG, 0xeb, 0x60);
 197
 198                 /* This controls input */
 199                 tm6000_set_reg(dev, REQ_03_SET_GET_MCU_PIN, TM6000_GPIO_2, 0x0);
 200                 tm6000_set_reg(dev, REQ_03_SET_GET_MCU_PIN, TM6000_GPIO_3, 0x01);
 201         }
 202         msleep(20);
 203
 204         /* Tuner firmware can now be loaded */
 205
 206         /*FIXME: Hack!!! */
 207         struct v4l2_frequency f;
 208         mutex_lock(&dev->lock);
 209         f.frequency=dev->freq;
 210         v4l2_device_call_all(&dev->v4l2_dev, 0, tuner, s_frequency, &f);
 211         mutex_unlock(&dev->lock);
 212
 213         msleep(100);
 214         tm6000_set_standard (dev, &dev->norm);
 215         tm6000_set_audio_bitrate (dev,48000);
 216
 217         return 0;
 218 }
 219
 220 int tm6000_init_digital_mode (struct tm6000_core *dev)
 221 {
 222         if (dev->dev_type == TM6010) {
 223                 int val;
 224                 u8 buf[2];
 225
 226                 /* digital init */
 227                 val = tm6000_get_reg(dev, REQ_07_SET_GET_AVREG, 0xcc, 0);
 228                 val &= ~0x60;
 229                 tm6000_set_reg(dev, REQ_07_SET_GET_AVREG, 0xcc, val);
 230                 val = tm6000_get_reg(dev, REQ_07_SET_GET_AVREG, 0xc0, 0);
 231                 val |= 0x40;
 232                 tm6000_set_reg(dev, REQ_07_SET_GET_AVREG, 0xc0, val);
 233                 tm6000_set_reg(dev, REQ_07_SET_GET_AVREG, 0xfe, 0x28);
 234                 tm6000_set_reg(dev, REQ_08_SET_GET_AVREG_BIT, 0xe2, 0xfc);
 235                 tm6000_set_reg(dev, REQ_08_SET_GET_AVREG_BIT, 0xe6, 0xff);
 236                 tm6000_set_reg(dev, REQ_08_SET_GET_AVREG_BIT, 0xf1, 0xfe);
 237                 tm6000_read_write_usb (dev, 0xc0, 0x0e, 0x00c2, 0x0008, buf, 2);
 238                 printk (KERN_INFO "buf %#x %#x \n", buf[0], buf[1]);
 239
 240
 241         } else  {
 242                 tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x00ff, 0x08);
 243                 tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x00ff, 0x00);
 244                 tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x003f, 0x01);
 245                 tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x00df, 0x08);
 246                 tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x00e2, 0x0c);
 247                 tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x00e8, 0xff);
 248                 tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x00eb, 0xd8);
 249                 tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x00c0, 0x40);
 250                 tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x00c1, 0xd0);
 251                 tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x00c3, 0x09);
 252                 tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x00da, 0x37);
 253                 tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x00d1, 0xd8);
 254                 tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x00d2, 0xc0);
 255                 tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x00d6, 0x60);
 256
 257                 tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x00e2, 0x0c);
 258                 tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x00e8, 0xff);
 259                 tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0x00eb, 0x08);
 260                 msleep(50);
 261
 262                 tm6000_set_reg (dev, REQ_04_EN_DISABLE_MCU_INT, 0x0020, 0x00);
 263                 msleep(50);
 264                 tm6000_set_reg (dev, REQ_04_EN_DISABLE_MCU_INT, 0x0020, 0x01);
 265                 msleep(50);
 266                 tm6000_set_reg (dev, REQ_04_EN_DISABLE_MCU_INT, 0x0020, 0x00);
 267                 msleep(100);
 268         }
 269         return 0;
 270 }
 271
 272 struct reg_init {
 273         u8 req;
 274         u8 reg;
 275         u8 val;
 276 };
 277
 278 /* The meaning of those initializations are unknown */
 279 struct reg_init tm6000_init_tab[] = {
 280         /* REG  VALUE */
 281         { REQ_07_SET_GET_AVREG,  0xdf, 0x1f },
 282         { REQ_07_SET_GET_AVREG,  0xff, 0x08 },
 283         { REQ_07_SET_GET_AVREG,  0xff, 0x00 },
 284         { REQ_07_SET_GET_AVREG,  0xd5, 0x4f },
 285         { REQ_07_SET_GET_AVREG,  0xda, 0x23 },
 286         { REQ_07_SET_GET_AVREG,  0xdb, 0x08 },
 287         { REQ_07_SET_GET_AVREG,  0xe2, 0x00 },
 288         { REQ_07_SET_GET_AVREG,  0xe3, 0x10 },
 289         { REQ_07_SET_GET_AVREG,  0xe5, 0x00 },
 290         { REQ_07_SET_GET_AVREG,  0xe8, 0x00 },
 291         { REQ_07_SET_GET_AVREG,  0xeb, 0x64 },          /* 48000 bits/sample, external input */
 292         { REQ_07_SET_GET_AVREG,  0xee, 0xc2 },
 293         { REQ_07_SET_GET_AVREG,  0x3f, 0x01 },          /* Start of soft reset */
 294         { REQ_07_SET_GET_AVREG,  0x00, 0x00 },
 295         { REQ_07_SET_GET_AVREG,  0x01, 0x07 },
 296         { REQ_07_SET_GET_AVREG,  0x02, 0x5f },
 297         { REQ_07_SET_GET_AVREG,  0x03, 0x00 },
 298         { REQ_07_SET_GET_AVREG,  0x05, 0x64 },
 299         { REQ_07_SET_GET_AVREG,  0x07, 0x01 },
 300         { REQ_07_SET_GET_AVREG,  0x08, 0x82 },
 301         { REQ_07_SET_GET_AVREG,  0x09, 0x36 },
 302         { REQ_07_SET_GET_AVREG,  0x0a, 0x50 },
 303         { REQ_07_SET_GET_AVREG,  0x0c, 0x6a },
 304         { REQ_07_SET_GET_AVREG,  0x11, 0xc9 },
 305         { REQ_07_SET_GET_AVREG,  0x12, 0x07 },
 306         { REQ_07_SET_GET_AVREG,  0x13, 0x3b },
 307         { REQ_07_SET_GET_AVREG,  0x14, 0x47 },
 308         { REQ_07_SET_GET_AVREG,  0x15, 0x6f },
 309         { REQ_07_SET_GET_AVREG,  0x17, 0xcd },
 310         { REQ_07_SET_GET_AVREG,  0x18, 0x1e },
 311         { REQ_07_SET_GET_AVREG,  0x19, 0x8b },
 312         { REQ_07_SET_GET_AVREG,  0x1a, 0xa2 },
 313         { REQ_07_SET_GET_AVREG,  0x1b, 0xe9 },
 314         { REQ_07_SET_GET_AVREG,  0x1c, 0x1c },
 315         { REQ_07_SET_GET_AVREG,  0x1d, 0xcc },
 316         { REQ_07_SET_GET_AVREG,  0x1e, 0xcc },
 317         { REQ_07_SET_GET_AVREG,  0x1f, 0xcd },
 318         { REQ_07_SET_GET_AVREG,  0x20, 0x3c },
 319         { REQ_07_SET_GET_AVREG,  0x21, 0x3c },
 320         { REQ_07_SET_GET_AVREG,  0x2d, 0x48 },
 321         { REQ_07_SET_GET_AVREG,  0x2e, 0x88 },
 322         { REQ_07_SET_GET_AVREG,  0x30, 0x22 },
 323         { REQ_07_SET_GET_AVREG,  0x31, 0x61 },
 324         { REQ_07_SET_GET_AVREG,  0x32, 0x74 },
 325         { REQ_07_SET_GET_AVREG,  0x33, 0x1c },
 326         { REQ_07_SET_GET_AVREG,  0x34, 0x74 },
 327         { REQ_07_SET_GET_AVREG,  0x35, 0x1c },
 328         { REQ_07_SET_GET_AVREG,  0x36, 0x7a },
 329         { REQ_07_SET_GET_AVREG,  0x37, 0x26 },
 330         { REQ_07_SET_GET_AVREG,  0x38, 0x40 },
 331         { REQ_07_SET_GET_AVREG,  0x39, 0x0a },
 332         { REQ_07_SET_GET_AVREG,  0x42, 0x55 },
 333         { REQ_07_SET_GET_AVREG,  0x51, 0x11 },
 334         { REQ_07_SET_GET_AVREG,  0x55, 0x01 },
 335         { REQ_07_SET_GET_AVREG,  0x57, 0x02 },
 336         { REQ_07_SET_GET_AVREG,  0x58, 0x35 },
 337         { REQ_07_SET_GET_AVREG,  0x59, 0xa0 },
 338         { REQ_07_SET_GET_AVREG,  0x80, 0x15 },
 339         { REQ_07_SET_GET_AVREG,  0x82, 0x42 },
 340         { REQ_07_SET_GET_AVREG,  0xc1, 0xd0 },
 341         { REQ_07_SET_GET_AVREG,  0xc3, 0x88 },
 342         { REQ_07_SET_GET_AVREG,  0x3f, 0x00 },          /* End of the soft reset */
 343         { REQ_05_SET_GET_USBREG, 0x18, 0x00 },
 344 };
 345
 346 struct reg_init tm6010_init_tab[] = {
 347         { REQ_07_SET_GET_AVREG, 0xc0, 0x00 },
 348         { REQ_07_SET_GET_AVREG, 0xc4, 0xa0 },
 349         { REQ_07_SET_GET_AVREG, 0xc6, 0x40 },
 350         { REQ_07_SET_GET_AVREG, 0xca, 0x31 },
 351         { REQ_07_SET_GET_AVREG, 0xcc, 0xe1 },
 352         { REQ_07_SET_GET_AVREG, 0xe0, 0x03 },
 353         { REQ_07_SET_GET_AVREG, 0xfe, 0x7f },
 354
 355         { REQ_08_SET_GET_AVREG_BIT, 0xe2, 0xf0 },
 356         { REQ_08_SET_GET_AVREG_BIT, 0xe3, 0xf4 },
 357         { REQ_08_SET_GET_AVREG_BIT, 0xe4, 0xf8 },
 358         { REQ_08_SET_GET_AVREG_BIT, 0xe6, 0x00 },
 359         { REQ_08_SET_GET_AVREG_BIT, 0xea, 0xf2 },
 360         { REQ_08_SET_GET_AVREG_BIT, 0xeb, 0xf0 },
 361         { REQ_08_SET_GET_AVREG_BIT, 0xec, 0xc2 },
 362         { REQ_08_SET_GET_AVREG_BIT, 0xf0, 0x60 },
 363         { REQ_08_SET_GET_AVREG_BIT, 0xf1, 0xfc },
 364
 365         { REQ_07_SET_GET_AVREG, 0x3f, 0x01 },
 366         { REQ_07_SET_GET_AVREG, 0x00, 0x00 },
 367         { REQ_07_SET_GET_AVREG, 0x01, 0x07 },
 368         { REQ_07_SET_GET_AVREG, 0x02, 0x5f },
 369         { REQ_07_SET_GET_AVREG, 0x03, 0x00 },
 370         { REQ_07_SET_GET_AVREG, 0x05, 0x64 },
 371         { REQ_07_SET_GET_AVREG, 0x07, 0x01 },
 372         { REQ_07_SET_GET_AVREG, 0x08, 0x82 },
 373         { REQ_07_SET_GET_AVREG, 0x09, 0x36 },
 374         { REQ_07_SET_GET_AVREG, 0x0a, 0x50 },
 375         { REQ_07_SET_GET_AVREG, 0x0c, 0x6a },
 376         { REQ_07_SET_GET_AVREG, 0x11, 0xc9 },
 377         { REQ_07_SET_GET_AVREG, 0x12, 0x07 },
 378         { REQ_07_SET_GET_AVREG, 0x13, 0x3b },
 379         { REQ_07_SET_GET_AVREG, 0x14, 0x47 },
 380         { REQ_07_SET_GET_AVREG, 0x15, 0x6f },
 381         { REQ_07_SET_GET_AVREG, 0x17, 0xcd },
 382         { REQ_07_SET_GET_AVREG, 0x18, 0x1e },
 383         { REQ_07_SET_GET_AVREG, 0x19, 0x8b },
 384         { REQ_07_SET_GET_AVREG, 0x1a, 0xa2 },
 385         { REQ_07_SET_GET_AVREG, 0x1b, 0xe9 },
 386         { REQ_07_SET_GET_AVREG, 0x1c, 0x1c },
 387         { REQ_07_SET_GET_AVREG, 0x1d, 0xcc },
 388         { REQ_07_SET_GET_AVREG, 0x1e, 0xcc },
 389         { REQ_07_SET_GET_AVREG, 0x1f, 0xcd },
 390         { REQ_07_SET_GET_AVREG, 0x20, 0x3c },
 391         { REQ_07_SET_GET_AVREG, 0x21, 0x3c },
 392         { REQ_07_SET_GET_AVREG, 0x2d, 0x48 },
 393         { REQ_07_SET_GET_AVREG, 0x2e, 0x88 },
 394         { REQ_07_SET_GET_AVREG, 0x30, 0x22 },
 395         { REQ_07_SET_GET_AVREG, 0x31, 0x61 },
 396         { REQ_07_SET_GET_AVREG, 0x32, 0x74 },
 397         { REQ_07_SET_GET_AVREG, 0x33, 0x1c },
 398         { REQ_07_SET_GET_AVREG, 0x34, 0x74 },
 399         { REQ_07_SET_GET_AVREG, 0x35, 0x1c },
 400         { REQ_07_SET_GET_AVREG, 0x36, 0x7a },
 401         { REQ_07_SET_GET_AVREG, 0x37, 0x26 },
 402         { REQ_07_SET_GET_AVREG, 0x38, 0x40 },
 403         { REQ_07_SET_GET_AVREG, 0x39, 0x0a },
 404         { REQ_07_SET_GET_AVREG, 0x42, 0x55 },
 405         { REQ_07_SET_GET_AVREG, 0x51, 0x11 },
 406         { REQ_07_SET_GET_AVREG, 0x55, 0x01 },
 407         { REQ_07_SET_GET_AVREG, 0x57, 0x02 },
 408         { REQ_07_SET_GET_AVREG, 0x58, 0x35 },
 409         { REQ_07_SET_GET_AVREG, 0x59, 0xa0 },
 410         { REQ_07_SET_GET_AVREG, 0x80, 0x15 },
 411         { REQ_07_SET_GET_AVREG, 0x82, 0x42 },
 412         { REQ_07_SET_GET_AVREG, 0xc1, 0xd0 },
 413         { REQ_07_SET_GET_AVREG, 0xc3, 0x88 },
 414         { REQ_07_SET_GET_AVREG, 0x3f, 0x00 },
 415
 416         { REQ_05_SET_GET_USBREG, 0x18, 0x00 },
 417
 418         /* set remote wakeup key:any key wakeup */
 419         { REQ_07_SET_GET_AVREG,  0xe5,  0xfe },
 420         { REQ_07_SET_GET_AVREG,  0xda,  0xff },
 421 };
 422
 423 int tm6000_init (struct tm6000_core *dev)
 424 {
 425         int board, rc=0, i, size;
 426         struct reg_init *tab;
 427
 428         if (dev->dev_type == TM6010) {
 429                 tab = tm6010_init_tab;
 430                 size = ARRAY_SIZE(tm6010_init_tab);
 431         } else {
 432                 tab = tm6000_init_tab;
 433                 size = ARRAY_SIZE(tm6000_init_tab);
 434         }
 435
 436         /* Load board's initialization table */
 437         for (i=0; i< size; i++) {
 438                 rc= tm6000_set_reg (dev, tab[i].req, tab[i].reg, tab[i].val);
 439                 if (rc<0) {
 440                         printk (KERN_ERR "Error %i while setting req %d, "
 441                                          "reg %d to value %d\n", rc,
 442                                          tab[i].req,tab[i].reg, tab[i].val);
 443                         return rc;
 444                 }
 445         }
 446
 447         msleep(5); /* Just to be conservative */
 448
 449         /* Check board version - maybe 10Moons specific */
 450         board=tm6000_get_reg16 (dev, 0x40, 0, 0);
 451         if (board >=0) {
 452                 printk (KERN_INFO "Board version = 0x%04x\n",board);
 453         } else {
 454                 printk (KERN_ERR "Error %i while retrieving board version\n",board);
 455         }
 456
 457         if (dev->dev_type == TM6010) {
 458                 /* Turn xceive 3028 on */
 459                 tm6000_set_reg(dev, REQ_03_SET_GET_MCU_PIN, TM6010_GPIO_3, 0x01);
 460                 msleep(11);
 461         }
 462
 463         /* Reset GPIO1 and GPIO4. */
 464         for (i=0; i< 2; i++) {
 465                 rc = tm6000_set_reg(dev, REQ_03_SET_GET_MCU_PIN,
 466                                         dev->tuner_reset_gpio, 0x00);
 467                 if (rc<0) {
 468                         printk (KERN_ERR "Error %i doing GPIO1 reset\n",rc);
 469                         return rc;
 470                 }
 471
 472                 msleep(10); /* Just to be conservative */
 473                 rc = tm6000_set_reg(dev, REQ_03_SET_GET_MCU_PIN,
 474                                         dev->tuner_reset_gpio, 0x01);
 475                 if (rc<0) {
 476                         printk (KERN_ERR "Error %i doing GPIO1 reset\n",rc);
 477                         return rc;
 478                 }
 479
 480                 msleep(10);
 481                 rc=tm6000_set_reg (dev, REQ_03_SET_GET_MCU_PIN, TM6000_GPIO_4, 0);
 482                 if (rc<0) {
 483                         printk (KERN_ERR "Error %i doing GPIO4 reset\n",rc);
 484                         return rc;
 485                 }
 486
 487                 msleep(10);
 488                 rc=tm6000_set_reg (dev, REQ_03_SET_GET_MCU_PIN, TM6000_GPIO_4, 1);
 489                 if (rc<0) {
 490                         printk (KERN_ERR "Error %i doing GPIO4 reset\n",rc);
 491                         return rc;
 492                 }
 493
 494                 if (!i) {
 495                         rc=tm6000_get_reg16(dev, 0x40,0,0);
 496                         if (rc>=0) {
 497                                 printk ("board=%d\n", rc);
 498                         }
 499                 }
 500         }
 501
 502         msleep(50);
 503
 504         return 0;
 505 }
 506
 507 int tm6000_set_audio_bitrate(struct tm6000_core *dev, int bitrate)
 508 {
 509         int val;
 510
 511         val=tm6000_get_reg (dev, REQ_07_SET_GET_AVREG, 0xeb, 0x0);
 512 printk("Original value=%d\n",val);
 513         if (val<0)
 514                 return val;
 515
 516         val &= 0x0f;            /* Preserve the audio input control bits */
 517         switch (bitrate) {
 518         case 44100:
 519                 val|=0xd0;
 520                 dev->audio_bitrate=bitrate;
 521                 break;
 522         case 48000:
 523                 val|=0x60;
 524                 dev->audio_bitrate=bitrate;
 525                 break;
 526         }
 527         val=tm6000_set_reg (dev, REQ_07_SET_GET_AVREG, 0xeb, val);
 528
 529         return val;
 530 }
 531 EXPORT_SYMBOL_GPL(tm6000_set_audio_bitrate);