ARC: Cache Flush Management

[karo-tx-linux.git] / arch / arc / include / asm / cache.h

diff --git a/arch/arc/include/asm/cache.h b/arch/arc/include/asm/cache.h
index 30c72a4d2d9fc4bbf0b1ec077d44a2329b9315d9..6632273861fd205ce2bf25ed2d48b1e26f8f78ed 100644 (file)
--- a/arch/arc/include/asm/cache.h
+++ b/arch/arc/include/asm/cache.h
@@ -18,4 +18,58 @@
 
 #define L1_CACHE_BYTES         (1 << L1_CACHE_SHIFT)
 
+#define ARC_ICACHE_WAYS        2
+#define ARC_DCACHE_WAYS        4
+
+/* Helpers */
+#define ARC_ICACHE_LINE_LEN    L1_CACHE_BYTES
+#define ARC_DCACHE_LINE_LEN    L1_CACHE_BYTES
+
+#define ICACHE_LINE_MASK       (~(ARC_ICACHE_LINE_LEN - 1))
+#define DCACHE_LINE_MASK       (~(ARC_DCACHE_LINE_LEN - 1))
+
+#if ARC_ICACHE_LINE_LEN != ARC_DCACHE_LINE_LEN
+#error "Need to fix some code as I/D cache lines not same"
+#else
+#define is_not_cache_aligned(p)        ((unsigned long)p & (~DCACHE_LINE_MASK))
+#endif
+
+#ifndef __ASSEMBLY__
+
+/* Uncached access macros */
+#define arc_read_uncached_32(ptr)      \
+({                                     \
+       unsigned int __ret;             \
+       __asm__ __volatile__(           \
+       "       ld.di %0, [%1]  \n"     \
+       : "=r"(__ret)                   \
+       : "r"(ptr));                    \
+       __ret;                          \
+})
+
+#define arc_write_uncached_32(ptr, data)\
+({                                     \
+       __asm__ __volatile__(           \
+       "       st.di %0, [%1]  \n"     \
+       :                               \
+       : "r"(data), "r"(ptr));         \
+})
+
+/* used to give SHMLBA a value to avoid Cache Aliasing */
+extern unsigned int ARC_shmlba;
+
+#define ARCH_DMA_MINALIGN      L1_CACHE_BYTES
+
+/*
+ * ARC700 doesn't cache any access in top 256M.
+ * Ideal for wiring memory mapped peripherals as we don't need to do
+ * explicit uncached accesses (LD.di/ST.di) hence more portable drivers
+ */
+#define ARC_UNCACHED_ADDR_SPACE        0xc0000000
+
+extern void arc_cache_init(void);
+extern char *arc_cache_mumbojumbo(int cpu_id, char *buf, int len);
+extern void __init read_decode_cache_bcr(void);
+#endif
+
 #endif /* _ASM_CACHE_H */