Merge branch 'cpuidle' into release

[karo-tx-linux.git] / arch / arm / boot / dts / r8a7790.dtsi

diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index 51ab8865ea37dc899ddd2fe0948c0d76b6582263..a0b2a79cbfbdf0b42286dea205fe6751fdaf57f6 100644 (file)
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -113,7 +113,7 @@
        };
 
        gic: interrupt-controller@f1001000 {
-               compatible = "arm,cortex-a15-gic";
+               compatible = "arm,gic-400";
                #interrupt-cells = <3>;
                #address-cells = <0>;
                interrupt-controller;
@@ -134,6 +134,7 @@
                #interrupt-cells = <2>;
                interrupt-controller;
                clocks = <&mstp9_clks R8A7790_CLK_GPIO0>;
+               power-domains = <&cpg_clocks>;
        };
 
        gpio1: gpio@e6051000 {
@@ -146,6 +147,7 @@
                #interrupt-cells = <2>;
                interrupt-controller;
                clocks = <&mstp9_clks R8A7790_CLK_GPIO1>;
+               power-domains = <&cpg_clocks>;
        };
 
        gpio2: gpio@e6052000 {
@@ -158,6 +160,7 @@
                #interrupt-cells = <2>;
                interrupt-controller;
                clocks = <&mstp9_clks R8A7790_CLK_GPIO2>;
+               power-domains = <&cpg_clocks>;
        };
 
        gpio3: gpio@e6053000 {
@@ -170,6 +173,7 @@
                #interrupt-cells = <2>;
                interrupt-controller;
                clocks = <&mstp9_clks R8A7790_CLK_GPIO3>;
+               power-domains = <&cpg_clocks>;
        };
 
        gpio4: gpio@e6054000 {
@@ -182,6 +186,7 @@
                #interrupt-cells = <2>;
                interrupt-controller;
                clocks = <&mstp9_clks R8A7790_CLK_GPIO4>;
+               power-domains = <&cpg_clocks>;
        };
 
        gpio5: gpio@e6055000 {
@@ -194,6 +199,7 @@
                #interrupt-cells = <2>;
                interrupt-controller;
                clocks = <&mstp9_clks R8A7790_CLK_GPIO5>;
+               power-domains = <&cpg_clocks>;
        };
 
        thermal@e61f0000 {
@@ -201,6 +207,7 @@
                reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>;
                interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp5_clks R8A7790_CLK_THERMAL>;
+               power-domains = <&cpg_clocks>;
        };
 
        timer {
@@ -218,6 +225,7 @@
                             <0 143 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp1_clks R8A7790_CLK_CMT0>;
                clock-names = "fck";
+               power-domains = <&cpg_clocks>;
 
                renesas,channels-mask = <0x60>;
 
@@ -237,6 +245,7 @@
                             <0 127 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp3_clks R8A7790_CLK_CMT1>;
                clock-names = "fck";
+               power-domains = <&cpg_clocks>;
 
                renesas,channels-mask = <0xff>;
 
@@ -253,6 +262,7 @@
                             <0 2 IRQ_TYPE_LEVEL_HIGH>,
                             <0 3 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp4_clks R8A7790_CLK_IRQC>;
+               power-domains = <&cpg_clocks>;
        };
 
        dmac0: dma-controller@e6700000 {
@@ -281,6 +291,7 @@
                                "ch12", "ch13", "ch14";
                clocks = <&mstp2_clks R8A7790_CLK_SYS_DMAC0>;
                clock-names = "fck";
+               power-domains = <&cpg_clocks>;
                #dma-cells = <1>;
                dma-channels = <15>;
        };
@@ -311,6 +322,7 @@
                                "ch12", "ch13", "ch14";
                clocks = <&mstp2_clks R8A7790_CLK_SYS_DMAC1>;
                clock-names = "fck";
+               power-domains = <&cpg_clocks>;
                #dma-cells = <1>;
                dma-channels = <15>;
        };
@@ -339,6 +351,7 @@
                                "ch12";
                clocks = <&mstp5_clks R8A7790_CLK_AUDIO_DMAC0>;
                clock-names = "fck";
+               power-domains = <&cpg_clocks>;
                #dma-cells = <1>;
                dma-channels = <13>;
        };
@@ -367,6 +380,7 @@
                                "ch12";
                clocks = <&mstp5_clks R8A7790_CLK_AUDIO_DMAC1>;
                clock-names = "fck";
+               power-domains = <&cpg_clocks>;
                #dma-cells = <1>;
                dma-channels = <13>;
        };
@@ -378,6 +392,7 @@
                              0 109 IRQ_TYPE_LEVEL_HIGH>;
                interrupt-names = "ch0", "ch1";
                clocks = <&mstp3_clks R8A7790_CLK_USBDMAC0>;
+               power-domains = <&cpg_clocks>;
                #dma-cells = <1>;
                dma-channels = <2>;
        };
@@ -389,6 +404,7 @@
                              0 110 IRQ_TYPE_LEVEL_HIGH>;
                interrupt-names = "ch0", "ch1";
                clocks = <&mstp3_clks R8A7790_CLK_USBDMAC1>;
+               power-domains = <&cpg_clocks>;
                #dma-cells = <1>;
                dma-channels = <2>;
        };
@@ -400,6 +416,7 @@
                reg = <0 0xe6508000 0 0x40>;
                interrupts = <0 287 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp9_clks R8A7790_CLK_I2C0>;
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
@@ -410,6 +427,7 @@
                reg = <0 0xe6518000 0 0x40>;
                interrupts = <0 288 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp9_clks R8A7790_CLK_I2C1>;
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
@@ -420,6 +438,7 @@
                reg = <0 0xe6530000 0 0x40>;
                interrupts = <0 286 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp9_clks R8A7790_CLK_I2C2>;
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
@@ -430,6 +449,7 @@
                reg = <0 0xe6540000 0 0x40>;
                interrupts = <0 290 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp9_clks R8A7790_CLK_I2C3>;
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
@@ -442,6 +462,7 @@
                clocks = <&mstp3_clks R8A7790_CLK_IIC0>;
                dmas = <&dmac0 0x61>, <&dmac0 0x62>;
                dma-names = "tx", "rx";
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
@@ -454,6 +475,7 @@
                clocks = <&mstp3_clks R8A7790_CLK_IIC1>;
                dmas = <&dmac0 0x65>, <&dmac0 0x66>;
                dma-names = "tx", "rx";
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
@@ -466,6 +488,7 @@
                clocks = <&mstp3_clks R8A7790_CLK_IIC2>;
                dmas = <&dmac0 0x69>, <&dmac0 0x6a>;
                dma-names = "tx", "rx";
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
@@ -478,6 +501,7 @@
                clocks = <&mstp9_clks R8A7790_CLK_IICDVFS>;
                dmas = <&dmac0 0x77>, <&dmac0 0x78>;
                dma-names = "tx", "rx";
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
@@ -488,6 +512,7 @@
                clocks = <&mstp3_clks R8A7790_CLK_MMCIF0>;
                dmas = <&dmac0 0xd1>, <&dmac0 0xd2>;
                dma-names = "tx", "rx";
+               power-domains = <&cpg_clocks>;
                reg-io-width = <4>;
                status = "disabled";
                max-frequency = <97500000>;
@@ -500,6 +525,7 @@
                clocks = <&mstp3_clks R8A7790_CLK_MMCIF1>;
                dmas = <&dmac0 0xe1>, <&dmac0 0xe2>;
                dma-names = "tx", "rx";
+               power-domains = <&cpg_clocks>;
                reg-io-width = <4>;
                status = "disabled";
                max-frequency = <97500000>;
@@ -517,6 +543,7 @@
                clocks = <&mstp3_clks R8A7790_CLK_SDHI0>;
                dmas = <&dmac1 0xcd>, <&dmac1 0xce>;
                dma-names = "tx", "rx";
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
@@ -527,6 +554,7 @@
                clocks = <&mstp3_clks R8A7790_CLK_SDHI1>;
                dmas = <&dmac1 0xc9>, <&dmac1 0xca>;
                dma-names = "tx", "rx";
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
@@ -537,6 +565,7 @@
                clocks = <&mstp3_clks R8A7790_CLK_SDHI2>;
                dmas = <&dmac1 0xc1>, <&dmac1 0xc2>;
                dma-names = "tx", "rx";
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
@@ -547,6 +576,7 @@
                clocks = <&mstp3_clks R8A7790_CLK_SDHI3>;
                dmas = <&dmac1 0xd3>, <&dmac1 0xd4>;
                dma-names = "tx", "rx";
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
@@ -558,6 +588,7 @@
                clock-names = "sci_ick";
                dmas = <&dmac0 0x21>, <&dmac0 0x22>;
                dma-names = "tx", "rx";
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
@@ -569,6 +600,7 @@
                clock-names = "sci_ick";
                dmas = <&dmac0 0x25>, <&dmac0 0x26>;
                dma-names = "tx", "rx";
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
@@ -580,6 +612,7 @@
                clock-names = "sci_ick";
                dmas = <&dmac0 0x27>, <&dmac0 0x28>;
                dma-names = "tx", "rx";
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
@@ -591,6 +624,7 @@
                clock-names = "sci_ick";
                dmas = <&dmac0 0x3d>, <&dmac0 0x3e>;
                dma-names = "tx", "rx";
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
@@ -602,6 +636,7 @@
                clock-names = "sci_ick";
                dmas = <&dmac0 0x19>, <&dmac0 0x1a>;
                dma-names = "tx", "rx";
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
@@ -613,6 +648,7 @@
                clock-names = "sci_ick";
                dmas = <&dmac0 0x1d>, <&dmac0 0x1e>;
                dma-names = "tx", "rx";
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
@@ -624,6 +660,7 @@
                clock-names = "sci_ick";
                dmas = <&dmac0 0x29>, <&dmac0 0x2a>;
                dma-names = "tx", "rx";
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
@@ -635,6 +672,7 @@
                clock-names = "sci_ick";
                dmas = <&dmac0 0x2d>, <&dmac0 0x2e>;
                dma-names = "tx", "rx";
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
@@ -646,6 +684,7 @@
                clock-names = "sci_ick";
                dmas = <&dmac0 0x39>, <&dmac0 0x3a>;
                dma-names = "tx", "rx";
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
@@ -657,6 +696,7 @@
                clock-names = "sci_ick";
                dmas = <&dmac0 0x4d>, <&dmac0 0x4e>;
                dma-names = "tx", "rx";
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
@@ -665,17 +705,30 @@
                reg = <0 0xee700000 0 0x400>;
                interrupts = <0 162 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp8_clks R8A7790_CLK_ETHER>;
+               power-domains = <&cpg_clocks>;
                phy-mode = "rmii";
                #address-cells = <1>;
                #size-cells = <0>;
                status = "disabled";
        };
 
+       avb: ethernet@e6800000 {
+               compatible = "renesas,etheravb-r8a7790";
+               reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
+               interrupts = <0 163 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp8_clks R8A7790_CLK_ETHERAVB>;
+               power-domains = <&cpg_clocks>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               status = "disabled";
+       };
+
        sata0: sata@ee300000 {
                compatible = "renesas,sata-r8a7790";
                reg = <0 0xee300000 0 0x2000>;
                interrupts = <0 105 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp8_clks R8A7790_CLK_SATA0>;
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
@@ -684,6 +737,7 @@
                reg = <0 0xee500000 0 0x2000>;
                interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp8_clks R8A7790_CLK_SATA1>;
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
@@ -692,12 +746,13 @@
                reg = <0 0xe6590000 0 0x100>;
                interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp7_clks R8A7790_CLK_HSUSB>;
-               renesas,buswait = <4>;
-               phys = <&usb0 1>;
-               phy-names = "usb";
                dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
                       <&usb_dmac1 0>, <&usb_dmac1 1>;
                dma-names = "ch0", "ch1", "ch2", "ch3";
+               power-domains = <&cpg_clocks>;
+               renesas,buswait = <4>;
+               phys = <&usb0 1>;
+               phy-names = "usb";
                status = "disabled";
        };
 
@@ -708,6 +763,7 @@
                #size-cells = <0>;
                clocks = <&mstp7_clks R8A7790_CLK_HSUSB>;
                clock-names = "usbhs";
+               power-domains = <&cpg_clocks>;
                status = "disabled";
 
                usb0: usb-channel@0 {
@@ -722,33 +778,37 @@
 
        vin0: video@e6ef0000 {
                compatible = "renesas,vin-r8a7790";
-               clocks = <&mstp8_clks R8A7790_CLK_VIN0>;
                reg = <0 0xe6ef0000 0 0x1000>;
                interrupts = <0 188 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp8_clks R8A7790_CLK_VIN0>;
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
        vin1: video@e6ef1000 {
                compatible = "renesas,vin-r8a7790";
-               clocks = <&mstp8_clks R8A7790_CLK_VIN1>;
                reg = <0 0xe6ef1000 0 0x1000>;
                interrupts = <0 189 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp8_clks R8A7790_CLK_VIN1>;
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
        vin2: video@e6ef2000 {
                compatible = "renesas,vin-r8a7790";
-               clocks = <&mstp8_clks R8A7790_CLK_VIN2>;
                reg = <0 0xe6ef2000 0 0x1000>;
                interrupts = <0 190 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp8_clks R8A7790_CLK_VIN2>;
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
        vin3: video@e6ef3000 {
                compatible = "renesas,vin-r8a7790";
-               clocks = <&mstp8_clks R8A7790_CLK_VIN3>;
                reg = <0 0xe6ef3000 0 0x1000>;
                interrupts = <0 191 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp8_clks R8A7790_CLK_VIN3>;
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
@@ -757,6 +817,7 @@
                reg = <0 0xfe920000 0 0x8000>;
                interrupts = <0 266 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp1_clks R8A7790_CLK_VSP1_R>;
+               power-domains = <&cpg_clocks>;
 
                renesas,has-sru;
                renesas,#rpf = <5>;
@@ -769,6 +830,7 @@
                reg = <0 0xfe928000 0 0x8000>;
                interrupts = <0 267 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp1_clks R8A7790_CLK_VSP1_S>;
+               power-domains = <&cpg_clocks>;
 
                renesas,has-lut;
                renesas,has-sru;
@@ -782,6 +844,7 @@
                reg = <0 0xfe930000 0 0x8000>;
                interrupts = <0 246 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp1_clks R8A7790_CLK_VSP1_DU0>;
+               power-domains = <&cpg_clocks>;
 
                renesas,has-lif;
                renesas,has-lut;
@@ -795,6 +858,7 @@
                reg = <0 0xfe938000 0 0x8000>;
                interrupts = <0 247 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp1_clks R8A7790_CLK_VSP1_DU1>;
+               power-domains = <&cpg_clocks>;
 
                renesas,has-lif;
                renesas,has-lut;
@@ -849,6 +913,7 @@
                clocks = <&mstp9_clks R8A7790_CLK_RCAN0>,
                         <&cpg_clocks R8A7790_CLK_RCAN>, <&can_clk>;
                clock-names = "clkp1", "clkp2", "can_clk";
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
@@ -859,9 +924,18 @@
                clocks = <&mstp9_clks R8A7790_CLK_RCAN1>,
                         <&cpg_clocks R8A7790_CLK_RCAN>, <&can_clk>;
                clock-names = "clkp1", "clkp2", "can_clk";
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
+       jpu: jpeg-codec@fe980000 {
+               compatible = "renesas,jpu-r8a7790";
+               reg = <0 0xfe980000 0 0x10300>;
+               interrupts = <0 272 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp1_clks R8A7790_CLK_JPU>;
+               power-domains = <&cpg_clocks>;
+       };
+
        clocks {
                #address-cells = <2>;
                #size-cells = <2>;
@@ -936,6 +1010,7 @@
                        clock-output-names = "main", "pll0", "pll1", "pll3",
                                             "lb", "qspi", "sdh", "sd0", "sd1",
                                             "z", "rcan", "adsp";
+                       #power-domain-cells = <0>;
                };
 
                /* Variable factor clocks */
@@ -1249,16 +1324,18 @@
                        compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
                        reg = <0 0xe6150990 0 4>, <0 0xe61509a0 0 4>;
                        clocks = <&hp_clk>, <&zg_clk>, <&zg_clk>, <&zg_clk>,
-                                <&zg_clk>, <&p_clk>, <&zs_clk>, <&zs_clk>;
+                                <&zg_clk>, <&hp_clk>, <&p_clk>, <&zs_clk>,
+                                <&zs_clk>;
                        #clock-cells = <1>;
                        clock-indices = <
                                R8A7790_CLK_MLB R8A7790_CLK_VIN3 R8A7790_CLK_VIN2
-                               R8A7790_CLK_VIN1 R8A7790_CLK_VIN0 R8A7790_CLK_ETHER
+                               R8A7790_CLK_VIN1 R8A7790_CLK_VIN0
+                               R8A7790_CLK_ETHERAVB R8A7790_CLK_ETHER
                                R8A7790_CLK_SATA1 R8A7790_CLK_SATA0
                        >;
                        clock-output-names =
-                               "mlb", "vin3", "vin2", "vin1", "vin0", "ether",
-                               "sata1", "sata0";
+                               "mlb", "vin3", "vin2", "vin1", "vin0",
+                               "etheravb", "ether", "sata1", "sata0";
                };
                mstp9_clks: mstp9_clks@e6150994 {
                        compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
@@ -1291,6 +1368,7 @@
                                <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>,
                                <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>,
                                <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>,
+                               <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>,
                                <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>;
 
                        #clock-cells = <1>;
@@ -1300,6 +1378,7 @@
                                R8A7790_CLK_SSI4 R8A7790_CLK_SSI3 R8A7790_CLK_SSI2 R8A7790_CLK_SSI1 R8A7790_CLK_SSI0
                                R8A7790_CLK_SCU_ALL
                                R8A7790_CLK_SCU_DVC1 R8A7790_CLK_SCU_DVC0
+                               R8A7790_CLK_SCU_CTU1_MIX1 R8A7790_CLK_SCU_CTU0_MIX0
                                R8A7790_CLK_SCU_SRC9 R8A7790_CLK_SCU_SRC8 R8A7790_CLK_SCU_SRC7 R8A7790_CLK_SCU_SRC6 R8A7790_CLK_SCU_SRC5
                                R8A7790_CLK_SCU_SRC4 R8A7790_CLK_SCU_SRC3 R8A7790_CLK_SCU_SRC2 R8A7790_CLK_SCU_SRC1 R8A7790_CLK_SCU_SRC0
                        >;
@@ -1309,6 +1388,7 @@
                                "ssi4", "ssi3", "ssi2", "ssi1", "ssi0",
                                "scu-all",
                                "scu-dvc1", "scu-dvc0",
+                               "scu-ctu1-mix1", "scu-ctu0-mix0",
                                "scu-src9", "scu-src8", "scu-src7", "scu-src6", "scu-src5",
                                "scu-src4", "scu-src3", "scu-src2", "scu-src1", "scu-src0";
                };
@@ -1321,6 +1401,7 @@
                clocks = <&mstp9_clks R8A7790_CLK_QSPI_MOD>;
                dmas = <&dmac0 0x17>, <&dmac0 0x18>;
                dma-names = "tx", "rx";
+               power-domains = <&cpg_clocks>;
                num-cs = <1>;
                #address-cells = <1>;
                #size-cells = <0>;
@@ -1334,6 +1415,7 @@
                clocks = <&mstp0_clks R8A7790_CLK_MSIOF0>;
                dmas = <&dmac0 0x51>, <&dmac0 0x52>;
                dma-names = "tx", "rx";
+               power-domains = <&cpg_clocks>;
                #address-cells = <1>;
                #size-cells = <0>;
                status = "disabled";
@@ -1346,6 +1428,7 @@
                clocks = <&mstp2_clks R8A7790_CLK_MSIOF1>;
                dmas = <&dmac0 0x55>, <&dmac0 0x56>;
                dma-names = "tx", "rx";
+               power-domains = <&cpg_clocks>;
                #address-cells = <1>;
                #size-cells = <0>;
                status = "disabled";
@@ -1358,6 +1441,7 @@
                clocks = <&mstp2_clks R8A7790_CLK_MSIOF2>;
                dmas = <&dmac0 0x41>, <&dmac0 0x42>;
                dma-names = "tx", "rx";
+               power-domains = <&cpg_clocks>;
                #address-cells = <1>;
                #size-cells = <0>;
                status = "disabled";
@@ -1370,6 +1454,7 @@
                clocks = <&mstp2_clks R8A7790_CLK_MSIOF3>;
                dmas = <&dmac0 0x45>, <&dmac0 0x46>;
                dma-names = "tx", "rx";
+               power-domains = <&cpg_clocks>;
                #address-cells = <1>;
                #size-cells = <0>;
                status = "disabled";
@@ -1380,6 +1465,7 @@
                reg = <0 0xee000000 0 0xc00>;
                interrupts = <0 101 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp3_clks R8A7790_CLK_SSUSB>;
+               power-domains = <&cpg_clocks>;
                phys = <&usb2 1>;
                phy-names = "usb";
                status = "disabled";
@@ -1388,10 +1474,11 @@
        pci0: pci@ee090000 {
                compatible = "renesas,pci-r8a7790";
                device_type = "pci";
-               clocks = <&mstp7_clks R8A7790_CLK_EHCI>;
                reg = <0 0xee090000 0 0xc00>,
                      <0 0xee080000 0 0x1100>;
                interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp7_clks R8A7790_CLK_EHCI>;
+               power-domains = <&cpg_clocks>;
                status = "disabled";
 
                bus-range = <0 0>;
@@ -1422,10 +1509,11 @@
        pci1: pci@ee0b0000 {
                compatible = "renesas,pci-r8a7790";
                device_type = "pci";
-               clocks = <&mstp7_clks R8A7790_CLK_EHCI>;
                reg = <0 0xee0b0000 0 0xc00>,
                      <0 0xee0a0000 0 0x1100>;
                interrupts = <0 112 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp7_clks R8A7790_CLK_EHCI>;
+               power-domains = <&cpg_clocks>;
                status = "disabled";
 
                bus-range = <1 1>;
@@ -1443,6 +1531,7 @@
                compatible = "renesas,pci-r8a7790";
                device_type = "pci";
                clocks = <&mstp7_clks R8A7790_CLK_EHCI>;
+               power-domains = <&cpg_clocks>;
                reg = <0 0xee0d0000 0 0xc00>,
                      <0 0xee0c0000 0 0x1100>;
                interrupts = <0 113 IRQ_TYPE_LEVEL_HIGH>;
@@ -1495,6 +1584,7 @@
                interrupt-map = <0 0 0 0 &gic 0 116 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp3_clks R8A7790_CLK_PCIEC>, <&pcie_bus_clk>;
                clock-names = "pcie", "pcie_bus";
+               power-domains = <&cpg_clocks>;
                status = "disabled";
        };
 
@@ -1524,6 +1614,8 @@
                        <&mstp10_clks R8A7790_CLK_SCU_SRC5>, <&mstp10_clks R8A7790_CLK_SCU_SRC4>,
                        <&mstp10_clks R8A7790_CLK_SCU_SRC3>, <&mstp10_clks R8A7790_CLK_SCU_SRC2>,
                        <&mstp10_clks R8A7790_CLK_SCU_SRC1>, <&mstp10_clks R8A7790_CLK_SCU_SRC0>,
+                       <&mstp10_clks R8A7790_CLK_SCU_CTU0_MIX0>, <&mstp10_clks R8A7790_CLK_SCU_CTU1_MIX1>,
+                       <&mstp10_clks R8A7790_CLK_SCU_CTU0_MIX0>, <&mstp10_clks R8A7790_CLK_SCU_CTU1_MIX1>,
                        <&mstp10_clks R8A7790_CLK_SCU_DVC0>, <&mstp10_clks R8A7790_CLK_SCU_DVC1>,
                        <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>, <&m2_clk>;
                clock-names = "ssi-all",
@@ -1531,6 +1623,8 @@
                                "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
                                "src.9", "src.8", "src.7", "src.6", "src.5",
                                "src.4", "src.3", "src.2", "src.1", "src.0",
+                               "ctu.0", "ctu.1",
+                               "mix.0", "mix.1",
                                "dvc.0", "dvc.1",
                                "clk_a", "clk_b", "clk_c", "clk_i";
 
@@ -1547,6 +1641,22 @@
                        };
                };
 
+               rcar_sound,mix {
+                       mix0: mix@0 { };
+                       mix1: mix@1 { };
+               };
+
+               rcar_sound,ctu {
+                       ctu00: ctu@0 { };
+                       ctu01: ctu@1 { };
+                       ctu02: ctu@2 { };
+                       ctu03: ctu@3 { };
+                       ctu10: ctu@4 { };
+                       ctu11: ctu@5 { };
+                       ctu12: ctu@6 { };
+                       ctu13: ctu@7 { };
+               };
+
                rcar_sound,src {
                        src0: src@0 {
                                interrupts = <0 352 IRQ_TYPE_LEVEL_HIGH>;