]> git.kernelconcepts.de Git - karo-tx-linux.git/blobdiff - arch/arm/boot/dts/stih407-family.dtsi
Merge remote-tracking branch 'thermal-soc/next'
[karo-tx-linux.git] / arch / arm / boot / dts / stih407-family.dtsi
index 582154bbe3f361eb8d96d29df6407448f77481c0..81f81214cdf9580a0cb19ce01d8bfc5e01417252 100644 (file)
                        clocks          = <&clk_sysin>;
                        status          = "okay";
                };
+
+               ethernet0: dwmac@9630000 {
+                       device_type = "network";
+                       status = "disabled";
+                       compatible = "st,stih407-dwmac", "snps,dwmac", "snps,dwmac-3.710";
+                       reg = <0x9630000 0x8000>, <0x80 0x4>;
+                       reg-names = "stmmaceth", "sti-ethconf";
+
+                       st,syscon = <&syscfg_sbc_reg 0x80>;
+                       st,gmac_en;
+                       resets = <&softreset STIH407_ETH1_SOFTRESET>;
+                       reset-names = "stmmaceth";
+
+                       interrupts = <GIC_SPI 98 IRQ_TYPE_NONE>,
+                                    <GIC_SPI 99 IRQ_TYPE_NONE>;
+                       interrupt-names = "macirq", "eth_wake_irq";
+
+                       /* DMA Bus Mode */
+                       snps,pbl = <8>;
+
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_rgmii1>;
+
+                       clock-names = "stmmaceth", "sti-ethclk";
+                       clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>,
+                                <&clk_s_c0_flexgen CLK_ETH_PHY>;
+               };
+
+               rng10: rng@08a89000 {
+                       compatible      = "st,rng";
+                       reg             = <0x08a89000 0x1000>;
+                       clocks          = <&clk_sysin>;
+                       status          = "okay";
+               };
+
+               rng11: rng@08a8a000 {
+                       compatible      = "st,rng";
+                       reg             = <0x08a8a000 0x1000>;
+                       clocks          = <&clk_sysin>;
+                       status          = "okay";
+               };
        };
 };