]> git.kernelconcepts.de Git - karo-tx-linux.git/blobdiff - arch/arm/mach-exynos/include/mach/map.h
Merge tag 'soc2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
[karo-tx-linux.git] / arch / arm / mach-exynos / include / mach / map.h
index 6e6d11ff352a30b131db307b8d2910c9c0c6282b..ca4aa89aa46b357fe5ff04710bd9ffdf4caf361b 100644 (file)
@@ -34,6 +34,9 @@
 
 #define EXYNOS4_PA_JPEG                        0x11840000
 
+/* x = 0...1 */
+#define EXYNOS4_PA_FIMC_LITE(x)                (0x12390000 + ((x) * 0x10000))
+
 #define EXYNOS4_PA_G2D                 0x12800000
 
 #define EXYNOS4_PA_I2S0                        0x03830000
@@ -78,8 +81,8 @@
 
 #define EXYNOS4_PA_GIC_CPU             0x10480000
 #define EXYNOS4_PA_GIC_DIST            0x10490000
-#define EXYNOS5_PA_GIC_CPU             0x10480000
-#define EXYNOS5_PA_GIC_DIST            0x10490000
+#define EXYNOS5_PA_GIC_CPU             0x10482000
+#define EXYNOS5_PA_GIC_DIST            0x10481000
 
 #define EXYNOS4_PA_COREPERI            0x10500000
 #define EXYNOS4_PA_TWD                 0x10500600
@@ -95,6 +98,7 @@
 #define EXYNOS5_PA_PDMA1               0x121B0000
 
 #define EXYNOS4_PA_SYSMMU_MDMA         0x10A40000
+#define EXYNOS4_PA_SYSMMU_2D_ACP       0x10A40000
 #define EXYNOS4_PA_SYSMMU_SSS          0x10A50000
 #define EXYNOS4_PA_SYSMMU_FIMC0                0x11A20000
 #define EXYNOS4_PA_SYSMMU_FIMC1                0x11A30000
 #define EXYNOS4_PA_SYSMMU_JPEG         0x11A60000
 #define EXYNOS4_PA_SYSMMU_FIMD0                0x11E20000
 #define EXYNOS4_PA_SYSMMU_FIMD1                0x12220000
+#define EXYNOS4_PA_SYSMMU_FIMC_ISP     0x12260000
+#define EXYNOS4_PA_SYSMMU_FIMC_DRC     0x12270000
+#define EXYNOS4_PA_SYSMMU_FIMC_FD      0x122A0000
+#define EXYNOS4_PA_SYSMMU_ISPCPU       0x122B0000
+#define EXYNOS4_PA_SYSMMU_FIMC_LITE0   0x123B0000
+#define EXYNOS4_PA_SYSMMU_FIMC_LITE1   0x123C0000
 #define EXYNOS4_PA_SYSMMU_PCIe         0x12620000
 #define EXYNOS4_PA_SYSMMU_G2D          0x12A20000
 #define EXYNOS4_PA_SYSMMU_ROTATOR      0x12A30000
 #define EXYNOS4_PA_SYSMMU_TV           0x12E20000
 #define EXYNOS4_PA_SYSMMU_MFC_L                0x13620000
 #define EXYNOS4_PA_SYSMMU_MFC_R                0x13630000
+
+#define EXYNOS5_PA_SYSMMU_MDMA1                0x10A40000
+#define EXYNOS5_PA_SYSMMU_SSS          0x10A50000
+#define EXYNOS5_PA_SYSMMU_2D           0x10A60000
+#define EXYNOS5_PA_SYSMMU_MFC_L                0x11200000
+#define EXYNOS5_PA_SYSMMU_MFC_R                0x11210000
+#define EXYNOS5_PA_SYSMMU_ROTATOR      0x11D40000
+#define EXYNOS5_PA_SYSMMU_MDMA2                0x11D50000
+#define EXYNOS5_PA_SYSMMU_JPEG         0x11F20000
+#define EXYNOS5_PA_SYSMMU_IOP          0x12360000
+#define EXYNOS5_PA_SYSMMU_RTIC         0x12370000
+#define EXYNOS5_PA_SYSMMU_GPS          0x12630000
+#define EXYNOS5_PA_SYSMMU_ISP          0x13260000
+#define EXYNOS5_PA_SYSMMU_DRC          0x12370000
+#define EXYNOS5_PA_SYSMMU_SCALERC      0x13280000
+#define EXYNOS5_PA_SYSMMU_SCALERP      0x13290000
+#define EXYNOS5_PA_SYSMMU_FD           0x132A0000
+#define EXYNOS5_PA_SYSMMU_ISPCPU       0x132B0000
+#define EXYNOS5_PA_SYSMMU_ODC          0x132C0000
+#define EXYNOS5_PA_SYSMMU_DIS0         0x132D0000
+#define EXYNOS5_PA_SYSMMU_DIS1         0x132E0000
+#define EXYNOS5_PA_SYSMMU_3DNR         0x132F0000
+#define EXYNOS5_PA_SYSMMU_LITE0                0x13C40000
+#define EXYNOS5_PA_SYSMMU_LITE1                0x13C50000
+#define EXYNOS5_PA_SYSMMU_GSC0         0x13E80000
+#define EXYNOS5_PA_SYSMMU_GSC1         0x13E90000
+#define EXYNOS5_PA_SYSMMU_GSC2         0x13EA0000
+#define EXYNOS5_PA_SYSMMU_GSC3         0x13EB0000
+#define EXYNOS5_PA_SYSMMU_FIMD1                0x14640000
+#define EXYNOS5_PA_SYSMMU_TV           0x14650000
+
 #define EXYNOS4_PA_SPI0                        0x13920000
 #define EXYNOS4_PA_SPI1                        0x13930000
 #define EXYNOS4_PA_SPI2                        0x13940000
 #define EXYNOS4_PA_HSMMC(x)            (0x12510000 + ((x) * 0x10000))
 #define EXYNOS4_PA_DWMCI               0x12550000
 
+#define EXYNOS4_PA_HSOTG               0x12480000
+#define EXYNOS4_PA_USB_HSPHY           0x125B0000
+
 #define EXYNOS4_PA_SATA                        0x12560000
 #define EXYNOS4_PA_SATAPHY             0x125D0000
 #define EXYNOS4_PA_SATAPHY_CTRL                0x126B0000
 #define S3C_PA_SPI0                    EXYNOS4_PA_SPI0
 #define S3C_PA_SPI1                    EXYNOS4_PA_SPI1
 #define S3C_PA_SPI2                    EXYNOS4_PA_SPI2
+#define S3C_PA_USB_HSOTG               EXYNOS4_PA_HSOTG
 
 #define S5P_PA_EHCI                    EXYNOS4_PA_EHCI
 #define S5P_PA_FIMC0                   EXYNOS4_PA_FIMC0