Merge remote-tracking branch 'iommu/next'

[karo-tx-linux.git] / arch / arm64 / Kconfig

diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 1f823d1d551dda320c85a61bd540ea51ef20be19..851fe11c6069d47a714a87840d6a18a3278d0af8 100644 (file)
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -48,6 +48,7 @@ config ARM64
        select HAVE_ARCH_AUDITSYSCALL
        select HAVE_ARCH_BITREVERSE
        select HAVE_ARCH_JUMP_LABEL
        select HAVE_ARCH_AUDITSYSCALL
        select HAVE_ARCH_BITREVERSE
        select HAVE_ARCH_JUMP_LABEL

+       select HAVE_ARCH_KASAN if SPARSEMEM_VMEMMAP

        select HAVE_ARCH_KGDB
        select HAVE_ARCH_SECCOMP_FILTER
        select HAVE_ARCH_TRACEHOOK
        select HAVE_ARCH_KGDB
        select HAVE_ARCH_SECCOMP_FILTER
        select HAVE_ARCH_TRACEHOOK


@@ -170,10 +171,12 @@ config FIX_EARLYCON_MEM
 
 config PGTABLE_LEVELS
        int
 
 config PGTABLE_LEVELS
        int

+       default 2 if ARM64_16K_PAGES && ARM64_VA_BITS_36

        default 2 if ARM64_64K_PAGES && ARM64_VA_BITS_42
        default 3 if ARM64_64K_PAGES && ARM64_VA_BITS_48
        default 3 if ARM64_4K_PAGES && ARM64_VA_BITS_39
        default 2 if ARM64_64K_PAGES && ARM64_VA_BITS_42
        default 3 if ARM64_64K_PAGES && ARM64_VA_BITS_48
        default 3 if ARM64_4K_PAGES && ARM64_VA_BITS_39

-       default 4 if ARM64_4K_PAGES && ARM64_VA_BITS_48
+       default 3 if ARM64_16K_PAGES && ARM64_VA_BITS_47
+       default 4 if !ARM64_64K_PAGES && ARM64_VA_BITS_48

 
 source "init/Kconfig"
 
 
 source "init/Kconfig"
 


@@ -349,6 +352,33 @@ config ARM64_ERRATUM_843419
 
          If unsure, say Y.
 
 
          If unsure, say Y.
 

+config CAVIUM_ERRATUM_22375
+       bool "Cavium erratum 22375, 24313"
+       default y
+       help
+         Enable workaround for erratum 22375, 24313.
+
+         This implements two gicv3-its errata workarounds for ThunderX. Both
+         with small impact affecting only ITS table allocation.
+
+           erratum 22375: only alloc 8MB table size
+           erratum 24313: ignore memory access type
+
+         The fixes are in ITS initialization and basically ignore memory access
+         type and table size provided by the TYPER and BASER registers.
+
+         If unsure, say Y.
+
+config CAVIUM_ERRATUM_23154
+       bool "Cavium erratum 23154: Access to ICC_IAR1_EL1 is not sync'ed"
+       default y
+       help
+         The gicv3 of ThunderX requires a modified version for
+         reading the IAR status to ensure data synchronization
+         (access to icc_iar1_el1 is not sync'ed before and after).
+
+         If unsure, say Y.
+

 endmenu
 
 
 endmenu
 
 


@@ -363,25 +393,37 @@ config ARM64_4K_PAGES
        help
          This feature enables 4KB pages support.
 
        help
          This feature enables 4KB pages support.
 

+config ARM64_16K_PAGES
+       bool "16KB"
+       help
+         The system will use 16KB pages support. AArch32 emulation
+         requires applications compiled with 16K (or a multiple of 16K)
+         aligned segments.
+

 config ARM64_64K_PAGES
        bool "64KB"
        help
          This feature enables 64KB pages support (4KB by default)
          allowing only two levels of page tables and faster TLB
 config ARM64_64K_PAGES
        bool "64KB"
        help
          This feature enables 64KB pages support (4KB by default)
          allowing only two levels of page tables and faster TLB

-         look-up. AArch32 emulation is not available when this feature
-         is enabled.
+         look-up. AArch32 emulation requires applications compiled
+         with 64K aligned segments.

 
 endchoice
 
 choice
        prompt "Virtual address space size"
        default ARM64_VA_BITS_39 if ARM64_4K_PAGES
 
 endchoice
 
 choice
        prompt "Virtual address space size"
        default ARM64_VA_BITS_39 if ARM64_4K_PAGES

+       default ARM64_VA_BITS_47 if ARM64_16K_PAGES

        default ARM64_VA_BITS_42 if ARM64_64K_PAGES
        help
          Allows choosing one of multiple possible virtual address
          space sizes. The level of translation table is determined by
          a combination of page size and virtual address space size.
 
        default ARM64_VA_BITS_42 if ARM64_64K_PAGES
        help
          Allows choosing one of multiple possible virtual address
          space sizes. The level of translation table is determined by
          a combination of page size and virtual address space size.
 

+config ARM64_VA_BITS_36
+       bool "36-bit" if EXPERT
+       depends on ARM64_16K_PAGES
+

 config ARM64_VA_BITS_39
        bool "39-bit"
        depends on ARM64_4K_PAGES
 config ARM64_VA_BITS_39
        bool "39-bit"
        depends on ARM64_4K_PAGES


@@ -390,6 +432,10 @@ config ARM64_VA_BITS_42
        bool "42-bit"
        depends on ARM64_64K_PAGES
 
        bool "42-bit"
        depends on ARM64_64K_PAGES
 

+config ARM64_VA_BITS_47
+       bool "47-bit"
+       depends on ARM64_16K_PAGES
+

 config ARM64_VA_BITS_48
        bool "48-bit"
 
 config ARM64_VA_BITS_48
        bool "48-bit"
 


@@ -397,8 +443,10 @@ endchoice
 
 config ARM64_VA_BITS
        int
 
 config ARM64_VA_BITS
        int

+       default 36 if ARM64_VA_BITS_36

        default 39 if ARM64_VA_BITS_39
        default 42 if ARM64_VA_BITS_42
        default 39 if ARM64_VA_BITS_39
        default 42 if ARM64_VA_BITS_42

+       default 47 if ARM64_VA_BITS_47

        default 48 if ARM64_VA_BITS_48
 
 config CPU_BIG_ENDIAN
        default 48 if ARM64_VA_BITS_48
 
 config CPU_BIG_ENDIAN


@@ -428,15 +476,13 @@ config NR_CPUS
 
 config HOTPLUG_CPU
        bool "Support for hot-pluggable CPUs"
 
 config HOTPLUG_CPU
        bool "Support for hot-pluggable CPUs"

+       select GENERIC_IRQ_MIGRATION

        help
          Say Y here to experiment with turning CPUs off and on.  CPUs
          can be controlled through /sys/devices/system/cpu.
 
 source kernel/Kconfig.preempt
        help
          Say Y here to experiment with turning CPUs off and on.  CPUs
          can be controlled through /sys/devices/system/cpu.
 
 source kernel/Kconfig.preempt

-
-config HZ
-       int
-       default 100
+source kernel/Kconfig.hz

 
 config ARCH_HAS_HOLES_MEMORYMODEL
        def_bool y if SPARSEMEM
 
 config ARCH_HAS_HOLES_MEMORYMODEL
        def_bool y if SPARSEMEM


@@ -455,12 +501,8 @@ config HAVE_ARCH_PFN_VALID
        def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
 
 config HW_PERF_EVENTS
        def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
 
 config HW_PERF_EVENTS

-       bool "Enable hardware performance counter support for perf events"
-       depends on PERF_EVENTS
-       default y
-       help
-         Enable hardware performance counter support for perf events. If
-         disabled, perf events will use software events only.
+       def_bool y
+       depends on ARM_PMU

 
 config SYS_SUPPORTS_HUGETLBFS
        def_bool y
 
 config SYS_SUPPORTS_HUGETLBFS
        def_bool y


@@ -469,7 +511,7 @@ config ARCH_WANT_GENERAL_HUGETLB
        def_bool y
 
 config ARCH_WANT_HUGE_PMD_SHARE
        def_bool y
 
 config ARCH_WANT_HUGE_PMD_SHARE

-       def_bool y if !ARM64_64K_PAGES
+       def_bool y if ARM64_4K_PAGES || (ARM64_16K_PAGES && !ARM64_VA_BITS_36)

 
 config HAVE_ARCH_TRANSPARENT_HUGEPAGE
        def_bool y
 
 config HAVE_ARCH_TRANSPARENT_HUGEPAGE
        def_bool y


@@ -506,7 +548,25 @@ config XEN
 config FORCE_MAX_ZONEORDER
        int
        default "14" if (ARM64_64K_PAGES && TRANSPARENT_HUGEPAGE)
 config FORCE_MAX_ZONEORDER
        int
        default "14" if (ARM64_64K_PAGES && TRANSPARENT_HUGEPAGE)

+       default "12" if (ARM64_16K_PAGES && TRANSPARENT_HUGEPAGE)

        default "11"
        default "11"

+       help
+         The kernel memory allocator divides physically contiguous memory
+         blocks into "zones", where each zone is a power of two number of
+         pages.  This option selects the largest power of two that the kernel
+         keeps in the memory allocator.  If you need to allocate very large
+         blocks of physically contiguous memory, then you may need to
+         increase this value.
+
+         This config option is actually maximum order plus one. For example,
+         a value of 11 means that the largest free memory block is 2^10 pages.
+
+         We make sure that we can allocate upto a HugePage size for each configuration.
+         Hence we have :
+               MAX_ORDER = (PMD_SHIFT - PAGE_SHIFT) + 1 => PAGE_SHIFT - 2
+
+         However for 4K, we choose a higher default value, 11 as opposed to 10, giving us
+         4M allocations matching the default size used by generic code.

 
 menuconfig ARMV8_DEPRECATED
        bool "Emulate deprecated/obsolete ARMv8 instructions"
 
 menuconfig ARMV8_DEPRECATED
        bool "Emulate deprecated/obsolete ARMv8 instructions"


@@ -681,7 +741,7 @@ source "fs/Kconfig.binfmt"
 
 config COMPAT
        bool "Kernel support for 32-bit EL0"
 
 config COMPAT
        bool "Kernel support for 32-bit EL0"

-       depends on !ARM64_64K_PAGES || EXPERT
+       depends on ARM64_4K_PAGES || EXPERT

        select COMPAT_BINFMT_ELF
        select HAVE_UID16
        select OLD_SIGSUSPEND3
        select COMPAT_BINFMT_ELF
        select HAVE_UID16
        select OLD_SIGSUSPEND3


@@ -692,9 +752,9 @@ config COMPAT
          the user helper functions, VFP support and the ptrace interface are
          handled appropriately by the kernel.
 
          the user helper functions, VFP support and the ptrace interface are
          handled appropriately by the kernel.
 

-         If you also enabled CONFIG_ARM64_64K_PAGES, please be aware that you
-         will only be able to execute AArch32 binaries that were compiled with
-         64k aligned segments.
+         If you use a page size other than 4KB (i.e, 16KB or 64KB), please be aware
+         that you will only be able to execute AArch32 binaries that were compiled
+         with page size aligned segments.

 
          If you want to execute 32-bit userspace applications, say Y.
 
 
          If you want to execute 32-bit userspace applications, say Y.