Merge remote-tracking branch 'xfs/for-next'

[karo-tx-linux.git] / arch / powerpc / boot / dts / fsl / b4420si-pre.dtsi

diff --git a/arch/powerpc/boot/dts/fsl/b4420si-pre.dtsi b/arch/powerpc/boot/dts/fsl/b4420si-pre.dtsi
index 338af7e39dd9587d867a3c59ae11192ed1c7f3f1..bc3bf9333ddeca80c0e8046c4d2137b84a27d226 100644 (file)
--- a/arch/powerpc/boot/dts/fsl/b4420si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/b4420si-pre.dtsi
@@ -1,7 +1,7 @@
 /*
  * B4420 Silicon/SoC Device Tree Source (pre include)
  *
- * Copyright 2012 Freescale Semiconductor, Inc.
+ * Copyright 2012 - 2015 Freescale Semiconductor, Inc.
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions are met:
@@ -54,8 +54,13 @@
                dma0 = &dma0;
                dma1 = &dma1;
                sdhc = &sdhc;
-       };
 
+               fman0 = &fman0;
+               ethernet0 = &enet0;
+               ethernet1 = &enet1;
+               ethernet2 = &enet2;
+               ethernet3 = &enet3;
+       };
 
        cpus {
                #address-cells = <1>;
@@ -65,14 +70,14 @@
                        device_type = "cpu";
                        reg = <0 1>;
                        clocks = <&mux0>;
-                       next-level-cache = <&L2>;
+                       next-level-cache = <&L2_1>;
                        fsl,portid-mapping = <0x80000000>;
                };
                cpu1: PowerPC,e6500@2 {
                        device_type = "cpu";
                        reg = <2 3>;
                        clocks = <&mux0>;
-                       next-level-cache = <&L2>;
+                       next-level-cache = <&L2_1>;
                        fsl,portid-mapping = <0x80000000>;
                };
        };