ppc32: use L1_CACHE_SHIFT/L1_CACHE_BYTES

[karo-tx-linux.git] / arch / ppc / kernel / cpu_setup_6xx.S

diff --git a/arch/ppc/kernel/cpu_setup_6xx.S b/arch/ppc/kernel/cpu_setup_6xx.S
index 1f37b7eafac215b912a965f1ee9cada8e714abeb..55ed7716636f45d02135f46728a2fab8beb07c97 100644 (file)
--- a/arch/ppc/kernel/cpu_setup_6xx.S
+++ b/arch/ppc/kernel/cpu_setup_6xx.S
@@ -12,14 +12,11 @@
 #include <linux/config.h>
 #include <asm/processor.h>
 #include <asm/page.h>
-#include <asm/ppc_asm.h>
 #include <asm/cputable.h>
 #include <asm/ppc_asm.h>
 #include <asm/asm-offsets.h>
 #include <asm/cache.h>
 
-_GLOBAL(__setup_cpu_601)
-       blr
 _GLOBAL(__setup_cpu_603)
        b       setup_common_caches
 _GLOBAL(__setup_cpu_604)
@@ -293,10 +290,10 @@ _GLOBAL(__init_fpu_registers)
 #define CS_SIZE                32
 
        .data
-       .balign L1_CACHE_LINE_SIZE
+       .balign L1_CACHE_BYTES
 cpu_state_storage:
        .space  CS_SIZE
-       .balign L1_CACHE_LINE_SIZE,0
+       .balign L1_CACHE_BYTES,0
        .text
 
 /* Called in normal context to backup CPU 0 state. This