Merge remote-tracking branch 'at91/at91-next'

[karo-tx-linux.git] / arch / x86 / include / asm / fpu / types.h

diff --git a/arch/x86/include/asm/fpu/types.h b/arch/x86/include/asm/fpu/types.h
index 9f20d10af3b1e5963d25d356f44d86cf3f3ca5e8..1c6f6ac52ad0a2cfe44db5eab9825b59408cde01 100644 (file)
--- a/arch/x86/include/asm/fpu/types.h
+++ b/arch/x86/include/asm/fpu/types.h
@@ -109,7 +109,7 @@ enum xfeature {
        XFEATURE_ZMM_Hi256,
        XFEATURE_Hi16_ZMM,
 
-       XFEATURES_NR_MAX,
+       XFEATURE_MAX,
 };
 
 #define XFEATURE_MASK_FP               (1 << XFEATURE_FP)
@@ -126,33 +126,91 @@ enum xfeature {
                                         | XFEATURE_MASK_ZMM_Hi256 \
                                         | XFEATURE_MASK_Hi16_ZMM)
 
+#define FIRST_EXTENDED_XFEATURE        XFEATURE_YMM
+
+struct reg_128_bit {
+       u8      regbytes[128/8];
+};
+struct reg_256_bit {
+       u8      regbytes[256/8];
+};
+struct reg_512_bit {
+       u8      regbytes[512/8];
+};
+
 /*
+ * State component 2:
+ *
  * There are 16x 256-bit AVX registers named YMM0-YMM15.
  * The low 128 bits are aliased to the 16 SSE registers (XMM0-XMM15)
- * and are stored in 'struct fxregs_state::xmm_space[]'.
+ * and are stored in 'struct fxregs_state::xmm_space[]' in the
+ * "legacy" area.
  *
- * The high 128 bits are stored here:
- *    16x 128 bits == 256 bytes.
+ * The high 128 bits are stored here.
  */
 struct ymmh_struct {
-       u8                              ymmh_space[256];
-};
+       struct reg_128_bit              hi_ymm[16];
+} __packed;
 
 /* Intel MPX support: */
-struct bndreg {
+
+struct mpx_bndreg {
        u64                             lower_bound;
        u64                             upper_bound;
 } __packed;
+/*
+ * State component 3 is used for the 4 128-bit bounds registers
+ */
+struct mpx_bndreg_state {
+       struct mpx_bndreg               bndreg[4];
+} __packed;
 
-struct bndcsr {
+/*
+ * State component 4 is used for the 64-bit user-mode MPX
+ * configuration register BNDCFGU and the 64-bit MPX status
+ * register BNDSTATUS.  We call the pair "BNDCSR".
+ */
+struct mpx_bndcsr {
        u64                             bndcfgu;
        u64                             bndstatus;
 } __packed;
 
-struct mpx_struct {
-       struct bndreg                   bndreg[4];
-       struct bndcsr                   bndcsr;
-};
+/*
+ * The BNDCSR state is padded out to be 64-bytes in size.
+ */
+struct mpx_bndcsr_state {
+       union {
+               struct mpx_bndcsr               bndcsr;
+               u8                              pad_to_64_bytes[64];
+       };
+} __packed;
+
+/* AVX-512 Components: */
+
+/*
+ * State component 5 is used for the 8 64-bit opmask registers
+ * k0-k7 (opmask state).
+ */
+struct avx_512_opmask_state {
+       u64                             opmask_reg[8];
+} __packed;
+
+/*
+ * State component 6 is used for the upper 256 bits of the
+ * registers ZMM0-ZMM15. These 16 256-bit values are denoted
+ * ZMM0_H-ZMM15_H (ZMM_Hi256 state).
+ */
+struct avx_512_zmm_uppers_state {
+       struct reg_256_bit              zmm_upper[16];
+} __packed;
+
+/*
+ * State component 7 is used for the 16 512-bit registers
+ * ZMM16-ZMM31 (Hi16_ZMM state).
+ */
+struct avx_512_hi16_state {
+       struct reg_512_bit              hi16_zmm[16];
+} __packed;
 
 struct xstate_header {
        u64                             xfeatures;