[libata ahci] set port ATAPI bit correctly

[karo-tx-linux.git] / drivers / scsi / ahci.c

diff --git a/drivers/scsi/ahci.c b/drivers/scsi/ahci.c
index 10c470e7d316a3a3216ff2a2023930e0eda19583..4e96ec5f2ff94f003a5fe06ee75d92ae5603ec54 100644 (file)
--- a/drivers/scsi/ahci.c
+++ b/drivers/scsi/ahci.c
@@ -134,6 +134,7 @@ enum {
                                  PORT_IRQ_D2H_REG_FIS,
 
        /* PORT_CMD bits */
+       PORT_CMD_ATAPI          = (1 << 24), /* Device is ATAPI */
        PORT_CMD_LIST_ON        = (1 << 15), /* cmd list DMA engine running */
        PORT_CMD_FIS_ON         = (1 << 14), /* FIS DMA engine running */
        PORT_CMD_FIS_RX         = (1 << 4), /* Enable FIS receive DMA engine */
@@ -255,7 +256,7 @@ static struct ata_port_info ahci_port_info[] = {
        },
 };
 
-static struct pci_device_id ahci_pci_tbl[] = {
+static const struct pci_device_id ahci_pci_tbl[] = {
        { PCI_VENDOR_ID_INTEL, 0x2652, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
          board_ahci }, /* ICH6 */
        { PCI_VENDOR_ID_INTEL, 0x2653, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
@@ -441,7 +442,7 @@ static void ahci_phy_reset(struct ata_port *ap)
        void __iomem *port_mmio = (void __iomem *) ap->ioaddr.cmd_addr;
        struct ata_taskfile tf;
        struct ata_device *dev = &ap->device[0];
-       u32 tmp;
+       u32 new_tmp, tmp;
 
        __sata_phy_reset(ap);
 
@@ -455,8 +456,21 @@ static void ahci_phy_reset(struct ata_port *ap)
        tf.nsect        = (tmp)         & 0xff;
 
        dev->class = ata_dev_classify(&tf);
-       if (!ata_dev_present(dev))
+       if (!ata_dev_present(dev)) {
                ata_port_disable(ap);
+               return;
+       }
+
+       /* Make sure port's ATAPI bit is set appropriately */
+       new_tmp = tmp = readl(port_mmio + PORT_CMD);
+       if (dev->class == ATA_DEV_ATAPI)
+               new_tmp |= PORT_CMD_ATAPI;
+       else
+               new_tmp &= ~PORT_CMD_ATAPI;
+       if (new_tmp != tmp) {
+               writel(new_tmp, port_mmio + PORT_CMD);
+               readl(port_mmio + PORT_CMD); /* flush */
+       }
 }
 
 static u8 ahci_check_status(struct ata_port *ap)
@@ -474,11 +488,12 @@ static void ahci_tf_read(struct ata_port *ap, struct ata_taskfile *tf)
        ata_tf_from_fis(d2h_fis, tf);
 }
 
-static void ahci_fill_sg(struct ata_queued_cmd *qc)
+static unsigned int ahci_fill_sg(struct ata_queued_cmd *qc)
 {
        struct ahci_port_priv *pp = qc->ap->private_data;
        struct scatterlist *sg;
        struct ahci_sg *ahci_sg;
+       unsigned int n_sg = 0;
 
        VPRINTK("ENTER\n");
 
@@ -493,8 +508,12 @@ static void ahci_fill_sg(struct ata_queued_cmd *qc)
                ahci_sg->addr = cpu_to_le32(addr & 0xffffffff);
                ahci_sg->addr_hi = cpu_to_le32((addr >> 16) >> 16);
                ahci_sg->flags_size = cpu_to_le32(sg_len - 1);
+
                ahci_sg++;
+               n_sg++;
        }
+
+       return n_sg;
 }
 
 static void ahci_qc_prep(struct ata_queued_cmd *qc)
@@ -503,13 +522,14 @@ static void ahci_qc_prep(struct ata_queued_cmd *qc)
        struct ahci_port_priv *pp = ap->private_data;
        u32 opts;
        const u32 cmd_fis_len = 5; /* five dwords */
+       unsigned int n_elem;
 
        /*
         * Fill in command slot information (currently only one slot,
         * slot 0, is currently since we don't do queueing)
         */
 
-       opts = (qc->n_elem << 16) | cmd_fis_len;
+       opts = cmd_fis_len;
        if (qc->tf.flags & ATA_TFLAG_WRITE)
                opts |= AHCI_CMD_WRITE;
        if (is_atapi_taskfile(&qc->tf))
@@ -533,7 +553,9 @@ static void ahci_qc_prep(struct ata_queued_cmd *qc)
        if (!(qc->flags & ATA_QCFLAG_DMAMAP))
                return;
 
-       ahci_fill_sg(qc);
+       n_elem = ahci_fill_sg(qc);
+
+       pp->cmd_slot[0].opts |= cpu_to_le32(n_elem << 16);
 }
 
 static void ahci_intr_error(struct ata_port *ap, u32 irq_stat)