* Once the status turns to be ready, the other status bits also are
* valid status bits.
*/
-static int spinand_read_status(struct spi_device *spi_nand, uint8_t *status)
+static int spinand_read_status(struct spi_device *spi_nand, u8 *status)
{
struct spinand_cmd cmd = {0};
int ret;
return -1;
}
+
/**
* spinand_get_otp- send command 0xf to read the SPI Nand OTP register
* Description:
* No tRd delay.
*/
static int spinand_read_from_cache(struct spi_device *spi_nand, u16 page_id,
- u16 byte_id, u16 len, u8 *rbuf)
+ u16 byte_id, u16 len, u8 *rbuf)
{
struct spinand_cmd cmd = {0};
u16 column;
* Poll to read status to wait for tRD time.
*/
static int spinand_read_page(struct spi_device *spi_nand, u16 page_id,
- u16 offset, u16 len, u8 *rbuf)
+ u16 offset, u16 len, u8 *rbuf)
{
int ret;
u8 status = 0;
ret = spinand_read_status(spi_nand, &status);
if (ret < 0) {
dev_err(&spi_nand->dev,
- "err %d read status register\n", ret);
+ "err %d read status register\n", ret);
return ret;
}
if ((status & STATUS_OIP_MASK) == STATUS_READY) {
if ((status & STATUS_ECC_MASK) == STATUS_ECC_ERROR) {
dev_err(&spi_nand->dev, "ecc error, page=%d\n",
- page_id);
+ page_id);
return 0;
}
break;
* Since it is writing the data to cache, there is no tPROG time.
*/
static int spinand_program_data_to_cache(struct spi_device *spi_nand,
- u16 page_id, u16 byte_id, u16 len, u8 *wbuf)
+ u16 page_id, u16 byte_id,
+ u16 len, u8 *wbuf)
{
struct spinand_cmd cmd = {0};
u16 column;
* Poll to wait for the tPROG time to finish the transaction.
*/
static int spinand_program_page(struct spi_device *spi_nand,
- u16 page_id, u16 offset, u16 len, u8 *buf)
+ u16 page_id, u16 offset, u16 len, u8 *buf)
{
int retval;
u8 status = 0;
- uint8_t *wbuf;
+ u8 *wbuf;
#ifdef CONFIG_MTD_SPINAND_ONDIEECC
unsigned int i, j;
dev_err(&spi_nand->dev, "wait timedout!!!\n");
retval = spinand_program_data_to_cache(spi_nand, page_id,
- offset, len, wbuf);
+ offset, len, wbuf);
if (retval < 0)
return retval;
retval = spinand_program_execute(spi_nand, page_id);
retval = spinand_read_status(spi_nand, &status);
if (retval < 0) {
dev_err(&spi_nand->dev,
- "error %d reading status register\n",
- retval);
+ "error %d reading status register\n", retval);
return retval;
}
retval = spinand_read_status(spi_nand, &status);
if (retval < 0) {
dev_err(&spi_nand->dev,
- "error %d reading status register\n",
- (int) retval);
+ "error %d reading status register\n", retval);
return retval;
}
#ifdef CONFIG_MTD_SPINAND_ONDIEECC
static int spinand_write_page_hwecc(struct mtd_info *mtd,
- struct nand_chip *chip, const uint8_t *buf, int oob_required,
- int page)
+ struct nand_chip *chip,
+ const u8 *buf, int oob_required, int page)
{
- const uint8_t *p = buf;
+ const u8 *p = buf;
int eccsize = chip->ecc.size;
int eccsteps = chip->ecc.steps;
}
static int spinand_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,
- uint8_t *buf, int oob_required, int page)
+ u8 *buf, int oob_required, int page)
{
int retval;
u8 status;
- uint8_t *p = buf;
+ u8 *p = buf;
int eccsize = chip->ecc.size;
int eccsteps = chip->ecc.steps;
struct spinand_info *info = (struct spinand_info *)chip->priv;
retval = spinand_read_status(info->spi, &status);
if (retval < 0) {
dev_err(&mtd->dev,
- "error %d reading status register\n",
- retval);
+ "error %d reading status register\n", retval);
return retval;
}
}
}
return 0;
-
}
#endif
{
}
-static uint8_t spinand_read_byte(struct mtd_info *mtd)
+static u8 spinand_read_byte(struct mtd_info *mtd)
{
struct spinand_state *state = mtd_to_state(mtd);
u8 data;
return data;
}
-
static int spinand_wait(struct mtd_info *mtd, struct nand_chip *chip)
{
struct spinand_info *info = (struct spinand_info *)chip->priv;
retval = spinand_read_status(info->spi, &status);
if (retval < 0) {
dev_err(&mtd->dev,
- "error %d reading status register\n",
- retval);
+ "error %d reading status register\n", retval);
return retval;
}
return 0;
}
-static void spinand_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
+static void spinand_write_buf(struct mtd_info *mtd, const u8 *buf, int len)
{
-
struct spinand_state *state = mtd_to_state(mtd);
memcpy(state->buf + state->buf_ptr, buf, len);
state->buf_ptr += len;
}
-static void spinand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
+static void spinand_read_buf(struct mtd_info *mtd, u8 *buf, int len)
{
struct spinand_state *state = mtd_to_state(mtd);
pr_info("spinand reset failed!\n");
/* elapse 1ms before issuing any other command */
- udelay(1000);
+ usleep_range(1000, 2000);
if (wait_till_ready(spi_nand))
dev_err(&spi_nand->dev, "wait timedout!\n");
}
static void spinand_cmdfunc(struct mtd_info *mtd, unsigned int command,
- int column, int page)
+ int column, int page)
{
struct nand_chip *chip = (struct nand_chip *)mtd->priv;
struct spinand_info *info = (struct spinand_info *)chip->priv;
/* PAGEPROG reuses all of the setup from SEQIN and adds the length */
case NAND_CMD_PAGEPROG:
spinand_program_page(info->spi, state->row, state->col,
- state->buf_ptr, state->buf);
+ state->buf_ptr, state->buf);
break;
case NAND_CMD_STATUS:
spinand_get_otp(info->spi, state->buf);
if (wait_till_ready(info->spi))
dev_err(&info->spi->dev, "WAIT timedout!!!\n");
/* a minimum of 250us must elapse before issuing RESET cmd*/
- udelay(250);
+ usleep_range(250, 1000);
spinand_reset(info->spi);
break;
default:
return ret;
}
+
/*
* spinand_probe - [spinand Interface]
* @spi_nand: registered device driver.
struct mtd_part_parser_data ppdata;
info = devm_kzalloc(&spi_nand->dev, sizeof(struct spinand_info),
- GFP_KERNEL);
+ GFP_KERNEL);
if (!info)
return -ENOMEM;
spinand_lock_block(spi_nand, BL_ALL_UNLOCKED);
state = devm_kzalloc(&spi_nand->dev, sizeof(struct spinand_state),
- GFP_KERNEL);
+ GFP_KERNEL);
if (!state)
return -ENOMEM;
return -ENOMEM;
chip = devm_kzalloc(&spi_nand->dev, sizeof(struct nand_chip),
- GFP_KERNEL);
+ GFP_KERNEL);
if (!chip)
return -ENOMEM;
{ .compatible = "spinand,mt29f", },
{}
};
+MODULE_DEVICE_TABLE(of, spinand_dt);
/*
* Device name structure description