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ARM: tegra: Add the DFLL to Tegra124 device tree
authorTuomas Tynkkynen <ttynkkynen@nvidia.com>
Wed, 13 May 2015 14:58:44 +0000 (17:58 +0300)
committerThierry Reding <treding@nvidia.com>
Fri, 21 Aug 2015 16:44:24 +0000 (18:44 +0200)
commitbf9d026775796bec30895cab080baf37b70bc3b3
tree0adf5b44a697ab661553f1ca2835f5591f9ad77ctree | snapshot
parent233da3b1c620b10a70c019b2134e7b1276b57695commit | diff
ARM: tegra: Add the DFLL to Tegra124 device tree

The DFLL clocksource is a separate IP block from the usual
clock-and-reset controller, so it gets its own device tree node.

Signed-off-by: Tuomas Tynkkynen <ttynkkynen@nvidia.com>
Signed-off-by: Mikko Perttunen <mikko.perttunen@kapsi.fi>
Acked-by: Michael Turquette <mturquette@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
arch/arm/boot/dts/tegra124.dtsi diff | blob | history
Linux kernel for KaRo TX COM modules