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(parent: c342f78) | patch
arm64: cmpxchg_dbl: patch in lse instructions when supported by the CPU
authorWill Deacon <will.deacon@arm.com>
Thu, 14 May 2015 17:05:50 +0000 (18:05 +0100)
committerWill Deacon <will.deacon@arm.com>
Mon, 27 Jul 2015 14:28:52 +0000 (15:28 +0100)
commite9a4b795652f654a7870727e5333c1b709b8736c
treeade6676d032ea31c5f24c210d778a857b16a37a5tree | snapshot
parentc342f78217e822d2178265b0b1de232eeb717149commit | diff
arm64: cmpxchg_dbl: patch in lse instructions when supported by the CPU

On CPUs which support the LSE atomic instructions introduced in ARMv8.1,
it makes sense to use them in preference to ll/sc sequences.

This patch introduces runtime patching of our cmpxchg_double primitives
so that the LSE casp instruction is used instead.

Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
arch/arm64/include/asm/atomic_ll_sc.h diff | blob | history
arch/arm64/include/asm/atomic_lse.h diff | blob | history
arch/arm64/include/asm/cmpxchg.h diff | blob | history
Linux kernel for KaRo TX COM modules