Merge remote-tracking branch 'drm/drm-next'

Conflicts:
	drivers/gpu/drm/i915/i915_dma.c
	drivers/gpu/drm/i915/i915_drv.c
	drivers/gpu/drm/i915/intel_ddi.c
	drivers/gpu/drm/i915/intel_display.c
	drivers/gpu/drm/i915/intel_dp.c
	drivers/gpu/drm/i915/intel_drv.h

diff --cc drivers/gpu/drm/drm_drv.c
Simple merge

diff --cc drivers/gpu/drm/drm_fb_helper.c
Simple merge

diff --cc drivers/gpu/drm/exynos/exynos_drm_drv.c
Simple merge

diff --cc drivers/gpu/drm/i915/i915_dma.c
index d5c784d486714d4cc5b9e1a45c8b17fe13d51871,b3873c945d1b19e7393433240596e38b0a2330b8..b20a8b2fe1f65b4c2201df38f150f39090d7dc9a
--- 1/drivers/gpu/drm/i915/i915_dma.c
--- 2/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@@ -1348,6 -1358,13 +1355,8 @@@ static int i915_load_modeset_init(struc
         */
        intel_fbdev_initial_config(dev);
  
 -      /*
 -       * Must do this after fbcon init so that
 -       * vgacon_save_screen() works during the handover.
 -       */
 -      i915_disable_vga_mem(dev);
+       intel_display_power_put(dev, POWER_DOMAIN_VGA);
+ 
        /* Only enable hotplug handling once the fbdev is fully set up. */
        dev_priv->enable_hotplug_processing = true;
  

diff --cc drivers/gpu/drm/i915/i915_drv.c
index 2ad27880cd047bc93cf119784895040eeafc3bae,96f230497cbefd1918abe0239aa30b55cf1d6c60..a51f96a06d4f82034bedfda62b4db270f54a95d0
--- 1/drivers/gpu/drm/i915/i915_drv.c
--- 2/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@@ -583,6 -581,19 +583,20 @@@ static int __i915_drm_thaw(struct drm_d
        struct drm_i915_private *dev_priv = dev->dev_private;
        int error = 0;
  
 -      }
+       intel_uncore_early_sanitize(dev);
+ 
+       intel_uncore_sanitize(dev);
+ 
+       if (drm_core_check_feature(dev, DRIVER_MODESET) &&
+           restore_gtt_mappings) {
+               mutex_lock(&dev->struct_mutex);
+               i915_gem_restore_gtt_mappings(dev);
+               mutex_unlock(&dev->struct_mutex);
++      } else if (drm_core_check_feature(dev, DRIVER_MODESET))
++              i915_check_and_clear_faults(dev);
+ 
+       intel_init_power_well(dev);
+ 
        i915_restore_state(dev);
        intel_opregion_setup(dev);
  

diff --cc drivers/gpu/drm/i915/i915_drv.h
Simple merge

diff --cc drivers/gpu/drm/i915/i915_gem_gtt.c
Simple merge

diff --cc drivers/gpu/drm/i915/i915_reg.h
Simple merge

diff --cc drivers/gpu/drm/i915/intel_display.c
index 725f0bea1e4c9647a43cbb04acb08ec750a4a75a,617b963dfb67f230bbabdaf8a66f613592bacd88..f674267d24dfcecc15602f3d04b97138106908c0
--- 1/drivers/gpu/drm/i915/intel_display.c
--- 2/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@@ -10081,9 -10365,36 +10361,9 @@@ static void i915_disable_vga(struct drm
        POSTING_READ(vga_reg);
  }
  
 -static void i915_enable_vga_mem(struct drm_device *dev)
 -{
 -      /* Enable VGA memory on Intel HD */
 -      if (HAS_PCH_SPLIT(dev)) {
 -              vga_get_uninterruptible(dev->pdev, VGA_RSRC_LEGACY_IO);
 -              outb(inb(VGA_MSR_READ) | VGA_MSR_MEM_EN, VGA_MSR_WRITE);
 -              vga_set_legacy_decoding(dev->pdev, VGA_RSRC_LEGACY_IO |
 -                                                 VGA_RSRC_LEGACY_MEM |
 -                                                 VGA_RSRC_NORMAL_IO |
 -                                                 VGA_RSRC_NORMAL_MEM);
 -              vga_put(dev->pdev, VGA_RSRC_LEGACY_IO);
 -      }
 -}
 -
 -void i915_disable_vga_mem(struct drm_device *dev)
 -{
 -      /* Disable VGA memory on Intel HD */
 -      if (HAS_PCH_SPLIT(dev)) {
 -              vga_get_uninterruptible(dev->pdev, VGA_RSRC_LEGACY_IO);
 -              outb(inb(VGA_MSR_READ) & ~VGA_MSR_MEM_EN, VGA_MSR_WRITE);
 -              vga_set_legacy_decoding(dev->pdev, VGA_RSRC_LEGACY_IO |
 -                                                 VGA_RSRC_NORMAL_IO |
 -                                                 VGA_RSRC_NORMAL_MEM);
 -              vga_put(dev->pdev, VGA_RSRC_LEGACY_IO);
 -      }
 -}
 -
  void intel_modeset_init_hw(struct drm_device *dev)
  {
-       intel_init_power_well(dev);
+       struct drm_i915_private *dev_priv = dev->dev_private;
  
        intel_prepare_ddi(dev);
  

diff --cc drivers/gpu/drm/i915/intel_dp.c
index 1a431377d83b76ad22bccf795db770ab3b40bd3e,d5bd349105e5ef86033e401efc882f654c50d1d1..2a4bcc829f3f66c68f7c78f76fbae30027c738cd
--- 1/drivers/gpu/drm/i915/intel_dp.c
--- 2/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@@ -1402,31 -1468,20 +1468,40 @@@ static void intel_dp_get_config(struct 
                        pipe_config->port_clock = 270000;
        }
  
 +      if (is_edp(intel_dp) && dev_priv->vbt.edp_bpp &&
 +          pipe_config->pipe_bpp > dev_priv->vbt.edp_bpp) {
 +              /*
 +               * This is a big fat ugly hack.
 +               *
 +               * Some machines in UEFI boot mode provide us a VBT that has 18
 +               * bpp and 1.62 GHz link bandwidth for eDP, which for reasons
 +               * unknown we fail to light up. Yet the same BIOS boots up with
 +               * 24 bpp and 2.7 GHz link. Use the same bpp as the BIOS uses as
 +               * max, not what it tells us to use.
 +               *
 +               * Note: This will still be broken if the eDP panel is not lit
 +               * up by the BIOS, and thus we can't get the mode at module
 +               * load.
 +               */
 +              DRM_DEBUG_KMS("pipe has %d bpp for eDP panel, overriding BIOS-provided max %d bpp\n",
 +                            pipe_config->pipe_bpp, dev_priv->vbt.edp_bpp);
 +              dev_priv->vbt.edp_bpp = pipe_config->pipe_bpp;
 +      }
++
+       dotclock = intel_dotclock_calculate(pipe_config->port_clock,
+                                           &pipe_config->dp_m_n);
+ 
+       if (HAS_PCH_SPLIT(dev_priv->dev) && port != PORT_A)
+               ironlake_check_encoder_dotclock(pipe_config, dotclock);
+ 
+       pipe_config->adjusted_mode.crtc_clock = dotclock;
  }
  
- static bool is_edp_psr(struct intel_dp *intel_dp)
+ static bool is_edp_psr(struct drm_device *dev)
  {
-       return is_edp(intel_dp) &&
-               intel_dp->psr_dpcd[0] & DP_PSR_IS_SUPPORTED;
+       struct drm_i915_private *dev_priv = dev->dev_private;
+ 
+       return dev_priv->psr.sink_support;
  }
  
  static bool intel_edp_is_psr_enabled(struct drm_device *dev)
@@@ -1486,8 -1541,8 +1561,8 @@@ static void intel_edp_psr_setup(struct 
        intel_edp_psr_write_vsc(intel_dp, &psr_vsc);
  
        /* Avoid continuous PSR exit by masking memup and hpd */
-       I915_WRITE(EDP_PSR_DEBUG_CTL, EDP_PSR_DEBUG_MASK_MEMUP |
+       I915_WRITE(EDP_PSR_DEBUG_CTL(dev), EDP_PSR_DEBUG_MASK_MEMUP |
 -                 EDP_PSR_DEBUG_MASK_HPD);
 +                 EDP_PSR_DEBUG_MASK_HPD | EDP_PSR_DEBUG_MASK_LPSP);
  
        intel_dp->psr_setup_done = true;
  }

diff --cc drivers/gpu/drm/i915/intel_pm.c
Simple merge

diff --cc drivers/gpu/drm/radeon/atombios_encoders.c
Simple merge

diff --cc drivers/gpu/drm/radeon/radeon_drv.c
Simple merge

diff --cc drivers/staging/imx-drm/imx-drm-core.c
Simple merge

diff --cc include/uapi/drm/drm_mode.h
Simple merge