Merge tag 'omap-for-v4.1/fixes-rc1' of git://git.kernel.org/pub/scm/linux/kernel...

Merge "omap fixes against v4.1-rc1" from Tony Lindgren:

Fixes for omaps, mostly a fix for power power consumption
creeping up during idle, and two l3-noc device fixes:

- Fix power consumption creeping up with I2C4 staying on
- Fix n900 microphone bias voltages
- Fix dra7 l3-noc for host clock
- Fix omap5 l3-noc id address decoding

The rest are all just minor dts fixes:

- Fix changed EXTCON_USB_GPIO_USB in defconfig
- Fix missing isp and iva #iommu-cells property
- Various beagle x15 dts fixes for pre-production changes
- Fix am437x-sk display dts entries

* tag 'omap-for-v4.1/fixes-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  bus: omap_l3_noc: Fix master id address decoding for OMAP5
  bus: omap_l3_noc: Fix offset for DRA7 CLK1_HOST_CLK1_2 instance
  ARM: dts: dra7: Fix efuse register size for ABB
  ARM: dts: am57xx-beagle-x15: Switch GPIO fan number
  ARM: dts: am57xx-beagle-x15: Switch UART mux pins
  ARM: dts: am437x-sk: reduce col-scan-delay-us
  ARM: dts: am437x-sk: fix for new newhaven display module revision
  ARM: dts: am57xx-beagle-x15: Fix RTC aliases
  ARM: dts: am57xx-beagle-x15: Fix IRQ type for mcp7941x
  ARM: dts: omap3: Add #iommu-cells to isp and iva iommu
  ARM: omap2plus_defconfig: Enable EXTCON_USB_GPIO
  ARM: dts: OMAP3-N900: Add microphone bias voltages
  ARM: OMAP2+: Fix omap off idle power consumption creeping up

diff --git a/Documentation/devicetree/bindings/arm/omap/l3-noc.txt b/Documentation/devicetree/bindings/arm/omap/l3-noc.txt
index 974624ea68f67d3f16df404bccb57f587ac8a82e..161448da959d26edeb19de7db2561564c4c473dc 100644 (file)
--- a/Documentation/devicetree/bindings/arm/omap/l3-noc.txt
+++ b/Documentation/devicetree/bindings/arm/omap/l3-noc.txt
@@ -6,6 +6,7 @@ provided by Arteris.
 Required properties:
 - compatible : Should be "ti,omap3-l3-smx" for OMAP3 family
                Should be "ti,omap4-l3-noc" for OMAP4 family
+               Should be "ti,omap5-l3-noc" for OMAP5 family
               Should be "ti,dra7-l3-noc" for DRA7 family
                Should be "ti,am4372-l3-noc" for AM43 family
 - reg: Contains L3 register address range for each noc domain.

diff --git a/arch/arm/boot/dts/am437x-sk-evm.dts b/arch/arm/boot/dts/am437x-sk-evm.dts
index 8ae29c955c11d7f83f4423184a8ed61412b515dd..c17097d2c167d4718f76200f51e599d6605d144e 100644 (file)
--- a/arch/arm/boot/dts/am437x-sk-evm.dts
+++ b/arch/arm/boot/dts/am437x-sk-evm.dts
@@ -49,7 +49,7 @@
                pinctrl-0 = <&matrix_keypad_pins>;
 
                debounce-delay-ms = <5>;
-               col-scan-delay-us = <1500>;
+               col-scan-delay-us = <5>;
 
                row-gpios = <&gpio5 5 GPIO_ACTIVE_HIGH          /* Bank5, pin5 */
                                &gpio5 6 GPIO_ACTIVE_HIGH>;     /* Bank5, pin6 */
@@ -473,7 +473,7 @@
                interrupt-parent = <&gpio0>;
                interrupts = <31 0>;
 
-               wake-gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;
+               reset-gpios = <&gpio1 28 GPIO_ACTIVE_LOW>;
 
                touchscreen-size-x = <480>;
                touchscreen-size-y = <272>;

diff --git a/arch/arm/boot/dts/am57xx-beagle-x15.dts b/arch/arm/boot/dts/am57xx-beagle-x15.dts
index 15f198e4864d308196640f9ce5a8a190efe8ab9a..7128fad991ac3459ac5349b0219e893fab1830c8 100644 (file)
--- a/arch/arm/boot/dts/am57xx-beagle-x15.dts
+++ b/arch/arm/boot/dts/am57xx-beagle-x15.dts
@@ -18,6 +18,7 @@
        aliases {
                rtc0 = &mcp_rtc;
                rtc1 = &tps659038_rtc;
+               rtc2 = &rtc;
        };
 
        memory {
@@ -83,7 +84,7 @@
        gpio_fan: gpio_fan {
                /* Based on 5v 500mA AFB02505HHB */
                compatible = "gpio-fan";
-               gpios =  <&tps659038_gpio 1 GPIO_ACTIVE_HIGH>;
+               gpios =  <&tps659038_gpio 2 GPIO_ACTIVE_HIGH>;
                gpio-fan,speed-map = <0     0>,
                                     <13000 1>;
                #cooling-cells = <2>;
@@ -130,8 +131,8 @@
 
        uart3_pins_default: uart3_pins_default {
                pinctrl-single,pins = <
-                       0x248 (PIN_INPUT_SLEW | MUX_MODE0) /* uart3_rxd.rxd */
-                       0x24c (PIN_INPUT_SLEW | MUX_MODE0) /* uart3_txd.txd */
+                       0x3f8 (PIN_INPUT_SLEW | MUX_MODE2) /* uart2_ctsn.uart3_rxd */
+                       0x3fc (PIN_INPUT_SLEW | MUX_MODE1) /* uart2_rtsn.uart3_txd */
                >;
        };
 
@@ -455,7 +456,7 @@
        mcp_rtc: rtc@6f {
                compatible = "microchip,mcp7941x";
                reg = <0x6f>;
-               interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_LOW>;  /* IRQ_SYS_1N */
+               interrupts = <GIC_SPI 2 IRQ_TYPE_EDGE_RISING>;  /* IRQ_SYS_1N */
 
                pinctrl-names = "default";
                pinctrl-0 = <&mcp79410_pins_default>;
@@ -478,7 +479,7 @@
 &uart3 {
        status = "okay";
        interrupts-extended = <&crossbar_mpu GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
-                             <&dra7_pmx_core 0x248>;
+                             <&dra7_pmx_core 0x3f8>;
 
        pinctrl-names = "default";
        pinctrl-0 = <&uart3_pins_default>;

diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 5332b57b4950dbd61fac6ef7cb112c4cd44cffa7..f03a091cd0766b606d0f3a61a4ab03c870f3dfcf 100644 (file)
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -911,7 +911,7 @@
                        ti,clock-cycles = <16>;
 
                        reg = <0x4ae07ddc 0x4>, <0x4ae07de0 0x4>,
-                             <0x4ae06014 0x4>, <0x4a003b20 0x8>,
+                             <0x4ae06014 0x4>, <0x4a003b20 0xc>,
                              <0x4ae0c158 0x4>;
                        reg-names = "setup-address", "control-address",
                                    "int-address", "efuse-address",
@@ -944,7 +944,7 @@
                        ti,clock-cycles = <16>;
 
                        reg = <0x4ae07e34 0x4>, <0x4ae07e24 0x4>,
-                             <0x4ae06010 0x4>, <0x4a0025cc 0x8>,
+                             <0x4ae06010 0x4>, <0x4a0025cc 0xc>,
                              <0x4a002470 0x4>;
                        reg-names = "setup-address", "control-address",
                                    "int-address", "efuse-address",
@@ -977,7 +977,7 @@
                        ti,clock-cycles = <16>;
 
                        reg = <0x4ae07e30 0x4>, <0x4ae07e20 0x4>,
-                             <0x4ae06010 0x4>, <0x4a0025e0 0x8>,
+                             <0x4ae06010 0x4>, <0x4a0025e0 0xc>,
                              <0x4a00246c 0x4>;
                        reg-names = "setup-address", "control-address",
                                    "int-address", "efuse-address",
@@ -1010,7 +1010,7 @@
                        ti,clock-cycles = <16>;
 
                        reg = <0x4ae07de4 0x4>, <0x4ae07de8 0x4>,
-                             <0x4ae06010 0x4>, <0x4a003b08 0x8>,
+                             <0x4ae06010 0x4>, <0x4a003b08 0xc>,
                              <0x4ae0c154 0x4>;
                        reg-names = "setup-address", "control-address",
                                    "int-address", "efuse-address",
@@ -1203,7 +1203,7 @@
                        status = "disabled";
                };
 
-               rtc@48838000 {
+               rtc: rtc@48838000 {
                        compatible = "ti,am3352-rtc";
                        reg = <0x48838000 0x100>;
                        interrupts = <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,

diff --git a/arch/arm/boot/dts/omap3-n900.dts b/arch/arm/boot/dts/omap3-n900.dts
index a29315833ecd3bfc1f1a7f86f7f3c5734453a00f..5c16145920eafd9604f0571dfe60a23986313871 100644 (file)
--- a/arch/arm/boot/dts/omap3-n900.dts
+++ b/arch/arm/boot/dts/omap3-n900.dts
@@ -498,6 +498,8 @@
                DRVDD-supply = <&vmmc2>;
                IOVDD-supply = <&vio>;
                DVDD-supply = <&vio>;
+
+               ai3x-micbias-vg = <1>;
        };
 
        tlv320aic3x_aux: tlv320aic3x@19 {
@@ -509,6 +511,8 @@
                DRVDD-supply = <&vmmc2>;
                IOVDD-supply = <&vio>;
                DVDD-supply = <&vio>;
+
+               ai3x-micbias-vg = <2>;
        };
 
        tsl2563: tsl2563@29 {

diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
index d18a90f5eca3145e527926a5d2bbbb44c2d8b1c0..69a40cfc1f29dddbd515b4f821459442787d401a 100644 (file)
--- a/arch/arm/boot/dts/omap3.dtsi
+++ b/arch/arm/boot/dts/omap3.dtsi
@@ -456,6 +456,7 @@
                };
 
                mmu_isp: mmu@480bd400 {
+                       #iommu-cells = <0>;
                        compatible = "ti,omap2-iommu";
                        reg = <0x480bd400 0x80>;
                        interrupts = <24>;
@@ -464,6 +465,7 @@
                };
 
                mmu_iva: mmu@5d000000 {
+                       #iommu-cells = <0>;
                        compatible = "ti,omap2-iommu";
                        reg = <0x5d000000 0x80>;
                        interrupts = <28>;

diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index efe5f737f39b42b7f01710abdd4e72d90bd53514..7d24ae0306b56845c80c2c783dd818033a3a6cd1 100644 (file)
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -128,7 +128,7 @@
         * hierarchy.
         */
        ocp {
-               compatible = "ti,omap4-l3-noc", "simple-bus";
+               compatible = "ti,omap5-l3-noc", "simple-bus";
                #address-cells = <1>;
                #size-cells = <1>;
                ranges;

diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig
index 9ff7b54b2a837aa509b46d71b38741b7ded2c25d..3743ca221d402ce5d89df72baca5b1500ebb799b 100644 (file)
--- a/arch/arm/configs/omap2plus_defconfig
+++ b/arch/arm/configs/omap2plus_defconfig
@@ -393,7 +393,7 @@ CONFIG_TI_EDMA=y
 CONFIG_DMA_OMAP=y
 # CONFIG_IOMMU_SUPPORT is not set
 CONFIG_EXTCON=m
-CONFIG_EXTCON_GPIO=m
+CONFIG_EXTCON_USB_GPIO=m
 CONFIG_EXTCON_PALMAS=m
 CONFIG_TI_EMIF=m
 CONFIG_PWM=y

diff --git a/arch/arm/mach-omap2/prm-regbits-34xx.h b/arch/arm/mach-omap2/prm-regbits-34xx.h
index cbefbd7cfdb5c02da2a9815f9662fe75879fe969..661d753df58469ecc84081ca3e2eef075de7d3cb 100644 (file)
--- a/arch/arm/mach-omap2/prm-regbits-34xx.h
+++ b/arch/arm/mach-omap2/prm-regbits-34xx.h
@@ -112,6 +112,7 @@
 #define OMAP3430_VC_CMD_ONLP_SHIFT                     16
 #define OMAP3430_VC_CMD_RET_SHIFT                      8
 #define OMAP3430_VC_CMD_OFF_SHIFT                      0
+#define OMAP3430_SREN_MASK                             (1 << 4)
 #define OMAP3430_HSEN_MASK                             (1 << 3)
 #define OMAP3430_MCODE_MASK                            (0x7 << 0)
 #define OMAP3430_VALID_MASK                            (1 << 24)

diff --git a/arch/arm/mach-omap2/prm-regbits-44xx.h b/arch/arm/mach-omap2/prm-regbits-44xx.h
index b1c7a33e00e74c36369b641a14c912110e17a23c..e794828dee553b2e943bc74b4ae819874c40455e 100644 (file)
--- a/arch/arm/mach-omap2/prm-regbits-44xx.h
+++ b/arch/arm/mach-omap2/prm-regbits-44xx.h
@@ -35,6 +35,7 @@
 #define OMAP4430_GLOBAL_WARM_SW_RST_SHIFT                              1
 #define OMAP4430_GLOBAL_WUEN_MASK                                      (1 << 16)
 #define OMAP4430_HSMCODE_MASK                                          (0x7 << 0)
+#define OMAP4430_SRMODEEN_MASK                                         (1 << 4)
 #define OMAP4430_HSMODEEN_MASK                                         (1 << 3)
 #define OMAP4430_HSSCLL_SHIFT                                          24
 #define OMAP4430_ICEPICK_RST_SHIFT                                     9

diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c
index be9ef834fa81d56666f247dae2a598ef422ee15d..076fd20d7e5aa03adfa9d14ec15293e374ceaace 100644 (file)
--- a/arch/arm/mach-omap2/vc.c
+++ b/arch/arm/mach-omap2/vc.c
@@ -316,7 +316,8 @@ static void __init omap3_vc_init_pmic_signaling(struct voltagedomain *voltdm)
         * idle. And we can also scale voltages to zero for off-idle.
         * Note that no actual voltage scaling during off-idle will
         * happen unless the board specific twl4030 PMIC scripts are
-        * loaded.
+        * loaded. See also omap_vc_i2c_init for comments regarding
+        * erratum i531.
         */
        val = voltdm->read(OMAP3_PRM_VOLTCTRL_OFFSET);
        if (!(val & OMAP3430_PRM_VOLTCTRL_SEL_OFF)) {
@@ -704,9 +705,16 @@ static void __init omap_vc_i2c_init(struct voltagedomain *voltdm)
                return;
        }
 
+       /*
+        * Note that for omap3 OMAP3430_SREN_MASK clears SREN to work around
+        * erratum i531 "Extra Power Consumed When Repeated Start Operation
+        * Mode Is Enabled on I2C Interface Dedicated for Smart Reflex (I2C4)".
+        * Otherwise I2C4 eventually leads into about 23mW extra power being
+        * consumed even during off idle using VMODE.
+        */
        i2c_high_speed = voltdm->pmic->i2c_high_speed;
        if (i2c_high_speed)
-               voltdm->rmw(vc->common->i2c_cfg_hsen_mask,
+               voltdm->rmw(vc->common->i2c_cfg_clear_mask,
                            vc->common->i2c_cfg_hsen_mask,
                            vc->common->i2c_cfg_reg);
 

diff --git a/arch/arm/mach-omap2/vc.h b/arch/arm/mach-omap2/vc.h
index cdbdd78e755e2c60347ca66ca378d5895a9ab87e..89b83b7ff3ec5c34d4906f1504700c45c6a00abc 100644 (file)
--- a/arch/arm/mach-omap2/vc.h
+++ b/arch/arm/mach-omap2/vc.h
@@ -34,6 +34,7 @@ struct voltagedomain;
  * @cmd_ret_shift: RET field shift in PRM_VC_CMD_VAL_* register
  * @cmd_off_shift: OFF field shift in PRM_VC_CMD_VAL_* register
  * @i2c_cfg_reg: I2C configuration register offset
+ * @i2c_cfg_clear_mask: high-speed mode bit clear mask in I2C config register
  * @i2c_cfg_hsen_mask: high-speed mode bit field mask in I2C config register
  * @i2c_mcode_mask: MCODE field mask for I2C config register
  *
@@ -52,6 +53,7 @@ struct omap_vc_common {
        u8 cmd_ret_shift;
        u8 cmd_off_shift;
        u8 i2c_cfg_reg;
+       u8 i2c_cfg_clear_mask;
        u8 i2c_cfg_hsen_mask;
        u8 i2c_mcode_mask;
 };

diff --git a/arch/arm/mach-omap2/vc3xxx_data.c b/arch/arm/mach-omap2/vc3xxx_data.c
index 75bc4aa22b3a0963d0e6ed468fecc5e17257eef4..71d74c9172c15f0169203be438f6756b0a164965 100644 (file)
--- a/arch/arm/mach-omap2/vc3xxx_data.c
+++ b/arch/arm/mach-omap2/vc3xxx_data.c
@@ -40,6 +40,7 @@ static struct omap_vc_common omap3_vc_common = {
        .cmd_onlp_shift  = OMAP3430_VC_CMD_ONLP_SHIFT,
        .cmd_ret_shift   = OMAP3430_VC_CMD_RET_SHIFT,
        .cmd_off_shift   = OMAP3430_VC_CMD_OFF_SHIFT,
+       .i2c_cfg_clear_mask = OMAP3430_SREN_MASK | OMAP3430_HSEN_MASK,
        .i2c_cfg_hsen_mask = OMAP3430_HSEN_MASK,
        .i2c_cfg_reg     = OMAP3_PRM_VC_I2C_CFG_OFFSET,
        .i2c_mcode_mask  = OMAP3430_MCODE_MASK,

diff --git a/arch/arm/mach-omap2/vc44xx_data.c b/arch/arm/mach-omap2/vc44xx_data.c
index 085e5d6a04fd088c5422235478bb012861a96078..2abd5fa8a6972d2a435735c6419f750fbb37b567 100644 (file)
--- a/arch/arm/mach-omap2/vc44xx_data.c
+++ b/arch/arm/mach-omap2/vc44xx_data.c
@@ -42,6 +42,7 @@ static const struct omap_vc_common omap4_vc_common = {
        .cmd_ret_shift = OMAP4430_RET_SHIFT,
        .cmd_off_shift = OMAP4430_OFF_SHIFT,
        .i2c_cfg_reg = OMAP4_PRM_VC_CFG_I2C_MODE_OFFSET,
+       .i2c_cfg_clear_mask = OMAP4430_SRMODEEN_MASK | OMAP4430_HSMODEEN_MASK,
        .i2c_cfg_hsen_mask = OMAP4430_HSMODEEN_MASK,
        .i2c_mcode_mask  = OMAP4430_HSMCODE_MASK,
 };

diff --git a/drivers/bus/omap_l3_noc.c b/drivers/bus/omap_l3_noc.c
index 11f7982cbdb321ba26020b8c8a1495973ebb62e1..ebee57d715d2314df6b3ab0bff60cde656691a93 100644 (file)
--- a/drivers/bus/omap_l3_noc.c
+++ b/drivers/bus/omap_l3_noc.c
@@ -1,7 +1,7 @@
 /*
  * OMAP L3 Interconnect error handling driver
  *
- * Copyright (C) 2011-2014 Texas Instruments Incorporated - http://www.ti.com/
+ * Copyright (C) 2011-2015 Texas Instruments Incorporated - http://www.ti.com/
  *     Santosh Shilimkar <santosh.shilimkar@ti.com>
  *     Sricharan <r.sricharan@ti.com>
  *
@@ -233,7 +233,8 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
 }
 
 static const struct of_device_id l3_noc_match[] = {
-       {.compatible = "ti,omap4-l3-noc", .data = &omap_l3_data},
+       {.compatible = "ti,omap4-l3-noc", .data = &omap4_l3_data},
+       {.compatible = "ti,omap5-l3-noc", .data = &omap5_l3_data},
        {.compatible = "ti,dra7-l3-noc", .data = &dra_l3_data},
        {.compatible = "ti,am4372-l3-noc", .data = &am4372_l3_data},
        {},

diff --git a/drivers/bus/omap_l3_noc.h b/drivers/bus/omap_l3_noc.h
index 95254585db86aca1adc29091a28486fe821e7e53..73431f81da28c0036fba33b52a17641eee5e385a 100644 (file)
--- a/drivers/bus/omap_l3_noc.h
+++ b/drivers/bus/omap_l3_noc.h
@@ -1,7 +1,7 @@
 /*
  * OMAP L3 Interconnect  error handling driver header
  *
- * Copyright (C) 2011-2014 Texas Instruments Incorporated - http://www.ti.com/
+ * Copyright (C) 2011-2015 Texas Instruments Incorporated - http://www.ti.com/
  *     Santosh Shilimkar <santosh.shilimkar@ti.com>
  *     sricharan <r.sricharan@ti.com>
  *
@@ -175,16 +175,14 @@ static struct l3_flagmux_data omap_l3_flagmux_clk2 = {
 };
 
 
-static struct l3_target_data omap_l3_target_data_clk3[] = {
-       {0x0100, "EMUSS",},
-       {0x0300, "DEBUG SOURCE",},
-       {0x0,   "HOST CLK3",},
+static struct l3_target_data omap4_l3_target_data_clk3[] = {
+       {0x0100, "DEBUGSS",},
 };
 
-static struct l3_flagmux_data omap_l3_flagmux_clk3 = {
+static struct l3_flagmux_data omap4_l3_flagmux_clk3 = {
        .offset = 0x0200,
-       .l3_targ = omap_l3_target_data_clk3,
-       .num_targ_data = ARRAY_SIZE(omap_l3_target_data_clk3),
+       .l3_targ = omap4_l3_target_data_clk3,
+       .num_targ_data = ARRAY_SIZE(omap4_l3_target_data_clk3),
 };
 
 static struct l3_masters_data omap_l3_masters[] = {
@@ -215,21 +213,49 @@ static struct l3_masters_data omap_l3_masters[] = {
        { 0x32, "USBHOSTFS"}
 };
 
-static struct l3_flagmux_data *omap_l3_flagmux[] = {
+static struct l3_flagmux_data *omap4_l3_flagmux[] = {
        &omap_l3_flagmux_clk1,
        &omap_l3_flagmux_clk2,
-       &omap_l3_flagmux_clk3,
+       &omap4_l3_flagmux_clk3,
 };
 
-static const struct omap_l3 omap_l3_data = {
-       .l3_flagmux = omap_l3_flagmux,
-       .num_modules = ARRAY_SIZE(omap_l3_flagmux),
+static const struct omap_l3 omap4_l3_data = {
+       .l3_flagmux = omap4_l3_flagmux,
+       .num_modules = ARRAY_SIZE(omap4_l3_flagmux),
        .l3_masters = omap_l3_masters,
        .num_masters = ARRAY_SIZE(omap_l3_masters),
        /* The 6 MSBs of register field used to distinguish initiator */
        .mst_addr_mask = 0xFC,
 };
 
+/* OMAP5 data */
+static struct l3_target_data omap5_l3_target_data_clk3[] = {
+       {0x0100, "L3INSTR",},
+       {0x0300, "DEBUGSS",},
+       {0x0,    "HOSTCLK3",},
+};
+
+static struct l3_flagmux_data omap5_l3_flagmux_clk3 = {
+       .offset = 0x0200,
+       .l3_targ = omap5_l3_target_data_clk3,
+       .num_targ_data = ARRAY_SIZE(omap5_l3_target_data_clk3),
+};
+
+static struct l3_flagmux_data *omap5_l3_flagmux[] = {
+       &omap_l3_flagmux_clk1,
+       &omap_l3_flagmux_clk2,
+       &omap5_l3_flagmux_clk3,
+};
+
+static const struct omap_l3 omap5_l3_data = {
+       .l3_flagmux = omap5_l3_flagmux,
+       .num_modules = ARRAY_SIZE(omap5_l3_flagmux),
+       .l3_masters = omap_l3_masters,
+       .num_masters = ARRAY_SIZE(omap_l3_masters),
+       /* The 6 MSBs of register field used to distinguish initiator */
+       .mst_addr_mask = 0x7E0,
+};
+
 /* DRA7 data */
 static struct l3_target_data dra_l3_target_data_clk1[] = {
        {0x2a00, "AES1",},
@@ -274,7 +300,7 @@ static struct l3_flagmux_data dra_l3_flagmux_clk1 = {
 
 static struct l3_target_data dra_l3_target_data_clk2[] = {
        {0x0,   "HOST CLK1",},
-       {0x0,   "HOST CLK2",},
+       {0x800000, "HOST CLK2",},
        {0xdead, L3_TARGET_NOT_SUPPORTED,},
        {0x3400, "SHA2_2",},
        {0x0900, "BB2D",},