da850-evm.dtb
dtb-$(CONFIG_ARCH_DOVE) += dove-cm-a510.dtb \
dove-cubox.dtb \
+ dove-d2plug.dtb \
dove-dove-db.dtb
dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \
exynos4210-smdkv310.dtb \
kirkwood-lschlv2.dtb \
kirkwood-lsxhl.dtb \
kirkwood-mplcec4.dtb \
+ kirkwood-mv88f6281gtw-ge.dtb \
kirkwood-netgear_readynas_duo_v2.dtb \
kirkwood-ns2.dtb \
kirkwood-ns2lite.dtb \
ccu9540.dtb
dtb-$(CONFIG_ARCH_S3C24XX) += s3c2416-smdk2416.dtb
dtb-$(CONFIG_ARCH_SHMOBILE) += emev2-kzm9d.dtb \
+ emev2-kzm9d-reference.dtb \
r8a7740-armadillo800eva.dtb \
r8a7778-bockw.dtb \
r8a7740-armadillo800eva-reference.dtb \
regulator-always-on;
regulator-boot-on;
gpio = <&gpio0 1 0>;
+ pinctrl-0 = <&pmx_gpio_1>;
+ pinctrl-names = "default";
};
};
clock-frequency = <25000000>;
};
};
+
+ ir_recv: ir-receiver {
+ compatible = "gpio-ir-receiver";
+ gpios = <&gpio0 19 1>;
+ pinctrl-0 = <&pmx_gpio_19>;
+ pinctrl-names = "default";
+ };
};
&uart0 { status = "okay"; };
&sata0 { status = "okay"; };
+&mdio { status = "okay"; };
+ð { status = "okay"; };
+
+ðphy {
+ compatible = "marvell,88e1310";
+ reg = <1>;
+};
&i2c0 {
status = "okay";
status = "okay";
/* sdio0 card detect is connected to wrong pin on CuBox */
cd-gpios = <&gpio0 12 1>;
+ pinctrl-0 = <&pmx_sdio0 &pmx_gpio_12>;
};
&spi0 {
reg = <0>;
};
};
-
-&pinctrl {
- pinctrl-0 = <&pmx_gpio_1 &pmx_gpio_12>;
- pinctrl-names = "default";
-
- pmx_gpio_1: pmx-gpio-1 {
- marvell,pins = "mpp1";
- marvell,function = "gpio";
- };
-
- pmx_gpio_12: pmx-gpio-12 {
- marvell,pins = "mpp12";
- marvell,function = "gpio";
- };
-
- pmx_gpio_18: pmx-gpio-18 {
- marvell,pins = "mpp18";
- marvell,function = "gpio";
- };
-};
--- /dev/null
+/dts-v1/;
+
+/include/ "dove.dtsi"
+
+/ {
+ model = "Globalscale D2Plug";
+ compatible = "globalscale,d2plug", "marvell,dove";
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x40000000>;
+ };
+
+ chosen {
+ bootargs = "console=ttyS0,115200n8 earlyprintk";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-0 = <&pmx_gpio_0 &pmx_gpio_1 &pmx_gpio_2>;
+ pinctrl-names = "default";
+
+ wlan-ap {
+ label = "wlan-ap";
+ gpios = <&gpio0 0 1>;
+ };
+
+ wlan-act {
+ label = "wlan-act";
+ gpios = <&gpio0 1 1>;
+ };
+
+ bluetooth-act {
+ label = "bt-act";
+ gpios = <&gpio0 2 1>;
+ };
+ };
+};
+
+&uart0 { status = "okay"; };
+&sata0 { status = "okay"; };
+&i2c0 { status = "okay"; };
+&mdio { status = "okay"; };
+ð { status = "okay"; };
+
+/* Samsung M8G2F eMMC */
+&sdio0 {
+ status = "okay";
+ non-removable;
+ bus-width = <4>;
+};
+
+/* Marvell SD8787 WLAN/BT */
+&sdio1 {
+ status = "okay";
+ non-removable;
+ bus-width = <4>;
+};
+
+&spi0 {
+ status = "okay";
+
+ /* spi0.0: 4M Flash Macronix MX25L3205D */
+ spi-flash@0 {
+ compatible = "st,m25l3205d";
+ spi-max-frequency = <20000000>;
+ reg = <0>;
+ };
+};
gpio2 = &gpio2;
};
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu0: cpu@0 {
+ compatible = "marvell,pj4a", "marvell,sheeva-v7";
+ device_type = "cpu";
+ next-level-cache = <&l2>;
+ reg = <0>;
+ };
+ };
+
+ l2: l2-cache {
+ compatible = "marvell,tauros2-cache";
+ marvell,tauros2-cache-features = <0>;
+ };
+
soc@f1000000 {
compatible = "simple-bus";
#address-cells = <1>;
0xf2100000 0xf2100000 0x0100000 /* PCIe0 I/O 1M */
0xf8000000 0xf8000000 0x8000000>; /* BootROM 128M */
- l2: l2-cache {
- compatible = "marvell,tauros2-cache";
- marvell,tauros2-cache-features = <0>;
+ timer: timer@20300 {
+ compatible = "marvell,orion-timer";
+ reg = <0x20300 0x20>;
+ interrupt-parent = <&bridge_intc>;
+ interrupts = <1>, <2>;
+ clocks = <&core_clk 0>;
};
- intc: interrupt-controller {
+ intc: main-interrupt-ctrl@20200 {
compatible = "marvell,orion-intc";
interrupt-controller;
#interrupt-cells = <1>;
- reg = <0x20204 0x04>, <0x20214 0x04>;
+ reg = <0x20200 0x10>, <0x20210 0x10>;
+ };
+
+ bridge_intc: bridge-interrupt-ctrl@20110 {
+ compatible = "marvell,orion-bridge-intc";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ reg = <0x20110 0x8>;
+ interrupts = <0>;
+ marvell,#interrupts = <5>;
};
core_clk: core-clocks@d0214 {
#clock-cells = <1>;
};
- gate_clk: clock-gating-control@d0038 {
+ gate_clk: clock-gating-ctrl@d0038 {
compatible = "marvell,dove-gating-clock";
reg = <0xd0038 0x4>;
clocks = <&core_clk 0>;
#clock-cells = <1>;
};
- thermal: thermal@d001c {
+ thermal: thermal-diode@d001c {
compatible = "marvell,dove-thermal";
reg = <0xd001c 0x0c>, <0xd005c 0x08>;
};
reg-shift = <2>;
interrupts = <8>;
clocks = <&core_clk 0>;
+ pinctrl-0 = <&pmx_uart1>;
+ pinctrl-names = "default";
status = "disabled";
};
status = "disabled";
};
- gpio0: gpio@d0400 {
+ gpio0: gpio-ctrl@d0400 {
compatible = "marvell,orion-gpio";
#gpio-cells = <2>;
gpio-controller;
interrupts = <12>, <13>, <14>, <60>;
};
- gpio1: gpio@d0420 {
+ gpio1: gpio-ctrl@d0420 {
compatible = "marvell,orion-gpio";
#gpio-cells = <2>;
gpio-controller;
interrupts = <61>;
};
- gpio2: gpio@e8400 {
+ gpio2: gpio-ctrl@e8400 {
compatible = "marvell,orion-gpio";
#gpio-cells = <2>;
gpio-controller;
ngpios = <8>;
};
- pinctrl: pinctrl@d0200 {
+ pinctrl: pin-ctrl@d0200 {
compatible = "marvell,dove-pinctrl";
reg = <0xd0200 0x10>;
clocks = <&gate_clk 22>;
+
+ pmx_gpio_0: pmx-gpio-0 {
+ marvell,pins = "mpp0";
+ marvell,function = "gpio";
+ };
+
+ pmx_gpio_1: pmx-gpio-1 {
+ marvell,pins = "mpp1";
+ marvell,function = "gpio";
+ };
+
+ pmx_gpio_2: pmx-gpio-2 {
+ marvell,pins = "mpp2";
+ marvell,function = "gpio";
+ };
+
+ pmx_gpio_3: pmx-gpio-3 {
+ marvell,pins = "mpp3";
+ marvell,function = "gpio";
+ };
+
+ pmx_gpio_4: pmx-gpio-4 {
+ marvell,pins = "mpp4";
+ marvell,function = "gpio";
+ };
+
+ pmx_gpio_5: pmx-gpio-5 {
+ marvell,pins = "mpp5";
+ marvell,function = "gpio";
+ };
+
+ pmx_gpio_6: pmx-gpio-6 {
+ marvell,pins = "mpp6";
+ marvell,function = "gpio";
+ };
+
+ pmx_gpio_7: pmx-gpio-7 {
+ marvell,pins = "mpp7";
+ marvell,function = "gpio";
+ };
+
+ pmx_gpio_8: pmx-gpio-8 {
+ marvell,pins = "mpp8";
+ marvell,function = "gpio";
+ };
+
+ pmx_gpio_9: pmx-gpio-9 {
+ marvell,pins = "mpp9";
+ marvell,function = "gpio";
+ };
+
+ pmx_gpio_10: pmx-gpio-10 {
+ marvell,pins = "mpp10";
+ marvell,function = "gpio";
+ };
+
+ pmx_gpio_11: pmx-gpio-11 {
+ marvell,pins = "mpp11";
+ marvell,function = "gpio";
+ };
+
+ pmx_gpio_12: pmx-gpio-12 {
+ marvell,pins = "mpp12";
+ marvell,function = "gpio";
+ };
+
+ pmx_gpio_13: pmx-gpio-13 {
+ marvell,pins = "mpp13";
+ marvell,function = "gpio";
+ };
+
+ pmx_gpio_14: pmx-gpio-14 {
+ marvell,pins = "mpp14";
+ marvell,function = "gpio";
+ };
+
+ pmx_gpio_15: pmx-gpio-15 {
+ marvell,pins = "mpp15";
+ marvell,function = "gpio";
+ };
+
+ pmx_gpio_16: pmx-gpio-16 {
+ marvell,pins = "mpp16";
+ marvell,function = "gpio";
+ };
+
+ pmx_gpio_17: pmx-gpio-17 {
+ marvell,pins = "mpp17";
+ marvell,function = "gpio";
+ };
+
+ pmx_gpio_18: pmx-gpio-18 {
+ marvell,pins = "mpp18";
+ marvell,function = "gpio";
+ };
+
+ pmx_gpio_19: pmx-gpio-19 {
+ marvell,pins = "mpp19";
+ marvell,function = "gpio";
+ };
+
+ pmx_gpio_20: pmx-gpio-20 {
+ marvell,pins = "mpp20";
+ marvell,function = "gpio";
+ };
+
+ pmx_gpio_21: pmx-gpio-21 {
+ marvell,pins = "mpp21";
+ marvell,function = "gpio";
+ };
+
+ pmx_camera: pmx-camera {
+ marvell,pins = "mpp_camera";
+ marvell,function = "camera";
+ };
+
+ pmx_camera_gpio: pmx-camera-gpio {
+ marvell,pins = "mpp_camera";
+ marvell,function = "gpio";
+ };
+
+ pmx_sdio0: pmx-sdio0 {
+ marvell,pins = "mpp_sdio0";
+ marvell,function = "sdio0";
+ };
+
+ pmx_sdio0_gpio: pmx-sdio0-gpio {
+ marvell,pins = "mpp_sdio0";
+ marvell,function = "gpio";
+ };
+
+ pmx_sdio1: pmx-sdio1 {
+ marvell,pins = "mpp_sdio1";
+ marvell,function = "sdio1";
+ };
+
+ pmx_sdio1_gpio: pmx-sdio1-gpio {
+ marvell,pins = "mpp_sdio1";
+ marvell,function = "gpio";
+ };
+
+ pmx_audio1_gpio: pmx-audio1-gpio {
+ marvell,pins = "mpp_audio1";
+ marvell,function = "gpio";
+ };
+
+ pmx_spi0: pmx-spi0 {
+ marvell,pins = "mpp_spi0";
+ marvell,function = "spi0";
+ };
+
+ pmx_spi0_gpio: pmx-spi0-gpio {
+ marvell,pins = "mpp_spi0";
+ marvell,function = "gpio";
+ };
+
+ pmx_uart1: pmx-uart1 {
+ marvell,pins = "mpp_uart1";
+ marvell,function = "uart1";
+ };
+
+ pmx_uart1_gpio: pmx-uart1-gpio {
+ marvell,pins = "mpp_uart1";
+ marvell,function = "gpio";
+ };
+
+ pmx_nand: pmx-nand {
+ marvell,pins = "mpp_nand";
+ marvell,function = "nand";
+ };
+
+ pmx_nand_gpo: pmx-nand-gpo {
+ marvell,pins = "mpp_nand";
+ marvell,function = "gpo";
+ };
};
- spi0: spi@10600 {
+ spi0: spi-ctrl@10600 {
compatible = "marvell,orion-spi";
#address-cells = <1>;
#size-cells = <0>;
interrupts = <6>;
reg = <0x10600 0x28>;
clocks = <&core_clk 0>;
+ pinctrl-0 = <&pmx_spi0>;
+ pinctrl-names = "default";
status = "disabled";
};
- spi1: spi@14600 {
+ spi1: spi-ctrl@14600 {
compatible = "marvell,orion-spi";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
- i2c0: i2c@11000 {
+ i2c0: i2c-ctrl@11000 {
compatible = "marvell,mv64xxx-i2c";
reg = <0x11000 0x20>;
#address-cells = <1>;
status = "okay";
};
- sdio0: sdio@92000 {
+ sdio0: sdio-host@92000 {
compatible = "marvell,dove-sdhci";
reg = <0x92000 0x100>;
interrupts = <35>, <37>;
clocks = <&gate_clk 8>;
+ pinctrl-0 = <&pmx_sdio0>;
+ pinctrl-names = "default";
status = "disabled";
};
- sdio1: sdio@90000 {
+ sdio1: sdio-host@90000 {
compatible = "marvell,dove-sdhci";
reg = <0x90000 0x100>;
interrupts = <36>, <38>;
clocks = <&gate_clk 9>;
+ pinctrl-0 = <&pmx_sdio1>;
+ pinctrl-names = "default";
status = "disabled";
};
- sata0: sata@a0000 {
+ sata0: sata-host@a0000 {
compatible = "marvell,orion-sata";
reg = <0xa0000 0x2400>;
interrupts = <62>;
status = "disabled";
};
- rtc@d8500 {
+ rtc: real-time-clock@d8500 {
compatible = "marvell,orion-rtc";
reg = <0xd8500 0x20>;
};
- crypto: crypto@30000 {
+ crypto: crypto-engine@30000 {
compatible = "marvell,orion-crypto";
reg = <0x30000 0x10000>,
<0xc8000000 0x800>;
dmacap,xor;
};
};
+
+ mdio: mdio-bus@72004 {
+ compatible = "marvell,orion-mdio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x72004 0x84>;
+ interrupts = <30>;
+ clocks = <&gate_clk 2>;
+ status = "disabled";
+
+ ethphy: ethernet-phy {
+ device-type = "ethernet-phy";
+ /* set phy address in board file */
+ };
+ };
+
+ eth: ethernet-controller@72000 {
+ compatible = "marvell,orion-eth";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x72000 0x4000>;
+ clocks = <&gate_clk 2>;
+ marvell,tx-checksum-limit = <1600>;
+ status = "disabled";
+
+ ethernet-port@0 {
+ device_type = "network";
+ compatible = "marvell,orion-eth-port";
+ reg = <0>;
+ interrupts = <29>;
+ /* overwrite MAC address in bootloader */
+ local-mac-address = [00 00 00 00 00 00];
+ phy-handle = <ðphy>;
+ };
+ };
};
};
--- /dev/null
+/*
+ * Device Tree Source for the KZM9D board
+ *
+ * Copyright (C) 2013 Renesas Solutions Corp.
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+/dts-v1/;
+
+/include/ "emev2.dtsi"
+
+/ {
+ model = "EMEV2 KZM9D Board";
+ compatible = "renesas,kzm9d-reference", "renesas,emev2";
+
+ memory {
+ device_type = "memory";
+ reg = <0x40000000 0x8000000>;
+ };
+
+ chosen {
+ bootargs = "console=ttyS1,115200n81 ignore_loglevel root=/dev/nfs ip=dhcp nfsroot=,rsize=4096,wsize=4096";
+ };
+
+ reg_1p8v: regulator@0 {
+ compatible = "regulator-fixed";
+ regulator-name = "fixed-1.8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ reg_3p3v: regulator@1 {
+ compatible = "regulator-fixed";
+ regulator-name = "fixed-3.3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ lan9220@20000000 {
+ compatible = "smsc,lan9220", "smsc,lan9115";
+ reg = <0x20000000 0x10000>;
+ phy-mode = "mii";
+ interrupt-parent = <&gpio0>;
+ interrupts = <1 1>; /* active high */
+ reg-io-width = <4>;
+ smsc,irq-active-high;
+ smsc,irq-push-pull;
+ vddvario-supply = <®_1p8v>;
+ vdd33a-supply = <®_3p3v>;
+ };
+};
};
chosen {
- bootargs = "console=tty0 console=ttyS1,115200n81 earlyprintk=serial8250-em.1,115200n81 mem=128M@0x40000000 ignore_loglevel root=/dev/nfs ip=dhcp nfsroot=,rsize=4096,wsize=4096";
+ bootargs = "console=ttyS1,115200n81 ignore_loglevel root=/dev/nfs ip=dhcp nfsroot=,rsize=4096,wsize=4096";
};
};
compatible = "renesas,emev2";
interrupt-parent = <&gic>;
+ aliases {
+ gpio0 = &gpio0;
+ gpio1 = &gpio1;
+ gpio2 = &gpio2;
+ gpio3 = &gpio3;
+ gpio4 = &gpio4;
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
reg = <0xe1050000 0x38>;
interrupts = <0 11 0>;
};
+
+ gpio0: gpio@e0050000 {
+ compatible = "renesas,em-gio";
+ reg = <0xe0050000 0x2c>, <0xe0050040 0x20>;
+ interrupts = <0 67 0>, <0 68 0>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ ngpios = <32>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+ gpio1: gpio@e0050080 {
+ compatible = "renesas,em-gio";
+ reg = <0xe0050080 0x2c>, <0xe00500c0 0x20>;
+ interrupts = <0 69 0>, <0 70 0>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ ngpios = <32>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+ gpio2: gpio@e0050100 {
+ compatible = "renesas,em-gio";
+ reg = <0xe0050100 0x2c>, <0xe0050140 0x20>;
+ interrupts = <0 71 0>, <0 72 0>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ ngpios = <32>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+ gpio3: gpio@e0050180 {
+ compatible = "renesas,em-gio";
+ reg = <0xe0050180 0x2c>, <0xe00501c0 0x20>;
+ interrupts = <0 73 0>, <0 74 0>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ ngpios = <32>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+ gpio4: gpio@e0050200 {
+ compatible = "renesas,em-gio";
+ reg = <0xe0050200 0x2c>, <0xe0050240 0x20>;
+ interrupts = <0 75 0>, <0 76 0>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ ngpios = <31>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
};
gpios = <&gpio0 17 0>;
};
};
+
+&mdio {
+ status = "okay";
+
+ ethphy0: ethernet-phy@0 {
+ device_type = "ethernet-phy";
+ reg = <0>;
+ };
+};
+
+ð0 {
+ status = "okay";
+ ethernet0-port@0 {
+ phy-handle = <ðphy0>;
+ };
+};
};
};
};
+
+&mdio {
+ status = "okay";
+
+ ethphy0: ethernet-phy@8 {
+ device_type = "ethernet-phy";
+ reg = <8>;
+ };
+};
+
+ð0 {
+ status = "okay";
+ ethernet0-port@0 {
+ phy-handle = <ðphy0>;
+ };
+};
};
};
};
+
+&mdio {
+ status = "okay";
+
+ ethphy0: ethernet-phy@8 {
+ device_type = "ethernet-phy";
+ reg = <8>;
+ };
+};
+
+ð0 {
+ status = "okay";
+ ethernet0-port@0 {
+ phy-handle = <ðphy0>;
+ };
+};
};
};
};
+
+&mdio {
+ status = "okay";
+
+ ethphy0: ethernet-phy@0 {
+ device_type = "ethernet-phy";
+ compatible = "marvell,88e1116";
+ reg = <0>;
+ };
+};
+
+ð0 {
+ status = "okay";
+ ethernet0-port@0 {
+ phy-handle = <ðphy0>;
+ };
+};
};
};
};
+
+&mdio {
+ status = "okay";
+
+ ethphy0: ethernet-phy@0 {
+ device_type = "ethernet-phy";
+ reg = <0>;
+ };
+
+ ethphy1: ethernet-phy@1 {
+ device_type = "ethernet-phy";
+ reg = <1>;
+ };
+};
+
+ð0 {
+ status = "okay";
+ ethernet0-port@0 {
+ phy-handle = <ðphy0>;
+ };
+};
+
+ð1 {
+ status = "okay";
+ ethernet1-port@0 {
+ phy-handle = <ðphy1>;
+ };
+};
};
};
};
+
+&mdio {
+ status = "okay";
+
+ ethphy0: ethernet-phy@0 {
+ device_type = "ethernet-phy";
+ reg = <0>;
+ };
+};
+
+ð0 {
+ status = "okay";
+ ethernet0-port@0 {
+ phy-handle = <ðphy0>;
+ };
+};
};
};
};
+
+&mdio {
+ status = "okay";
+
+ ethphy0: ethernet-phy@0 {
+ device_type = "ethernet-phy";
+ compatible = "marvell,88e1121";
+ reg = <0>;
+ };
+
+ ethphy1: ethernet-phy@1 {
+ device_type = "ethernet-phy";
+ compatible = "marvell,88e1121";
+ reg = <1>;
+ };
+};
+
+ð0 {
+ status = "okay";
+ ethernet0-port@0 {
+ phy-handle = <ðphy0>;
+ };
+};
+
+ð1 {
+ status = "okay";
+ ethernet1-port@0 {
+ phy-handle = <ðphy1>;
+ };
+};
};
+
+&mdio {
+ status = "okay";
+
+ ethphy0: ethernet-phy@8 {
+ device_type = "ethernet-phy";
+ reg = <8>;
+ };
+};
+
+ð0 {
+ status = "okay";
+ ethernet0-port@0 {
+ phy-handle = <ðphy0>;
+ };
+};
};
};
};
+
+&mdio {
+ status = "okay";
+
+ ethphy0: ethernet-phy@11 {
+ device_type = "ethernet-phy";
+ reg = <11>;
+ };
+};
+
+ð0 {
+ status = "okay";
+ ethernet0-port@0 {
+ phy-handle = <ðphy0>;
+ };
+};
};
};
};
+
+&mdio {
+ status = "okay";
+
+ ethphy1: ethernet-phy@11 {
+ device_type = "ethernet-phy";
+ reg = <11>;
+ };
+};
+
+ð0 {
+ status = "okay";
+ ethernet0-port@0 {
+ speed = <1000>;
+ duplex = <1>;
+ };
+};
+
+ð1 {
+ status = "okay";
+ ethernet1-port@0 {
+ phy-handle = <ðphy1>;
+ };
+};
};
};
};
+
+ðphy0 { reg = <8>; };
i2c-gpio,delay-us = <2>; /* ~100 kHz */
};
};
+
+&mdio {
+ status = "okay";
+
+ ethphy0: ethernet-phy@0 {
+ device_type = "ethernet-phy";
+ reg = <0>;
+ };
+};
+
+ð0 {
+ status = "okay";
+ ethernet0-port@0 {
+ phy-handle = <ðphy0>;
+ };
+};
};
};
};
+
+&mdio {
+ status = "okay";
+
+ ethphy0: ethernet-phy@0 {
+ device_type = "ethernet-phy";
+ reg = <0>;
+ };
+
+ ethphy1: ethernet-phy@8 {
+ device_type = "ethernet-phy";
+ reg = <8>;
+ };
+};
+
+ð0 {
+ status = "okay";
+ ethernet0-port@0 {
+ phy-handle = <ðphy0>;
+ };
+};
+
+ð1 {
+ status = "okay";
+ ethernet1-port@0 {
+ phy-handle = <ðphy1>;
+ };
+};
};
};
+&mdio {
+ status = "okay";
+
+ ethphy0: ethernet-phy@1 {
+ device_type = "ethernet-phy";
+ reg = <1>;
+ };
+
+ ethphy1: ethernet-phy@2 {
+ device_type = "ethernet-phy";
+ reg = <2>;
+ };
+};
+
+ð0 {
+ status = "okay";
+ ethernet0-port@0 {
+ phy-handle = <ðphy0>;
+ };
+};
+
+ð1 {
+ status = "okay";
+ ethernet1-port@0 {
+ phy-handle = <ðphy1>;
+ };
+};
--- /dev/null
+/*
+ * Marvell 88F6281 GTW GE Board
+ *
+ * Lennert Buytenhek <buytenh@marvell.com>
+ * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ *
+ * This file contains the definitions that are common between the 6281
+ * and 6282 variants of the Marvell Kirkwood Development Board.
+ */
+
+/dts-v1/;
+
+#include "kirkwood.dtsi"
+#include "kirkwood-6281.dtsi"
+
+/ {
+ model = "Marvell 88F6281 GTW GE Board";
+ compatible = "marvell,mv88f6281gtw-ge", "marvell,kirkwood-88f6281", "marvell,kirkwood";
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x20000000>; /* 512 MB */
+ };
+
+ chosen {
+ bootargs = "console=ttyS0,115200n8 earlyprintk";
+ };
+
+ ocp@f1000000 {
+ pinctrl@10000 {
+ pmx_usb_led: pmx-usb-led {
+ marvell,pins = "mpp12";
+ marvell,function = "gpo";
+ };
+
+ pmx_leds: pmx-leds {
+ marvell,pins = "mpp20", "mpp21";
+ marvell,function = "gpio";
+ };
+
+ pmx_keys: pmx-keys {
+ marvell,pins = "mpp46", "mpp47";
+ marvell,function = "gpio";
+ };
+ };
+
+ spi@10600 {
+ pinctrl-0 = <&pmx_spi>;
+ pinctrl-names = "default";
+ status = "okay";
+
+ flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "mx25l12805d";
+ reg = <0>;
+ spi-max-frequency = <50000000>;
+ mode = <0>;
+ };
+ };
+
+ serial@12000 {
+ pinctrl-0 = <&pmx_uart0>;
+ pinctrl-names = "default";
+ clock-frequency = <200000000>;
+ status = "ok";
+ };
+
+ ehci@50000 {
+ status = "okay";
+ };
+
+ pcie-controller {
+ status = "okay";
+
+ pcie@1,0 {
+ status = "okay";
+ };
+ };
+ };
+
+ gpio-leds {
+ compatible = "gpio-leds";
+ pinctrl-0 = <&pmx_leds &pmx_usb_led>;
+ pinctrl-names = "default";
+
+ green-status {
+ label = "gtw:green:Status";
+ gpios = <&gpio0 20 0>;
+ };
+
+ red-status {
+ label = "gtw:red:Status";
+ gpios = <&gpio0 21 0>;
+ };
+
+ green-usb {
+ label = "gtw:green:USB";
+ gpios = <&gpio0 12 0>;
+ };
+ };
+
+ gpio_keys {
+ compatible = "gpio-keys";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-0 = <&pmx_keys>;
+ pinctrl-names = "default";
+
+ button@1 {
+ label = "SWR Button";
+ linux,code = <0x198>; /* KEY_RESTART */
+ gpios = <&gpio1 15 1>;
+ };
+ button@2 {
+ label = "WPS Button";
+ linux,code = <0x211>; /* KEY_WPS_BUTTON */
+ gpios = <&gpio1 14 1>;
+ };
+ };
+};
};
};
};
+
+&mdio {
+ status = "okay";
+
+ ethphy0: ethernet-phy@0 {
+ device_type = "ethernet-phy";
+ reg = <0>;
+ };
+};
+
+ð0 {
+ status = "okay";
+ ethernet0-port@0 {
+ phy-handle = <ðphy0>;
+ };
+};
};
};
+
+&mdio {
+ status = "okay";
+
+ ethphy0: ethernet-phy {
+ device_type = "ethernet-phy";
+ /* overwrite reg property in board file */
+ };
+};
+
+ð0 {
+ status = "okay";
+ ethernet0-port@0 {
+ phy-handle = <ðphy0>;
+ };
+};
};
};
};
+
+ðphy0 { reg = <8>; };
};
};
};
+
+ðphy0 { reg = <0>; };
};
};
};
+
+ðphy0 { reg = <8>; };
};
};
};
+
+ðphy0 { reg = <0>; };
};
};
};
+
+&mdio {
+ status = "okay";
+
+ ethphy0: ethernet-phy@0 {
+ device_type = "ethernet-phy";
+ reg = <0>;
+ };
+};
+
+ð0 {
+ status = "okay";
+ ethernet0-port@0 {
+ phy-handle = <ðphy0>;
+ };
+};
};
};
};
+
+&mdio {
+ status = "okay";
+
+ ethphy0: ethernet-phy@0 {
+ device_type = "ethernet-phy";
+ reg = <0>;
+ };
+};
+
+ð0 {
+ status = "okay";
+ ethernet0-port@0 {
+ phy-handle = <ðphy0>;
+ };
+};
};
};
};
+
+&mdio {
+ status = "okay";
+
+ ethphy0: ethernet-phy@0 {
+ device_type = "ethernet-phy";
+ reg = <0>;
+ };
+};
+
+ð0 {
+ status = "okay";
+ ethernet0-port@0 {
+ phy-handle = <ðphy0>;
+ };
+};
gpios = <&gpio0 16 1>;
};
};
-};
\ No newline at end of file
+};
+
+ðphy0 { reg = <8>; };
gpios = <&gpio1 5 1>;
};
};
-};
\ No newline at end of file
+};
+
+ðphy0 { reg = <0>; };
};
};
};
+
+&mdio {
+ status = "okay";
+
+ ethphy0: ethernet-phy {
+ device_type = "ethernet-phy";
+ /* overwrite reg property in board file */
+ };
+};
+
+ð0 {
+ status = "okay";
+ ethernet0-port@0 {
+ phy-handle = <ðphy0>;
+ };
+};
gpio0 = &gpio0;
gpio1 = &gpio1;
};
- intc: interrupt-controller {
- compatible = "marvell,orion-intc", "marvell,intc";
- interrupt-controller;
- #interrupt-cells = <1>;
- reg = <0xf1020204 0x04>,
- <0xf1020214 0x04>;
- };
ocp@f1000000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
+ timer: timer@20300 {
+ compatible = "marvell,orion-timer";
+ reg = <0x20300 0x20>;
+ interrupt-parent = <&bridge_intc>;
+ interrupts = <1>, <2>;
+ clocks = <&core_clk 0>;
+ };
+
+ intc: main-interrupt-ctrl@20200 {
+ compatible = "marvell,orion-intc";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ reg = <0x20200 0x10>, <0x20210 0x10>;
+ };
+
+ bridge_intc: bridge-interrupt-ctrl@20110 {
+ compatible = "marvell,orion-bridge-intc";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ reg = <0x20110 0x8>;
+ interrupts = <1>;
+ marvell,#interrupts = <6>;
+ };
+
core_clk: core-clocks@10030 {
compatible = "marvell,kirkwood-core-clock";
reg = <0x10030 0x4>;
#clock-cells = <1>;
};
- wdt@20300 {
+ wdt: watchdog-timer@20300 {
compatible = "marvell,orion-wdt";
reg = <0x20300 0x28>;
+ interrupt-parent = <&bridge_intc>;
+ interrupts = <3>;
clocks = <&gate_clk 7>;
status = "okay";
};
clocks = <&gate_clk 17>;
status = "okay";
};
+
+ mdio: mdio-bus@72004 {
+ compatible = "marvell,orion-mdio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x72004 0x84>;
+ interrupts = <46>;
+ clocks = <&gate_clk 0>;
+ status = "disabled";
+
+ /* add phy nodes in board file */
+ };
+
+ eth0: ethernet-controller@72000 {
+ compatible = "marvell,kirkwood-eth";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x72000 0x4000>;
+ clocks = <&gate_clk 0>;
+ marvell,tx-checksum-limit = <1600>;
+ status = "disabled";
+
+ ethernet0-port@0 {
+ device_type = "network";
+ compatible = "marvell,kirkwood-eth-port";
+ reg = <0>;
+ interrupts = <11>;
+ /* overwrite MAC address in bootloader */
+ local-mac-address = [00 00 00 00 00 00];
+ /* set phy-handle property in board file */
+ };
+ };
+
+ eth1: ethernet-controller@76000 {
+ compatible = "marvell,kirkwood-eth";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x76000 0x4000>;
+ clocks = <&gate_clk 19>;
+ marvell,tx-checksum-limit = <1600>;
+ status = "disabled";
+
+ ethernet1-port@0 {
+ device_type = "network";
+ compatible = "marvell,kirkwood-eth-port";
+ reg = <0>;
+ interrupts = <15>;
+ /* overwrite MAC address in bootloader */
+ local-mac-address = [00 00 00 00 00 00];
+ /* set phy-handle property in board file */
+ };
+ };
};
};
};
};
};
+
+&mdio {
+ status = "okay";
+
+ ethphy: ethernet-phy {
+ device-type = "ethernet-phy";
+ reg = <8>;
+ };
+};
+
+ð {
+ status = "okay";
+
+ ethernet-port@0 {
+ phy-handle = <ðphy>;
+ };
+};
aliases {
gpio0 = &gpio0;
};
+
intc: interrupt-controller {
- compatible = "marvell,orion-intc", "marvell,intc";
+ compatible = "marvell,orion-intc";
interrupt-controller;
#interrupt-cells = <1>;
- reg = <0xf1020204 0x04>;
+ reg = <0xf1020200 0x08>;
};
ocp@f1000000 {
interrupts = <28>;
status = "okay";
};
+
+ mdio: mdio-bus@72004 {
+ compatible = "marvell,orion-mdio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x72004 0x84>;
+ interrupts = <22>;
+ status = "disabled";
+
+ /* add phy nodes in board file */
+ };
+
+ eth: ethernet-controller@72000 {
+ compatible = "marvell,orion-eth";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x72000 0x4000>;
+ marvell,tx-checksum-limit = <1600>;
+ status = "disabled";
+
+ ethernet-port@0 {
+ device_type = "network";
+ compatible = "marvell,orion-eth-port";
+ reg = <0>;
+ /* overwrite MAC address in bootloader */
+ local-mac-address = [00 00 00 00 00 00];
+ /* set phy-handle property in board file */
+ };
+ };
};
};
};
};
};
+
+&i2c5 {
+ vdd_dvfs: max8973@1b {
+ compatible = "maxim,max8973";
+ reg = <0x1b>;
+
+ regulator-min-microvolt = <935000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+};
+
+&cpu0 {
+ cpu0-supply = <&vdd_dvfs>;
+ operating-points = <
+ /* kHz uV */
+ 1950000 1115000
+ 1462500 995000
+ >;
+ voltage-tolerance = <1>; /* 1% */
+};
interrupt-parent = <&gic>;
interrupts = <0 69 4>;
};
+
+ i2c0: i2c@e6500000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,rmobile-iic";
+ reg = <0 0xe6500000 0 0x428>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 174 0x4>;
+ };
+
+ i2c1: i2c@e6510000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,rmobile-iic";
+ reg = <0 0xe6510000 0 0x428>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 175 0x4>;
+ };
+
+ i2c2: i2c@e6520000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,rmobile-iic";
+ reg = <0 0xe6520000 0 0x428>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 176 0x4>;
+ };
+
+ i2c3: i2c@e6530000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,rmobile-iic";
+ reg = <0 0xe6530000 0 0x428>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 177 0x4>;
+ };
+
+ i2c4: i2c@e6540000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,rmobile-iic";
+ reg = <0 0xe6540000 0 0x428>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 178 0x4>;
+ };
+
+ i2c5: i2c@e60b0000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,rmobile-iic";
+ reg = <0 0xe60b0000 0 0x428>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 179 0x4>;
+ };
+
+ i2c6: i2c@e6550000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,rmobile-iic";
+ reg = <0 0xe6550000 0 0x428>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 184 0x4>;
+ };
+
+ i2c7: i2c@e6560000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,rmobile-iic";
+ reg = <0 0xe6560000 0 0x428>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 185 0x4>;
+ };
+
+ i2c8: i2c@e6570000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,rmobile-iic";
+ reg = <0 0xe6570000 0 0x428>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 173 0x4>;
+ };
+
+ mmcif0: mmcif@ee200000 {
+ compatible = "renesas,sh-mmcif";
+ reg = <0 0xee200000 0 0x80>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 169 0x4>;
+ reg-io-width = <4>;
+ status = "disabled";
+ };
+
+ mmcif1: mmcif@ee220000 {
+ compatible = "renesas,sh-mmcif";
+ reg = <0 0xee220000 0 0x80>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 170 0x4>;
+ reg-io-width = <4>;
+ status = "disabled";
+ };
+
+ sdhi0: sdhi@ee100000 {
+ compatible = "renesas,r8a73a4-sdhi";
+ reg = <0 0xee100000 0 0x100>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 165 4>;
+ cap-sd-highspeed;
+ status = "disabled";
+ };
+
+ sdhi1: sdhi@ee120000 {
+ compatible = "renesas,r8a73a4-sdhi";
+ reg = <0 0xee120000 0 0x100>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 166 4>;
+ cap-sd-highspeed;
+ status = "disabled";
+ };
+
+ sdhi2: sdhi@ee140000 {
+ compatible = "renesas,r8a73a4-sdhi";
+ reg = <0 0xee140000 0 0x100>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 167 4>;
+ cap-sd-highspeed;
+ status = "disabled";
+ };
};
interrupt-parent = <&gic>;
interrupts = <0 0 4>, <0 1 4>, <0 2 4>, <0 3 4>;
};
+
+ mmcif0: mmcif@ee200000 {
+ compatible = "renesas,sh-mmcif";
+ reg = <0 0xee200000 0 0x80>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 169 0x4>;
+ reg-io-width = <4>;
+ status = "disabled";
+ };
+
+ mmcif1: mmcif@ee220000 {
+ compatible = "renesas,sh-mmcif";
+ reg = <0 0xee220000 0 0x80>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 170 0x4>;
+ reg-io-width = <4>;
+ status = "disabled";
+ };
+
+ sdhi0: sdhi@ee100000 {
+ compatible = "renesas,r8a7790-sdhi";
+ reg = <0 0xee100000 0 0x100>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 165 4>;
+ cap-sd-highspeed;
+ status = "disabled";
+ };
+
+ sdhi1: sdhi@ee120000 {
+ compatible = "renesas,r8a7790-sdhi";
+ reg = <0 0xee120000 0 0x100>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 166 4>;
+ cap-sd-highspeed;
+ status = "disabled";
+ };
+
+ sdhi2: sdhi@ee140000 {
+ compatible = "renesas,r8a7790-sdhi";
+ reg = <0 0xee140000 0 0x100>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 167 4>;
+ cap-sd-highspeed;
+ status = "disabled";
+ };
+
+ sdhi3: sdhi@ee160000 {
+ compatible = "renesas,r8a7790-sdhi";
+ reg = <0 0xee160000 0 0x100>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 168 4>;
+ cap-sd-highspeed;
+ status = "disabled";
+ };
};
CONFIG_SMC91X=y
CONFIG_SMSC911X=y
# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_KEYBOARD is not set
+CONFIG_INPUT_EVDEV=y
+CONFIG_KEYBOARD_GPIO=y
# CONFIG_INPUT_MOUSE is not set
# CONFIG_SERIO is not set
CONFIG_SERIAL_NONSTANDARD=y
CONFIG_REGULATOR_GPIO=y
# CONFIG_HID is not set
# CONFIG_USB_SUPPORT is not set
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_GPIO=y
# CONFIG_IOMMU_SUPPORT is not set
# CONFIG_DNOTIFY is not set
CONFIG_TMPFS=y
# CONFIG_BLK_DEV_BSG is not set
CONFIG_ARCH_KIRKWOOD=y
CONFIG_MACH_D2NET_V2=y
-CONFIG_MACH_DB88F6281_BP=y
-CONFIG_MACH_DOCKSTAR=y
-CONFIG_MACH_ESATA_SHEEVAPLUG=y
-CONFIG_MACH_GURUPLUG=y
-CONFIG_MACH_INETSPACE_V2=y
-CONFIG_MACH_MV88F6281GTW_GE=y
CONFIG_MACH_NET2BIG_V2=y
CONFIG_MACH_NET5BIG_V2=y
-CONFIG_MACH_NETSPACE_MAX_V2=y
-CONFIG_MACH_NETSPACE_V2=y
CONFIG_MACH_OPENRD_BASE=y
CONFIG_MACH_OPENRD_CLIENT=y
CONFIG_MACH_OPENRD_ULTIMATE=y
CONFIG_MACH_RD88F6192_NAS=y
CONFIG_MACH_RD88F6281=y
-CONFIG_MACH_SHEEVAPLUG=y
CONFIG_MACH_T5325=y
CONFIG_MACH_TS219=y
CONFIG_MACH_TS41X=y
-CONFIG_MACH_CLOUDBOX_DT=y
-CONFIG_MACH_DB88F628X_BP_DT=y
-CONFIG_MACH_DLINK_KIRKWOOD_DT=y
-CONFIG_MACH_DOCKSTAR_DT=y
-CONFIG_MACH_DREAMPLUG_DT=y
-CONFIG_MACH_GOFLEXNET_DT=y
-CONFIG_MACH_GURUPLUG_DT=y
-CONFIG_MACH_IB62X0_DT=y
-CONFIG_MACH_ICONNECT_DT=y
-CONFIG_MACH_INETSPACE_V2_DT=y
-CONFIG_MACH_IOMEGA_IX2_200_DT=y
-CONFIG_MACH_KM_KIRKWOOD_DT=y
-CONFIG_MACH_LSXL_DT=y
-CONFIG_MACH_MPLCEC4_DT=y
-CONFIG_MACH_NETSPACE_LITE_V2_DT=y
-CONFIG_MACH_NETSPACE_MAX_V2_DT=y
-CONFIG_MACH_NETSPACE_MINI_V2_DT=y
-CONFIG_MACH_NETSPACE_V2_DT=y
-CONFIG_MACH_NSA310_DT=y
-CONFIG_MACH_OPENBLOCKS_A6_DT=y
-CONFIG_MACH_READYNAS_DT=y
-CONFIG_MACH_SHEEVAPLUG_DT=y
-CONFIG_MACH_TOPKICK_DT=y
-CONFIG_MACH_TS219_DT=y
+CONFIG_ARCH_KIRKWOOD_DT=y
+CONFIG_MACH_MV88F6281GTW_GE_DT=y
# CONFIG_CPU_FEROCEON_OLD_ID is not set
CONFIG_PCI_MVEBU=y
CONFIG_PREEMPT=y
CONFIG_SATA_AHCI=y
CONFIG_SATA_MV=y
CONFIG_NETDEVICES=y
-CONFIG_MII=y
CONFIG_NET_DSA_MV88E6123_61_65=y
CONFIG_MV643XX_ETH=y
CONFIG_R8169=y
CONFIG_SENSORS_LM75=y
CONFIG_SENSORS_LM85=y
CONFIG_THERMAL=y
-CONFIG_KIRKWOOD_THERMAL=y
CONFIG_WATCHDOG=y
CONFIG_ORION_WATCHDOG=y
CONFIG_HID_DRAGONRISE=y
CONFIG_NLS_ISO8859_1=y
CONFIG_NLS_ISO8859_2=y
CONFIG_NLS_UTF8=y
-CONFIG_MAGIC_SYSRQ=y
+CONFIG_DEBUG_INFO=y
CONFIG_DEBUG_FS=y
+CONFIG_MAGIC_SYSRQ=y
CONFIG_DEBUG_KERNEL=y
# CONFIG_SCHED_DEBUG is not set
# CONFIG_DEBUG_PREEMPT is not set
-CONFIG_DEBUG_INFO=y
# CONFIG_FTRACE is not set
CONFIG_DEBUG_USER=y
CONFIG_DEBUG_LL=y
--- /dev/null
+CONFIG_SYSVIPC=y
+CONFIG_NO_HZ=y
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=16
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_EMBEDDED=y
+CONFIG_PERF_EVENTS=y
+CONFIG_SLAB=y
+# CONFIG_LBDAF is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_IOSCHED_DEADLINE is not set
+# CONFIG_IOSCHED_CFQ is not set
+CONFIG_ARCH_SHMOBILE=y
+CONFIG_ARCH_R8A7790=y
+CONFIG_MACH_LAGER=y
+# CONFIG_SH_TIMER_TMU is not set
+# CONFIG_EM_TIMER_STI is not set
+CONFIG_ARM_ERRATA_430973=y
+CONFIG_ARM_ERRATA_458693=y
+CONFIG_ARM_ERRATA_460075=y
+CONFIG_ARM_ERRATA_743622=y
+CONFIG_ARM_ERRATA_754322=y
+CONFIG_HAVE_ARM_ARCH_TIMER=y
+CONFIG_AEABI=y
+# CONFIG_OABI_COMPAT is not set
+CONFIG_FORCE_MAX_ZONEORDER=13
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_ARM_APPENDED_DTB=y
+CONFIG_KEXEC=y
+CONFIG_AUTO_ZRELADDR=y
+CONFIG_VFP=y
+CONFIG_NEON=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_PM_RUNTIME=y
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+# CONFIG_INET_DIAG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_WIRELESS is not set
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_NETDEVICES=y
+# CONFIG_NET_CORE is not set
+# CONFIG_NET_VENDOR_ARC is not set
+# CONFIG_NET_CADENCE is not set
+# CONFIG_NET_VENDOR_BROADCOM is not set
+# CONFIG_NET_VENDOR_CIRRUS is not set
+# CONFIG_NET_VENDOR_FARADAY is not set
+# CONFIG_NET_VENDOR_INTEL is not set
+# CONFIG_NET_VENDOR_MARVELL is not set
+# CONFIG_NET_VENDOR_MICREL is not set
+# CONFIG_NET_VENDOR_NATSEMI is not set
+CONFIG_SH_ETH=y
+# CONFIG_NET_VENDOR_SEEQ is not set
+# CONFIG_NET_VENDOR_SMSC is not set
+# CONFIG_NET_VENDOR_STMICRO is not set
+# CONFIG_NET_VENDOR_VIA is not set
+# CONFIG_NET_VENDOR_WIZNET is not set
+# CONFIG_WLAN is not set
+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_KEYBOARD_ATKBD is not set
+CONFIG_KEYBOARD_GPIO=y
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_SERIO is not set
+# CONFIG_LEGACY_PTYS is not set
+CONFIG_SERIAL_SH_SCI=y
+CONFIG_SERIAL_SH_SCI_NR_UARTS=10
+CONFIG_SERIAL_SH_SCI_CONSOLE=y
+# CONFIG_HW_RANDOM is not set
+CONFIG_I2C=y
+CONFIG_I2C_GPIO=y
+CONFIG_I2C_SH_MOBILE=y
+CONFIG_GPIO_SH_PFC=y
+CONFIG_GPIOLIB=y
+CONFIG_GPIO_RCAR=y
+# CONFIG_HWMON is not set
+CONFIG_THERMAL=y
+CONFIG_RCAR_THERMAL=y
+CONFIG_REGULATOR=y
+CONFIG_REGULATOR_FIXED_VOLTAGE=y
+# CONFIG_USB_SUPPORT is not set
+CONFIG_MMC=y
+CONFIG_MMC_SDHI=y
+CONFIG_MMC_SH_MMCIF=y
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_GPIO=y
+CONFIG_RTC_CLASS=y
+CONFIG_DMADEVICES=y
+CONFIG_SH_DMAE=y
+# CONFIG_IOMMU_SUPPORT is not set
+# CONFIG_DNOTIFY is not set
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_TMPFS=y
+CONFIG_CONFIGFS_FS=y
+# CONFIG_MISC_FILESYSTEMS is not set
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3_ACL=y
+CONFIG_NFS_V4=y
+CONFIG_NFS_V4_1=y
+CONFIG_ROOT_NFS=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_ISO8859_1=y
+# CONFIG_ENABLE_WARN_DEPRECATED is not set
+# CONFIG_ENABLE_MUST_CHECK is not set
+# CONFIG_ARM_UNWIND is not set
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+# CONFIG_CRYPTO_HW is not set
CONFIG_HIGHMEM=y
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_ARM_APPENDED_DTB=y
CONFIG_CMDLINE="console=ttySC2,115200 earlyprintk=sh-sci.2,115200 ignore_loglevel root=/dev/nfs ip=on"
CONFIG_CMDLINE_FORCE=y
CONFIG_KEXEC=y
config MACH_DOVE_DT
bool "Marvell Dove Flattened Device Tree"
select DOVE_CLK
+ select ORION_IRQCHIP
+ select ORION_TIMER
select REGULATOR
select REGULATOR_FIXED_VOLTAGE
select USE_OF
-obj-y += common.o irq.o
-obj-$(CONFIG_DOVE_LEGACY) += mpp.o
+obj-y += common.o
+obj-$(CONFIG_DOVE_LEGACY) += irq.o mpp.o
obj-$(CONFIG_PCI) += pcie.o
obj-$(CONFIG_MACH_DOVE_DB) += dove-db-setup.o
obj-$(CONFIG_MACH_DOVE_DT) += board-dt.o
#include <linux/init.h>
#include <linux/clk-provider.h>
+#include <linux/clocksource.h>
+#include <linux/irqchip.h>
#include <linux/of.h>
#include <linux/of_platform.h>
#include <linux/platform_data/usb-ehci-orion.h>
#include <asm/hardware/cache-tauros2.h>
#include <asm/mach/arch.h>
+#include <mach/dove.h>
#include <mach/pm.h>
#include <plat/common.h>
#include <plat/irq.h>
clkspec.np = np;
clkspec.args_count = 1;
- clkspec.args[0] = CLOCK_GATING_BIT_GBE;
- orion_clkdev_add(NULL, "mv643xx_eth_port.0",
- of_clk_get_from_provider(&clkspec));
-
clkspec.args[0] = CLOCK_GATING_BIT_PCIE0;
orion_clkdev_add("0", "pcie",
of_clk_get_from_provider(&clkspec));
of_clk_get_from_provider(&clkspec));
}
-static void __init dove_of_clk_init(void)
+static void __init dove_dt_time_init(void)
{
of_clk_init(NULL);
- dove_legacy_clk_init();
+ clocksource_of_init();
}
-static struct mv643xx_eth_platform_data dove_dt_ge00_data = {
- .phy_addr = MV643XX_ETH_PHY_ADDR_DEFAULT,
-};
+static void __init dove_dt_init_early(void)
+{
+ mvebu_mbus_init("marvell,dove-mbus",
+ BRIDGE_WINS_BASE, BRIDGE_WINS_SZ,
+ DOVE_MC_WINS_BASE, DOVE_MC_WINS_SZ);
+}
static void __init dove_dt_init(void)
{
#endif
dove_setup_cpu_wins();
- /* Setup root of clk tree */
- dove_of_clk_init();
+ /* Setup clocks for legacy devices */
+ dove_legacy_clk_init();
/* Internal devices not ported to DT yet */
- dove_ge00_init(&dove_dt_ge00_data);
dove_pcie_init(1, 1);
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
DT_MACHINE_START(DOVE_DT, "Marvell Dove (Flattened Device Tree)")
.map_io = dove_map_io,
- .init_early = dove_init_early,
- .init_irq = orion_dt_init_irq,
- .init_time = dove_timer_init,
+ .init_early = dove_dt_init_early,
+ .init_time = dove_dt_time_init,
.init_machine = dove_dt_init,
.restart = dove_restart,
.dt_compat = dove_dt_board_compat,
menu "Marvell Kirkwood Implementations"
+config KIRKWOOD_LEGACY
+ bool
+
config MACH_D2NET_V2
bool "LaCie d2 Network v2 NAS Board"
+ select KIRKWOOD_LEGACY
help
Say 'Y' here if you want your kernel to support the
LaCie d2 Network v2 NAS.
-config MACH_DOCKSTAR
- bool "Seagate FreeAgent DockStar"
- help
- Say 'Y' here if you want your kernel to support the
- Seagate FreeAgent DockStar.
-
-config MACH_ESATA_SHEEVAPLUG
- bool "Marvell eSATA SheevaPlug Reference Board"
- help
- Say 'Y' here if you want your kernel to support the
- Marvell eSATA SheevaPlug Reference Board.
-
-config MACH_GURUPLUG
- bool "Marvell GuruPlug Reference Board"
- help
- Say 'Y' here if you want your kernel to support the
- Marvell GuruPlug Reference Board.
-
-config MACH_INETSPACE_V2
- bool "LaCie Internet Space v2 NAS Board"
- help
- Say 'Y' here if you want your kernel to support the
- LaCie Internet Space v2 NAS.
-
-config MACH_MV88F6281GTW_GE
- bool "Marvell 88F6281 GTW GE Board"
- help
- Say 'Y' here if you want your kernel to support the
- Marvell 88F6281 GTW GE Board.
-
config MACH_NET2BIG_V2
bool "LaCie 2Big Network v2 NAS Board"
+ select KIRKWOOD_LEGACY
help
Say 'Y' here if you want your kernel to support the
LaCie 2Big Network v2 NAS.
config MACH_NET5BIG_V2
bool "LaCie 5Big Network v2 NAS Board"
+ select KIRKWOOD_LEGACY
help
Say 'Y' here if you want your kernel to support the
LaCie 5Big Network v2 NAS.
-config MACH_NETSPACE_MAX_V2
- bool "LaCie Network Space Max v2 NAS Board"
- help
- Say 'Y' here if you want your kernel to support the
- LaCie Network Space Max v2 NAS.
-
-config MACH_NETSPACE_V2
- bool "LaCie Network Space v2 NAS Board"
- help
- Say 'Y' here if you want your kernel to support the
- LaCie Network Space v2 NAS.
-
config MACH_OPENRD
+ select KIRKWOOD_LEGACY
bool
config MACH_OPENRD_BASE
config MACH_RD88F6192_NAS
bool "Marvell RD-88F6192-NAS Reference Board"
+ select KIRKWOOD_LEGACY
help
Say 'Y' here if you want your kernel to support the
Marvell RD-88F6192-NAS Reference Board.
config MACH_RD88F6281
bool "Marvell RD-88F6281 Reference Board"
+ select KIRKWOOD_LEGACY
help
Say 'Y' here if you want your kernel to support the
Marvell RD-88F6281 Reference Board.
-config MACH_SHEEVAPLUG
- bool "Marvell SheevaPlug Reference Board"
- help
- Say 'Y' here if you want your kernel to support the
- Marvell SheevaPlug Reference Board.
-
config MACH_T5325
bool "HP t5325 Thin Client"
+ select KIRKWOOD_LEGACY
help
Say 'Y' here if you want your kernel to support the
HP t5325 Thin Client.
config MACH_TS219
bool "QNAP TS-110, TS-119, TS-119P+, TS-210, TS-219, TS-219P and TS-219P+ Turbo NAS"
+ select KIRKWOOD_LEGACY
help
Say 'Y' here if you want your kernel to support the
QNAP TS-110, TS-119, TS-119P+, TS-210, TS-219, TS-219P and
config MACH_TS41X
bool "QNAP TS-410, TS-410U, TS-419P, TS-419P+ and TS-419U Turbo NAS"
+ select KIRKWOOD_LEGACY
help
Say 'Y' here if you want your kernel to support the
QNAP TS-410, TS-410U, TS-419P, TS-419P+ and TS-419U Turbo
config ARCH_KIRKWOOD_DT
bool "Marvell Kirkwood Flattened Device Tree"
select KIRKWOOD_CLK
+ select OF_IRQ
+ select ORION_IRQCHIP
+ select ORION_TIMER
select POWER_SUPPLY
select POWER_RESET
select POWER_RESET_GPIO
Say 'Y' here if you want your kernel to support the
Marvell Kirkwood using flattened device tree.
-config MACH_CLOUDBOX_DT
- bool "LaCie CloudBox NAS (Flattened Device Tree)"
- select ARCH_KIRKWOOD_DT
- help
- Say 'Y' here if you want your kernel to support the LaCie
- CloudBox NAS, using Flattened Device Tree.
-
-config MACH_DB88F628X_BP_DT
- bool "Marvell DB-88F628x-BP Development Board (Flattened Device Tree)"
- help
- Say 'Y' here if you want your kernel to support the Marvell
- DB-88F6281-BP and DB-88F6282-BP Development Board (Flattened
- Device Tree).
-
-config MACH_DLINK_KIRKWOOD_DT
- bool "D-Link Kirkwood-based NAS (Flattened Device Tree)"
- select ARCH_KIRKWOOD_DT
- help
- Say 'Y' here if you want your kernel to support the
- Kirkwood-based D-Link NASes such as DNS-320 & DNS-325,
- using Flattened Device Tree.
-
-config MACH_DOCKSTAR_DT
- bool "Seagate FreeAgent Dockstar (Flattened Device Tree)"
- select ARCH_KIRKWOOD_DT
+config MACH_MV88F6281GTW_GE_DT
+ bool "Marvell 88F6281 GTW GE Board (Flattened Device Tree)"
+ depends on ARCH_KIRKWOOD_DT
help
Say 'Y' here if you want your kernel to support the
- Seagate FreeAgent Dockstar (Flattened Device Tree).
-
-config MACH_DREAMPLUG_DT
- bool "Marvell DreamPlug (Flattened Device Tree)"
- select ARCH_KIRKWOOD_DT
- help
- Say 'Y' here if you want your kernel to support the
- Marvell DreamPlug (Flattened Device Tree).
-
-config MACH_GOFLEXNET_DT
- bool "Seagate GoFlex Net (Flattened Device Tree)"
- select ARCH_KIRKWOOD_DT
- help
- Say 'Y' here if you want your kernel to support the
- Seagate GoFlex Net (Flattened Device Tree).
-
-config MACH_GURUPLUG_DT
- bool "Marvell GuruPlug Reference Board (Flattened Device Tree)"
- select ARCH_KIRKWOOD_DT
- help
- Say 'Y' here if you want your kernel to support the
- Marvell GuruPlug Reference Board (Flattened Device Tree).
-
-config MACH_IB62X0_DT
- bool "RaidSonic IB-NAS6210, IB-NAS6220 (Flattened Device Tree)"
- select ARCH_KIRKWOOD_DT
- help
- Say 'Y' here if you want your kernel to support the
- RaidSonic IB-NAS6210 & IB-NAS6220 devices, using
- Flattened Device Tree.
-
-config MACH_ICONNECT_DT
- bool "Iomega Iconnect (Flattened Device Tree)"
- select ARCH_KIRKWOOD_DT
- help
- Say 'Y' here to enable Iomega Iconnect support.
-
-config MACH_INETSPACE_V2_DT
- bool "LaCie Internet Space v2 NAS (Flattened Device Tree)"
- select ARCH_KIRKWOOD_DT
- help
- Say 'Y' here if you want your kernel to support the LaCie
- Internet Space v2 NAS, using Flattened Device Tree.
-
-config MACH_IOMEGA_IX2_200_DT
- bool "Iomega StorCenter ix2-200 (Flattened Device Tree)"
- select ARCH_KIRKWOOD_DT
- help
- Say 'Y' here if you want your kernel to support the
- Iomega StorCenter ix2-200 (Flattened Device Tree).
-
-config MACH_KM_KIRKWOOD_DT
- bool "Keymile Kirkwood Reference Design (Flattened Device Tree)"
- select ARCH_KIRKWOOD_DT
- help
- Say 'Y' here if you want your kernel to support the
- Keymile Kirkwood Reference Desgin, using Flattened Device Tree.
-
-config MACH_LSXL_DT
- bool "Buffalo Linkstation LS-XHL, LS-CHLv2 (Flattened Device Tree)"
- select ARCH_KIRKWOOD_DT
- select POWER_RESET_RESTART
- help
- Say 'Y' here if you want your kernel to support the
- Buffalo Linkstation LS-XHL & LS-CHLv2 devices, using
- Flattened Device Tree.
-
-config MACH_MPLCEC4_DT
- bool "MPL CEC4 (Flattened Device Tree)"
- select ARCH_KIRKWOOD_DT
- help
- Say 'Y' here if you want your kernel to support the
- MPL CEC4 (Flattened Device Tree).
-
-config MACH_NETSPACE_LITE_V2_DT
- bool "LaCie Network Space Lite v2 NAS (Flattened Device Tree)"
- select ARCH_KIRKWOOD_DT
- help
- Say 'Y' here if you want your kernel to support the LaCie
- Network Space Lite v2 NAS, using Flattened Device Tree.
-
-config MACH_NETSPACE_MAX_V2_DT
- bool "LaCie Network Space Max v2 NAS (Flattened Device Tree)"
- select ARCH_KIRKWOOD_DT
- help
- Say 'Y' here if you want your kernel to support the LaCie
- Network Space Max v2 NAS, using Flattened Device Tree.
-
-config MACH_NETSPACE_MINI_V2_DT
- bool "LaCie Network Space Mini v2 NAS (Flattened Device Tree)"
- select ARCH_KIRKWOOD_DT
- help
- Say 'Y' here if you want your kernel to support the LaCie
- Network Space Mini v2 NAS using Flattened Device Tree.
-
- This board is embedded in a product named CloudBox, which
- provides automatic backup on a 100GB cloud storage. This
- should not confused with a more recent LaCie NAS also named
- CloudBox. For this last, the disk capacity is 1TB or above.
-
-config MACH_NETSPACE_V2_DT
- bool "LaCie Network Space v2 NAS (Flattened Device Tree)"
- select ARCH_KIRKWOOD_DT
- help
- Say 'Y' here if you want your kernel to support the LaCie
- Network Space v2 NAS, using Flattened Device Tree.
-
-config MACH_OPENBLOCKS_A6_DT
- bool "Plat'Home OpenBlocks A6 (Flattened Device Tree)"
- select ARCH_KIRKWOOD_DT
- help
- Say 'Y' here if you want your kernel to support the
- Plat'Home OpenBlocks A6 (Flattened Device Tree).
-
-config MACH_READYNAS_DT
- bool "NETGEAR ReadyNAS Duo v2 (Flattened Device Tree)"
- select ARCH_KIRKWOOD_DT
- select ARM_APPENDED_DTB
- select ARM_ATAG_DTB_COMPAT
- help
- Say 'Y' here if you want your kernel to support the
- NETGEAR ReadyNAS Duo v2 using Fattened Device Tree.
-
-config MACH_SHEEVAPLUG_DT
- bool "Marvell (eSATA) SheevaPlug (Flattened Device Tree)"
- select ARCH_KIRKWOOD_DT
- help
- Say 'Y' here if you want your kernel to support the
- Marvell (eSATA) SheevaPlug (Flattened Device Tree).
-
-config MACH_TOPKICK_DT
- bool "USI Topkick (Flattened Device Tree)"
- select ARCH_KIRKWOOD_DT
- help
- Say 'Y' here if you want your kernel to support the
- USI Topkick, using Flattened Device Tree
-
-config MACH_TS219_DT
- bool "Device Tree for QNAP TS-11X, TS-21X NAS"
- select ARCH_KIRKWOOD_DT
- select ARM_APPENDED_DTB
- select ARM_ATAG_DTB_COMPAT
- select POWER_RESET_QNAP
- help
- Say 'Y' here if you want your kernel to support the QNAP
- TS-110, TS-119, TS-119P+, TS-210, TS-219, TS-219P and
- TS-219P+ Turbo NAS devices using Fattened Device Tree.
- There are two different Device Tree descriptions, depending
- on if the device is based on an if the board uses the MV6281
- or MV6282. If you have the wrong one, the buttons will not
- work.
+ Marvell 88F6281 GTW GE Board (Flattened Device Tree).
endmenu
-obj-y += common.o irq.o pcie.o mpp.o
-
+obj-y += common.o pcie.o
+obj-$(CONFIG_KIRKWOOD_LEGACY) += irq.o mpp.o
obj-$(CONFIG_MACH_D2NET_V2) += d2net_v2-setup.o lacie_v2-common.o
-obj-$(CONFIG_MACH_DOCKSTAR) += dockstar-setup.o
-obj-$(CONFIG_MACH_ESATA_SHEEVAPLUG) += sheevaplug-setup.o
-obj-$(CONFIG_MACH_GURUPLUG) += guruplug-setup.o
-obj-$(CONFIG_MACH_INETSPACE_V2) += netspace_v2-setup.o lacie_v2-common.o
-obj-$(CONFIG_MACH_MV88F6281GTW_GE) += mv88f6281gtw_ge-setup.o
obj-$(CONFIG_MACH_NET2BIG_V2) += netxbig_v2-setup.o lacie_v2-common.o
obj-$(CONFIG_MACH_NET5BIG_V2) += netxbig_v2-setup.o lacie_v2-common.o
-obj-$(CONFIG_MACH_NETSPACE_MAX_V2) += netspace_v2-setup.o lacie_v2-common.o
-obj-$(CONFIG_MACH_NETSPACE_V2) += netspace_v2-setup.o lacie_v2-common.o
obj-$(CONFIG_MACH_OPENRD) += openrd-setup.o
obj-$(CONFIG_MACH_RD88F6192_NAS) += rd88f6192-nas-setup.o
obj-$(CONFIG_MACH_RD88F6281) += rd88f6281-setup.o
-obj-$(CONFIG_MACH_SHEEVAPLUG) += sheevaplug-setup.o
obj-$(CONFIG_MACH_T5325) += t5325-setup.o
obj-$(CONFIG_MACH_TS219) += ts219-setup.o tsx1x-common.o
obj-$(CONFIG_MACH_TS41X) += ts41x-setup.o tsx1x-common.o
obj-$(CONFIG_ARCH_KIRKWOOD_DT) += board-dt.o
-obj-$(CONFIG_MACH_CLOUDBOX_DT) += board-ns2.o
-obj-$(CONFIG_MACH_DB88F628X_BP_DT) += board-db88f628x-bp.o
-obj-$(CONFIG_MACH_DLINK_KIRKWOOD_DT) += board-dnskw.o
-obj-$(CONFIG_MACH_DOCKSTAR_DT) += board-dockstar.o
-obj-$(CONFIG_MACH_DREAMPLUG_DT) += board-dreamplug.o
-obj-$(CONFIG_MACH_GOFLEXNET_DT) += board-goflexnet.o
-obj-$(CONFIG_MACH_GURUPLUG_DT) += board-guruplug.o
-obj-$(CONFIG_MACH_IB62X0_DT) += board-ib62x0.o
-obj-$(CONFIG_MACH_ICONNECT_DT) += board-iconnect.o
-obj-$(CONFIG_MACH_INETSPACE_V2_DT) += board-ns2.o
-obj-$(CONFIG_MACH_IOMEGA_IX2_200_DT) += board-iomega_ix2_200.o
-obj-$(CONFIG_MACH_KM_KIRKWOOD_DT) += board-km_kirkwood.o
-obj-$(CONFIG_MACH_LSXL_DT) += board-lsxl.o
-obj-$(CONFIG_MACH_MPLCEC4_DT) += board-mplcec4.o
-obj-$(CONFIG_MACH_NETSPACE_LITE_V2_DT) += board-ns2.o
-obj-$(CONFIG_MACH_NETSPACE_MAX_V2_DT) += board-ns2.o
-obj-$(CONFIG_MACH_NETSPACE_MINI_V2_DT) += board-ns2.o
-obj-$(CONFIG_MACH_NETSPACE_V2_DT) += board-ns2.o
-obj-$(CONFIG_MACH_OPENBLOCKS_A6_DT) += board-openblocks_a6.o
-obj-$(CONFIG_MACH_READYNAS_DT) += board-readynas.o
-obj-$(CONFIG_MACH_SHEEVAPLUG_DT) += board-sheevaplug.o
-obj-$(CONFIG_MACH_TOPKICK_DT) += board-usi_topkick.o
-obj-$(CONFIG_MACH_TS219_DT) += board-ts219.o tsx1x-common.o
+obj-$(CONFIG_MACH_MV88F6281GTW_GE_DT) += board-mv88f6281gtw_ge.o
+++ /dev/null
-/*
- * Saeed Bishara <saeed@marvell.com>
- *
- * Marvell DB-88F628{1,2}-BP Development Board Setup
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/of.h>
-#include <linux/mv643xx_eth.h>
-#include "common.h"
-
-static struct mv643xx_eth_platform_data db88f628x_ge00_data = {
- .phy_addr = MV643XX_ETH_PHY_ADDR(8),
-};
-
-void __init db88f628x_init(void)
-{
- kirkwood_ge00_init(&db88f628x_ge00_data);
-}
+++ /dev/null
-/*
- * Copyright 2012 (C), Jamie Lentin <jm@lentin.co.uk>
- *
- * arch/arm/mach-kirkwood/board-dnskw.c
- *
- * D-link DNS-320 & DNS-325 NAS Init for drivers not converted to
- * flattened device tree yet.
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/platform_device.h>
-#include <linux/mv643xx_eth.h>
-#include <linux/gpio.h>
-#include "common.h"
-
-static struct mv643xx_eth_platform_data dnskw_ge00_data = {
- .phy_addr = MV643XX_ETH_PHY_ADDR(8),
-};
-
-/* Register any GPIO for output and set the value */
-static void __init dnskw_gpio_register(unsigned gpio, char *name, int def)
-{
- if (gpio_request(gpio, name) == 0 &&
- gpio_direction_output(gpio, 0) == 0) {
- gpio_set_value(gpio, def);
- if (gpio_export(gpio, 0) != 0)
- pr_err("dnskw: Failed to export GPIO %s\n", name);
- } else
- pr_err("dnskw: Failed to register %s\n", name);
-}
-
-void __init dnskw_init(void)
-{
- kirkwood_ge00_init(&dnskw_ge00_data);
-
- /* Set NAS to turn back on after a power failure */
- dnskw_gpio_register(37, "dnskw:power:recover", 1);
-}
+++ /dev/null
-/*
- * arch/arm/mach-kirkwood/board-dockstar.c
- *
- * Seagate FreeAgent Dockstar Board Init for drivers not converted to
- * flattened device tree yet.
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- *
- * Copied and modified for Seagate GoFlex Net support by
- * Joshua Coombs <josh.coombs@gmail.com> based on ArchLinux ARM's
- * GoFlex kernel patches.
- *
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/mv643xx_eth.h>
-#include "common.h"
-
-static struct mv643xx_eth_platform_data dockstar_ge00_data = {
- .phy_addr = MV643XX_ETH_PHY_ADDR(0),
-};
-
-void __init dockstar_dt_init(void)
-{
- /*
- * Basic setup. Needs to be called early.
- */
- kirkwood_ge00_init(&dockstar_ge00_data);
-}
+++ /dev/null
-/*
- * Copyright 2012 (C), Jason Cooper <jason@lakedaemon.net>
- *
- * arch/arm/mach-kirkwood/board-dreamplug.c
- *
- * Marvell DreamPlug Reference Board Init for drivers not converted to
- * flattened device tree yet.
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/mv643xx_eth.h>
-#include <linux/gpio.h>
-#include "common.h"
-
-static struct mv643xx_eth_platform_data dreamplug_ge00_data = {
- .phy_addr = MV643XX_ETH_PHY_ADDR(0),
-};
-
-static struct mv643xx_eth_platform_data dreamplug_ge01_data = {
- .phy_addr = MV643XX_ETH_PHY_ADDR(1),
-};
-
-void __init dreamplug_init(void)
-{
- /*
- * Basic setup. Needs to be called early.
- */
- kirkwood_ge00_init(&dreamplug_ge00_data);
- kirkwood_ge01_init(&dreamplug_ge01_data);
-}
#include <linux/of.h>
#include <linux/of_platform.h>
#include <linux/clk-provider.h>
+#include <linux/clocksource.h>
+#include <linux/dma-mapping.h>
+#include <linux/irqchip.h>
#include <linux/kexec.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
orion_clkdev_add("1", "pcie",
of_clk_get_from_provider(&clkspec));
- clkspec.args[0] = CGC_BIT_SDIO;
- orion_clkdev_add(NULL, "mvsdio",
- of_clk_get_from_provider(&clkspec));
-
/*
* The ethernet interfaces forget the MAC address assigned by
* u-boot if the clocks are turned off. Until proper DT support
*/
clkspec.args[0] = CGC_BIT_GE0;
clk = of_clk_get_from_provider(&clkspec);
- orion_clkdev_add(NULL, "mv643xx_eth_port.0", clk);
clk_prepare_enable(clk);
clkspec.args[0] = CGC_BIT_GE1;
clk = of_clk_get_from_provider(&clkspec);
- orion_clkdev_add(NULL, "mv643xx_eth_port.1", clk);
clk_prepare_enable(clk);
}
-static void __init kirkwood_of_clk_init(void)
+static void __init kirkwood_dt_time_init(void)
{
of_clk_init(NULL);
- kirkwood_legacy_clk_init();
+ clocksource_of_init();
+}
+
+static void __init kirkwood_dt_init_early(void)
+{
+ mvebu_mbus_init("marvell,kirkwood-mbus",
+ BRIDGE_WINS_BASE, BRIDGE_WINS_SZ,
+ DDR_WINDOW_CPU_BASE, DDR_WINDOW_CPU_SZ);
}
static void __init kirkwood_dt_init(void)
kirkwood_cpufreq_init();
- /* Setup root of clk tree */
- kirkwood_of_clk_init();
+ /* Setup clocks for legacy devices */
+ kirkwood_legacy_clk_init();
kirkwood_cpuidle_init();
kexec_reinit = kirkwood_enable_pcie;
#endif
- if (of_machine_is_compatible("globalscale,dreamplug"))
- dreamplug_init();
-
- if (of_machine_is_compatible("globalscale,guruplug"))
- guruplug_dt_init();
-
- if (of_machine_is_compatible("globalscale,sheevaplug"))
- sheevaplug_dt_init();
-
- if (of_machine_is_compatible("dlink,dns-kirkwood"))
- dnskw_init();
-
- if (of_machine_is_compatible("iom,iconnect"))
- iconnect_init();
-
- if (of_machine_is_compatible("raidsonic,ib-nas62x0"))
- ib62x0_init();
-
- if (of_machine_is_compatible("qnap,ts219"))
- qnap_dt_ts219_init();
-
- if (of_machine_is_compatible("seagate,dockstar"))
- dockstar_dt_init();
-
- if (of_machine_is_compatible("seagate,goflexnet"))
- goflexnet_init();
-
- if (of_machine_is_compatible("buffalo,lsxl"))
- lsxl_init();
-
- if (of_machine_is_compatible("iom,ix2-200"))
- iomega_ix2_200_init();
-
- if (of_machine_is_compatible("keymile,km_kirkwood"))
- km_kirkwood_init();
-
- if (of_machine_is_compatible("lacie,cloudbox") ||
- of_machine_is_compatible("lacie,inetspace_v2") ||
- of_machine_is_compatible("lacie,netspace_lite_v2") ||
- of_machine_is_compatible("lacie,netspace_max_v2") ||
- of_machine_is_compatible("lacie,netspace_mini_v2") ||
- of_machine_is_compatible("lacie,netspace_v2"))
- ns2_init();
-
- if (of_machine_is_compatible("marvell,db-88f6281-bp") ||
- of_machine_is_compatible("marvell,db-88f6282-bp"))
- db88f628x_init();
-
- if (of_machine_is_compatible("mpl,cec4"))
- mplcec4_init();
-
- if (of_machine_is_compatible("netgear,readynas-duo-v2"))
- netgear_readynas_init();
-
- if (of_machine_is_compatible("plathome,openblocks-a6"))
- openblocks_a6_init();
-
- if (of_machine_is_compatible("usi,topkick"))
- usi_topkick_init();
+ if (of_machine_is_compatible("marvell,mv88f6281gtw-ge"))
+ mv88f6281gtw_ge_init();
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
}
static const char * const kirkwood_dt_board_compat[] = {
- "globalscale,dreamplug",
- "globalscale,guruplug",
- "globalscale,sheevaplug",
- "dlink,dns-320",
- "dlink,dns-325",
- "iom,iconnect",
- "raidsonic,ib-nas62x0",
- "qnap,ts219",
- "seagate,dockstar",
- "seagate,goflexnet",
- "buffalo,lsxl",
- "iom,ix2-200",
- "keymile,km_kirkwood",
- "lacie,cloudbox",
- "lacie,inetspace_v2",
- "lacie,netspace_lite_v2",
- "lacie,netspace_max_v2",
- "lacie,netspace_mini_v2",
- "lacie,netspace_v2",
- "marvell,db-88f6281-bp",
- "marvell,db-88f6282-bp",
- "mpl,cec4",
- "netgear,readynas-duo-v2",
- "plathome,openblocks-a6",
- "usi,topkick",
- "zyxel,nsa310",
+ "marvell,kirkwood",
NULL
};
DT_MACHINE_START(KIRKWOOD_DT, "Marvell Kirkwood (Flattened Device Tree)")
/* Maintainer: Jason Cooper <jason@lakedaemon.net> */
.map_io = kirkwood_map_io,
- .init_early = kirkwood_init_early,
- .init_irq = orion_dt_init_irq,
- .init_time = kirkwood_timer_init,
+ .init_early = kirkwood_dt_init_early,
+ .init_time = kirkwood_dt_time_init,
.init_machine = kirkwood_dt_init,
.restart = kirkwood_restart,
.dt_compat = kirkwood_dt_board_compat,
+++ /dev/null
-/*
- * Copyright 2012 (C), Jason Cooper <jason@lakedaemon.net>
- *
- * arch/arm/mach-kirkwood/board-goflexnet.c
- *
- * Seagate GoFlext Net Board Init for drivers not converted to
- * flattened device tree yet.
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- *
- * Copied and modified for Seagate GoFlex Net support by
- * Joshua Coombs <josh.coombs@gmail.com> based on ArchLinux ARM's
- * GoFlex kernel patches.
- *
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/mv643xx_eth.h>
-#include "common.h"
-
-static struct mv643xx_eth_platform_data goflexnet_ge00_data = {
- .phy_addr = MV643XX_ETH_PHY_ADDR(0),
-};
-
-void __init goflexnet_init(void)
-{
- /*
- * Basic setup. Needs to be called early.
- */
- kirkwood_ge00_init(&goflexnet_ge00_data);
-}
+++ /dev/null
-/*
- * arch/arm/mach-kirkwood/board-guruplug.c
- *
- * Marvell Guruplug Reference Board Init for drivers not converted to
- * flattened device tree yet.
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/mv643xx_eth.h>
-#include <linux/gpio.h>
-#include "common.h"
-
-static struct mv643xx_eth_platform_data guruplug_ge00_data = {
- .phy_addr = MV643XX_ETH_PHY_ADDR(0),
-};
-
-static struct mv643xx_eth_platform_data guruplug_ge01_data = {
- .phy_addr = MV643XX_ETH_PHY_ADDR(1),
-};
-
-void __init guruplug_dt_init(void)
-{
- /*
- * Basic setup. Needs to be called early.
- */
- kirkwood_ge00_init(&guruplug_ge00_data);
- kirkwood_ge01_init(&guruplug_ge01_data);
-}
+++ /dev/null
-/*
- * Copyright 2012 (C), Simon Baatz <gmbnomis@gmail.com>
- *
- * arch/arm/mach-kirkwood/board-ib62x0.c
- *
- * RaidSonic ICY BOX IB-NAS6210 & IB-NAS6220 init for drivers not
- * converted to flattened device tree yet.
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/mv643xx_eth.h>
-#include "common.h"
-
-static struct mv643xx_eth_platform_data ib62x0_ge00_data = {
- .phy_addr = MV643XX_ETH_PHY_ADDR(8),
-};
-
-void __init ib62x0_init(void)
-{
- /*
- * Basic setup. Needs to be called early.
- */
- kirkwood_ge00_init(&ib62x0_ge00_data);
-}
+++ /dev/null
-/*
- * arch/arm/mach-kirkwood/board-iconnect.c
- *
- * Iomega i-connect Board Setup
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/of.h>
-#include <linux/mv643xx_eth.h>
-#include "common.h"
-
-static struct mv643xx_eth_platform_data iconnect_ge00_data = {
- .phy_addr = MV643XX_ETH_PHY_ADDR(11),
-};
-
-void __init iconnect_init(void)
-{
- kirkwood_ge00_init(&iconnect_ge00_data);
-}
+++ /dev/null
-/*
- * arch/arm/mach-kirkwood/board-iomega_ix2_200.c
- *
- * Iomega StorCenter ix2-200
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/mv643xx_eth.h>
-#include <linux/ethtool.h>
-#include "common.h"
-
-static struct mv643xx_eth_platform_data iomega_ix2_200_ge00_data = {
- .phy_addr = MV643XX_ETH_PHY_NONE,
- .speed = SPEED_1000,
- .duplex = DUPLEX_FULL,
-};
-
-static struct mv643xx_eth_platform_data iomega_ix2_200_ge01_data = {
- .phy_addr = MV643XX_ETH_PHY_ADDR(11),
-};
-
-void __init iomega_ix2_200_init(void)
-{
- /*
- * Basic setup. Needs to be called early.
- */
- kirkwood_ge00_init(&iomega_ix2_200_ge00_data);
- kirkwood_ge01_init(&iomega_ix2_200_ge01_data);
-}
+++ /dev/null
-/*
- * Copyright 2012 2012 KEYMILE AG, CH-3097 Bern
- * Valentin Longchamp <valentin.longchamp@keymile.com>
- *
- * arch/arm/mach-kirkwood/board-km_kirkwood.c
- *
- * Keymile km_kirkwood Reference Desing Init for drivers not converted to
- * flattened device tree yet.
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/mv643xx_eth.h>
-#include <linux/clk.h>
-#include <linux/clk-private.h>
-#include "common.h"
-
-static struct mv643xx_eth_platform_data km_kirkwood_ge00_data = {
- .phy_addr = MV643XX_ETH_PHY_ADDR(0),
-};
-
-void __init km_kirkwood_init(void)
-{
- struct clk *sata_clk;
- /*
- * Our variant of kirkwood (integrated in the Bobcat) hangs on accessing
- * SATA bits (14-15) of the Clock Gating Control Register. Since these
- * devices are also not present in this variant, their clocks get
- * disabled because unused when clk_disable_unused() gets called.
- * That's why we change the flags to these clocks to CLK_IGNORE_UNUSED
- */
- sata_clk = clk_get_sys("sata_mv.0", "0");
- if (!IS_ERR(sata_clk))
- sata_clk->flags |= CLK_IGNORE_UNUSED;
- sata_clk = clk_get_sys("sata_mv.0", "1");
- if (!IS_ERR(sata_clk))
- sata_clk->flags |= CLK_IGNORE_UNUSED;
-
- kirkwood_ge00_init(&km_kirkwood_ge00_data);
-}
+++ /dev/null
-/*
- * Copyright 2012 (C), Michael Walle <michael@walle.cc>
- *
- * arch/arm/mach-kirkwood/board-lsxl.c
- *
- * Buffalo Linkstation LS-XHL and LS-CHLv2 init for drivers not
- * converted to flattened device tree yet.
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/platform_device.h>
-#include <linux/mv643xx_eth.h>
-#include "common.h"
-
-static struct mv643xx_eth_platform_data lsxl_ge00_data = {
- .phy_addr = MV643XX_ETH_PHY_ADDR(0),
-};
-
-static struct mv643xx_eth_platform_data lsxl_ge01_data = {
- .phy_addr = MV643XX_ETH_PHY_ADDR(8),
-};
-
-void __init lsxl_init(void)
-{
- /*
- * Basic setup. Needs to be called early.
- */
-
- kirkwood_ge00_init(&lsxl_ge00_data);
- kirkwood_ge01_init(&lsxl_ge01_data);
-}
+++ /dev/null
-/*
- * Copyright (C) 2012 MPL AG, Switzerland
- * Stefan Peter <s.peter@mpl.ch>
- *
- * arch/arm/mach-kirkwood/board-mplcec4.c
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/mv643xx_eth.h>
-#include "common.h"
-
-static struct mv643xx_eth_platform_data mplcec4_ge00_data = {
- .phy_addr = MV643XX_ETH_PHY_ADDR(1),
-};
-
-static struct mv643xx_eth_platform_data mplcec4_ge01_data = {
- .phy_addr = MV643XX_ETH_PHY_ADDR(2),
-};
-
-void __init mplcec4_init(void)
-{
- /*
- * Basic setup. Needs to be called early.
- */
- kirkwood_ge00_init(&mplcec4_ge00_data);
- kirkwood_ge01_init(&mplcec4_ge01_data);
-}
-
-
-
--- /dev/null
+/*
+ * arch/arm/mach-kirkwood/board-mv88f6281gtw_ge.c
+ *
+ * Marvell 88F6281 GTW GE Board Setup
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/irq.h>
+#include <linux/timer.h>
+#include <linux/mv643xx_eth.h>
+#include <linux/ethtool.h>
+#include <linux/gpio.h>
+#include <net/dsa.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/pci.h>
+#include <mach/kirkwood.h>
+#include "common.h"
+
+static struct mv643xx_eth_platform_data mv88f6281gtw_ge_ge00_data = {
+ .phy_addr = MV643XX_ETH_PHY_NONE,
+ .speed = SPEED_1000,
+ .duplex = DUPLEX_FULL,
+};
+
+static struct dsa_chip_data mv88f6281gtw_ge_switch_chip_data = {
+ .port_names[0] = "lan1",
+ .port_names[1] = "lan2",
+ .port_names[2] = "lan3",
+ .port_names[3] = "lan4",
+ .port_names[4] = "wan",
+ .port_names[5] = "cpu",
+};
+
+static struct dsa_platform_data mv88f6281gtw_ge_switch_plat_data = {
+ .nr_chips = 1,
+ .chip = &mv88f6281gtw_ge_switch_chip_data,
+};
+
+void __init mv88f6281gtw_ge_init(void)
+{
+ kirkwood_ge00_init(&mv88f6281gtw_ge_ge00_data);
+ kirkwood_ge00_switch_init(&mv88f6281gtw_ge_switch_plat_data, NO_IRQ);
+}
+++ /dev/null
-/*
- * Copyright 2012 (C), Simon Guinot <simon.guinot@sequanux.org>
- *
- * arch/arm/mach-kirkwood/board-ns2.c
- *
- * LaCie Network Space v2 board (and parents) initialization for drivers
- * not converted to flattened device tree yet.
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/platform_device.h>
-#include <linux/mv643xx_eth.h>
-#include <linux/of.h>
-#include "common.h"
-
-static struct mv643xx_eth_platform_data ns2_ge00_data = {
- .phy_addr = MV643XX_ETH_PHY_ADDR(8),
-};
-
-void __init ns2_init(void)
-{
- /*
- * Basic setup. Needs to be called early.
- */
- if (of_machine_is_compatible("lacie,cloudbox") ||
- of_machine_is_compatible("lacie,netspace_lite_v2") ||
- of_machine_is_compatible("lacie,netspace_mini_v2"))
- ns2_ge00_data.phy_addr = MV643XX_ETH_PHY_ADDR(0);
- kirkwood_ge00_init(&ns2_ge00_data);
-}
+++ /dev/null
-/*
- * Copyright 2012 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
- *
- * arch/arm/mach-kirkwood/board-openblocks_a6.c
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/mv643xx_eth.h>
-#include "common.h"
-
-static struct mv643xx_eth_platform_data openblocks_ge00_data = {
- .phy_addr = MV643XX_ETH_PHY_ADDR(0),
-};
-
-void __init openblocks_a6_init(void)
-{
- /*
- * Basic setup. Needs to be called early.
- */
- kirkwood_ge00_init(&openblocks_ge00_data);
-}
+++ /dev/null
-/*
- * NETGEAR ReadyNAS Duo v2 Board setup for drivers not already
- * converted to DT.
- *
- * Copyright (C) 2013, Arnaud EBALARD <arno@natisbad.org>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/platform_device.h>
-#include <linux/mv643xx_eth.h>
-#include <mach/kirkwood.h>
-#include "common.h"
-
-static struct mv643xx_eth_platform_data netgear_readynas_ge00_data = {
- .phy_addr = MV643XX_ETH_PHY_ADDR(0),
-};
-
-void __init netgear_readynas_init(void)
-{
- kirkwood_ge00_init(&netgear_readynas_ge00_data);
-}
+++ /dev/null
-/*
- * arch/arm/mach-kirkwood/board-sheevaplug.c
- *
- * Marvell Sheevaplug Reference Board Init for drivers not converted to
- * flattened device tree yet.
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/mv643xx_eth.h>
-#include "common.h"
-
-static struct mv643xx_eth_platform_data sheevaplug_ge00_data = {
- .phy_addr = MV643XX_ETH_PHY_ADDR(0),
-};
-
-void __init sheevaplug_dt_init(void)
-{
- /*
- * Basic setup. Needs to be called early.
- */
- kirkwood_ge00_init(&sheevaplug_ge00_data);
-}
+++ /dev/null
-/*
- *
- * QNAP TS-11x/TS-21x Turbo NAS Board Setup via DT
- *
- * Copyright (C) 2012 Andrew Lunn <andrew@lunn.ch>
- *
- * Based on the board file ts219-setup.c:
- *
- * Copyright (C) 2009 Martin Michlmayr <tbm@cyrius.com>
- * Copyright (C) 2008 Byron Bradley <byron.bbradley@gmail.com>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/platform_device.h>
-#include <linux/mv643xx_eth.h>
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include <mach/kirkwood.h>
-#include "common.h"
-
-static struct mv643xx_eth_platform_data qnap_ts219_ge00_data = {
- .phy_addr = MV643XX_ETH_PHY_ADDR(8),
-};
-
-void __init qnap_dt_ts219_init(void)
-{
- u32 dev, rev;
-
- kirkwood_pcie_id(&dev, &rev);
- if (dev == MV88F6282_DEV_ID)
- qnap_ts219_ge00_data.phy_addr = MV643XX_ETH_PHY_ADDR(0);
-
- kirkwood_ge00_init(&qnap_ts219_ge00_data);
-}
+++ /dev/null
-/*
- * Copyright 2012 (C), Jason Cooper <jason@lakedaemon.net>
- *
- * arch/arm/mach-kirkwood/board-usi_topkick.c
- *
- * USI Topkick Init for drivers not converted to flattened device tree yet.
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/mv643xx_eth.h>
-#include <linux/gpio.h>
-#include "common.h"
-
-static struct mv643xx_eth_platform_data topkick_ge00_data = {
- .phy_addr = MV643XX_ETH_PHY_ADDR(0),
-};
-
-void __init usi_topkick_init(void)
-{
- /*
- * Basic setup. Needs to be called early.
- */
- kirkwood_ge00_init(&topkick_ge00_data);
-}
void kirkwood_clk_init(void);
/* board init functions for boards not fully converted to fdt */
-#ifdef CONFIG_MACH_DREAMPLUG_DT
-void dreamplug_init(void);
+#ifdef CONFIG_MACH_MV88F6281GTW_GE_DT
+void mv88f6281gtw_ge_init(void);
#else
-static inline void dreamplug_init(void) {};
-#endif
-#ifdef CONFIG_MACH_GURUPLUG_DT
-void guruplug_dt_init(void);
-#else
-static inline void guruplug_dt_init(void) {};
-#endif
-#ifdef CONFIG_MACH_SHEEVAPLUG_DT
-void sheevaplug_dt_init(void);
-#else
-static inline void sheevaplug_dt_init(void) {};
-#endif
-#ifdef CONFIG_MACH_TS219_DT
-void qnap_dt_ts219_init(void);
-#else
-static inline void qnap_dt_ts219_init(void) {};
-#endif
-
-#ifdef CONFIG_MACH_DLINK_KIRKWOOD_DT
-void dnskw_init(void);
-#else
-static inline void dnskw_init(void) {};
-#endif
-
-#ifdef CONFIG_MACH_ICONNECT_DT
-void iconnect_init(void);
-#else
-static inline void iconnect_init(void) {};
-#endif
-
-#ifdef CONFIG_MACH_IB62X0_DT
-void ib62x0_init(void);
-#else
-static inline void ib62x0_init(void) {};
-#endif
-
-#ifdef CONFIG_MACH_DOCKSTAR_DT
-void dockstar_dt_init(void);
-#else
-static inline void dockstar_dt_init(void) {};
-#endif
-
-#ifdef CONFIG_MACH_GOFLEXNET_DT
-void goflexnet_init(void);
-#else
-static inline void goflexnet_init(void) {};
-#endif
-
-#ifdef CONFIG_MACH_LSXL_DT
-void lsxl_init(void);
-#else
-static inline void lsxl_init(void) {};
-#endif
-
-#ifdef CONFIG_MACH_IOMEGA_IX2_200_DT
-void iomega_ix2_200_init(void);
-#else
-static inline void iomega_ix2_200_init(void) {};
-#endif
-
-#ifdef CONFIG_MACH_KM_KIRKWOOD_DT
-void km_kirkwood_init(void);
-#else
-static inline void km_kirkwood_init(void) {};
-#endif
-
-#ifdef CONFIG_MACH_DB88F628X_BP_DT
-void db88f628x_init(void);
-#else
-static inline void db88f628x_init(void) {};
-#endif
-
-#ifdef CONFIG_MACH_MPLCEC4_DT
-void mplcec4_init(void);
-#else
-static inline void mplcec4_init(void) {};
-#endif
-
-#if defined(CONFIG_MACH_INETSPACE_V2_DT) || \
- defined(CONFIG_MACH_NETSPACE_V2_DT) || \
- defined(CONFIG_MACH_NETSPACE_MAX_V2_DT) || \
- defined(CONFIG_MACH_NETSPACE_LITE_V2_DT) || \
- defined(CONFIG_MACH_NETSPACE_MINI_V2_DT)
-void ns2_init(void);
-#else
-static inline void ns2_init(void) {};
-#endif
-
-#ifdef CONFIG_MACH_OPENBLOCKS_A6_DT
-void openblocks_a6_init(void);
-#else
-static inline void openblocks_a6_init(void) {};
-#endif
-
-#ifdef CONFIG_MACH_READYNAS_DT
-void netgear_readynas_init(void);
-#else
-static inline void netgear_readynas_init(void) {};
-#endif
-
-#ifdef CONFIG_MACH_TOPKICK_DT
-void usi_topkick_init(void);
-#else
-static inline void usi_topkick_init(void) {};
-#endif
-
-#ifdef CONFIG_MACH_CLOUDBOX_DT
-void cloudbox_init(void);
-#else
-static inline void cloudbox_init(void) {};
+static inline void mv88f6281gtw_ge_init(void) {};
#endif
/* early init functions not converted to fdt yet */
+++ /dev/null
-/*
- * arch/arm/mach-kirkwood/dockstar-setup.c
- *
- * Seagate FreeAgent DockStar Setup
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/platform_device.h>
-#include <linux/ata_platform.h>
-#include <linux/mtd/partitions.h>
-#include <linux/mv643xx_eth.h>
-#include <linux/gpio.h>
-#include <linux/leds.h>
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include <mach/kirkwood.h>
-#include "common.h"
-#include "mpp.h"
-
-static struct mtd_partition dockstar_nand_parts[] = {
- {
- .name = "u-boot",
- .offset = 0,
- .size = SZ_1M
- }, {
- .name = "uImage",
- .offset = MTDPART_OFS_NXTBLK,
- .size = SZ_4M
- }, {
- .name = "root",
- .offset = MTDPART_OFS_NXTBLK,
- .size = MTDPART_SIZ_FULL
- },
-};
-
-static struct mv643xx_eth_platform_data dockstar_ge00_data = {
- .phy_addr = MV643XX_ETH_PHY_ADDR(0),
-};
-
-static struct gpio_led dockstar_led_pins[] = {
- {
- .name = "dockstar:green:health",
- .default_trigger = "default-on",
- .gpio = 46,
- .active_low = 1,
- },
- {
- .name = "dockstar:orange:misc",
- .default_trigger = "none",
- .gpio = 47,
- .active_low = 1,
- },
-};
-
-static struct gpio_led_platform_data dockstar_led_data = {
- .leds = dockstar_led_pins,
- .num_leds = ARRAY_SIZE(dockstar_led_pins),
-};
-
-static struct platform_device dockstar_leds = {
- .name = "leds-gpio",
- .id = -1,
- .dev = {
- .platform_data = &dockstar_led_data,
- }
-};
-
-static unsigned int dockstar_mpp_config[] __initdata = {
- MPP29_GPIO, /* USB Power Enable */
- MPP46_GPIO, /* LED green */
- MPP47_GPIO, /* LED orange */
- 0
-};
-
-static void __init dockstar_init(void)
-{
- /*
- * Basic setup. Needs to be called early.
- */
- kirkwood_init();
-
- /* setup gpio pin select */
- kirkwood_mpp_conf(dockstar_mpp_config);
-
- kirkwood_uart0_init();
- kirkwood_nand_init(ARRAY_AND_SIZE(dockstar_nand_parts), 25);
-
- if (gpio_request(29, "USB Power Enable") != 0 ||
- gpio_direction_output(29, 1) != 0)
- pr_err("can't set up GPIO 29 (USB Power Enable)\n");
- kirkwood_ehci_init();
-
- kirkwood_ge00_init(&dockstar_ge00_data);
-
- platform_device_register(&dockstar_leds);
-}
-
-MACHINE_START(DOCKSTAR, "Seagate FreeAgent DockStar")
- .atag_offset = 0x100,
- .init_machine = dockstar_init,
- .map_io = kirkwood_map_io,
- .init_early = kirkwood_init_early,
- .init_irq = kirkwood_init_irq,
- .init_time = kirkwood_timer_init,
- .restart = kirkwood_restart,
-MACHINE_END
+++ /dev/null
-/*
- * arch/arm/mach-kirkwood/guruplug-setup.c
- *
- * Marvell GuruPlug Reference Board Setup
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/platform_device.h>
-#include <linux/mtd/partitions.h>
-#include <linux/ata_platform.h>
-#include <linux/mv643xx_eth.h>
-#include <linux/gpio.h>
-#include <linux/leds.h>
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include <mach/kirkwood.h>
-#include <linux/platform_data/mmc-mvsdio.h>
-#include "common.h"
-#include "mpp.h"
-
-static struct mtd_partition guruplug_nand_parts[] = {
- {
- .name = "u-boot",
- .offset = 0,
- .size = SZ_1M
- }, {
- .name = "uImage",
- .offset = MTDPART_OFS_NXTBLK,
- .size = SZ_4M
- }, {
- .name = "root",
- .offset = MTDPART_OFS_NXTBLK,
- .size = MTDPART_SIZ_FULL
- },
-};
-
-static struct mv643xx_eth_platform_data guruplug_ge00_data = {
- .phy_addr = MV643XX_ETH_PHY_ADDR(0),
-};
-
-static struct mv643xx_eth_platform_data guruplug_ge01_data = {
- .phy_addr = MV643XX_ETH_PHY_ADDR(1),
-};
-
-static struct mv_sata_platform_data guruplug_sata_data = {
- .n_ports = 1,
-};
-
-static struct mvsdio_platform_data guruplug_mvsdio_data = {
- /* unfortunately the CD signal has not been connected */
- .gpio_card_detect = -1,
- .gpio_write_protect = -1,
-};
-
-static struct gpio_led guruplug_led_pins[] = {
- {
- .name = "guruplug:red:health",
- .gpio = 46,
- .active_low = 1,
- },
- {
- .name = "guruplug:green:health",
- .gpio = 47,
- .active_low = 1,
- },
- {
- .name = "guruplug:red:wmode",
- .gpio = 48,
- .active_low = 1,
- },
- {
- .name = "guruplug:green:wmode",
- .gpio = 49,
- .active_low = 1,
- },
-};
-
-static struct gpio_led_platform_data guruplug_led_data = {
- .leds = guruplug_led_pins,
- .num_leds = ARRAY_SIZE(guruplug_led_pins),
-};
-
-static struct platform_device guruplug_leds = {
- .name = "leds-gpio",
- .id = -1,
- .dev = {
- .platform_data = &guruplug_led_data,
- }
-};
-
-static unsigned int guruplug_mpp_config[] __initdata = {
- MPP46_GPIO, /* M_RLED */
- MPP47_GPIO, /* M_GLED */
- MPP48_GPIO, /* B_RLED */
- MPP49_GPIO, /* B_GLED */
- 0
-};
-
-static void __init guruplug_init(void)
-{
- /*
- * Basic setup. Needs to be called early.
- */
- kirkwood_init();
- kirkwood_mpp_conf(guruplug_mpp_config);
-
- kirkwood_uart0_init();
- kirkwood_nand_init(ARRAY_AND_SIZE(guruplug_nand_parts), 25);
-
- kirkwood_ehci_init();
- kirkwood_ge00_init(&guruplug_ge00_data);
- kirkwood_ge01_init(&guruplug_ge01_data);
- kirkwood_sata_init(&guruplug_sata_data);
- kirkwood_sdio_init(&guruplug_mvsdio_data);
-
- platform_device_register(&guruplug_leds);
-}
-
-MACHINE_START(GURUPLUG, "Marvell GuruPlug Reference Board")
- /* Maintainer: Siddarth Gore <gores@marvell.com> */
- .atag_offset = 0x100,
- .init_machine = guruplug_init,
- .map_io = kirkwood_map_io,
- .init_early = kirkwood_init_early,
- .init_irq = kirkwood_init_irq,
- .init_time = kirkwood_timer_init,
- .restart = kirkwood_restart,
-MACHINE_END
+++ /dev/null
-/*
- * arch/arm/mach-kirkwood/mv88f6281gtw_ge-setup.c
- *
- * Marvell 88F6281 GTW GE Board Setup
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/platform_device.h>
-#include <linux/pci.h>
-#include <linux/irq.h>
-#include <linux/mtd/physmap.h>
-#include <linux/timer.h>
-#include <linux/mv643xx_eth.h>
-#include <linux/ethtool.h>
-#include <linux/gpio.h>
-#include <linux/leds.h>
-#include <linux/input.h>
-#include <linux/gpio_keys.h>
-#include <linux/spi/flash.h>
-#include <linux/spi/spi.h>
-#include <net/dsa.h>
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include <asm/mach/pci.h>
-#include <mach/kirkwood.h>
-#include "common.h"
-#include "mpp.h"
-
-static struct mv643xx_eth_platform_data mv88f6281gtw_ge_ge00_data = {
- .phy_addr = MV643XX_ETH_PHY_NONE,
- .speed = SPEED_1000,
- .duplex = DUPLEX_FULL,
-};
-
-static struct dsa_chip_data mv88f6281gtw_ge_switch_chip_data = {
- .port_names[0] = "lan1",
- .port_names[1] = "lan2",
- .port_names[2] = "lan3",
- .port_names[3] = "lan4",
- .port_names[4] = "wan",
- .port_names[5] = "cpu",
-};
-
-static struct dsa_platform_data mv88f6281gtw_ge_switch_plat_data = {
- .nr_chips = 1,
- .chip = &mv88f6281gtw_ge_switch_chip_data,
-};
-
-static const struct flash_platform_data mv88f6281gtw_ge_spi_slave_data = {
- .type = "mx25l12805d",
-};
-
-static struct spi_board_info __initdata mv88f6281gtw_ge_spi_slave_info[] = {
- {
- .modalias = "m25p80",
- .platform_data = &mv88f6281gtw_ge_spi_slave_data,
- .irq = -1,
- .max_speed_hz = 50000000,
- .bus_num = 0,
- .chip_select = 0,
- },
-};
-
-static struct gpio_keys_button mv88f6281gtw_ge_button_pins[] = {
- {
- .code = KEY_RESTART,
- .gpio = 47,
- .desc = "SWR Button",
- .active_low = 1,
- }, {
- .code = KEY_WPS_BUTTON,
- .gpio = 46,
- .desc = "WPS Button",
- .active_low = 1,
- },
-};
-
-static struct gpio_keys_platform_data mv88f6281gtw_ge_button_data = {
- .buttons = mv88f6281gtw_ge_button_pins,
- .nbuttons = ARRAY_SIZE(mv88f6281gtw_ge_button_pins),
-};
-
-static struct platform_device mv88f6281gtw_ge_buttons = {
- .name = "gpio-keys",
- .id = -1,
- .num_resources = 0,
- .dev = {
- .platform_data = &mv88f6281gtw_ge_button_data,
- },
-};
-
-static struct gpio_led mv88f6281gtw_ge_led_pins[] = {
- {
- .name = "gtw:green:Status",
- .gpio = 20,
- .active_low = 0,
- }, {
- .name = "gtw:red:Status",
- .gpio = 21,
- .active_low = 0,
- }, {
- .name = "gtw:green:USB",
- .gpio = 12,
- .active_low = 0,
- },
-};
-
-static struct gpio_led_platform_data mv88f6281gtw_ge_led_data = {
- .leds = mv88f6281gtw_ge_led_pins,
- .num_leds = ARRAY_SIZE(mv88f6281gtw_ge_led_pins),
-};
-
-static struct platform_device mv88f6281gtw_ge_leds = {
- .name = "leds-gpio",
- .id = -1,
- .dev = {
- .platform_data = &mv88f6281gtw_ge_led_data,
- },
-};
-
-static unsigned int mv88f6281gtw_ge_mpp_config[] __initdata = {
- MPP12_GPO, /* Status#_USB pin */
- MPP20_GPIO, /* Status#_GLED pin */
- MPP21_GPIO, /* Status#_RLED pin */
- MPP46_GPIO, /* WPS_Switch pin */
- MPP47_GPIO, /* SW_Init pin */
- 0
-};
-
-static void __init mv88f6281gtw_ge_init(void)
-{
- /*
- * Basic setup. Needs to be called early.
- */
- kirkwood_init();
- kirkwood_mpp_conf(mv88f6281gtw_ge_mpp_config);
-
- kirkwood_ehci_init();
- kirkwood_ge00_init(&mv88f6281gtw_ge_ge00_data);
- kirkwood_ge00_switch_init(&mv88f6281gtw_ge_switch_plat_data, NO_IRQ);
- spi_register_board_info(mv88f6281gtw_ge_spi_slave_info,
- ARRAY_SIZE(mv88f6281gtw_ge_spi_slave_info));
- kirkwood_spi_init();
- kirkwood_uart0_init();
- platform_device_register(&mv88f6281gtw_ge_leds);
- platform_device_register(&mv88f6281gtw_ge_buttons);
-}
-
-static int __init mv88f6281gtw_ge_pci_init(void)
-{
- if (machine_is_mv88f6281gtw_ge())
- kirkwood_pcie_init(KW_PCIE0);
-
- return 0;
-}
-subsys_initcall(mv88f6281gtw_ge_pci_init);
-
-MACHINE_START(MV88F6281GTW_GE, "Marvell 88F6281 GTW GE Board")
- /* Maintainer: Lennert Buytenhek <buytenh@marvell.com> */
- .atag_offset = 0x100,
- .init_machine = mv88f6281gtw_ge_init,
- .map_io = kirkwood_map_io,
- .init_early = kirkwood_init_early,
- .init_irq = kirkwood_init_irq,
- .init_time = kirkwood_timer_init,
- .restart = kirkwood_restart,
-MACHINE_END
+++ /dev/null
-/*
- * arch/arm/mach-kirkwood/netspace_v2-setup.c
- *
- * LaCie Network Space v2 board setup
- *
- * Copyright (C) 2009 Simon Guinot <sguinot@lacie.com>
- * Copyright (C) 2009 Benoît Canet <benoit.canet@gmail.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/platform_device.h>
-#include <linux/ata_platform.h>
-#include <linux/mv643xx_eth.h>
-#include <linux/input.h>
-#include <linux/gpio.h>
-#include <linux/gpio_keys.h>
-#include <linux/leds.h>
-#include <linux/gpio-fan.h>
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include <mach/kirkwood.h>
-#include <linux/platform_data/leds-kirkwood-ns2.h>
-#include "common.h"
-#include "mpp.h"
-#include "lacie_v2-common.h"
-
-/*****************************************************************************
- * Ethernet
- ****************************************************************************/
-
-static struct mv643xx_eth_platform_data netspace_v2_ge00_data = {
- .phy_addr = MV643XX_ETH_PHY_ADDR(8),
-};
-
-/*****************************************************************************
- * SATA
- ****************************************************************************/
-
-static struct mv_sata_platform_data netspace_v2_sata_data = {
- .n_ports = 2,
-};
-
-/*****************************************************************************
- * GPIO keys
- ****************************************************************************/
-
-#define NETSPACE_V2_PUSH_BUTTON 32
-
-static struct gpio_keys_button netspace_v2_buttons[] = {
- [0] = {
- .code = KEY_POWER,
- .gpio = NETSPACE_V2_PUSH_BUTTON,
- .desc = "Power push button",
- .active_low = 0,
- },
-};
-
-static struct gpio_keys_platform_data netspace_v2_button_data = {
- .buttons = netspace_v2_buttons,
- .nbuttons = ARRAY_SIZE(netspace_v2_buttons),
-};
-
-static struct platform_device netspace_v2_gpio_buttons = {
- .name = "gpio-keys",
- .id = -1,
- .dev = {
- .platform_data = &netspace_v2_button_data,
- },
-};
-
-/*****************************************************************************
- * GPIO LEDs
- ****************************************************************************/
-
-#define NETSPACE_V2_GPIO_RED_LED 12
-
-static struct gpio_led netspace_v2_gpio_led_pins[] = {
- {
- .name = "ns_v2:red:fail",
- .gpio = NETSPACE_V2_GPIO_RED_LED,
- },
-};
-
-static struct gpio_led_platform_data netspace_v2_gpio_leds_data = {
- .num_leds = ARRAY_SIZE(netspace_v2_gpio_led_pins),
- .leds = netspace_v2_gpio_led_pins,
-};
-
-static struct platform_device netspace_v2_gpio_leds = {
- .name = "leds-gpio",
- .id = -1,
- .dev = {
- .platform_data = &netspace_v2_gpio_leds_data,
- },
-};
-
-/*****************************************************************************
- * Dual-GPIO CPLD LEDs
- ****************************************************************************/
-
-#define NETSPACE_V2_GPIO_BLUE_LED_SLOW 29
-#define NETSPACE_V2_GPIO_BLUE_LED_CMD 30
-
-static struct ns2_led netspace_v2_led_pins[] = {
- {
- .name = "ns_v2:blue:sata",
- .cmd = NETSPACE_V2_GPIO_BLUE_LED_CMD,
- .slow = NETSPACE_V2_GPIO_BLUE_LED_SLOW,
- },
-};
-
-static struct ns2_led_platform_data netspace_v2_leds_data = {
- .num_leds = ARRAY_SIZE(netspace_v2_led_pins),
- .leds = netspace_v2_led_pins,
-};
-
-static struct platform_device netspace_v2_leds = {
- .name = "leds-ns2",
- .id = -1,
- .dev = {
- .platform_data = &netspace_v2_leds_data,
- },
-};
-
-/*****************************************************************************
- * GPIO fan
- ****************************************************************************/
-
-/* Designed for fan 40x40x16: ADDA AD0412LB-D50 6000rpm@12v */
-static struct gpio_fan_speed netspace_max_v2_fan_speed[] = {
- { 0, 0 },
- { 1500, 15 },
- { 1700, 14 },
- { 1800, 13 },
- { 2100, 12 },
- { 3100, 11 },
- { 3300, 10 },
- { 4300, 9 },
- { 5500, 8 },
-};
-
-static unsigned netspace_max_v2_fan_ctrl[] = { 22, 7, 33, 23 };
-
-static struct gpio_fan_alarm netspace_max_v2_fan_alarm = {
- .gpio = 25,
- .active_low = 1,
-};
-
-static struct gpio_fan_platform_data netspace_max_v2_fan_data = {
- .num_ctrl = ARRAY_SIZE(netspace_max_v2_fan_ctrl),
- .ctrl = netspace_max_v2_fan_ctrl,
- .alarm = &netspace_max_v2_fan_alarm,
- .num_speed = ARRAY_SIZE(netspace_max_v2_fan_speed),
- .speed = netspace_max_v2_fan_speed,
-};
-
-static struct platform_device netspace_max_v2_gpio_fan = {
- .name = "gpio-fan",
- .id = -1,
- .dev = {
- .platform_data = &netspace_max_v2_fan_data,
- },
-};
-
-/*****************************************************************************
- * General Setup
- ****************************************************************************/
-
-static unsigned int netspace_v2_mpp_config[] __initdata = {
- MPP0_SPI_SCn,
- MPP1_SPI_MOSI,
- MPP2_SPI_SCK,
- MPP3_SPI_MISO,
- MPP4_NF_IO6,
- MPP5_NF_IO7,
- MPP6_SYSRST_OUTn,
- MPP7_GPO, /* Fan speed (bit 1) */
- MPP8_TW0_SDA,
- MPP9_TW0_SCK,
- MPP10_UART0_TXD,
- MPP11_UART0_RXD,
- MPP12_GPO, /* Red led */
- MPP14_GPIO, /* USB fuse */
- MPP16_GPIO, /* SATA 0 power */
- MPP17_GPIO, /* SATA 1 power */
- MPP18_NF_IO0,
- MPP19_NF_IO1,
- MPP20_SATA1_ACTn,
- MPP21_SATA0_ACTn,
- MPP22_GPIO, /* Fan speed (bit 0) */
- MPP23_GPIO, /* Fan power */
- MPP24_GPIO, /* USB mode select */
- MPP25_GPIO, /* Fan rotation fail */
- MPP26_GPIO, /* USB device vbus */
- MPP28_GPIO, /* USB enable host vbus */
- MPP29_GPIO, /* Blue led (slow register) */
- MPP30_GPIO, /* Blue led (command register) */
- MPP31_GPIO, /* Board power off */
- MPP32_GPIO, /* Power button (0 = Released, 1 = Pushed) */
- MPP33_GPO, /* Fan speed (bit 2) */
- 0
-};
-
-#define NETSPACE_V2_GPIO_POWER_OFF 31
-
-static void netspace_v2_power_off(void)
-{
- gpio_set_value(NETSPACE_V2_GPIO_POWER_OFF, 1);
-}
-
-static void __init netspace_v2_init(void)
-{
- /*
- * Basic setup. Needs to be called early.
- */
- kirkwood_init();
- kirkwood_mpp_conf(netspace_v2_mpp_config);
-
- if (machine_is_netspace_max_v2())
- lacie_v2_hdd_power_init(2);
- else
- lacie_v2_hdd_power_init(1);
-
- kirkwood_ehci_init();
- kirkwood_ge00_init(&netspace_v2_ge00_data);
- kirkwood_sata_init(&netspace_v2_sata_data);
- kirkwood_uart0_init();
- lacie_v2_register_flash();
- lacie_v2_register_i2c_devices();
-
- platform_device_register(&netspace_v2_leds);
- platform_device_register(&netspace_v2_gpio_leds);
- platform_device_register(&netspace_v2_gpio_buttons);
- if (machine_is_netspace_max_v2())
- platform_device_register(&netspace_max_v2_gpio_fan);
-
- if (gpio_request(NETSPACE_V2_GPIO_POWER_OFF, "power-off") == 0 &&
- gpio_direction_output(NETSPACE_V2_GPIO_POWER_OFF, 0) == 0)
- pm_power_off = netspace_v2_power_off;
- else
- pr_err("netspace_v2: failed to configure power-off GPIO\n");
-}
-
-#ifdef CONFIG_MACH_NETSPACE_V2
-MACHINE_START(NETSPACE_V2, "LaCie Network Space v2")
- .atag_offset = 0x100,
- .init_machine = netspace_v2_init,
- .map_io = kirkwood_map_io,
- .init_early = kirkwood_init_early,
- .init_irq = kirkwood_init_irq,
- .init_time = kirkwood_timer_init,
- .restart = kirkwood_restart,
-MACHINE_END
-#endif
-
-#ifdef CONFIG_MACH_INETSPACE_V2
-MACHINE_START(INETSPACE_V2, "LaCie Internet Space v2")
- .atag_offset = 0x100,
- .init_machine = netspace_v2_init,
- .map_io = kirkwood_map_io,
- .init_early = kirkwood_init_early,
- .init_irq = kirkwood_init_irq,
- .init_time = kirkwood_timer_init,
- .restart = kirkwood_restart,
-MACHINE_END
-#endif
-
-#ifdef CONFIG_MACH_NETSPACE_MAX_V2
-MACHINE_START(NETSPACE_MAX_V2, "LaCie Network Space Max v2")
- .atag_offset = 0x100,
- .init_machine = netspace_v2_init,
- .map_io = kirkwood_map_io,
- .init_early = kirkwood_init_early,
- .init_irq = kirkwood_init_irq,
- .init_time = kirkwood_timer_init,
- .restart = kirkwood_restart,
-MACHINE_END
-#endif
kirkwood_mpp_conf(openrd_mpp_config);
kirkwood_uart0_init();
- kirkwood_nand_init(ARRAY_AND_SIZE(openrd_nand_parts), 25);
+ kirkwood_nand_init(openrd_nand_parts, ARRAY_SIZE(openrd_nand_parts),
+ 25);
kirkwood_ehci_init();
kirkwood_init();
kirkwood_mpp_conf(rd88f6281_mpp_config);
- kirkwood_nand_init(ARRAY_AND_SIZE(rd88f6281_nand_parts), 25);
+ kirkwood_nand_init(rd88f6281_nand_parts,
+ ARRAY_SIZE(rd88f6281_nand_parts),
+ 25);
kirkwood_ehci_init();
kirkwood_ge00_init(&rd88f6281_ge00_data);
+++ /dev/null
-/*
- * arch/arm/mach-kirkwood/sheevaplug-setup.c
- *
- * Marvell SheevaPlug Reference Board Setup
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/platform_device.h>
-#include <linux/ata_platform.h>
-#include <linux/mtd/partitions.h>
-#include <linux/mv643xx_eth.h>
-#include <linux/gpio.h>
-#include <linux/leds.h>
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include <mach/kirkwood.h>
-#include <linux/platform_data/mmc-mvsdio.h>
-#include "common.h"
-#include "mpp.h"
-
-static struct mtd_partition sheevaplug_nand_parts[] = {
- {
- .name = "u-boot",
- .offset = 0,
- .size = SZ_1M
- }, {
- .name = "uImage",
- .offset = MTDPART_OFS_NXTBLK,
- .size = SZ_4M
- }, {
- .name = "root",
- .offset = MTDPART_OFS_NXTBLK,
- .size = MTDPART_SIZ_FULL
- },
-};
-
-static struct mv643xx_eth_platform_data sheevaplug_ge00_data = {
- .phy_addr = MV643XX_ETH_PHY_ADDR(0),
-};
-
-static struct mv_sata_platform_data sheeva_esata_sata_data = {
- .n_ports = 2,
-};
-
-static struct mvsdio_platform_data sheevaplug_mvsdio_data = {
- /* unfortunately the CD signal has not been connected */
-};
-
-static struct mvsdio_platform_data sheeva_esata_mvsdio_data = {
- .gpio_write_protect = 44, /* MPP44 used as SD write protect */
- .gpio_card_detect = 47, /* MPP47 used as SD card detect */
-};
-
-static struct gpio_led sheevaplug_led_pins[] = {
- {
- .name = "plug:red:misc",
- .default_trigger = "none",
- .gpio = 46,
- .active_low = 1,
- },
- {
- .name = "plug:green:health",
- .default_trigger = "default-on",
- .gpio = 49,
- .active_low = 1,
- },
-};
-
-static struct gpio_led_platform_data sheevaplug_led_data = {
- .leds = sheevaplug_led_pins,
- .num_leds = ARRAY_SIZE(sheevaplug_led_pins),
-};
-
-static struct platform_device sheevaplug_leds = {
- .name = "leds-gpio",
- .id = -1,
- .dev = {
- .platform_data = &sheevaplug_led_data,
- }
-};
-
-static unsigned int sheevaplug_mpp_config[] __initdata = {
- MPP29_GPIO, /* USB Power Enable */
- MPP46_GPIO, /* LED Red */
- MPP49_GPIO, /* LED */
- 0
-};
-
-static unsigned int sheeva_esata_mpp_config[] __initdata = {
- MPP29_GPIO, /* USB Power Enable */
- MPP44_GPIO, /* SD Write Protect */
- MPP47_GPIO, /* SD Card Detect */
- MPP49_GPIO, /* LED Green */
- 0
-};
-
-static void __init sheevaplug_init(void)
-{
- /*
- * Basic setup. Needs to be called early.
- */
- kirkwood_init();
-
- /* setup gpio pin select */
- if (machine_is_esata_sheevaplug())
- kirkwood_mpp_conf(sheeva_esata_mpp_config);
- else
- kirkwood_mpp_conf(sheevaplug_mpp_config);
-
- kirkwood_uart0_init();
- kirkwood_nand_init(ARRAY_AND_SIZE(sheevaplug_nand_parts), 25);
-
- if (gpio_request(29, "USB Power Enable") != 0 ||
- gpio_direction_output(29, 1) != 0)
- pr_err("can't set up GPIO 29 (USB Power Enable)\n");
- kirkwood_ehci_init();
-
- kirkwood_ge00_init(&sheevaplug_ge00_data);
-
- /* honor lower power consumption for plugs with out eSATA */
- if (machine_is_esata_sheevaplug())
- kirkwood_sata_init(&sheeva_esata_sata_data);
-
- /* enable sd wp and sd cd on plugs with esata */
- if (machine_is_esata_sheevaplug())
- kirkwood_sdio_init(&sheeva_esata_mvsdio_data);
- else
- kirkwood_sdio_init(&sheevaplug_mvsdio_data);
-
- platform_device_register(&sheevaplug_leds);
-}
-
-#ifdef CONFIG_MACH_SHEEVAPLUG
-MACHINE_START(SHEEVAPLUG, "Marvell SheevaPlug Reference Board")
- /* Maintainer: shadi Ammouri <shadi@marvell.com> */
- .atag_offset = 0x100,
- .init_machine = sheevaplug_init,
- .map_io = kirkwood_map_io,
- .init_early = kirkwood_init_early,
- .init_irq = kirkwood_init_irq,
- .init_time = kirkwood_timer_init,
- .restart = kirkwood_restart,
-MACHINE_END
-#endif
-
-#ifdef CONFIG_MACH_ESATA_SHEEVAPLUG
-MACHINE_START(ESATA_SHEEVAPLUG, "Marvell eSATA SheevaPlug Reference Board")
- .atag_offset = 0x100,
- .init_machine = sheevaplug_init,
- .map_io = kirkwood_map_io,
- .init_early = kirkwood_init_early,
- .init_irq = kirkwood_init_irq,
- .init_time = kirkwood_timer_init,
- .restart = kirkwood_restart,
-MACHINE_END
-#endif
#include <linux/platform_device.h>
#include <linux/pci.h>
#include <linux/irq.h>
+#include <linux/mbus.h>
#include <linux/mtd/physmap.h>
-#include <linux/mv643xx_eth.h>
#include <linux/leds.h>
#include <linux/gpio_keys.h>
#include <linux/input.h>
.resource = &edmini_v2_nor_flash_resource,
};
-/*****************************************************************************
- * Ethernet
- ****************************************************************************/
-
-static struct mv643xx_eth_platform_data edmini_v2_eth_data = {
- .phy_addr = 8,
-};
-
/*****************************************************************************
* RTC 5C372a on I2C bus
****************************************************************************/
* Configure peripherals.
*/
orion5x_ehci0_init();
- orion5x_eth_init(&edmini_v2_eth_data);
mvebu_mbus_add_window("devbus-boot", EDMINI_V2_NOR_BOOT_BASE,
EDMINI_V2_NOR_BOOT_SIZE);
select ARCH_WANT_OPTIONAL_GPIOLIB
select ARM_GIC
select CPU_V7
- select HAVE_ARM_ARCH_TIMER
select SH_CLK_CPG
select RENESAS_IRQC
+ select ARCH_HAS_CPUFREQ
+ select ARCH_HAS_OPP
config ARCH_R8A7740
bool "R-Mobile A1 (R8A77400)"
select ARCH_WANT_OPTIONAL_GPIOLIB
select ARM_GIC
select CPU_V7
- select HAVE_ARM_ARCH_TIMER
select SH_CLK_CPG
select RENESAS_IRQC
depends on ARCH_R8A7778
select ARCH_REQUIRE_GPIOLIB
select RENESAS_INTC_IRQPIN
+ select REGULATOR_FIXED_VOLTAGE if REGULATOR
select USE_OF
config MACH_MARZEN
select REGULATOR_FIXED_VOLTAGE if REGULATOR
select USE_OF
+config MACH_KZM9D_REFERENCE
+ bool "KZM9D board - Reference Device Tree Implementation"
+ depends on ARCH_EMEV2
+ select REGULATOR_FIXED_VOLTAGE if REGULATOR
+ select USE_OF
+ ---help---
+ Use reference implementation of KZM9D board support
+ which makes a greater use of device tree at the expense
+ of not supporting a number of devices.
+
+ This is intended to aid developers
+
config MACH_KZM9G
bool "KZM-A9-GT board"
depends on ARCH_SH73A0
obj-$(CONFIG_MACH_ARMADILLO800EVA) += board-armadillo800eva.o
obj-$(CONFIG_MACH_ARMADILLO800EVA_REFERENCE) += board-armadillo800eva-reference.o
obj-$(CONFIG_MACH_KZM9D) += board-kzm9d.o
+obj-$(CONFIG_MACH_KZM9D_REFERENCE) += board-kzm9d-reference.o
obj-$(CONFIG_MACH_KZM9G) += board-kzm9g.o
obj-$(CONFIG_MACH_KZM9G_REFERENCE) += board-kzm9g-reference.o
loadaddr-$(CONFIG_MACH_BOCKW) += 0x60008000
loadaddr-$(CONFIG_MACH_KOTA2) += 0x41008000
loadaddr-$(CONFIG_MACH_KZM9D) += 0x40008000
+loadaddr-$(CONFIG_MACH_KZM9D_REFERENCE) += 0x40008000
loadaddr-$(CONFIG_MACH_KZM9G) += 0x41008000
loadaddr-$(CONFIG_MACH_KZM9G_REFERENCE) += 0x41008000
loadaddr-$(CONFIG_MACH_LAGER) += 0x40008000
#include <linux/mmc/sh_mmcif.h>
#include <linux/mmc/sh_mobile_sdhi.h>
#include <linux/mfd/tmio.h>
+#include <linux/platform_data/bd6107.h>
#include <linux/sh_clk.h>
#include <linux/irqchip/arm-gic.h>
#include <video/sh_mobile_lcdc.h>
},
};
-static unsigned char lcd_backlight_seq[3][2] = {
- { 0x04, 0x07 },
- { 0x23, 0x80 },
- { 0x03, 0x01 },
-};
-
-static int lcd_backlight_set_brightness(int brightness)
-{
- struct i2c_adapter *adap;
- struct i2c_msg msg;
- unsigned int i;
- int ret;
-
- if (brightness == 0) {
- /* Reset the chip */
- gpio_set_value(235, 0);
- mdelay(24);
- gpio_set_value(235, 1);
- return 0;
- }
-
- adap = i2c_get_adapter(1);
- if (adap == NULL)
- return -ENODEV;
-
- for (i = 0; i < ARRAY_SIZE(lcd_backlight_seq); i++) {
- msg.addr = 0x6d;
- msg.buf = &lcd_backlight_seq[i][0];
- msg.len = 2;
- msg.flags = 0;
-
- ret = i2c_transfer(adap, &msg, 1);
- if (ret < 0)
- break;
- }
-
- i2c_put_adapter(adap);
- return ret < 0 ? ret : 0;
-}
-
-/* LCDC0 */
+/* LCDC0 and backlight */
static const struct fb_videomode lcdc0_modes[] = {
{
.name = "R63302(QHD)",
.width = 44,
.height = 79,
},
- .bl_info = {
- .name = "sh_mobile_lcdc_bl",
- .max_brightness = 1,
- .set_brightness = lcd_backlight_set_brightness,
- },
.tx_dev = &mipidsi0_device,
}
};
},
};
+static struct bd6107_platform_data backlight_data = {
+ .fbdev = &lcdc0_device.dev,
+ .reset = 235,
+ .def_value = 0,
+};
+
+static struct i2c_board_info backlight_board_info = {
+ I2C_BOARD_INFO("bd6107", 0x6d),
+ .platform_data = &backlight_data,
+};
+
/* Fixed 2.8V regulators to be used by SDHI0 */
static struct regulator_consumer_supply fixed2v8_power_consumers[] =
{
gpio_set_value(217, 1);
mdelay(100);
- /* LCD backlight controller */
- gpio_request_one(235, GPIOF_OUT_INIT_LOW, NULL); /* RESET */
- lcd_backlight_set_brightness(0);
#ifdef CONFIG_CACHE_L2X0
/* Shared attribute override enable, 64K*8way */
l2x0_init(IOMEM(0xf0100000), 0x00460000, 0xc2000fff);
#endif
sh73a0_add_standard_devices();
+
+ i2c_register_board_info(1, &backlight_board_info, 1);
+
platform_add_devices(ag5evm_devices, ARRAY_SIZE(ag5evm_devices));
}
*/
#include <linux/gpio.h>
+#include <linux/gpio_keys.h>
+#include <linux/input.h>
#include <linux/interrupt.h>
-#include <linux/irqchip.h>
#include <linux/kernel.h>
+#include <linux/mfd/tmio.h>
+#include <linux/mmc/host.h>
+#include <linux/mmc/sh_mmcif.h>
+#include <linux/mmc/sh_mobile_sdhi.h>
#include <linux/pinctrl/machine.h>
#include <linux/platform_device.h>
#include <linux/regulator/fixed.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
+/* LEDS */
+static struct gpio_led ape6evm_leds[] = {
+ {
+ .name = "gnss-en",
+ .gpio = 28,
+ .default_state = LEDS_GPIO_DEFSTATE_OFF,
+ }, {
+ .name = "nfc-nrst",
+ .gpio = 126,
+ .default_state = LEDS_GPIO_DEFSTATE_OFF,
+ }, {
+ .name = "gnss-nrst",
+ .gpio = 132,
+ .default_state = LEDS_GPIO_DEFSTATE_OFF,
+ }, {
+ .name = "bt-wakeup",
+ .gpio = 232,
+ .default_state = LEDS_GPIO_DEFSTATE_OFF,
+ }, {
+ .name = "strobe",
+ .gpio = 250,
+ .default_state = LEDS_GPIO_DEFSTATE_OFF,
+ }, {
+ .name = "bbresetout",
+ .gpio = 288,
+ .default_state = LEDS_GPIO_DEFSTATE_OFF,
+ },
+};
+
+static __initdata struct gpio_led_platform_data ape6evm_leds_pdata = {
+ .leds = ape6evm_leds,
+ .num_leds = ARRAY_SIZE(ape6evm_leds),
+};
+
+/* GPIO KEY */
+#define GPIO_KEY(c, g, d, ...) \
+ { .code = c, .gpio = g, .desc = d, .active_low = 1 }
+
+static struct gpio_keys_button gpio_buttons[] = {
+ GPIO_KEY(KEY_0, 324, "S16"),
+ GPIO_KEY(KEY_MENU, 325, "S17"),
+ GPIO_KEY(KEY_HOME, 326, "S18"),
+ GPIO_KEY(KEY_BACK, 327, "S19"),
+ GPIO_KEY(KEY_VOLUMEUP, 328, "S20"),
+ GPIO_KEY(KEY_VOLUMEDOWN, 329, "S21"),
+};
+
+static struct __initdata gpio_keys_platform_data ape6evm_keys_pdata = {
+ .buttons = gpio_buttons,
+ .nbuttons = ARRAY_SIZE(gpio_buttons),
+};
+
/* Dummy supplies, where voltage doesn't matter */
static struct regulator_consumer_supply dummy_supplies[] = {
REGULATOR_SUPPLY("vddvario", "smsc911x"),
};
/* SMSC LAN9220 */
-static const struct resource lan9220_res[] = {
+static const struct resource lan9220_res[] __initconst = {
DEFINE_RES_MEM(0x08000000, 0x1000),
{
.start = irq_pin(40), /* IRQ40 */
},
};
-static const struct smsc911x_platform_config lan9220_data = {
+static const struct smsc911x_platform_config lan9220_data __initconst = {
.flags = SMSC911X_USE_32BIT,
.irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
};
-static const struct pinctrl_map ape6evm_pinctrl_map[] = {
+/*
+ * On APE6EVM power is supplied to MMCIF by a tps80032 regulator. For now we
+ * model a VDD supply to MMCIF, using a fixed 3.3V regulator. Also use the
+ * static power supply for SDHI0 and SDHI1, whereas SDHI0's VccQ is also
+ * supplied by the same tps80032 regulator and thus can also be adjusted
+ * dynamically.
+ */
+static struct regulator_consumer_supply fixed3v3_power_consumers[] =
+{
+ REGULATOR_SUPPLY("vmmc", "sh_mmcif.0"),
+ REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"),
+ REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.1"),
+};
+
+/* MMCIF */
+static const struct sh_mmcif_plat_data mmcif0_pdata __initconst = {
+ .caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE,
+};
+
+static const struct resource mmcif0_resources[] __initconst = {
+ DEFINE_RES_MEM_NAMED(0xee200000, 0x100, "MMCIF0"),
+ DEFINE_RES_IRQ(gic_spi(169)),
+};
+
+/* SDHI0 */
+static const struct sh_mobile_sdhi_info sdhi0_pdata __initconst = {
+ .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_WRPROTECT_DISABLE,
+ .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
+};
+
+static const struct resource sdhi0_resources[] __initconst = {
+ DEFINE_RES_MEM_NAMED(0xee100000, 0x100, "SDHI0"),
+ DEFINE_RES_IRQ(gic_spi(165)),
+};
+
+/* SDHI1 */
+static const struct sh_mobile_sdhi_info sdhi1_pdata __initconst = {
+ .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_WRPROTECT_DISABLE,
+ .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
+ MMC_CAP_NEEDS_POLL,
+};
+
+static const struct resource sdhi1_resources[] __initconst = {
+ DEFINE_RES_MEM_NAMED(0xee120000, 0x100, "SDHI1"),
+ DEFINE_RES_IRQ(gic_spi(166)),
+};
+
+static const struct pinctrl_map ape6evm_pinctrl_map[] __initconst = {
/* SCIFA0 console */
PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a73a4",
"scifa0_data", "scifa0"),
/* SMSC */
PIN_MAP_MUX_GROUP_DEFAULT("smsc911x", "pfc-r8a73a4",
"irqc_irq40", "irqc"),
+ /* MMCIF0 */
+ PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.0", "pfc-r8a73a4",
+ "mmc0_data8", "mmc0"),
+ PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.0", "pfc-r8a73a4",
+ "mmc0_ctrl", "mmc0"),
+ /* SDHI0: uSD: no WP */
+ PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a73a4",
+ "sdhi0_data4", "sdhi0"),
+ PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a73a4",
+ "sdhi0_ctrl", "sdhi0"),
+ PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a73a4",
+ "sdhi0_cd", "sdhi0"),
+ /* SDHI1 */
+ PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-r8a73a4",
+ "sdhi1_data4", "sdhi1"),
+ PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-r8a73a4",
+ "sdhi1_ctrl", "sdhi1"),
};
static void __init ape6evm_add_standard_devices(void)
platform_device_register_resndata(&platform_bus, "smsc911x", -1,
lan9220_res, ARRAY_SIZE(lan9220_res),
&lan9220_data, sizeof(lan9220_data));
+ regulator_register_always_on(1, "fixed-3.3V", fixed3v3_power_consumers,
+ ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
+ platform_device_register_resndata(&platform_bus, "sh_mmcif", 0,
+ mmcif0_resources, ARRAY_SIZE(mmcif0_resources),
+ &mmcif0_pdata, sizeof(mmcif0_pdata));
+ platform_device_register_resndata(&platform_bus, "sh_mobile_sdhi", 0,
+ sdhi0_resources, ARRAY_SIZE(sdhi0_resources),
+ &sdhi0_pdata, sizeof(sdhi0_pdata));
+ platform_device_register_resndata(&platform_bus, "sh_mobile_sdhi", 1,
+ sdhi1_resources, ARRAY_SIZE(sdhi1_resources),
+ &sdhi1_pdata, sizeof(sdhi1_pdata));
+ platform_device_register_data(&platform_bus, "gpio-keys", -1,
+ &ape6evm_keys_pdata,
+ sizeof(ape6evm_keys_pdata));
+ platform_device_register_data(&platform_bus, "leds-gpio", -1,
+ &ape6evm_leds_pdata,
+ sizeof(ape6evm_leds_pdata));
}
static const char *ape6evm_boards_compat_dt[] __initdata = {
};
DT_MACHINE_START(APE6EVM_DT, "ape6evm")
- .init_irq = irqchip_init,
+ .init_early = r8a73a4_init_delay,
.init_time = shmobile_timer_init,
.init_machine = ape6evm_add_standard_devices,
.dt_compat = ape6evm_boards_compat_dt,
#include <linux/gpio_keys.h>
#include <linux/regulator/driver.h>
#include <linux/pinctrl/machine.h>
+#include <linux/platform_data/pwm-renesas-tpu.h>
+#include <linux/pwm_backlight.h>
#include <linux/regulator/fixed.h>
#include <linux/regulator/gpio-regulator.h>
#include <linux/regulator/machine.h>
.num_resources = ARRAY_SIZE(sh_eth_resources),
};
-/* LCDC */
+/* PWM */
+static struct resource pwm_resources[] = {
+ [0] = {
+ .start = 0xe6600000,
+ .end = 0xe66000ff,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static struct tpu_pwm_platform_data pwm_device_data = {
+ .channels[2] = {
+ .polarity = PWM_POLARITY_INVERSED,
+ }
+};
+
+static struct platform_device pwm_device = {
+ .name = "renesas-tpu-pwm",
+ .id = -1,
+ .dev = {
+ .platform_data = &pwm_device_data,
+ },
+ .num_resources = ARRAY_SIZE(pwm_resources),
+ .resource = pwm_resources,
+};
+
+static struct pwm_lookup pwm_lookup[] = {
+ PWM_LOOKUP("renesas-tpu-pwm", 2, "pwm-backlight.0", NULL),
+};
+
+/* LCDC and backlight */
+static struct platform_pwm_backlight_data pwm_backlight_data = {
+ .lth_brightness = 50,
+ .max_brightness = 255,
+ .dft_brightness = 255,
+ .pwm_period_ns = 33333, /* 30kHz */
+};
+
+static struct platform_device pwm_backlight_device = {
+ .name = "pwm-backlight",
+ .dev = {
+ .platform_data = &pwm_backlight_data,
+ },
+};
+
static struct fb_videomode lcdc0_mode = {
.name = "AMPIER/AM-800480",
.xres = 800,
};
/* SDHI0 */
-/*
- * FIXME
- *
- * It use polling mode here, since
- * CD (= Card Detect) pin is not connected to SDHI0_CD.
- * We can use IRQ31 as card detect irq,
- * but it needs chattering removal operation
- */
-#define IRQ31 irq_pin(31)
static struct sh_mobile_sdhi_info sdhi0_info = {
.dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
.dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
.caps = MMC_CAP_4_BIT_DATA |
MMC_CAP_8_BIT_DATA |
MMC_CAP_NONREMOVABLE,
+ .slave_id_tx = SHDMA_SLAVE_MMCIF_TX,
+ .slave_id_rx = SHDMA_SLAVE_MMCIF_RX,
};
static struct resource sh_mmcif_resources[] = {
*/
static struct platform_device *eva_devices[] __initdata = {
&lcdc0_device,
+ &pwm_device,
+ &pwm_backlight_device,
&gpio_keys_device,
&sh_eth_device,
&vcc_sdhi0,
/* ST1232 */
PIN_MAP_MUX_GROUP_DEFAULT("0-0055", "pfc-r8a7740",
"intc_irq10", "intc"),
+ /* TPU0 */
+ PIN_MAP_MUX_GROUP_DEFAULT("renesas-tpu-pwm", "pfc-r8a7740",
+ "tpu0_to2_1", "tpu0"),
/* USBHS */
PIN_MAP_MUX_GROUP_DEFAULT("renesas_usbhs", "pfc-r8a7740",
"intc_irq7_1", "intc"),
ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
pinctrl_register_mappings(eva_pinctrl_map, ARRAY_SIZE(eva_pinctrl_map));
+ pwm_add_table(pwm_lookup, ARRAY_SIZE(pwm_lookup));
r8a7740_pinmux_init();
r8a7740_meram_workaround();
/* LCDC0 */
gpio_request_one(61, GPIOF_OUT_INIT_HIGH, NULL); /* LCDDON */
- gpio_request_one(202, GPIOF_OUT_INIT_LOW, NULL); /* LCD0_LED_CONT */
/* Touchscreen */
gpio_request_one(166, GPIOF_OUT_INIT_HIGH, NULL); /* TP_RST_B */
#include <linux/irq.h>
#include <linux/pinctrl/machine.h>
#include <linux/pinctrl/pinconf-generic.h>
+#include <linux/platform_data/pwm-renesas-tpu.h>
#include <linux/platform_device.h>
#include <linux/delay.h>
#include <linux/io.h>
#include <linux/input/sh_keysc.h>
#include <linux/gpio_keys.h>
#include <linux/leds.h>
+#include <linux/leds_pwm.h>
#include <linux/irqchip/arm-gic.h>
-#include <linux/platform_data/leds-renesas-tpu.h>
#include <linux/mmc/host.h>
#include <linux/mmc/sh_mmcif.h>
#include <linux/mfd/tmio.h>
};
/* TPU LED */
-static struct led_renesas_tpu_config led_renesas_tpu12_pdata = {
- .name = "V2513",
- .pin_gpio_fn = GPIO_FN_TPU1TO2,
- .pin_gpio = 153,
- .channel_offset = 0x90,
- .timer_bit = 2,
- .max_brightness = 1000,
-};
-
-static struct resource tpu12_resources[] = {
+static struct resource tpu1_pwm_resources[] = {
[0] = {
- .name = "TPU12",
- .start = 0xe6610090,
- .end = 0xe66100b5,
+ .start = 0xe6610000,
+ .end = 0xe66100ff,
.flags = IORESOURCE_MEM,
},
};
-static struct platform_device leds_tpu12_device = {
- .name = "leds-renesas-tpu",
- .id = 12,
- .dev = {
- .platform_data = &led_renesas_tpu12_pdata,
- },
- .num_resources = ARRAY_SIZE(tpu12_resources),
- .resource = tpu12_resources,
+static struct platform_device tpu1_pwm_device = {
+ .name = "renesas-tpu-pwm",
+ .id = 1,
+ .num_resources = ARRAY_SIZE(tpu1_pwm_resources),
+ .resource = tpu1_pwm_resources,
};
-static struct led_renesas_tpu_config led_renesas_tpu41_pdata = {
- .name = "V2514",
- .pin_gpio_fn = GPIO_FN_TPU4TO1,
- .pin_gpio = 199,
- .channel_offset = 0x50,
- .timer_bit = 1,
- .max_brightness = 1000,
-};
-
-static struct resource tpu41_resources[] = {
+static struct resource tpu2_pwm_resources[] = {
[0] = {
- .name = "TPU41",
- .start = 0xe6640050,
- .end = 0xe6640075,
+ .start = 0xe6620000,
+ .end = 0xe66200ff,
.flags = IORESOURCE_MEM,
},
};
-static struct platform_device leds_tpu41_device = {
- .name = "leds-renesas-tpu",
- .id = 41,
- .dev = {
- .platform_data = &led_renesas_tpu41_pdata,
+static struct platform_device tpu2_pwm_device = {
+ .name = "renesas-tpu-pwm",
+ .id = 2,
+ .num_resources = ARRAY_SIZE(tpu2_pwm_resources),
+ .resource = tpu2_pwm_resources,
+};
+
+static struct resource tpu3_pwm_resources[] = {
+ [0] = {
+ .start = 0xe6630000,
+ .end = 0xe66300ff,
+ .flags = IORESOURCE_MEM,
},
- .num_resources = ARRAY_SIZE(tpu41_resources),
- .resource = tpu41_resources,
};
-static struct led_renesas_tpu_config led_renesas_tpu21_pdata = {
- .name = "V2515",
- .pin_gpio_fn = GPIO_FN_TPU2TO1,
- .pin_gpio = 197,
- .channel_offset = 0x50,
- .timer_bit = 1,
- .max_brightness = 1000,
+static struct platform_device tpu3_pwm_device = {
+ .name = "renesas-tpu-pwm",
+ .id = 3,
+ .num_resources = ARRAY_SIZE(tpu3_pwm_resources),
+ .resource = tpu3_pwm_resources,
};
-static struct resource tpu21_resources[] = {
+static struct resource tpu4_pwm_resources[] = {
[0] = {
- .name = "TPU21",
- .start = 0xe6620050,
- .end = 0xe6620075,
+ .start = 0xe6640000,
+ .end = 0xe66400ff,
.flags = IORESOURCE_MEM,
},
};
-static struct platform_device leds_tpu21_device = {
- .name = "leds-renesas-tpu",
- .id = 21,
- .dev = {
- .platform_data = &led_renesas_tpu21_pdata,
+static struct platform_device tpu4_pwm_device = {
+ .name = "renesas-tpu-pwm",
+ .id = 4,
+ .num_resources = ARRAY_SIZE(tpu4_pwm_resources),
+ .resource = tpu4_pwm_resources,
+};
+
+static struct pwm_lookup pwm_lookup[] = {
+ PWM_LOOKUP("renesas-tpu-pwm.1", 2, "leds-pwm.0", "V2513"),
+ PWM_LOOKUP("renesas-tpu-pwm.2", 1, "leds-pwm.0", "V2515"),
+ PWM_LOOKUP("renesas-tpu-pwm.3", 0, "leds-pwm.0", "KEYLED"),
+ PWM_LOOKUP("renesas-tpu-pwm.4", 1, "leds-pwm.0", "V2514"),
+};
+
+static struct led_pwm tpu_pwm_leds[] = {
+ {
+ .name = "V2513",
+ .max_brightness = 1000,
+ }, {
+ .name = "V2515",
+ .max_brightness = 1000,
+ }, {
+ .name = "KEYLED",
+ .max_brightness = 1000,
+ }, {
+ .name = "V2514",
+ .max_brightness = 1000,
},
- .num_resources = ARRAY_SIZE(tpu21_resources),
- .resource = tpu21_resources,
};
-static struct led_renesas_tpu_config led_renesas_tpu30_pdata = {
- .name = "KEYLED",
- .pin_gpio_fn = GPIO_FN_TPU3TO0,
- .pin_gpio = 163,
- .channel_offset = 0x10,
- .timer_bit = 0,
- .max_brightness = 1000,
+static struct led_pwm_platform_data leds_pwm_pdata = {
+ .num_leds = ARRAY_SIZE(tpu_pwm_leds),
+ .leds = tpu_pwm_leds,
};
-static struct resource tpu30_resources[] = {
- [0] = {
- .name = "TPU30",
- .start = 0xe6630010,
- .end = 0xe6630035,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct platform_device leds_tpu30_device = {
- .name = "leds-renesas-tpu",
- .id = 30,
+static struct platform_device leds_pwm_device = {
+ .name = "leds-pwm",
+ .id = 0,
.dev = {
- .platform_data = &led_renesas_tpu30_pdata,
+ .platform_data = &leds_pwm_pdata,
},
- .num_resources = ARRAY_SIZE(tpu30_resources),
- .resource = tpu30_resources,
};
/* Fixed 1.8V regulator to be used by MMCIF */
&keysc_device,
&gpio_keys_device,
&gpio_leds_device,
- &leds_tpu12_device,
- &leds_tpu41_device,
- &leds_tpu21_device,
- &leds_tpu30_device,
+ &tpu1_pwm_device,
+ &tpu2_pwm_device,
+ &tpu3_pwm_device,
+ &tpu4_pwm_device,
+ &leds_pwm_device,
&mmcif_device,
&sdhi0_device,
&sdhi1_device,
"bsc_cs5_a", "bsc"),
PIN_MAP_MUX_GROUP_DEFAULT("smsc911x.0", "pfc-sh73a0",
"bsc_we0", "bsc"),
+ /* TPU */
+ PIN_MAP_MUX_GROUP_DEFAULT("renesas-tpu-pwm.1", "pfc-sh73a0",
+ "tpu1_to2", "tpu1"),
+ PIN_MAP_MUX_GROUP_DEFAULT("renesas-tpu-pwm.2", "pfc-sh73a0",
+ "tpu2_to1", "tpu2"),
+ PIN_MAP_MUX_GROUP_DEFAULT("renesas-tpu-pwm.3", "pfc-sh73a0",
+ "tpu3_to0", "tpu3"),
+ PIN_MAP_MUX_GROUP_DEFAULT("renesas-tpu-pwm.4", "pfc-sh73a0",
+ "tpu4_to1", "tpu4"),
};
static void __init kota2_init(void)
pinctrl_register_mappings(kota2_pinctrl_map,
ARRAY_SIZE(kota2_pinctrl_map));
+ pwm_add_table(pwm_lookup, ARRAY_SIZE(pwm_lookup));
+
sh73a0_pinmux_init();
/* SMSC911X */
--- /dev/null
+/*
+ * kzm9d board support - Reference DT implementation
+ *
+ * Copyright (C) 2013 Renesas Solutions Corp.
+ * Copyright (C) 2013 Magnus Damm
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <linux/init.h>
+#include <linux/of_platform.h>
+#include <mach/emev2.h>
+#include <mach/common.h>
+#include <asm/mach/arch.h>
+
+static void __init kzm9d_add_standard_devices(void)
+{
+ emev2_clock_init();
+
+ of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
+}
+
+static const char *kzm9d_boards_compat_dt[] __initdata = {
+ "renesas,kzm9d-reference",
+ NULL,
+};
+
+DT_MACHINE_START(KZM9D_DT, "kzm9d")
+ .smp = smp_ops(emev2_smp_ops),
+ .map_io = emev2_map_io,
+ .init_early = emev2_init_delay,
+ .init_machine = kzm9d_add_standard_devices,
+ .init_late = shmobile_init_late,
+ .dt_compat = kzm9d_boards_compat_dt,
+MACHINE_END
DT_MACHINE_START(KZM9D_DT, "kzm9d")
.smp = smp_ops(emev2_smp_ops),
.map_io = emev2_map_io,
- .init_early = emev2_add_early_devices,
- .nr_irqs = NR_IRQS_LEGACY,
- .init_irq = emev2_init_irq,
+ .init_early = emev2_init_delay,
.init_machine = kzm9d_add_standard_devices,
.init_late = shmobile_init_late,
.dt_compat = kzm9d_boards_compat_dt,
#include <linux/gpio.h>
#include <linux/io.h>
#include <linux/irq.h>
-#include <linux/irqchip.h>
#include <linux/input.h>
#include <linux/of_platform.h>
#include <linux/pinctrl/machine.h>
.map_io = sh73a0_map_io,
.init_early = sh73a0_init_delay,
.nr_irqs = NR_IRQS_LEGACY,
- .init_irq = irqchip_init,
.init_machine = kzm_init,
.init_time = shmobile_timer_init,
.dt_compat = kzm9g_boards_compat_dt,
#include <linux/gpio_keys.h>
#include <linux/input.h>
#include <linux/interrupt.h>
-#include <linux/irqchip.h>
#include <linux/kernel.h>
#include <linux/leds.h>
+#include <linux/mmc/host.h>
+#include <linux/mmc/sh_mmcif.h>
#include <linux/pinctrl/machine.h>
#include <linux/platform_data/gpio-rcar.h>
#include <linux/platform_device.h>
+#include <linux/regulator/fixed.h>
+#include <linux/regulator/machine.h>
+#include <linux/sh_eth.h>
#include <mach/common.h>
+#include <mach/irqs.h>
#include <mach/r8a7790.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
.nbuttons = ARRAY_SIZE(gpio_buttons),
};
+/* Fixed 3.3V regulator to be used by MMCIF */
+static struct regulator_consumer_supply fixed3v3_power_consumers[] =
+{
+ REGULATOR_SUPPLY("vmmc", "sh_mmcif.1"),
+};
+
+/* MMCIF */
+static struct sh_mmcif_plat_data mmcif1_pdata __initdata = {
+ .caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE,
+};
+
+static struct resource mmcif1_resources[] __initdata = {
+ DEFINE_RES_MEM_NAMED(0xee220000, 0x80, "MMCIF1"),
+ DEFINE_RES_IRQ(gic_spi(170)),
+};
+
+/* Ether */
+static struct sh_eth_plat_data ether_pdata __initdata = {
+ .phy = 0x1,
+ .edmac_endian = EDMAC_LITTLE_ENDIAN,
+ .register_type = SH_ETH_REG_FAST_RCAR,
+ .phy_interface = PHY_INTERFACE_MODE_RMII,
+ .ether_link_active_low = 1,
+};
+
+static struct resource ether_resources[] __initdata = {
+ DEFINE_RES_MEM(0xee700000, 0x400),
+ DEFINE_RES_IRQ(gic_spi(162)),
+};
+
static const struct pinctrl_map lager_pinctrl_map[] = {
/* SCIF0 (CN19: DEBUG SERIAL0) */
PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.6", "pfc-r8a7790",
/* SCIF1 (CN20: DEBUG SERIAL1) */
PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.7", "pfc-r8a7790",
"scif1_data", "scif1"),
+ /* MMCIF1 */
+ PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.1", "pfc-r8a7790",
+ "mmc1_data8", "mmc1"),
+ PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.1", "pfc-r8a7790",
+ "mmc1_ctrl", "mmc1"),
+ /* Ether */
+ PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
+ "eth_link", "eth"),
+ PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
+ "eth_mdio", "eth"),
+ PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
+ "eth_rmii", "eth"),
+ PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
+ "intc_irq0", "intc"),
};
static void __init lager_add_standard_devices(void)
platform_device_register_data(&platform_bus, "gpio-keys", -1,
&lager_keys_pdata,
sizeof(lager_keys_pdata));
+ regulator_register_always_on(0, "fixed-3.3V", fixed3v3_power_consumers,
+ ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
+ platform_device_register_resndata(&platform_bus, "sh_mmcif", 1,
+ mmcif1_resources, ARRAY_SIZE(mmcif1_resources),
+ &mmcif1_pdata, sizeof(mmcif1_pdata));
+
+ platform_device_register_resndata(&platform_bus, "r8a7790-ether", -1,
+ ether_resources,
+ ARRAY_SIZE(ether_resources),
+ ðer_pdata, sizeof(ether_pdata));
}
static const char *lager_boards_compat_dt[] __initdata = {
};
DT_MACHINE_START(LAGER_DT, "lager")
- .init_irq = irqchip_init,
+ .init_early = r8a7790_init_delay,
.init_time = r8a7790_timer_init,
.init_machine = lager_add_standard_devices,
.dt_compat = lager_boards_compat_dt,
#include <linux/mtd/physmap.h>
#include <linux/mtd/sh_flctl.h>
#include <linux/pinctrl/machine.h>
+#include <linux/platform_data/gpio_backlight.h>
#include <linux/pm_clock.h>
#include <linux/regulator/fixed.h>
#include <linux/regulator/machine.h>
#include <linux/tca6416_keypad.h>
#include <linux/usb/renesas_usbhs.h>
#include <linux/dma-mapping.h>
-
#include <video/sh_mobile_hdmi.h>
#include <video/sh_mobile_lcdc.h>
#include <media/sh_mobile_ceu.h>
},
};
-/* LCDC */
+/* LCDC and backlight */
static struct fb_videomode mackerel_lcdc_modes[] = {
{
.name = "WVGA Panel",
},
};
-static int mackerel_set_brightness(int brightness)
-{
- gpio_set_value(31, brightness);
-
- return 0;
-}
-
static const struct sh_mobile_meram_cfg lcd_meram_cfg = {
.icb[0] = {
.meram_size = 0x40,
.width = 152,
.height = 91,
},
- .bl_info = {
- .name = "sh_mobile_lcdc_bl",
- .max_brightness = 1,
- .set_brightness = mackerel_set_brightness,
- },
.meram_cfg = &lcd_meram_cfg,
}
};
},
};
+static struct gpio_backlight_platform_data gpio_backlight_data = {
+ .fbdev = &lcdc_device.dev,
+ .gpio = 31,
+ .def_value = 1,
+ .name = "backlight",
+};
+
+static struct platform_device gpio_backlight_device = {
+ .name = "gpio-backlight",
+ .dev = {
+ .platform_data = &gpio_backlight_data,
+ },
+};
+
/* HDMI */
static struct sh_mobile_hdmi_info hdmi_info = {
.flags = HDMI_SND_SRC_SPDIF,
&nor_flash_device,
&smc911x_device,
&lcdc_device,
+ &gpio_backlight_device,
&usbhs0_device,
&usbhs1_device,
&leds_device,
ARRAY_SIZE(mackerel_pinctrl_map));
sh7372_pinmux_init();
- /* backlight, off by default */
- gpio_request_one(31, GPIOF_OUT_INIT_LOW, NULL);
-
gpio_request_one(151, GPIOF_OUT_INIT_HIGH, NULL); /* LCDDON */
/* USBHS0 */
#define USIB2SCLKDIV 0x65c
#define USIB3SCLKDIV 0x660
#define STI_CLKSEL 0x688
-#define SMU_GENERAL_REG0 0x7c0
/* not pretty, but hey */
static void __iomem *smu_base;
iowrite32(value, smu_base + offs);
}
-void emev2_set_boot_vector(unsigned long value)
-{
- emev2_smu_write(value, SMU_GENERAL_REG0);
-}
-
static struct clk_mapping smu_mapping = {
.phys = EMEV2_SMU_BASE,
.len = PAGE_SIZE,
void __init emev2_clock_init(void)
{
int k, ret = 0;
- static int is_setup;
-
- /* yuck, this is ugly as hell, but the non-smp case of clocks
- * code is now designed to rely on ioremap() instead of static
- * entity maps. in the case of smp we need access to the SMU
- * register earlier than ioremap() is actually working without
- * any static maps. to enable SMP in ugly but with dynamic
- * mappings we have to call emev2_clock_init() from different
- * places depending on UP and SMP...
- */
- if (is_setup++)
- return;
smu_base = ioremap(EMEV2_SMU_BASE, PAGE_SIZE);
BUG_ON(!smu_base);
- /* setup STI timer to run on 37.768 kHz and deassert reset */
+ /* setup STI timer to run on 32.768 kHz and deassert reset */
emev2_smu_write(0, STI_CLKSEL);
emev2_smu_write(1, STI_RSTCTRL);
#define SMSTPCR2 0xe6150138
#define SMSTPCR3 0xe615013c
+#define SMSTPCR4 0xe6150140
#define SMSTPCR5 0xe6150144
#define FRQCRA 0xE6150000
#define FRQCRB 0xE6150004
+#define FRQCRC 0xE61500E0
#define VCLKCR1 0xE6150008
#define VCLKCR2 0xE615000C
#define VCLKCR3 0xE615001C
#define HSICKCR 0xE615026C
#define M4CKCR 0xE6150098
#define PLLECR 0xE61500D0
+#define PLL0CR 0xE61500D8
#define PLL1CR 0xE6150028
#define PLL2CR 0xE615002C
#define PLL2SCR 0xE61501F4
.mapping = &cpg_mapping, \
}
+PLL_CLOCK(pll0_clk, &main_clk, pll_parent_main, 1, 20, PLL0CR, 0);
PLL_CLOCK(pll1_clk, &main_clk, pll_parent_main, 1, 7, PLL1CR, 1);
PLL_CLOCK(pll2_clk, &main_div2_clk, pll_parent_main_extal, 3, 5, PLL2CR, 2);
PLL_CLOCK(pll2s_clk, &main_div2_clk, pll_parent_main_extal, 3, 5, PLL2SCR, 4);
SH_FIXED_RATIO_CLK(pll1_div2_clk, pll1_clk, div2);
+static atomic_t frqcr_lock;
+
+/* Several clocks need to access FRQCRB, have to lock */
+static bool frqcr_kick_check(struct clk *clk)
+{
+ return !(ioread32(CPG_MAP(FRQCRB)) & BIT(31));
+}
+
+static int frqcr_kick_do(struct clk *clk)
+{
+ int i;
+
+ /* set KICK bit in FRQCRB to update hardware setting, check success */
+ iowrite32(ioread32(CPG_MAP(FRQCRB)) | BIT(31), CPG_MAP(FRQCRB));
+ for (i = 1000; i; i--)
+ if (ioread32(CPG_MAP(FRQCRB)) & BIT(31))
+ cpu_relax();
+ else
+ return 0;
+
+ return -ETIMEDOUT;
+}
+
+static int zclk_set_rate(struct clk *clk, unsigned long rate)
+{
+ void __iomem *frqcrc;
+ int ret;
+ unsigned long step, p_rate;
+ u32 val;
+
+ if (!clk->parent || !__clk_get(clk->parent))
+ return -ENODEV;
+
+ if (!atomic_inc_and_test(&frqcr_lock) || !frqcr_kick_check(clk)) {
+ ret = -EBUSY;
+ goto done;
+ }
+
+ /*
+ * Users are supposed to first call clk_set_rate() only with
+ * clk_round_rate() results. So, we don't fix wrong rates here, but
+ * guard against them anyway
+ */
+
+ p_rate = clk_get_rate(clk->parent);
+ if (rate == p_rate) {
+ val = 0;
+ } else {
+ step = DIV_ROUND_CLOSEST(p_rate, 32);
+
+ if (rate > p_rate || rate < step) {
+ ret = -EINVAL;
+ goto done;
+ }
+
+ val = 32 - rate / step;
+ }
+
+ frqcrc = clk->mapped_reg + (FRQCRC - (u32)clk->enable_reg);
+
+ iowrite32((ioread32(frqcrc) & ~(clk->div_mask << clk->enable_bit)) |
+ (val << clk->enable_bit), frqcrc);
+
+ ret = frqcr_kick_do(clk);
+
+done:
+ atomic_dec(&frqcr_lock);
+ __clk_put(clk->parent);
+ return ret;
+}
+
+static long zclk_round_rate(struct clk *clk, unsigned long rate)
+{
+ /*
+ * theoretical rate = parent rate * multiplier / 32,
+ * where 1 <= multiplier <= 32. Therefore we should do
+ * multiplier = rate * 32 / parent rate
+ * rounded rate = parent rate * multiplier / 32.
+ * However, multiplication before division won't fit in 32 bits, so
+ * we sacrifice some precision by first dividing and then multiplying.
+ * To find the nearest divisor we calculate both and pick up the best
+ * one. This avoids 64-bit arithmetics.
+ */
+ unsigned long step, mul_min, mul_max, rate_min, rate_max;
+
+ rate_max = clk_get_rate(clk->parent);
+
+ /* output freq <= parent */
+ if (rate >= rate_max)
+ return rate_max;
+
+ step = DIV_ROUND_CLOSEST(rate_max, 32);
+ /* output freq >= parent / 32 */
+ if (step >= rate)
+ return step;
+
+ mul_min = rate / step;
+ mul_max = DIV_ROUND_UP(rate, step);
+ rate_min = step * mul_min;
+ if (mul_max == mul_min)
+ return rate_min;
+
+ rate_max = step * mul_max;
+
+ if (rate_max - rate < rate - rate_min)
+ return rate_max;
+
+ return rate_min;
+}
+
+static unsigned long zclk_recalc(struct clk *clk)
+{
+ void __iomem *frqcrc = FRQCRC - (u32)clk->enable_reg + clk->mapped_reg;
+ unsigned int max = clk->div_mask + 1;
+ unsigned long val = ((ioread32(frqcrc) >> clk->enable_bit) &
+ clk->div_mask);
+
+ return DIV_ROUND_CLOSEST(clk_get_rate(clk->parent), max) *
+ (max - val);
+}
+
+static struct sh_clk_ops zclk_ops = {
+ .recalc = zclk_recalc,
+ .set_rate = zclk_set_rate,
+ .round_rate = zclk_round_rate,
+};
+
+static struct clk z_clk = {
+ .parent = &pll0_clk,
+ .div_mask = 0x1f,
+ .enable_bit = 8,
+ /* We'll need to access FRQCRB and FRQCRC */
+ .enable_reg = (void __iomem *)FRQCRB,
+ .ops = &zclk_ops,
+};
+
+/*
+ * It seems only 1/2 divider is usable in manual mode. 1/2 / 2/3
+ * switching is only available in auto-DVFS mode
+ */
+SH_FIXED_RATIO_CLK(pll0_div2_clk, pll0_clk, div2);
+
+static struct clk z2_clk = {
+ .parent = &pll0_div2_clk,
+ .div_mask = 0x1f,
+ .enable_bit = 0,
+ /* We'll need to access FRQCRB and FRQCRC */
+ .enable_reg = (void __iomem *)FRQCRB,
+ .ops = &zclk_ops,
+};
+
static struct clk *main_clks[] = {
&extalr_clk,
&extal1_clk,
&main_div2_clk,
&fsiack_clk,
&fsibck_clk,
+ &pll0_clk,
&pll1_clk,
&pll1_div2_clk,
&pll2_clk,
&pll2s_clk,
&pll2h_clk,
+ &z_clk,
+ &pll0_div2_clk,
+ &z2_clk,
};
/* DIV4 */
static void div4_kick(struct clk *clk)
{
- unsigned long value;
-
- /* set KICK bit in FRQCRB to update hardware setting */
- value = ioread32(CPG_MAP(FRQCRB));
- value |= (1 << 31);
- iowrite32(value, CPG_MAP(FRQCRB));
+ if (!WARN(!atomic_inc_and_test(&frqcr_lock), "FRQCR* lock broken!\n"))
+ frqcr_kick_do(clk);
+ atomic_dec(&frqcr_lock);
}
static int divisors[] = { 2, 3, 4, 6, 8, 12, 16, 18, 24, 0, 36, 48, 10};
/* MSTP */
enum {
MSTP217, MSTP216, MSTP207, MSTP206, MSTP204, MSTP203,
- MSTP315, MSTP314, MSTP313, MSTP312, MSTP305,
- MSTP522,
+ MSTP329, MSTP323, MSTP318, MSTP317, MSTP316,
+ MSTP315, MSTP314, MSTP313, MSTP312, MSTP305, MSTP300,
+ MSTP411, MSTP410, MSTP409,
+ MSTP522, MSTP515,
MSTP_NR
};
[MSTP207] = SH_CLK_MSTP32(&div6_clks[DIV6_MP], SMSTPCR2, 7, 0), /* SCIFB1 */
[MSTP216] = SH_CLK_MSTP32(&div6_clks[DIV6_MP], SMSTPCR2, 16, 0), /* SCIFB2 */
[MSTP217] = SH_CLK_MSTP32(&div6_clks[DIV6_MP], SMSTPCR2, 17, 0), /* SCIFB3 */
+ [MSTP300] = SH_CLK_MSTP32(&div4_clks[DIV4_HP], SMSTPCR3, 0, 0), /* IIC2 */
[MSTP305] = SH_CLK_MSTP32(&div6_clks[DIV6_MMC1],SMSTPCR3, 5, 0), /* MMCIF1 */
[MSTP312] = SH_CLK_MSTP32(&div6_clks[DIV6_SDHI2],SMSTPCR3, 12, 0), /* SDHI2 */
[MSTP313] = SH_CLK_MSTP32(&div6_clks[DIV6_SDHI1],SMSTPCR3, 13, 0), /* SDHI1 */
[MSTP314] = SH_CLK_MSTP32(&div6_clks[DIV6_SDHI0],SMSTPCR3, 14, 0), /* SDHI0 */
[MSTP315] = SH_CLK_MSTP32(&div6_clks[DIV6_MMC0],SMSTPCR3, 15, 0), /* MMCIF0 */
+ [MSTP316] = SH_CLK_MSTP32(&div4_clks[DIV4_HP], SMSTPCR3, 16, 0), /* IIC6 */
+ [MSTP317] = SH_CLK_MSTP32(&div4_clks[DIV4_HP], SMSTPCR3, 17, 0), /* IIC7 */
+ [MSTP318] = SH_CLK_MSTP32(&div4_clks[DIV4_HP], SMSTPCR3, 18, 0), /* IIC0 */
+ [MSTP323] = SH_CLK_MSTP32(&div4_clks[DIV4_HP], SMSTPCR3, 23, 0), /* IIC1 */
+ [MSTP329] = SH_CLK_MSTP32(&extalr_clk, SMSTPCR3, 29, 0), /* CMT10 */
+ [MSTP409] = SH_CLK_MSTP32(&main_div2_clk, SMSTPCR4, 9, 0), /* IIC5 */
+ [MSTP410] = SH_CLK_MSTP32(&div4_clks[DIV4_HP], SMSTPCR4, 10, 0), /* IIC4 */
+ [MSTP411] = SH_CLK_MSTP32(&div4_clks[DIV4_HP], SMSTPCR4, 11, 0), /* IIC3 */
[MSTP522] = SH_CLK_MSTP32(&extal2_clk, SMSTPCR5, 22, 0), /* Thermal */
+ [MSTP515] = SH_CLK_MSTP32(&div4_clks[DIV4_HP], SMSTPCR5, 15, 0), /* IIC8 */
};
static struct clk_lookup lookups[] = {
CLKDEV_CON_ID("pll2s", &pll2s_clk),
CLKDEV_CON_ID("pll2h", &pll2h_clk),
+ /* CPU clock */
+ CLKDEV_DEV_ID("cpufreq-cpu0", &z_clk),
+
/* DIV6 */
CLKDEV_CON_ID("zb", &div6_clks[DIV6_ZB]),
CLKDEV_CON_ID("vck1", &div6_clks[DIV6_VCK1]),
CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP216]),
CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP217]),
CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]),
+ CLKDEV_DEV_ID("e6520000.i2c", &mstp_clks[MSTP300]),
CLKDEV_DEV_ID("sh_mmcif.1", &mstp_clks[MSTP305]),
CLKDEV_DEV_ID("ee220000.mmcif", &mstp_clks[MSTP305]),
CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP312]),
CLKDEV_DEV_ID("ee100000.sdhi", &mstp_clks[MSTP314]),
CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP315]),
CLKDEV_DEV_ID("ee200000.mmcif", &mstp_clks[MSTP315]),
+ CLKDEV_DEV_ID("e6550000.i2c", &mstp_clks[MSTP316]),
+ CLKDEV_DEV_ID("e6560000.i2c", &mstp_clks[MSTP317]),
+ CLKDEV_DEV_ID("e6500000.i2c", &mstp_clks[MSTP318]),
+ CLKDEV_DEV_ID("e6510000.i2c", &mstp_clks[MSTP323]),
+ CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[MSTP329]),
+ CLKDEV_DEV_ID("e60b0000.i2c", &mstp_clks[MSTP409]),
+ CLKDEV_DEV_ID("e6540000.i2c", &mstp_clks[MSTP410]),
+ CLKDEV_DEV_ID("e6530000.i2c", &mstp_clks[MSTP411]),
+ CLKDEV_DEV_ID("e6570000.i2c", &mstp_clks[MSTP515]),
/* for DT */
CLKDEV_DEV_ID("e61f0000.thermal", &mstp_clks[MSTP522]),
int k, ret = 0;
u32 ckscr;
+ atomic_set(&frqcr_lock, -1);
+
reg = ioremap_nocache(CKSCR, PAGE_SIZE);
BUG_ON(!reg);
ckscr = ioread32(reg);
#include <linux/clkdev.h>
#include <mach/clock.h>
#include <mach/common.h>
+#include <mach/r8a7790.h>
/*
* MD EXTAL PLL0 PLL1 PLL3
* see "p1 / 2" on R8A7790_CLOCK_ROOT() below
*/
-#define MD(nr) (1 << nr)
-
#define CPG_BASE 0xe6150000
#define CPG_LEN 0x1000
+#define SMSTPCR1 0xe6150134
#define SMSTPCR2 0xe6150138
#define SMSTPCR3 0xe615013c
+#define SMSTPCR5 0xe6150144
#define SMSTPCR7 0xe615014c
-#define MODEMR 0xE6160060
#define SDCKCR 0xE6150074
#define SD2CKCR 0xE6150078
#define SD3CKCR 0xE615007C
enum {
MSTP721, MSTP720,
MSTP717, MSTP716,
+ MSTP522,
MSTP315, MSTP314, MSTP313, MSTP312, MSTP311, MSTP305, MSTP304,
MSTP216, MSTP207, MSTP206, MSTP204, MSTP203, MSTP202,
+ MSTP124,
MSTP_NR
};
static struct clk mstp_clks[MSTP_NR] = {
[MSTP721] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 21, 0), /* SCIF0 */
[MSTP720] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 20, 0), /* SCIF1 */
+ [MSTP717] = SH_CLK_MSTP32(&zs_clk, SMSTPCR7, 17, 0), /* HSCIF0 */
+ [MSTP716] = SH_CLK_MSTP32(&zs_clk, SMSTPCR7, 16, 0), /* HSCIF1 */
+ [MSTP522] = SH_CLK_MSTP32(&extal_clk, SMSTPCR5, 22, 0), /* Thermal */
[MSTP315] = SH_CLK_MSTP32(&div6_clks[DIV6_MMC0], SMSTPCR3, 15, 0), /* MMC0 */
[MSTP314] = SH_CLK_MSTP32(&div4_clks[DIV4_SD0], SMSTPCR3, 14, 0), /* SDHI0 */
[MSTP313] = SH_CLK_MSTP32(&div4_clks[DIV4_SD1], SMSTPCR3, 13, 0), /* SDHI1 */
[MSTP204] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 4, 0), /* SCIFA0 */
[MSTP203] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 3, 0), /* SCIFA1 */
[MSTP202] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 2, 0), /* SCIFA2 */
- [MSTP717] = SH_CLK_MSTP32(&zs_clk, SMSTPCR7, 17, 0), /* HSCIF0 */
- [MSTP716] = SH_CLK_MSTP32(&zs_clk, SMSTPCR7, 16, 0), /* HSCIF1 */
+ [MSTP124] = SH_CLK_MSTP32(&rclk_clk, SMSTPCR1, 24, 0), /* CMT0 */
};
static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP720]),
CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP717]),
CLKDEV_DEV_ID("sh-sci.9", &mstp_clks[MSTP716]),
+ CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]),
CLKDEV_DEV_ID("ee200000.mmcif", &mstp_clks[MSTP315]),
CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP315]),
CLKDEV_DEV_ID("ee100000.sdhi", &mstp_clks[MSTP314]),
CLKDEV_DEV_ID("sh_mobile_sdhi.3", &mstp_clks[MSTP311]),
CLKDEV_DEV_ID("ee220000.mmcif", &mstp_clks[MSTP305]),
CLKDEV_DEV_ID("sh_mmcif.1", &mstp_clks[MSTP305]),
+ CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]),
};
#define R8A7790_CLOCK_ROOT(e, m, p0, p1, p30, p31) \
void __init r8a7790_clock_init(void)
{
- void __iomem *modemr = ioremap_nocache(MODEMR, PAGE_SIZE);
- u32 mode;
+ u32 mode = r8a7790_read_mode_pins();
int k, ret = 0;
- BUG_ON(!modemr);
- mode = ioread32(modemr);
- iounmap(modemr);
-
switch (mode & (MD(14) | MD(13))) {
case 0:
R8A7790_CLOCK_ROOT(15, &extal_clk, 172, 208, 106, 88);
MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200,
MSTP331, MSTP329, MSTP328, MSTP325, MSTP323, MSTP322,
MSTP314, MSTP313, MSTP312, MSTP311,
- MSTP303, MSTP302, MSTP301, MSTP300,
+ MSTP304, MSTP303, MSTP302, MSTP301, MSTP300,
MSTP411, MSTP410, MSTP403,
MSTP_NR };
[MSTP313] = MSTP(&div6_clks[DIV6_SDHI1], SMSTPCR3, 13, 0), /* SDHI1 */
[MSTP312] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 12, 0), /* MMCIF0 */
[MSTP311] = MSTP(&div6_clks[DIV6_SDHI2], SMSTPCR3, 11, 0), /* SDHI2 */
+ [MSTP304] = MSTP(&main_div2_clk, SMSTPCR3, 4, 0), /* TPU0 */
[MSTP303] = MSTP(&main_div2_clk, SMSTPCR3, 3, 0), /* TPU1 */
[MSTP302] = MSTP(&main_div2_clk, SMSTPCR3, 2, 0), /* TPU2 */
[MSTP301] = MSTP(&main_div2_clk, SMSTPCR3, 1, 0), /* TPU3 */
CLKDEV_DEV_ID("e6bd0000.mmcif", &mstp_clks[MSTP312]), /* MMCIF0 */
CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP311]), /* SDHI2 */
CLKDEV_DEV_ID("ee140000.sdhi", &mstp_clks[MSTP311]), /* SDHI2 */
- CLKDEV_DEV_ID("leds-renesas-tpu.12", &mstp_clks[MSTP303]), /* TPU1 */
- CLKDEV_DEV_ID("leds-renesas-tpu.21", &mstp_clks[MSTP302]), /* TPU2 */
- CLKDEV_DEV_ID("leds-renesas-tpu.30", &mstp_clks[MSTP301]), /* TPU3 */
- CLKDEV_DEV_ID("leds-renesas-tpu.41", &mstp_clks[MSTP300]), /* TPU4 */
+ CLKDEV_DEV_ID("renesas-tpu-pwm.0", &mstp_clks[MSTP304]), /* TPU0 */
+ CLKDEV_DEV_ID("renesas-tpu-pwm.1", &mstp_clks[MSTP303]), /* TPU1 */
+ CLKDEV_DEV_ID("renesas-tpu-pwm.2", &mstp_clks[MSTP302]), /* TPU2 */
+ CLKDEV_DEV_ID("renesas-tpu-pwm.3", &mstp_clks[MSTP301]), /* TPU3 */
+ CLKDEV_DEV_ID("renesas-tpu-pwm.4", &mstp_clks[MSTP300]), /* TPU4 */
CLKDEV_DEV_ID("i2c-sh_mobile.3", &mstp_clks[MSTP411]), /* I2C3 */
CLKDEV_DEV_ID("e6826000.i2c", &mstp_clks[MSTP411]), /* I2C3 */
CLKDEV_DEV_ID("i2c-sh_mobile.4", &mstp_clks[MSTP410]), /* I2C4 */
+++ /dev/null
-/* empty */
#define __ASM_EMEV2_H__
extern void emev2_map_io(void);
-extern void emev2_init_irq(void);
-extern void emev2_add_early_devices(void);
+extern void emev2_init_delay(void);
extern void emev2_add_standard_devices(void);
extern void emev2_clock_init(void);
-extern void emev2_set_boot_vector(unsigned long value);
#define EMEV2_GPIO_BASE 200
#define EMEV2_GPIO_IRQ(n) (EMEV2_GPIO_BASE + (n))
void r8a73a4_add_standard_devices(void);
void r8a73a4_clock_init(void);
void r8a73a4_pinmux_init(void);
+void r8a73a4_init_delay(void);
#endif /* __ASM_R8A73A4_H__ */
SHDMA_SLAVE_FSIB_TX,
SHDMA_SLAVE_USBHS_TX,
SHDMA_SLAVE_USBHS_RX,
+ SHDMA_SLAVE_MMCIF_TX,
+ SHDMA_SLAVE_MMCIF_RX,
};
extern void r8a7740_meram_workaround(void);
extern void r8a7778_init_late(void);
extern void r8a7778_init_delay(void);
-extern void r8a7778_init_irq(void);
extern void r8a7778_init_irq_dt(void);
extern void r8a7778_clock_init(void);
extern void r8a7778_init_irq_extpin(int irlm);
void r8a7790_add_standard_devices(void);
void r8a7790_clock_init(void);
void r8a7790_pinmux_init(void);
+void r8a7790_init_delay(void);
void r8a7790_timer_init(void);
+#define MD(nr) BIT(nr)
+u32 r8a7790_read_mode_pins(void);
+
#endif /* __ASM_R8A7790_H__ */
#ifndef __ASM_SH73A0_H__
#define __ASM_SH73A0_H__
-/* Pin Function Controller:
- * GPIO_FN_xx - GPIO used to select pin function and MSEL switch
- * GPIO_PORTxx - GPIO mapped to real I/O pin on CPU
- */
-enum {
- /* Hardware manual Table 25-1 (GPIO) */
- GPIO_PORT0, GPIO_PORT1, GPIO_PORT2, GPIO_PORT3, GPIO_PORT4,
- GPIO_PORT5, GPIO_PORT6, GPIO_PORT7, GPIO_PORT8, GPIO_PORT9,
-
- GPIO_PORT10, GPIO_PORT11, GPIO_PORT12, GPIO_PORT13, GPIO_PORT14,
- GPIO_PORT15, GPIO_PORT16, GPIO_PORT17, GPIO_PORT18, GPIO_PORT19,
-
- GPIO_PORT20, GPIO_PORT21, GPIO_PORT22, GPIO_PORT23, GPIO_PORT24,
- GPIO_PORT25, GPIO_PORT26, GPIO_PORT27, GPIO_PORT28, GPIO_PORT29,
-
- GPIO_PORT30, GPIO_PORT31, GPIO_PORT32, GPIO_PORT33, GPIO_PORT34,
- GPIO_PORT35, GPIO_PORT36, GPIO_PORT37, GPIO_PORT38, GPIO_PORT39,
-
- GPIO_PORT40, GPIO_PORT41, GPIO_PORT42, GPIO_PORT43, GPIO_PORT44,
- GPIO_PORT45, GPIO_PORT46, GPIO_PORT47, GPIO_PORT48, GPIO_PORT49,
-
- GPIO_PORT50, GPIO_PORT51, GPIO_PORT52, GPIO_PORT53, GPIO_PORT54,
- GPIO_PORT55, GPIO_PORT56, GPIO_PORT57, GPIO_PORT58, GPIO_PORT59,
-
- GPIO_PORT60, GPIO_PORT61, GPIO_PORT62, GPIO_PORT63, GPIO_PORT64,
- GPIO_PORT65, GPIO_PORT66, GPIO_PORT67, GPIO_PORT68, GPIO_PORT69,
-
- GPIO_PORT70, GPIO_PORT71, GPIO_PORT72, GPIO_PORT73, GPIO_PORT74,
- GPIO_PORT75, GPIO_PORT76, GPIO_PORT77, GPIO_PORT78, GPIO_PORT79,
-
- GPIO_PORT80, GPIO_PORT81, GPIO_PORT82, GPIO_PORT83, GPIO_PORT84,
- GPIO_PORT85, GPIO_PORT86, GPIO_PORT87, GPIO_PORT88, GPIO_PORT89,
-
- GPIO_PORT90, GPIO_PORT91, GPIO_PORT92, GPIO_PORT93, GPIO_PORT94,
- GPIO_PORT95, GPIO_PORT96, GPIO_PORT97, GPIO_PORT98, GPIO_PORT99,
-
- GPIO_PORT100, GPIO_PORT101, GPIO_PORT102, GPIO_PORT103, GPIO_PORT104,
- GPIO_PORT105, GPIO_PORT106, GPIO_PORT107, GPIO_PORT108, GPIO_PORT109,
-
- GPIO_PORT110, GPIO_PORT111, GPIO_PORT112, GPIO_PORT113, GPIO_PORT114,
- GPIO_PORT115, GPIO_PORT116, GPIO_PORT117, GPIO_PORT118,
-
- GPIO_PORT128, GPIO_PORT129,
-
- GPIO_PORT130, GPIO_PORT131, GPIO_PORT132, GPIO_PORT133, GPIO_PORT134,
- GPIO_PORT135, GPIO_PORT136, GPIO_PORT137, GPIO_PORT138, GPIO_PORT139,
-
- GPIO_PORT140, GPIO_PORT141, GPIO_PORT142, GPIO_PORT143, GPIO_PORT144,
- GPIO_PORT145, GPIO_PORT146, GPIO_PORT147, GPIO_PORT148, GPIO_PORT149,
-
- GPIO_PORT150, GPIO_PORT151, GPIO_PORT152, GPIO_PORT153, GPIO_PORT154,
- GPIO_PORT155, GPIO_PORT156, GPIO_PORT157, GPIO_PORT158, GPIO_PORT159,
-
- GPIO_PORT160, GPIO_PORT161, GPIO_PORT162, GPIO_PORT163, GPIO_PORT164,
-
- GPIO_PORT192, GPIO_PORT193, GPIO_PORT194,
- GPIO_PORT195, GPIO_PORT196, GPIO_PORT197, GPIO_PORT198, GPIO_PORT199,
-
- GPIO_PORT200, GPIO_PORT201, GPIO_PORT202, GPIO_PORT203, GPIO_PORT204,
- GPIO_PORT205, GPIO_PORT206, GPIO_PORT207, GPIO_PORT208, GPIO_PORT209,
-
- GPIO_PORT210, GPIO_PORT211, GPIO_PORT212, GPIO_PORT213, GPIO_PORT214,
- GPIO_PORT215, GPIO_PORT216, GPIO_PORT217, GPIO_PORT218, GPIO_PORT219,
-
- GPIO_PORT220, GPIO_PORT221, GPIO_PORT222, GPIO_PORT223, GPIO_PORT224,
- GPIO_PORT225, GPIO_PORT226, GPIO_PORT227, GPIO_PORT228, GPIO_PORT229,
-
- GPIO_PORT230, GPIO_PORT231, GPIO_PORT232, GPIO_PORT233, GPIO_PORT234,
- GPIO_PORT235, GPIO_PORT236, GPIO_PORT237, GPIO_PORT238, GPIO_PORT239,
-
- GPIO_PORT240, GPIO_PORT241, GPIO_PORT242, GPIO_PORT243, GPIO_PORT244,
- GPIO_PORT245, GPIO_PORT246, GPIO_PORT247, GPIO_PORT248, GPIO_PORT249,
-
- GPIO_PORT250, GPIO_PORT251, GPIO_PORT252, GPIO_PORT253, GPIO_PORT254,
- GPIO_PORT255, GPIO_PORT256, GPIO_PORT257, GPIO_PORT258, GPIO_PORT259,
-
- GPIO_PORT260, GPIO_PORT261, GPIO_PORT262, GPIO_PORT263, GPIO_PORT264,
- GPIO_PORT265, GPIO_PORT266, GPIO_PORT267, GPIO_PORT268, GPIO_PORT269,
-
- GPIO_PORT270, GPIO_PORT271, GPIO_PORT272, GPIO_PORT273, GPIO_PORT274,
- GPIO_PORT275, GPIO_PORT276, GPIO_PORT277, GPIO_PORT278, GPIO_PORT279,
-
- GPIO_PORT280, GPIO_PORT281, GPIO_PORT282,
-
- GPIO_PORT288, GPIO_PORT289,
-
- GPIO_PORT290, GPIO_PORT291, GPIO_PORT292, GPIO_PORT293, GPIO_PORT294,
- GPIO_PORT295, GPIO_PORT296, GPIO_PORT297, GPIO_PORT298, GPIO_PORT299,
-
- GPIO_PORT300, GPIO_PORT301, GPIO_PORT302, GPIO_PORT303, GPIO_PORT304,
- GPIO_PORT305, GPIO_PORT306, GPIO_PORT307, GPIO_PORT308, GPIO_PORT309,
-
- /* Table 25-1 (Function 0-7) */
- GPIO_FN_GPI0 = 310,
- GPIO_FN_GPI1,
- GPIO_FN_GPI2,
- GPIO_FN_GPI3,
- GPIO_FN_GPI4,
- GPIO_FN_GPI5,
- GPIO_FN_GPI6,
- GPIO_FN_GPI7,
- GPIO_FN_GPO7, GPIO_FN_MFG0_OUT2,
- GPIO_FN_GPO6, GPIO_FN_MFG1_OUT2,
- GPIO_FN_GPO5,
- GPIO_FN_PORT16_VIO_CKOR,
- GPIO_FN_PORT19_VIO_CKO2,
- GPIO_FN_GPO0,
- GPIO_FN_GPO1,
- GPIO_FN_GPO2, GPIO_FN_STATUS0,
- GPIO_FN_GPO3, GPIO_FN_STATUS1,
- GPIO_FN_GPO4, GPIO_FN_STATUS2,
- GPIO_FN_VINT,
- GPIO_FN_TCKON,
- GPIO_FN_XDVFS1,
- GPIO_FN_MFG0_OUT1, GPIO_FN_PORT27_IROUT,
- GPIO_FN_XDVFS2,
- GPIO_FN_PORT28_TPU1TO1,
- GPIO_FN_SIM_RST, GPIO_FN_PORT29_TPU1TO1,
- GPIO_FN_SIM_CLK, GPIO_FN_PORT30_VIO_CKOR,
- GPIO_FN_SIM_D, GPIO_FN_PORT31_IROUT,
- GPIO_FN_XWUP,
- GPIO_FN_VACK,
- GPIO_FN_XTAL1L,
- GPIO_FN_PORT49_IROUT,
- GPIO_FN_BBIF2_TSYNC2, GPIO_FN_TPU2TO2,
-
- GPIO_FN_BBIF2_TSCK2, GPIO_FN_TPU2TO3,
- GPIO_FN_BBIF2_TXD2,
- GPIO_FN_TPU3TO3,
- GPIO_FN_TPU3TO2,
- GPIO_FN_TPU0TO0,
- GPIO_FN_A0, GPIO_FN_BS_,
- GPIO_FN_A12, GPIO_FN_TPU4TO2,
- GPIO_FN_A13, GPIO_FN_TPU0TO1,
- GPIO_FN_A14,
- GPIO_FN_A15,
- GPIO_FN_A16, GPIO_FN_MSIOF0_SS1,
- GPIO_FN_A17, GPIO_FN_MSIOF0_TSYNC,
- GPIO_FN_A18, GPIO_FN_MSIOF0_TSCK,
- GPIO_FN_A19, GPIO_FN_MSIOF0_TXD,
- GPIO_FN_A20, GPIO_FN_MSIOF0_RSCK,
- GPIO_FN_A21, GPIO_FN_MSIOF0_RSYNC,
- GPIO_FN_A22, GPIO_FN_MSIOF0_MCK0,
- GPIO_FN_A23, GPIO_FN_MSIOF0_MCK1,
- GPIO_FN_A24, GPIO_FN_MSIOF0_RXD,
- GPIO_FN_A25, GPIO_FN_MSIOF0_SS2,
- GPIO_FN_A26,
- GPIO_FN_FCE1_,
- GPIO_FN_DACK0,
- GPIO_FN_FCE0_,
- GPIO_FN_WAIT_, GPIO_FN_DREQ0,
- GPIO_FN_FRB,
- GPIO_FN_CKO,
- GPIO_FN_NBRSTOUT_,
- GPIO_FN_NBRST_,
- GPIO_FN_BBIF2_TXD,
- GPIO_FN_BBIF2_RXD,
- GPIO_FN_BBIF2_SYNC,
- GPIO_FN_BBIF2_SCK,
- GPIO_FN_MFG3_IN2,
- GPIO_FN_MFG3_IN1,
- GPIO_FN_BBIF1_SS2, GPIO_FN_MFG3_OUT1,
- GPIO_FN_HSI_RX_DATA, GPIO_FN_BBIF1_RXD,
- GPIO_FN_HSI_TX_WAKE, GPIO_FN_BBIF1_TSCK,
- GPIO_FN_HSI_TX_DATA, GPIO_FN_BBIF1_TSYNC,
- GPIO_FN_HSI_TX_READY, GPIO_FN_BBIF1_TXD,
- GPIO_FN_HSI_RX_READY, GPIO_FN_BBIF1_RSCK,
- GPIO_FN_HSI_RX_WAKE, GPIO_FN_BBIF1_RSYNC,
- GPIO_FN_HSI_RX_FLAG, GPIO_FN_BBIF1_SS1, GPIO_FN_BBIF1_FLOW,
- GPIO_FN_HSI_TX_FLAG,
- GPIO_FN_VIO_VD, GPIO_FN_VIO2_VD,
-
- GPIO_FN_VIO_HD,
- GPIO_FN_VIO2_HD,
- GPIO_FN_VIO_D0, GPIO_FN_PORT130_MSIOF2_RXD,
- GPIO_FN_VIO_D1, GPIO_FN_PORT131_MSIOF2_SS1,
- GPIO_FN_VIO_D2, GPIO_FN_PORT132_MSIOF2_SS2,
- GPIO_FN_VIO_D3, GPIO_FN_MSIOF2_TSYNC,
- GPIO_FN_VIO_D4, GPIO_FN_MSIOF2_TXD,
- GPIO_FN_VIO_D5, GPIO_FN_MSIOF2_TSCK,
- GPIO_FN_VIO_D6,
- GPIO_FN_VIO_D7,
- GPIO_FN_VIO_D8, GPIO_FN_VIO2_D0,
- GPIO_FN_VIO_D9, GPIO_FN_VIO2_D1,
- GPIO_FN_VIO_D10, GPIO_FN_TPU0TO2, GPIO_FN_VIO2_D2,
- GPIO_FN_VIO_D11, GPIO_FN_TPU0TO3, GPIO_FN_VIO2_D3,
- GPIO_FN_VIO_D12, GPIO_FN_VIO2_D4,
- GPIO_FN_VIO_D13,
- GPIO_FN_VIO2_D5,
- GPIO_FN_VIO_D14, GPIO_FN_VIO2_D6,
- GPIO_FN_VIO_D15, GPIO_FN_TPU1TO3,
- GPIO_FN_VIO2_D7,
- GPIO_FN_VIO_CLK,
- GPIO_FN_VIO2_CLK,
- GPIO_FN_VIO_FIELD, GPIO_FN_VIO2_FIELD,
- GPIO_FN_VIO_CKO,
- GPIO_FN_A27, GPIO_FN_MFG0_IN1,
- GPIO_FN_MFG0_IN2,
- GPIO_FN_TS_SPSYNC3, GPIO_FN_MSIOF2_RSCK,
- GPIO_FN_TS_SDAT3, GPIO_FN_MSIOF2_RSYNC,
- GPIO_FN_TPU1TO2, GPIO_FN_TS_SDEN3, GPIO_FN_PORT153_MSIOF2_SS1,
- GPIO_FN_MSIOF2_MCK0,
- GPIO_FN_MSIOF2_MCK1,
- GPIO_FN_PORT156_MSIOF2_SS2,
- GPIO_FN_PORT157_MSIOF2_RXD,
- GPIO_FN_DINT_, GPIO_FN_TS_SCK3,
- GPIO_FN_NMI,
- GPIO_FN_TPU3TO0,
- GPIO_FN_BBIF2_TSYNC1,
- GPIO_FN_BBIF2_TSCK1,
- GPIO_FN_BBIF2_TXD1,
- GPIO_FN_MFG2_OUT2,
- GPIO_FN_TPU2TO1,
- GPIO_FN_TPU4TO1, GPIO_FN_MFG4_OUT2,
- GPIO_FN_D16,
- GPIO_FN_D17,
- GPIO_FN_D18,
- GPIO_FN_D19,
- GPIO_FN_D20,
- GPIO_FN_D21,
- GPIO_FN_D22,
- GPIO_FN_PORT207_MSIOF0L_SS1, GPIO_FN_D23,
- GPIO_FN_PORT208_MSIOF0L_SS2, GPIO_FN_D24,
- GPIO_FN_D25,
- GPIO_FN_DREQ2, GPIO_FN_PORT210_MSIOF0L_SS1, GPIO_FN_D26,
- GPIO_FN_PORT211_MSIOF0L_SS2, GPIO_FN_D27,
- GPIO_FN_TS_SPSYNC1, GPIO_FN_MSIOF0L_MCK0, GPIO_FN_D28,
- GPIO_FN_TS_SDAT1, GPIO_FN_MSIOF0L_MCK1, GPIO_FN_D29,
- GPIO_FN_TS_SDEN1, GPIO_FN_MSIOF0L_RSCK, GPIO_FN_D30,
- GPIO_FN_TS_SCK1, GPIO_FN_MSIOF0L_RSYNC, GPIO_FN_D31,
- GPIO_FN_DACK2,
- GPIO_FN_MSIOF0L_TSYNC, GPIO_FN_VIO2_FIELD3,
- GPIO_FN_DACK3,
- GPIO_FN_PORT218_VIO_CKOR,
- GPIO_FN_DREQ3, GPIO_FN_MSIOF0L_TSCK, GPIO_FN_VIO2_CLK3, \
- GPIO_FN_DREQ1,
- GPIO_FN_PWEN, GPIO_FN_MSIOF0L_RXD, GPIO_FN_VIO2_HD3, \
- GPIO_FN_DACK1, GPIO_FN_OVCN,
- GPIO_FN_MSIOF0L_TXD, GPIO_FN_VIO2_VD3,
-
- GPIO_FN_OVCN2,
- GPIO_FN_EXTLP, GPIO_FN_PORT226_VIO_CKO2,
- GPIO_FN_IDIN,
- GPIO_FN_MFG1_IN1,
- GPIO_FN_MSIOF1_TXD,
- GPIO_FN_MSIOF1_TSYNC,
- GPIO_FN_MSIOF1_TSCK,
- GPIO_FN_MSIOF1_RXD,
- GPIO_FN_MSIOF1_RSCK, GPIO_FN_VIO2_CLK2,
- GPIO_FN_MSIOF1_RSYNC, GPIO_FN_MFG1_IN2, GPIO_FN_VIO2_VD2, \
- GPIO_FN_MSIOF1_MCK0,
- GPIO_FN_MSIOF1_MCK1,
- GPIO_FN_MSIOF1_SS1, GPIO_FN_VIO2_FIELD2,
- GPIO_FN_MSIOF1_SS2, GPIO_FN_VIO2_HD2,
- GPIO_FN_PORT241_IROUT, GPIO_FN_MFG4_OUT1, \
- GPIO_FN_TPU4TO0,
- GPIO_FN_MFG4_IN2,
- GPIO_FN_PORT243_VIO_CKO2,
- GPIO_FN_MFG2_IN1,
- GPIO_FN_MSIOF2R_RXD,
- GPIO_FN_MFG2_IN2,
- GPIO_FN_MSIOF2R_TXD,
- GPIO_FN_MFG1_OUT1,
- GPIO_FN_TPU1TO0,
- GPIO_FN_MFG3_OUT2,
- GPIO_FN_TPU3TO1,
- GPIO_FN_MFG2_OUT1,
- GPIO_FN_TPU2TO0,
- GPIO_FN_MSIOF2R_TSCK,
- GPIO_FN_PORT249_IROUT, GPIO_FN_MFG4_IN1, \
- GPIO_FN_MSIOF2R_TSYNC,
- GPIO_FN_SDHICLK0,
- GPIO_FN_SDHICD0,
- GPIO_FN_SDHID0_0,
- GPIO_FN_SDHID0_1,
- GPIO_FN_SDHID0_2,
- GPIO_FN_SDHID0_3,
- GPIO_FN_SDHICMD0,
- GPIO_FN_SDHIWP0,
- GPIO_FN_SDHICLK1,
- GPIO_FN_SDHID1_0, GPIO_FN_TS_SPSYNC2,
- GPIO_FN_SDHID1_1, GPIO_FN_TS_SDAT2,
- GPIO_FN_SDHID1_2, GPIO_FN_TS_SDEN2,
- GPIO_FN_SDHID1_3, GPIO_FN_TS_SCK2,
- GPIO_FN_SDHICMD1,
- GPIO_FN_SDHICLK2,
- GPIO_FN_SDHID2_0, GPIO_FN_TS_SPSYNC4,
- GPIO_FN_SDHID2_1, GPIO_FN_TS_SDAT4,
- GPIO_FN_SDHID2_2, GPIO_FN_TS_SDEN4,
- GPIO_FN_SDHID2_3, GPIO_FN_TS_SCK4,
- GPIO_FN_SDHICMD2,
- GPIO_FN_MMCCLK0,
- GPIO_FN_MMCD0_0,
- GPIO_FN_MMCD0_1,
- GPIO_FN_MMCD0_2,
- GPIO_FN_MMCD0_3,
- GPIO_FN_MMCD0_4, GPIO_FN_TS_SPSYNC5,
- GPIO_FN_MMCD0_5, GPIO_FN_TS_SDAT5,
- GPIO_FN_MMCD0_6, GPIO_FN_TS_SDEN5,
- GPIO_FN_MMCD0_7, GPIO_FN_TS_SCK5,
- GPIO_FN_MMCCMD0,
- GPIO_FN_RESETOUTS_, GPIO_FN_EXTAL2OUT,
- GPIO_FN_MCP_WAIT__MCP_FRB,
- GPIO_FN_MCP_CKO, GPIO_FN_MMCCLK1,
- GPIO_FN_MCP_D15_MCP_NAF15,
- GPIO_FN_MCP_D14_MCP_NAF14,
- GPIO_FN_MCP_D13_MCP_NAF13,
- GPIO_FN_MCP_D12_MCP_NAF12,
- GPIO_FN_MCP_D11_MCP_NAF11,
- GPIO_FN_MCP_D10_MCP_NAF10,
- GPIO_FN_MCP_D9_MCP_NAF9,
- GPIO_FN_MCP_D8_MCP_NAF8, GPIO_FN_MMCCMD1,
- GPIO_FN_MCP_D7_MCP_NAF7, GPIO_FN_MMCD1_7,
-
- GPIO_FN_MCP_D6_MCP_NAF6, GPIO_FN_MMCD1_6,
- GPIO_FN_MCP_D5_MCP_NAF5, GPIO_FN_MMCD1_5,
- GPIO_FN_MCP_D4_MCP_NAF4, GPIO_FN_MMCD1_4,
- GPIO_FN_MCP_D3_MCP_NAF3, GPIO_FN_MMCD1_3,
- GPIO_FN_MCP_D2_MCP_NAF2, GPIO_FN_MMCD1_2,
- GPIO_FN_MCP_D1_MCP_NAF1, GPIO_FN_MMCD1_1,
- GPIO_FN_MCP_D0_MCP_NAF0, GPIO_FN_MMCD1_0,
- GPIO_FN_MCP_NBRSTOUT_,
- GPIO_FN_MCP_WE0__MCP_FWE, GPIO_FN_MCP_RDWR_MCP_FWE,
-
- /* MSEL2 special case */
- GPIO_FN_TSIF2_TS_XX1,
- GPIO_FN_TSIF2_TS_XX2,
- GPIO_FN_TSIF2_TS_XX3,
- GPIO_FN_TSIF2_TS_XX4,
- GPIO_FN_TSIF2_TS_XX5,
- GPIO_FN_TSIF1_TS_XX1,
- GPIO_FN_TSIF1_TS_XX2,
- GPIO_FN_TSIF1_TS_XX3,
- GPIO_FN_TSIF1_TS_XX4,
- GPIO_FN_TSIF1_TS_XX5,
- GPIO_FN_TSIF0_TS_XX1,
- GPIO_FN_TSIF0_TS_XX2,
- GPIO_FN_TSIF0_TS_XX3,
- GPIO_FN_TSIF0_TS_XX4,
- GPIO_FN_TSIF0_TS_XX5,
- GPIO_FN_MST1_TS_XX1,
- GPIO_FN_MST1_TS_XX2,
- GPIO_FN_MST1_TS_XX3,
- GPIO_FN_MST1_TS_XX4,
- GPIO_FN_MST1_TS_XX5,
- GPIO_FN_MST0_TS_XX1,
- GPIO_FN_MST0_TS_XX2,
- GPIO_FN_MST0_TS_XX3,
- GPIO_FN_MST0_TS_XX4,
- GPIO_FN_MST0_TS_XX5,
-
- /* MSEL3 special cases */
- GPIO_FN_SDHI0_VCCQ_MC0_ON,
- GPIO_FN_SDHI0_VCCQ_MC0_OFF,
- GPIO_FN_DEBUG_MON_VIO,
- GPIO_FN_DEBUG_MON_LCDD,
- GPIO_FN_LCDC_LCDC0,
- GPIO_FN_LCDC_LCDC1,
-
- /* MSEL4 special cases */
- GPIO_FN_IRQ9_MEM_INT,
- GPIO_FN_IRQ9_MCP_INT,
- GPIO_FN_A11,
- GPIO_FN_TPU4TO3,
- GPIO_FN_RESETA_N_PU_ON,
- GPIO_FN_RESETA_N_PU_OFF,
- GPIO_FN_EDBGREQ_PD,
- GPIO_FN_EDBGREQ_PU,
-
- /* end of GPIO */
- GPIO_NR,
-};
+#define GPIO_NR 310
/* DMA slave IDs */
enum {
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
-#include <linux/irqchip.h>
#include <linux/platform_device.h>
#include <linux/platform_data/gpio-em.h>
#include <linux/of_platform.h>
static struct map_desc emev2_io_desc[] __initdata = {
#ifdef CONFIG_SMP
- /* 128K entity map for 0xe0100000 (SMU) */
- {
- .virtual = 0xe0100000,
- .pfn = __phys_to_pfn(0xe0100000),
- .length = SZ_128K,
- .type = MT_DEVICE
- },
/* 2M mapping for SCU + L2 controller */
{
.virtual = 0xf0000000,
/* UART */
static struct resource uart0_resources[] = {
- [0] = {
- .start = 0xe1020000,
- .end = 0xe1020037,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = 40,
- .flags = IORESOURCE_IRQ,
- }
-};
-
-static struct platform_device uart0_device = {
- .name = "serial8250-em",
- .id = 0,
- .num_resources = ARRAY_SIZE(uart0_resources),
- .resource = uart0_resources,
+ DEFINE_RES_MEM(0xe1020000, 0x38),
+ DEFINE_RES_IRQ(40),
};
static struct resource uart1_resources[] = {
- [0] = {
- .start = 0xe1030000,
- .end = 0xe1030037,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = 41,
- .flags = IORESOURCE_IRQ,
- }
-};
-
-static struct platform_device uart1_device = {
- .name = "serial8250-em",
- .id = 1,
- .num_resources = ARRAY_SIZE(uart1_resources),
- .resource = uart1_resources,
+ DEFINE_RES_MEM(0xe1030000, 0x38),
+ DEFINE_RES_IRQ(41),
};
static struct resource uart2_resources[] = {
- [0] = {
- .start = 0xe1040000,
- .end = 0xe1040037,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = 42,
- .flags = IORESOURCE_IRQ,
- }
-};
-
-static struct platform_device uart2_device = {
- .name = "serial8250-em",
- .id = 2,
- .num_resources = ARRAY_SIZE(uart2_resources),
- .resource = uart2_resources,
+ DEFINE_RES_MEM(0xe1040000, 0x38),
+ DEFINE_RES_IRQ(42),
};
static struct resource uart3_resources[] = {
- [0] = {
- .start = 0xe1050000,
- .end = 0xe1050037,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = 43,
- .flags = IORESOURCE_IRQ,
- }
+ DEFINE_RES_MEM(0xe1050000, 0x38),
+ DEFINE_RES_IRQ(43),
};
-static struct platform_device uart3_device = {
- .name = "serial8250-em",
- .id = 3,
- .num_resources = ARRAY_SIZE(uart3_resources),
- .resource = uart3_resources,
-};
+#define emev2_register_uart(idx) \
+ platform_device_register_simple("serial8250-em", idx, \
+ uart##idx##_resources, \
+ ARRAY_SIZE(uart##idx##_resources))
/* STI */
static struct resource sti_resources[] = {
- [0] = {
- .name = "STI",
- .start = 0xe0180000,
- .end = 0xe0180053,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = 157,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device sti_device = {
- .name = "em_sti",
- .id = 0,
- .resource = sti_resources,
- .num_resources = ARRAY_SIZE(sti_resources),
+ DEFINE_RES_MEM(0xe0180000, 0x54),
+ DEFINE_RES_IRQ(157),
};
+#define emev2_register_sti() \
+ platform_device_register_simple("em_sti", 0, \
+ sti_resources, \
+ ARRAY_SIZE(sti_resources))
/* GIO */
static struct gpio_em_config gio0_config = {
};
static struct resource gio0_resources[] = {
- [0] = {
- .name = "GIO_000",
- .start = 0xe0050000,
- .end = 0xe005002b,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .name = "GIO_000",
- .start = 0xe0050040,
- .end = 0xe005005f,
- .flags = IORESOURCE_MEM,
- },
- [2] = {
- .start = 99,
- .flags = IORESOURCE_IRQ,
- },
- [3] = {
- .start = 100,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device gio0_device = {
- .name = "em_gio",
- .id = 0,
- .resource = gio0_resources,
- .num_resources = ARRAY_SIZE(gio0_resources),
- .dev = {
- .platform_data = &gio0_config,
- },
+ DEFINE_RES_MEM(0xe0050000, 0x2c),
+ DEFINE_RES_MEM(0xe0050040, 0x20),
+ DEFINE_RES_IRQ(99),
+ DEFINE_RES_IRQ(100),
};
static struct gpio_em_config gio1_config = {
};
static struct resource gio1_resources[] = {
- [0] = {
- .name = "GIO_032",
- .start = 0xe0050080,
- .end = 0xe00500ab,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .name = "GIO_032",
- .start = 0xe00500c0,
- .end = 0xe00500df,
- .flags = IORESOURCE_MEM,
- },
- [2] = {
- .start = 101,
- .flags = IORESOURCE_IRQ,
- },
- [3] = {
- .start = 102,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device gio1_device = {
- .name = "em_gio",
- .id = 1,
- .resource = gio1_resources,
- .num_resources = ARRAY_SIZE(gio1_resources),
- .dev = {
- .platform_data = &gio1_config,
- },
+ DEFINE_RES_MEM(0xe0050080, 0x2c),
+ DEFINE_RES_MEM(0xe00500c0, 0x20),
+ DEFINE_RES_IRQ(101),
+ DEFINE_RES_IRQ(102),
};
static struct gpio_em_config gio2_config = {
};
static struct resource gio2_resources[] = {
- [0] = {
- .name = "GIO_064",
- .start = 0xe0050100,
- .end = 0xe005012b,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .name = "GIO_064",
- .start = 0xe0050140,
- .end = 0xe005015f,
- .flags = IORESOURCE_MEM,
- },
- [2] = {
- .start = 103,
- .flags = IORESOURCE_IRQ,
- },
- [3] = {
- .start = 104,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device gio2_device = {
- .name = "em_gio",
- .id = 2,
- .resource = gio2_resources,
- .num_resources = ARRAY_SIZE(gio2_resources),
- .dev = {
- .platform_data = &gio2_config,
- },
+ DEFINE_RES_MEM(0xe0050100, 0x2c),
+ DEFINE_RES_MEM(0xe0050140, 0x20),
+ DEFINE_RES_IRQ(103),
+ DEFINE_RES_IRQ(104),
};
static struct gpio_em_config gio3_config = {
};
static struct resource gio3_resources[] = {
- [0] = {
- .name = "GIO_096",
- .start = 0xe0050180,
- .end = 0xe00501ab,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .name = "GIO_096",
- .start = 0xe00501c0,
- .end = 0xe00501df,
- .flags = IORESOURCE_MEM,
- },
- [2] = {
- .start = 105,
- .flags = IORESOURCE_IRQ,
- },
- [3] = {
- .start = 106,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device gio3_device = {
- .name = "em_gio",
- .id = 3,
- .resource = gio3_resources,
- .num_resources = ARRAY_SIZE(gio3_resources),
- .dev = {
- .platform_data = &gio3_config,
- },
+ DEFINE_RES_MEM(0xe0050180, 0x2c),
+ DEFINE_RES_MEM(0xe00501c0, 0x20),
+ DEFINE_RES_IRQ(105),
+ DEFINE_RES_IRQ(106),
};
static struct gpio_em_config gio4_config = {
};
static struct resource gio4_resources[] = {
- [0] = {
- .name = "GIO_128",
- .start = 0xe0050200,
- .end = 0xe005022b,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .name = "GIO_128",
- .start = 0xe0050240,
- .end = 0xe005025f,
- .flags = IORESOURCE_MEM,
- },
- [2] = {
- .start = 107,
- .flags = IORESOURCE_IRQ,
- },
- [3] = {
- .start = 108,
- .flags = IORESOURCE_IRQ,
- },
+ DEFINE_RES_MEM(0xe0050200, 0x2c),
+ DEFINE_RES_MEM(0xe0050240, 0x20),
+ DEFINE_RES_IRQ(107),
+ DEFINE_RES_IRQ(108),
};
-static struct platform_device gio4_device = {
- .name = "em_gio",
- .id = 4,
- .resource = gio4_resources,
- .num_resources = ARRAY_SIZE(gio4_resources),
- .dev = {
- .platform_data = &gio4_config,
- },
-};
+#define emev2_register_gio(idx) \
+ platform_device_register_resndata(&platform_bus, "em_gio", \
+ idx, gio##idx##_resources, \
+ ARRAY_SIZE(gio##idx##_resources), \
+ &gio##idx##_config, \
+ sizeof(struct gpio_em_config))
static struct resource pmu_resources[] = {
- [0] = {
- .start = 152,
- .end = 152,
- .flags = IORESOURCE_IRQ,
- },
- [1] = {
- .start = 153,
- .end = 153,
- .flags = IORESOURCE_IRQ,
- },
+ DEFINE_RES_IRQ(152),
+ DEFINE_RES_IRQ(153),
};
-static struct platform_device pmu_device = {
- .name = "arm-pmu",
- .id = -1,
- .num_resources = ARRAY_SIZE(pmu_resources),
- .resource = pmu_resources,
-};
-
-static struct platform_device *emev2_early_devices[] __initdata = {
- &uart0_device,
- &uart1_device,
- &uart2_device,
- &uart3_device,
-};
-
-static struct platform_device *emev2_late_devices[] __initdata = {
- &sti_device,
- &gio0_device,
- &gio1_device,
- &gio2_device,
- &gio3_device,
- &gio4_device,
- &pmu_device,
-};
+#define emev2_register_pmu() \
+ platform_device_register_simple("arm-pmu", -1, \
+ pmu_resources, \
+ ARRAY_SIZE(pmu_resources))
void __init emev2_add_standard_devices(void)
{
emev2_clock_init();
- platform_add_devices(emev2_early_devices,
- ARRAY_SIZE(emev2_early_devices));
-
- platform_add_devices(emev2_late_devices,
- ARRAY_SIZE(emev2_late_devices));
+ emev2_register_uart(0);
+ emev2_register_uart(1);
+ emev2_register_uart(2);
+ emev2_register_uart(3);
+ emev2_register_sti();
+ emev2_register_gio(0);
+ emev2_register_gio(1);
+ emev2_register_gio(2);
+ emev2_register_gio(3);
+ emev2_register_gio(4);
+ emev2_register_pmu();
}
-static void __init emev2_init_delay(void)
+void __init emev2_init_delay(void)
{
shmobile_setup_delay(533, 1, 3); /* Cortex-A9 @ 533MHz */
}
-void __init emev2_add_early_devices(void)
-{
- emev2_init_delay();
-
- early_platform_add_devices(emev2_early_devices,
- ARRAY_SIZE(emev2_early_devices));
-
- /* setup early console here as well */
- shmobile_setup_console();
-}
-
-void __init emev2_init_irq(void)
-{
- void __iomem *gic_dist_base;
- void __iomem *gic_cpu_base;
-
- /* Static mappings, never released */
- gic_dist_base = ioremap(0xe0028000, PAGE_SIZE);
- gic_cpu_base = ioremap(0xe0020000, PAGE_SIZE);
- BUG_ON(!gic_dist_base || !gic_cpu_base);
-
- /* Use GIC to handle interrupts */
- gic_init(0, 29, gic_dist_base, gic_cpu_base);
-}
-
#ifdef CONFIG_USE_OF
-static const struct of_dev_auxdata emev2_auxdata_lookup[] __initconst = {
- { }
-};
-
-static void __init emev2_add_standard_devices_dt(void)
-{
- of_platform_populate(NULL, of_default_bus_match_table,
- emev2_auxdata_lookup, NULL);
-}
static const char *emev2_boards_compat_dt[] __initdata = {
"renesas,emev2",
DT_MACHINE_START(EMEV2_DT, "Generic Emma Mobile EV2 (Flattened Device Tree)")
.smp = smp_ops(emev2_smp_ops),
+ .map_io = emev2_map_io,
.init_early = emev2_init_delay,
- .nr_irqs = NR_IRQS_LEGACY,
- .init_irq = irqchip_init,
- .init_machine = emev2_add_standard_devices_dt,
.dt_compat = emev2_boards_compat_dt,
MACHINE_END
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <linux/irq.h>
-#include <linux/irqchip.h>
#include <linux/kernel.h>
#include <linux/of_platform.h>
#include <linux/platform_data/irq-renesas-irqc.h>
#include <linux/serial_sci.h>
+#include <linux/sh_timer.h>
#include <mach/common.h>
#include <mach/irqs.h>
#include <mach/r8a73a4.h>
thermal0_resources, \
ARRAY_SIZE(thermal0_resources))
+static struct sh_timer_config cmt10_platform_data = {
+ .name = "CMT10",
+ .timer_bit = 0,
+ .clockevent_rating = 80,
+};
+
+static struct resource cmt10_resources[] = {
+ DEFINE_RES_MEM(0xe6130010, 0x0c),
+ DEFINE_RES_MEM(0xe6130000, 0x04),
+ DEFINE_RES_IRQ(gic_spi(120)), /* CMT1_0 */
+};
+
+#define r8a7790_register_cmt(idx) \
+ platform_device_register_resndata(&platform_bus, "sh_cmt", \
+ idx, cmt##idx##_resources, \
+ ARRAY_SIZE(cmt##idx##_resources), \
+ &cmt##idx##_platform_data, \
+ sizeof(struct sh_timer_config))
+
void __init r8a73a4_add_standard_devices(void)
{
r8a73a4_register_scif(SCIFA0);
r8a73a4_register_irqc(0);
r8a73a4_register_irqc(1);
r8a73a4_register_thermal();
+ r8a7790_register_cmt(10);
+}
+
+void __init r8a73a4_init_delay(void)
+{
+#ifndef CONFIG_ARM_ARCH_TIMER
+ shmobile_setup_delay(1500, 2, 4); /* Cortex-A15 @ 1500MHz */
+#endif
}
#ifdef CONFIG_USE_OF
void __init r8a73a4_add_standard_devices_dt(void)
{
+ platform_device_register_simple("cpufreq-cpu0", -1, NULL, 0);
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
}
};
DT_MACHINE_START(R8A73A4_DT, "Generic R8A73A4 (Flattened Device Tree)")
- .init_irq = irqchip_init,
+ .init_early = r8a73a4_init_delay,
.init_machine = r8a73a4_add_standard_devices_dt,
.init_time = shmobile_timer_init,
.dt_compat = r8a73a4_boards_compat_dt,
.addr = 0xfe1f0064,
.chcr = CHCR_TX(XMIT_SZ_32BIT),
.mid_rid = 0xb5,
+ }, {
+ .slave_id = SHDMA_SLAVE_MMCIF_TX,
+ .addr = 0xe6bd0034,
+ .chcr = CHCR_TX(XMIT_SZ_32BIT),
+ .mid_rid = 0xd1,
+ }, {
+ .slave_id = SHDMA_SLAVE_MMCIF_RX,
+ .addr = 0xe6bd0034,
+ .chcr = CHCR_RX(XMIT_SZ_32BIT),
+ .mid_rid = 0xd2,
},
};
#ifdef CONFIG_USE_OF
-static const struct of_dev_auxdata r8a7740_auxdata_lookup[] __initconst = {
- { }
-};
+void __init r8a7740_add_early_devices_dt(void)
+{
+ shmobile_setup_delay(800, 1, 3); /* Cortex-A9 @ 800MHz */
+
+ early_platform_add_devices(r8a7740_early_devices,
+ ARRAY_SIZE(r8a7740_early_devices));
+
+ /* setup early console here as well */
+ shmobile_setup_console();
+}
void __init r8a7740_add_standard_devices_dt(void)
{
platform_add_devices(r8a7740_devices_dt,
ARRAY_SIZE(r8a7740_devices_dt));
- of_platform_populate(NULL, of_default_bus_match_table,
- r8a7740_auxdata_lookup, NULL);
+ of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
}
void __init r8a7740_init_delay(void)
.irqs = SCIx_IRQ_MUXED(irq), \
}
-static struct plat_sci_port scif_platform_data[] = {
+static struct plat_sci_port scif_platform_data[] __initdata = {
SCIF_INFO(0xffe40000, gic_iid(0x66)),
SCIF_INFO(0xffe41000, gic_iid(0x67)),
SCIF_INFO(0xffe42000, gic_iid(0x68)),
};
/* TMU */
-static struct resource sh_tmu0_resources[] = {
+static struct resource sh_tmu0_resources[] __initdata = {
DEFINE_RES_MEM(0xffd80008, 12),
DEFINE_RES_IRQ(gic_iid(0x40)),
};
-static struct sh_timer_config sh_tmu0_platform_data = {
+static struct sh_timer_config sh_tmu0_platform_data __initdata = {
.name = "TMU00",
.channel_offset = 0x4,
.timer_bit = 0,
.clockevent_rating = 200,
};
-static struct resource sh_tmu1_resources[] = {
+static struct resource sh_tmu1_resources[] __initdata = {
DEFINE_RES_MEM(0xffd80014, 12),
DEFINE_RES_IRQ(gic_iid(0x41)),
};
-static struct sh_timer_config sh_tmu1_platform_data = {
+static struct sh_timer_config sh_tmu1_platform_data __initdata = {
.name = "TMU01",
.channel_offset = 0x10,
.timer_bit = 1,
USB_PLATFORM_INFO(ohci);
/* Ether */
-static struct resource ether_resources[] = {
+static struct resource ether_resources[] __initdata = {
DEFINE_RES_MEM(0xfde00000, 0x400),
DEFINE_RES_IRQ(gic_iid(0x89)),
};
}
/* PFC/GPIO */
-static struct resource pfc_resources[] = {
+static struct resource pfc_resources[] __initdata = {
DEFINE_RES_MEM(0xfffc0000, 0x118),
};
#define R8A7778_GPIO(idx) \
-static struct resource r8a7778_gpio##idx##_resources[] = { \
+static struct resource r8a7778_gpio##idx##_resources[] __initdata = { \
DEFINE_RES_MEM(0xffc40000 + 0x1000 * (idx), 0x30), \
DEFINE_RES_IRQ(gic_iid(0x87)), \
}; \
\
-static struct gpio_rcar_config r8a7778_gpio##idx##_platform_data = { \
+static struct gpio_rcar_config r8a7778_gpio##idx##_platform_data __initdata = { \
.gpio_base = 32 * (idx), \
.irq_base = GPIO_IRQ_BASE(idx), \
.number_of_pins = 32, \
};
/* SDHI */
-static struct resource sdhi_resources[] = {
+static struct resource sdhi_resources[] __initdata = {
/* SDHI0 */
DEFINE_RES_MEM(0xFFE4C000, 0x100),
DEFINE_RES_IRQ(gic_iid(0x77)),
platform_device_register_full(&ohci_info);
}
-static struct renesas_intc_irqpin_config irqpin_platform_data = {
+static struct renesas_intc_irqpin_config irqpin_platform_data __initdata = {
.irq_base = irq_pin(0), /* IRQ0 -> IRQ3 */
.sense_bitfield_width = 2,
};
-static struct resource irqpin_resources[] = {
+static struct resource irqpin_resources[] __initdata = {
DEFINE_RES_MEM(0xfe78001c, 4), /* ICR1 */
DEFINE_RES_MEM(0xfe780010, 4), /* INTPRI */
DEFINE_RES_MEM(0xfe780024, 4), /* INTREQ */
&irqpin_platform_data, sizeof(irqpin_platform_data));
}
+void __init r8a7778_init_delay(void)
+{
+ shmobile_setup_delay(800, 1, 3); /* Cortex-A9 @ 800MHz */
+}
+
+#ifdef CONFIG_USE_OF
#define INT2SMSKCR0 0x82288 /* 0xfe782288 */
#define INT2SMSKCR1 0x8228c /* 0xfe78228c */
#define INT2NTSR0 0x00018 /* 0xfe700018 */
#define INT2NTSR1 0x0002c /* 0xfe70002c */
-static void __init r8a7778_init_irq_common(void)
+void __init r8a7778_init_irq_dt(void)
{
void __iomem *base = ioremap_nocache(0xfe700000, 0x00100000);
BUG_ON(!base);
+ irqchip_init();
+
/* route all interrupts to ARM */
__raw_writel(0x73ffffff, base + INT2NTSR0);
__raw_writel(0xffffffff, base + INT2NTSR1);
iounmap(base);
}
-void __init r8a7778_init_irq(void)
-{
- void __iomem *gic_dist_base;
- void __iomem *gic_cpu_base;
-
- gic_dist_base = ioremap_nocache(0xfe438000, PAGE_SIZE);
- gic_cpu_base = ioremap_nocache(0xfe430000, PAGE_SIZE);
- BUG_ON(!gic_dist_base || !gic_cpu_base);
-
- /* use GIC to handle interrupts */
- gic_init(0, 29, gic_dist_base, gic_cpu_base);
-
- r8a7778_init_irq_common();
-}
-
-void __init r8a7778_init_delay(void)
-{
- shmobile_setup_delay(800, 1, 3); /* Cortex-A9 @ 800MHz */
-}
-
-#ifdef CONFIG_USE_OF
-void __init r8a7778_init_irq_dt(void)
-{
- irqchip_init();
- r8a7778_init_irq_common();
-}
-
-static const struct of_dev_auxdata r8a7778_auxdata_lookup[] __initconst = {
- {},
-};
-
-void __init r8a7778_add_standard_devices_dt(void)
-{
- of_platform_populate(NULL, of_default_bus_match_table,
- r8a7778_auxdata_lookup, NULL);
-}
-
static const char *r8a7778_compat_dt[] __initdata = {
"renesas,r8a7778",
NULL,
DT_MACHINE_START(R8A7778_DT, "Generic R8A7778 (Flattened Device Tree)")
.init_early = r8a7778_init_delay,
.init_irq = r8a7778_init_irq_dt,
- .init_machine = r8a7778_add_standard_devices_dt,
.init_time = shmobile_timer_init,
.dt_compat = r8a7778_compat_dt,
.init_late = r8a7778_init_late,
shmobile_setup_delay(1000, 2, 4); /* Cortex-A9 @ 1000MHz */
}
-static const struct of_dev_auxdata r8a7779_auxdata_lookup[] __initconst = {
- {},
-};
-
void __init r8a7779_add_standard_devices_dt(void)
{
/* clocks are setup late during boot in the case of DT */
platform_add_devices(r8a7779_devices_dt,
ARRAY_SIZE(r8a7779_devices_dt));
- of_platform_populate(NULL, of_default_bus_match_table,
- r8a7779_auxdata_lookup, NULL);
+ of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
}
static const char *r8a7779_compat_dt[] __initdata = {
*/
#include <linux/irq.h>
-#include <linux/irqchip.h>
#include <linux/kernel.h>
#include <linux/of_platform.h>
-#include <linux/serial_sci.h>
#include <linux/platform_data/gpio-rcar.h>
#include <linux/platform_data/irq-renesas-irqc.h>
+#include <linux/serial_sci.h>
+#include <linux/sh_timer.h>
#include <mach/common.h>
#include <mach/irqs.h>
#include <mach/r8a7790.h>
&irqc##idx##_data, \
sizeof(struct renesas_irqc_config))
+static struct resource thermal_resources[] __initdata = {
+ DEFINE_RES_MEM(0xe61f0000, 0x14),
+ DEFINE_RES_MEM(0xe61f0100, 0x38),
+ DEFINE_RES_IRQ(gic_spi(69)),
+};
+
+#define r8a7790_register_thermal() \
+ platform_device_register_simple("rcar_thermal", -1, \
+ thermal_resources, \
+ ARRAY_SIZE(thermal_resources))
+
+static struct sh_timer_config cmt00_platform_data = {
+ .name = "CMT00",
+ .timer_bit = 0,
+ .clockevent_rating = 80,
+};
+
+static struct resource cmt00_resources[] = {
+ DEFINE_RES_MEM(0xffca0510, 0x0c),
+ DEFINE_RES_MEM(0xffca0500, 0x04),
+ DEFINE_RES_IRQ(gic_spi(142)), /* CMT0_0 */
+};
+
+#define r8a7790_register_cmt(idx) \
+ platform_device_register_resndata(&platform_bus, "sh_cmt", \
+ idx, cmt##idx##_resources, \
+ ARRAY_SIZE(cmt##idx##_resources), \
+ &cmt##idx##_platform_data, \
+ sizeof(struct sh_timer_config))
+
void __init r8a7790_add_standard_devices(void)
{
r8a7790_register_scif(SCIFA0);
r8a7790_register_scif(HSCIF0);
r8a7790_register_scif(HSCIF1);
r8a7790_register_irqc(0);
+ r8a7790_register_thermal();
+ r8a7790_register_cmt(00);
}
+#define MODEMR 0xe6160060
+
+u32 __init r8a7790_read_mode_pins(void)
+{
+ void __iomem *modemr = ioremap_nocache(MODEMR, 4);
+ u32 mode;
+
+ BUG_ON(!modemr);
+ mode = ioread32(modemr);
+ iounmap(modemr);
+
+ return mode;
+}
+
+#define CNTCR 0
+#define CNTFID0 0x20
+
void __init r8a7790_timer_init(void)
{
- void __iomem *cntcr;
+#ifdef CONFIG_ARM_ARCH_TIMER
+ u32 mode = r8a7790_read_mode_pins();
+ void __iomem *base;
+ int extal_mhz = 0;
+ u32 freq;
+
+ /* At Linux boot time the r8a7790 arch timer comes up
+ * with the counter disabled. Moreover, it may also report
+ * a potentially incorrect fixed 13 MHz frequency. To be
+ * correct these registers need to be updated to use the
+ * frequency EXTAL / 2 which can be determined by the MD pins.
+ */
+
+ switch (mode & (MD(14) | MD(13))) {
+ case 0:
+ extal_mhz = 15;
+ break;
+ case MD(13):
+ extal_mhz = 20;
+ break;
+ case MD(14):
+ extal_mhz = 26;
+ break;
+ case MD(13) | MD(14):
+ extal_mhz = 30;
+ break;
+ }
- /* make sure arch timer is started by setting bit 0 of CNTCT */
- cntcr = ioremap(0xe6080000, PAGE_SIZE);
- iowrite32(1, cntcr);
- iounmap(cntcr);
+ /* The arch timer frequency equals EXTAL / 2 */
+ freq = extal_mhz * (1000000 / 2);
+
+ /* Remap "armgcnt address map" space */
+ base = ioremap(0xe6080000, PAGE_SIZE);
+
+ /* Update registers with correct frequency */
+ iowrite32(freq, base + CNTFID0);
+ asm volatile("mcr p15, 0, %0, c14, c0, 0" : : "r" (freq));
+
+ /* make sure arch timer is started by setting bit 0 of CNTCR */
+ iowrite32(1, base + CNTCR);
+ iounmap(base);
+#endif /* CONFIG_ARM_ARCH_TIMER */
shmobile_timer_init();
}
-#ifdef CONFIG_USE_OF
-void __init r8a7790_add_standard_devices_dt(void)
+void __init r8a7790_init_delay(void)
{
- of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
+#ifndef CONFIG_ARM_ARCH_TIMER
+ shmobile_setup_delay(1300, 2, 4); /* Cortex-A15 @ 1300MHz */
+#endif
}
+#ifdef CONFIG_USE_OF
+
static const char *r8a7790_boards_compat_dt[] __initdata = {
"renesas,r8a7790",
NULL,
};
DT_MACHINE_START(R8A7790_DT, "Generic R8A7790 (Flattened Device Tree)")
- .init_irq = irqchip_init,
- .init_machine = r8a7790_add_standard_devices_dt,
+ .init_early = r8a7790_init_delay,
.init_time = r8a7790_timer_init,
.dt_compat = r8a7790_boards_compat_dt,
MACHINE_END
shmobile_setup_console();
}
-static const struct of_dev_auxdata sh7372_auxdata_lookup[] __initconst = {
- { }
-};
-
void __init sh7372_add_standard_devices_dt(void)
{
/* clocks are setup late during boot in the case of DT */
platform_add_devices(sh7372_early_devices,
ARRAY_SIZE(sh7372_early_devices));
- of_platform_populate(NULL, of_default_bus_match_table,
- sh7372_auxdata_lookup, NULL);
+ of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
}
static const char *sh7372_boards_compat_dt[] __initdata = {
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
-#include <linux/irqchip.h>
#include <linux/platform_device.h>
#include <linux/of_platform.h>
#include <linux/delay.h>
iotable_init(sh73a0_io_desc, ARRAY_SIZE(sh73a0_io_desc));
}
-static struct resource sh73a0_pfc_resources[] = {
- [0] = {
- .start = 0xe6050000,
- .end = 0xe6057fff,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = 0xe605801c,
- .end = 0xe6058027,
- .flags = IORESOURCE_MEM,
- }
-};
-
-static struct platform_device sh73a0_pfc_device = {
- .name = "pfc-sh73a0",
- .id = -1,
- .resource = sh73a0_pfc_resources,
- .num_resources = ARRAY_SIZE(sh73a0_pfc_resources),
+/* PFC */
+static struct resource pfc_resources[] __initdata = {
+ DEFINE_RES_MEM(0xe6050000, 0x8000),
+ DEFINE_RES_MEM(0xe605801c, 0x000c),
};
void __init sh73a0_pinmux_init(void)
{
- platform_device_register(&sh73a0_pfc_device);
+ platform_device_register_simple("pfc-sh73a0", -1, pfc_resources,
+ ARRAY_SIZE(pfc_resources));
}
static struct plat_sci_port scif0_platform_data = {
#ifdef CONFIG_USE_OF
-static const struct of_dev_auxdata sh73a0_auxdata_lookup[] __initconst = {
- {},
-};
-
void __init sh73a0_add_standard_devices_dt(void)
{
struct platform_device_info devinfo = { .name = "cpufreq-cpu0", .id = -1, };
platform_add_devices(sh73a0_devices_dt,
ARRAY_SIZE(sh73a0_devices_dt));
- of_platform_populate(NULL, of_default_bus_match_table,
- sh73a0_auxdata_lookup, NULL);
+ of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
/* Instantiate cpufreq-cpu0 */
platform_device_register_full(&devinfo);
.map_io = sh73a0_map_io,
.init_early = sh73a0_init_delay,
.nr_irqs = NR_IRQS_LEGACY,
- .init_irq = irqchip_init,
.init_machine = sh73a0_add_standard_devices_dt,
.dt_compat = sh73a0_boards_compat_dt,
MACHINE_END
#include <asm/smp_scu.h>
#define EMEV2_SCU_BASE 0x1e000000
+#define EMEV2_SMU_BASE 0xe0110000
+#define SMU_GENERAL_REG0 0x7c0
static int emev2_boot_secondary(unsigned int cpu, struct task_struct *idle)
{
static void __init emev2_smp_prepare_cpus(unsigned int max_cpus)
{
+ void __iomem *smu;
+
+ /* setup EMEV2 specific SCU base, enable */
+ shmobile_scu_base = ioremap(EMEV2_SCU_BASE, PAGE_SIZE);
scu_enable(shmobile_scu_base);
/* Tell ROM loader about our vector (in headsmp-scu.S, headsmp.S) */
- emev2_set_boot_vector(__pa(shmobile_boot_vector));
+ smu = ioremap(EMEV2_SMU_BASE, PAGE_SIZE);
+ if (smu) {
+ iowrite32(__pa(shmobile_boot_vector), smu + SMU_GENERAL_REG0);
+ iounmap(smu);
+ }
shmobile_boot_fn = virt_to_phys(shmobile_boot_scu);
shmobile_boot_arg = (unsigned long)shmobile_scu_base;
scu_power_mode(shmobile_scu_base, SCU_PM_NORMAL);
}
-static void __init emev2_smp_init_cpus(void)
-{
- unsigned int ncores;
-
- /* setup EMEV2 specific SCU base */
- shmobile_scu_base = ioremap(EMEV2_SCU_BASE, PAGE_SIZE);
- emev2_clock_init(); /* need ioremapped SMU */
-
- ncores = shmobile_scu_base ? scu_get_core_count(shmobile_scu_base) : 1;
-
- shmobile_smp_init_cpus(ncores);
-}
-
struct smp_operations emev2_smp_ops __initdata = {
- .smp_init_cpus = emev2_smp_init_cpus,
.smp_prepare_cpus = emev2_smp_prepare_cpus,
.smp_boot_secondary = emev2_boot_secondary,
};
do {
base = of_iomap(np, i);
if (base) {
- orion_irq_init(i * 32, base);
+ orion_irq_init(i * 32, base + 0x04);
i++;
}
} while (base);
#include <linux/spi/mmc_spi.h>
#include <linux/input.h>
#include <linux/input/sh_keysc.h>
+#include <linux/platform_data/gpio_backlight.h>
#include <linux/sh_eth.h>
#include <linux/sh_intc.h>
#include <linux/videodev2.h>
.resource = usbhs_resources,
};
-/* LCDC */
+/* LCDC and backlight */
static const struct fb_videomode ecovec_lcd_modes[] = {
{
.name = "Panel",
},
};
-static int ecovec24_set_brightness(int brightness)
-{
- gpio_set_value(GPIO_PTR1, brightness);
-
- return 0;
-}
-
static struct sh_mobile_lcdc_info lcdc_info = {
.ch[0] = {
.interface_type = RGB18,
.width = 152,
.height = 91,
},
- .bl_info = {
- .name = "sh_mobile_lcdc_bl",
- .max_brightness = 1,
- .set_brightness = ecovec24_set_brightness,
- },
}
};
},
};
+static struct gpio_backlight_platform_data gpio_backlight_data = {
+ .fbdev = &lcdc_device.dev,
+ .gpio = GPIO_PTR1,
+ .def_value = 1,
+ .name = "backlight",
+};
+
+static struct platform_device gpio_backlight_device = {
+ .name = "gpio-backlight",
+ .dev = {
+ .platform_data = &gpio_backlight_data,
+ },
+};
+
/* CEU0 */
static struct sh_mobile_ceu_info sh_mobile_ceu0_info = {
.flags = SH_CEU_FLAG_USE_8BIT_BUS,
&usb1_common_device,
&usbhs_device,
&lcdc_device,
+ &gpio_backlight_device,
&ceu0_device,
&ceu1_device,
&keysc_device,
gpio_request(GPIO_PTE6, NULL);
gpio_request(GPIO_PTU1, NULL);
- gpio_request(GPIO_PTR1, NULL);
gpio_request(GPIO_PTA2, NULL);
gpio_direction_input(GPIO_PTE6);
gpio_direction_output(GPIO_PTU1, 0);
- gpio_direction_output(GPIO_PTR1, 0);
gpio_direction_output(GPIO_PTA2, 0);
/* I/O buffer drive ability is high */
lcdc_info.ch[0].lcd_modes = ecovec_dvi_modes;
lcdc_info.ch[0].num_modes = ARRAY_SIZE(ecovec_dvi_modes);
+ /* No backlight */
+ gpio_backlight_data.fbdev = NULL;
+
gpio_set_value(GPIO_PTA2, 1);
gpio_set_value(GPIO_PTU1, 1);
} else {
lcdc_info.ch[0].lcd_modes = ecovec_lcd_modes;
lcdc_info.ch[0].num_modes = ARRAY_SIZE(ecovec_lcd_modes);
- gpio_set_value(GPIO_PTR1, 1);
-
/* FIXME
*
* LCDDON control is needed for Panel,
{
write_memory_start(sohandle, so);
}
-
-#define CTRL_CKSW 0x10
-#define CTRL_C10 0x20
-#define CTRL_CPSW 0x80
-#define MAIN_MLED4 0x40
-#define MAIN_MSW 0x80
-
-int kfr2r09_lcd_set_brightness(int brightness)
-{
- struct i2c_adapter *a;
- struct i2c_msg msg;
- unsigned char buf[2];
- int ret;
-
- a = i2c_get_adapter(0);
- if (!a)
- return -ENODEV;
-
- buf[0] = 0x00;
- if (brightness)
- buf[1] = CTRL_CPSW | CTRL_C10 | CTRL_CKSW;
- else
- buf[1] = 0;
-
- msg.addr = 0x75;
- msg.buf = buf;
- msg.len = 2;
- msg.flags = 0;
- ret = i2c_transfer(a, &msg, 1);
- if (ret != 1)
- return -ENODEV;
-
- buf[0] = 0x01;
- if (brightness)
- buf[1] = MAIN_MSW | MAIN_MLED4 | 0x0c;
- else
- buf[1] = 0;
-
- msg.addr = 0x75;
- msg.buf = buf;
- msg.len = 2;
- msg.flags = 0;
- ret = i2c_transfer(a, &msg, 1);
- if (ret != 1)
- return -ENODEV;
-
- return 0;
-}
#include <linux/input.h>
#include <linux/input/sh_keysc.h>
#include <linux/i2c.h>
+#include <linux/platform_data/lv5207lp.h>
#include <linux/regulator/fixed.h>
#include <linux/regulator/machine.h>
#include <linux/usb/r8a66597.h>
.setup_sys = kfr2r09_lcd_setup,
.start_transfer = kfr2r09_lcd_start,
},
- .bl_info = {
- .name = "sh_mobile_lcdc_bl",
- .max_brightness = 1,
- .set_brightness = kfr2r09_lcd_set_brightness,
- },
.sys_bus_cfg = {
.ldmt2r = 0x07010904,
.ldmt3r = 0x14012914,
},
};
+static struct lv5207lp_platform_data kfr2r09_backlight_data = {
+ .fbdev = &kfr2r09_sh_lcdc_device.dev,
+ .def_value = 13,
+ .max_value = 13,
+};
+
+static struct i2c_board_info kfr2r09_backlight_board_info = {
+ I2C_BOARD_INFO("lv5207lp", 0x75),
+ .platform_data = &kfr2r09_backlight_data,
+};
+
static struct r8a66597_platdata kfr2r09_usb0_gadget_data = {
.on_chip = 1,
};
gpio_request(GPIO_FN_SDHI0CMD, NULL);
gpio_request(GPIO_FN_SDHI0CLK, NULL);
+ i2c_register_board_info(0, &kfr2r09_backlight_board_info, 1);
+
return platform_add_devices(kfr2r09_devices,
ARRAY_SIZE(kfr2r09_devices));
}
#include <video/sh_mobile_lcdc.h>
#if defined(CONFIG_FB_SH_MOBILE_LCDC) || defined(CONFIG_FB_SH_MOBILE_LCDC_MODULE)
-int kfr2r09_lcd_set_brightness(int brightness);
int kfr2r09_lcd_setup(void *sys_ops_handle,
struct sh_mobile_lcdc_sys_bus_ops *sys_ops);
void kfr2r09_lcd_start(void *sys_ops_handle,
struct sh_mobile_lcdc_sys_bus_ops *sys_ops);
#else
-static int kfr2r09_lcd_set_brightness(int brightness) {}
static int kfr2r09_lcd_setup(void *sys_ops_handle,
struct sh_mobile_lcdc_sys_bus_ops *sys_ops)
{
cannot be used. This driver supports hardware blinking with an on+off
period from 62ms to 125s. Say Y to enable LEDs on the HP iPAQ hx4700.
-config LEDS_RENESAS_TPU
- bool "LED support for Renesas TPU"
- depends on LEDS_CLASS=y && HAVE_CLK && GPIOLIB
- help
- This option enables build of the LED TPU platform driver,
- suitable to drive any TPU channel on newer Renesas SoCs.
- The driver controls the GPIO pin connected to the LED via
- the GPIO framework and expects the LED to be connected to
- a pin that can be driven in both GPIO mode and using TPU
- pin function. The latter to support brightness control.
- Brightness control is supported but hardware blinking is not.
-
config LEDS_TCA6507
tristate "LED Support for TCA6507 I2C chip"
depends on LEDS_CLASS && I2C
obj-$(CONFIG_LEDS_NS2) += leds-ns2.o
obj-$(CONFIG_LEDS_NETXBIG) += leds-netxbig.o
obj-$(CONFIG_LEDS_ASIC3) += leds-asic3.o
-obj-$(CONFIG_LEDS_RENESAS_TPU) += leds-renesas-tpu.o
obj-$(CONFIG_LEDS_MAX8997) += leds-max8997.o
obj-$(CONFIG_LEDS_LM355x) += leds-lm355x.o
obj-$(CONFIG_LEDS_BLINKM) += leds-blinkm.o
+++ /dev/null
-/*
- * LED control using Renesas TPU
- *
- * Copyright (C) 2011 Magnus Damm
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-
-#include <linux/module.h>
-#include <linux/init.h>
-#include <linux/platform_device.h>
-#include <linux/spinlock.h>
-#include <linux/printk.h>
-#include <linux/ioport.h>
-#include <linux/io.h>
-#include <linux/clk.h>
-#include <linux/leds.h>
-#include <linux/platform_data/leds-renesas-tpu.h>
-#include <linux/gpio.h>
-#include <linux/err.h>
-#include <linux/slab.h>
-#include <linux/pm_runtime.h>
-#include <linux/workqueue.h>
-
-enum r_tpu_pin { R_TPU_PIN_UNUSED, R_TPU_PIN_GPIO, R_TPU_PIN_GPIO_FN };
-enum r_tpu_timer { R_TPU_TIMER_UNUSED, R_TPU_TIMER_ON };
-
-struct r_tpu_priv {
- struct led_classdev ldev;
- void __iomem *mapbase;
- struct clk *clk;
- struct platform_device *pdev;
- enum r_tpu_pin pin_state;
- enum r_tpu_timer timer_state;
- unsigned long min_rate;
- unsigned int refresh_rate;
- struct work_struct work;
- enum led_brightness new_brightness;
-};
-
-static DEFINE_SPINLOCK(r_tpu_lock);
-
-#define TSTR -1 /* Timer start register (shared register) */
-#define TCR 0 /* Timer control register (+0x00) */
-#define TMDR 1 /* Timer mode register (+0x04) */
-#define TIOR 2 /* Timer I/O control register (+0x08) */
-#define TIER 3 /* Timer interrupt enable register (+0x0c) */
-#define TSR 4 /* Timer status register (+0x10) */
-#define TCNT 5 /* Timer counter (+0x14) */
-#define TGRA 6 /* Timer general register A (+0x18) */
-#define TGRB 7 /* Timer general register B (+0x1c) */
-#define TGRC 8 /* Timer general register C (+0x20) */
-#define TGRD 9 /* Timer general register D (+0x24) */
-
-static inline u16 r_tpu_read(struct r_tpu_priv *p, int reg_nr)
-{
- struct led_renesas_tpu_config *cfg = p->pdev->dev.platform_data;
- void __iomem *base = p->mapbase;
- unsigned long offs = reg_nr << 2;
-
- if (reg_nr == TSTR)
- return ioread16(base - cfg->channel_offset);
-
- return ioread16(base + offs);
-}
-
-static inline void r_tpu_write(struct r_tpu_priv *p, int reg_nr, u16 value)
-{
- struct led_renesas_tpu_config *cfg = p->pdev->dev.platform_data;
- void __iomem *base = p->mapbase;
- unsigned long offs = reg_nr << 2;
-
- if (reg_nr == TSTR) {
- iowrite16(value, base - cfg->channel_offset);
- return;
- }
-
- iowrite16(value, base + offs);
-}
-
-static void r_tpu_start_stop_ch(struct r_tpu_priv *p, int start)
-{
- struct led_renesas_tpu_config *cfg = p->pdev->dev.platform_data;
- unsigned long flags;
- u16 value;
-
- /* start stop register shared by multiple timer channels */
- spin_lock_irqsave(&r_tpu_lock, flags);
- value = r_tpu_read(p, TSTR);
-
- if (start)
- value |= 1 << cfg->timer_bit;
- else
- value &= ~(1 << cfg->timer_bit);
-
- r_tpu_write(p, TSTR, value);
- spin_unlock_irqrestore(&r_tpu_lock, flags);
-}
-
-static int r_tpu_enable(struct r_tpu_priv *p, enum led_brightness brightness)
-{
- struct led_renesas_tpu_config *cfg = p->pdev->dev.platform_data;
- int prescaler[] = { 1, 4, 16, 64 };
- int k, ret;
- unsigned long rate, tmp;
-
- if (p->timer_state == R_TPU_TIMER_ON)
- return 0;
-
- /* wake up device and enable clock */
- pm_runtime_get_sync(&p->pdev->dev);
- ret = clk_enable(p->clk);
- if (ret) {
- dev_err(&p->pdev->dev, "cannot enable clock\n");
- return ret;
- }
-
- /* make sure channel is disabled */
- r_tpu_start_stop_ch(p, 0);
-
- /* get clock rate after enabling it */
- rate = clk_get_rate(p->clk);
-
- /* pick the lowest acceptable rate */
- for (k = ARRAY_SIZE(prescaler) - 1; k >= 0; k--)
- if ((rate / prescaler[k]) >= p->min_rate)
- break;
-
- if (k < 0) {
- dev_err(&p->pdev->dev, "clock rate mismatch\n");
- goto err0;
- }
- dev_dbg(&p->pdev->dev, "rate = %lu, prescaler %u\n",
- rate, prescaler[k]);
-
- /* clear TCNT on TGRB match, count on rising edge, set prescaler */
- r_tpu_write(p, TCR, 0x0040 | k);
-
- /* output 0 until TGRA, output 1 until TGRB */
- r_tpu_write(p, TIOR, 0x0002);
-
- rate /= prescaler[k] * p->refresh_rate;
- r_tpu_write(p, TGRB, rate);
- dev_dbg(&p->pdev->dev, "TRGB = 0x%04lx\n", rate);
-
- tmp = (cfg->max_brightness - brightness) * rate;
- r_tpu_write(p, TGRA, tmp / cfg->max_brightness);
- dev_dbg(&p->pdev->dev, "TRGA = 0x%04lx\n", tmp / cfg->max_brightness);
-
- /* PWM mode */
- r_tpu_write(p, TMDR, 0x0002);
-
- /* enable channel */
- r_tpu_start_stop_ch(p, 1);
-
- p->timer_state = R_TPU_TIMER_ON;
- return 0;
- err0:
- clk_disable(p->clk);
- pm_runtime_put_sync(&p->pdev->dev);
- return -ENOTSUPP;
-}
-
-static void r_tpu_disable(struct r_tpu_priv *p)
-{
- if (p->timer_state == R_TPU_TIMER_UNUSED)
- return;
-
- /* disable channel */
- r_tpu_start_stop_ch(p, 0);
-
- /* stop clock and mark device as idle */
- clk_disable(p->clk);
- pm_runtime_put_sync(&p->pdev->dev);
-
- p->timer_state = R_TPU_TIMER_UNUSED;
-}
-
-static void r_tpu_set_pin(struct r_tpu_priv *p, enum r_tpu_pin new_state,
- enum led_brightness brightness)
-{
- struct led_renesas_tpu_config *cfg = p->pdev->dev.platform_data;
-
- if (p->pin_state == new_state) {
- if (p->pin_state == R_TPU_PIN_GPIO)
- gpio_set_value(cfg->pin_gpio, brightness);
- return;
- }
-
- if (p->pin_state == R_TPU_PIN_GPIO)
- gpio_free(cfg->pin_gpio);
-
- if (p->pin_state == R_TPU_PIN_GPIO_FN)
- gpio_free(cfg->pin_gpio_fn);
-
- if (new_state == R_TPU_PIN_GPIO)
- gpio_request_one(cfg->pin_gpio, !!brightness ?
- GPIOF_OUT_INIT_HIGH : GPIOF_OUT_INIT_LOW,
- cfg->name);
-
- if (new_state == R_TPU_PIN_GPIO_FN)
- gpio_request(cfg->pin_gpio_fn, cfg->name);
-
- p->pin_state = new_state;
-}
-
-static void r_tpu_work(struct work_struct *work)
-{
- struct r_tpu_priv *p = container_of(work, struct r_tpu_priv, work);
- enum led_brightness brightness = p->new_brightness;
-
- r_tpu_disable(p);
-
- /* off and maximum are handled as GPIO pins, in between PWM */
- if ((brightness == 0) || (brightness == p->ldev.max_brightness))
- r_tpu_set_pin(p, R_TPU_PIN_GPIO, brightness);
- else {
- r_tpu_set_pin(p, R_TPU_PIN_GPIO_FN, 0);
- r_tpu_enable(p, brightness);
- }
-}
-
-static void r_tpu_set_brightness(struct led_classdev *ldev,
- enum led_brightness brightness)
-{
- struct r_tpu_priv *p = container_of(ldev, struct r_tpu_priv, ldev);
- p->new_brightness = brightness;
- schedule_work(&p->work);
-}
-
-static int r_tpu_probe(struct platform_device *pdev)
-{
- struct led_renesas_tpu_config *cfg = pdev->dev.platform_data;
- struct r_tpu_priv *p;
- struct resource *res;
- int ret;
-
- if (!cfg) {
- dev_err(&pdev->dev, "missing platform data\n");
- return -ENODEV;
- }
-
- p = devm_kzalloc(&pdev->dev, sizeof(*p), GFP_KERNEL);
- if (p == NULL) {
- dev_err(&pdev->dev, "failed to allocate driver data\n");
- return -ENOMEM;
- }
-
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- if (!res) {
- dev_err(&pdev->dev, "failed to get I/O memory\n");
- return -ENXIO;
- }
-
- /* map memory, let mapbase point to our channel */
- p->mapbase = devm_ioremap_nocache(&pdev->dev, res->start,
- resource_size(res));
- if (p->mapbase == NULL) {
- dev_err(&pdev->dev, "failed to remap I/O memory\n");
- return -ENXIO;
- }
-
- /* get hold of clock */
- p->clk = devm_clk_get(&pdev->dev, NULL);
- if (IS_ERR(p->clk)) {
- dev_err(&pdev->dev, "cannot get clock\n");
- return PTR_ERR(p->clk);
- }
-
- p->pdev = pdev;
- p->pin_state = R_TPU_PIN_UNUSED;
- p->timer_state = R_TPU_TIMER_UNUSED;
- p->refresh_rate = cfg->refresh_rate ? cfg->refresh_rate : 100;
- r_tpu_set_pin(p, R_TPU_PIN_GPIO, LED_OFF);
- platform_set_drvdata(pdev, p);
-
- INIT_WORK(&p->work, r_tpu_work);
-
- p->ldev.name = cfg->name;
- p->ldev.brightness = LED_OFF;
- p->ldev.max_brightness = cfg->max_brightness;
- p->ldev.brightness_set = r_tpu_set_brightness;
- p->ldev.flags |= LED_CORE_SUSPENDRESUME;
- ret = led_classdev_register(&pdev->dev, &p->ldev);
- if (ret < 0)
- goto err0;
-
- /* max_brightness may be updated by the LED core code */
- p->min_rate = p->ldev.max_brightness * p->refresh_rate;
-
- pm_runtime_enable(&pdev->dev);
- return 0;
-
- err0:
- r_tpu_set_pin(p, R_TPU_PIN_UNUSED, LED_OFF);
- return ret;
-}
-
-static int r_tpu_remove(struct platform_device *pdev)
-{
- struct r_tpu_priv *p = platform_get_drvdata(pdev);
-
- r_tpu_set_brightness(&p->ldev, LED_OFF);
- led_classdev_unregister(&p->ldev);
- cancel_work_sync(&p->work);
- r_tpu_disable(p);
- r_tpu_set_pin(p, R_TPU_PIN_UNUSED, LED_OFF);
-
- pm_runtime_disable(&pdev->dev);
-
- return 0;
-}
-
-static struct platform_driver r_tpu_device_driver = {
- .probe = r_tpu_probe,
- .remove = r_tpu_remove,
- .driver = {
- .name = "leds-renesas-tpu",
- }
-};
-
-module_platform_driver(r_tpu_device_driver);
-
-MODULE_AUTHOR("Magnus Damm");
-MODULE_DESCRIPTION("Renesas TPU LED Driver");
-MODULE_LICENSE("GPL v2");
If you have an Austrian Microsystems AS3711 say Y to enable the
backlight driver.
+config BACKLIGHT_GPIO
+ tristate "Generic GPIO based Backlight Driver"
+ depends on GPIOLIB
+ help
+ If you have a LCD backlight adjustable by GPIO, say Y to enable
+ this driver.
+
+config BACKLIGHT_LV5207LP
+ tristate "Sanyo LV5207LP Backlight"
+ depends on I2C
+ help
+ If you have a Sanyo LV5207LP say Y to enable the backlight driver.
+
+config BACKLIGHT_BD6107
+ tristate "Rohm BD6107 Backlight"
+ depends on I2C
+ help
+ If you have a Rohm BD6107 say Y to enable the backlight driver.
+
endif # BACKLIGHT_CLASS_DEVICE
endif # BACKLIGHT_LCD_SUPPORT
obj-$(CONFIG_BACKLIGHT_APPLE) += apple_bl.o
obj-$(CONFIG_BACKLIGHT_AS3711) += as3711_bl.o
obj-$(CONFIG_BACKLIGHT_ATMEL_PWM) += atmel-pwm-bl.o
+obj-$(CONFIG_BACKLIGHT_BD6107) += bd6107.o
obj-$(CONFIG_BACKLIGHT_CARILLO_RANCH) += cr_bllcd.o
obj-$(CONFIG_BACKLIGHT_CLASS_DEVICE) += backlight.o
obj-$(CONFIG_BACKLIGHT_DA903X) += da903x_bl.o
obj-$(CONFIG_BACKLIGHT_DA9052) += da9052_bl.o
obj-$(CONFIG_BACKLIGHT_EP93XX) += ep93xx_bl.o
obj-$(CONFIG_BACKLIGHT_GENERIC) += generic_bl.o
+obj-$(CONFIG_BACKLIGHT_GPIO) += gpio_backlight.o
obj-$(CONFIG_BACKLIGHT_HP680) += hp680_bl.o
obj-$(CONFIG_BACKLIGHT_HP700) += jornada720_bl.o
obj-$(CONFIG_BACKLIGHT_LM3533) += lm3533_bl.o
obj-$(CONFIG_BACKLIGHT_LOCOMO) += locomolcd.o
obj-$(CONFIG_BACKLIGHT_LP855X) += lp855x_bl.o
obj-$(CONFIG_BACKLIGHT_LP8788) += lp8788_bl.o
+obj-$(CONFIG_BACKLIGHT_LV5207LP) += lv5207lp.o
obj-$(CONFIG_BACKLIGHT_MAX8925) += max8925_bl.o
obj-$(CONFIG_BACKLIGHT_OMAP1) += omap1_bl.o
obj-$(CONFIG_BACKLIGHT_OT200) += ot200_bl.o
--- /dev/null
+/*
+ * ROHM Semiconductor BD6107 LED Driver
+ *
+ * Copyright (C) 2013 Ideas on board SPRL
+ *
+ * Contact: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/backlight.h>
+#include <linux/delay.h>
+#include <linux/err.h>
+#include <linux/fb.h>
+#include <linux/gpio.h>
+#include <linux/i2c.h>
+#include <linux/module.h>
+#include <linux/platform_data/bd6107.h>
+#include <linux/slab.h>
+
+#define BD6107_PSCNT1 0x00
+#define BD6107_PSCNT1_PSCNTREG2 (1 << 2)
+#define BD6107_PSCNT1_PSCNTREG1 (1 << 0)
+#define BD6107_REGVSET 0x02
+#define BD6107_REGVSET_REG1VSET_2_85V (1 << 2)
+#define BD6107_REGVSET_REG1VSET_2_80V (0 << 2)
+#define BD6107_LEDCNT1 0x03
+#define BD6107_LEDCNT1_LEDONOFF2 (1 << 1)
+#define BD6107_LEDCNT1_LEDONOFF1 (1 << 0)
+#define BD6107_PORTSEL 0x04
+#define BD6107_PORTSEL_LEDM(n) (1 << (n))
+#define BD6107_RGB1CNT1 0x05
+#define BD6107_RGB1CNT2 0x06
+#define BD6107_RGB1CNT3 0x07
+#define BD6107_RGB1CNT4 0x08
+#define BD6107_RGB1CNT5 0x09
+#define BD6107_RGB1FLM 0x0a
+#define BD6107_RGB2CNT1 0x0b
+#define BD6107_RGB2CNT2 0x0c
+#define BD6107_RGB2CNT3 0x0d
+#define BD6107_RGB2CNT4 0x0e
+#define BD6107_RGB2CNT5 0x0f
+#define BD6107_RGB2FLM 0x10
+#define BD6107_PSCONT3 0x11
+#define BD6107_SMMONCNT 0x12
+#define BD6107_DCDCCNT 0x13
+#define BD6107_IOSEL 0x14
+#define BD6107_OUT1 0x15
+#define BD6107_OUT2 0x16
+#define BD6107_MASK1 0x17
+#define BD6107_MASK2 0x18
+#define BD6107_FACTOR1 0x19
+#define BD6107_FACTOR2 0x1a
+#define BD6107_CLRFACT1 0x1b
+#define BD6107_CLRFACT2 0x1c
+#define BD6107_STATE1 0x1d
+#define BD6107_LSIVER 0x1e
+#define BD6107_GRPSEL 0x1f
+#define BD6107_LEDCNT2 0x20
+#define BD6107_LEDCNT3 0x21
+#define BD6107_MCURRENT 0x22
+#define BD6107_MAINCNT1 0x23
+#define BD6107_MAINCNT2 0x24
+#define BD6107_SLOPECNT 0x25
+#define BD6107_MSLOPE 0x26
+#define BD6107_RGBSLOPE 0x27
+#define BD6107_TEST 0x29
+#define BD6107_SFTRST 0x2a
+#define BD6107_SFTRSTGD 0x2b
+
+struct bd6107 {
+ struct i2c_client *client;
+ struct backlight_device *backlight;
+ struct bd6107_platform_data *pdata;
+};
+
+static int bd6107_write(struct bd6107 *bd, u8 reg, u8 data)
+{
+ return i2c_smbus_write_byte_data(bd->client, reg, data);
+}
+
+static int bd6107_backlight_update_status(struct backlight_device *backlight)
+{
+ struct bd6107 *bd = bl_get_data(backlight);
+ int brightness = backlight->props.brightness;
+
+ if (backlight->props.power != FB_BLANK_UNBLANK ||
+ backlight->props.fb_blank != FB_BLANK_UNBLANK ||
+ backlight->props.state & (BL_CORE_SUSPENDED | BL_CORE_FBBLANK))
+ brightness = 0;
+
+ if (brightness) {
+ bd6107_write(bd, BD6107_PORTSEL, BD6107_PORTSEL_LEDM(2) |
+ BD6107_PORTSEL_LEDM(1) | BD6107_PORTSEL_LEDM(0));
+ bd6107_write(bd, BD6107_MAINCNT1, brightness);
+ bd6107_write(bd, BD6107_LEDCNT1, BD6107_LEDCNT1_LEDONOFF1);
+ } else {
+ gpio_set_value(bd->pdata->reset, 0);
+ msleep(24);
+ gpio_set_value(bd->pdata->reset, 1);
+ }
+
+ return 0;
+}
+
+static int bd6107_backlight_get_brightness(struct backlight_device *backlight)
+{
+ return backlight->props.brightness;
+}
+
+static int bd6107_backlight_check_fb(struct backlight_device *backlight,
+ struct fb_info *info)
+{
+ struct bd6107 *bd = bl_get_data(backlight);
+
+ return bd->pdata->fbdev == NULL || bd->pdata->fbdev == info->dev;
+}
+
+static const struct backlight_ops bd6107_backlight_ops = {
+ .options = BL_CORE_SUSPENDRESUME,
+ .update_status = bd6107_backlight_update_status,
+ .get_brightness = bd6107_backlight_get_brightness,
+ .check_fb = bd6107_backlight_check_fb,
+};
+
+static int bd6107_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ struct bd6107_platform_data *pdata = client->dev.platform_data;
+ struct backlight_device *backlight;
+ struct backlight_properties props;
+ struct bd6107 *bd;
+ int ret;
+
+ if (pdata == NULL || !pdata->reset) {
+ dev_err(&client->dev, "No reset GPIO in platform data\n");
+ return -EINVAL;
+ }
+
+ if (!i2c_check_functionality(client->adapter,
+ I2C_FUNC_SMBUS_BYTE_DATA)) {
+ dev_warn(&client->dev,
+ "I2C adapter doesn't support I2C_FUNC_SMBUS_BYTE\n");
+ return -EIO;
+ }
+
+ bd = devm_kzalloc(&client->dev, sizeof(*bd), GFP_KERNEL);
+ if (!bd)
+ return -ENOMEM;
+
+ bd->client = client;
+ bd->pdata = pdata;
+
+ ret = devm_gpio_request_one(&client->dev, pdata->reset,
+ GPIOF_DIR_OUT | GPIOF_INIT_LOW, "reset");
+ if (ret < 0) {
+ dev_err(&client->dev, "unable to request reset GPIO\n");
+ return ret;
+ }
+
+ memset(&props, 0, sizeof(props));
+ props.type = BACKLIGHT_RAW;
+ props.max_brightness = 128;
+ props.brightness = clamp_t(unsigned int, pdata->def_value, 0,
+ props.max_brightness);
+
+ backlight = backlight_device_register(dev_name(&client->dev),
+ &bd->client->dev, bd,
+ &bd6107_backlight_ops, &props);
+ if (IS_ERR(backlight)) {
+ dev_err(&client->dev, "failed to register backlight\n");
+ return PTR_ERR(backlight);
+ }
+
+ backlight_update_status(backlight);
+ i2c_set_clientdata(client, backlight);
+
+ return 0;
+}
+
+static int bd6107_remove(struct i2c_client *client)
+{
+ struct backlight_device *backlight = i2c_get_clientdata(client);
+
+ backlight->props.brightness = 0;
+ backlight_update_status(backlight);
+ backlight_device_unregister(backlight);
+
+ return 0;
+}
+
+static const struct i2c_device_id bd6107_ids[] = {
+ { "bd6107", 0 },
+ { }
+};
+MODULE_DEVICE_TABLE(i2c, bd6107_ids);
+
+static struct i2c_driver bd6107_driver = {
+ .driver = {
+ .name = "bd6107",
+ },
+ .probe = bd6107_probe,
+ .remove = bd6107_remove,
+ .id_table = bd6107_ids,
+};
+
+module_i2c_driver(bd6107_driver);
+
+MODULE_DESCRIPTION("Rohm BD6107 Backlight Driver");
+MODULE_AUTHOR("Laurent Pinchart <laurent.pinchart@ideasonboard.com>");
+MODULE_LICENSE("GPL");
--- /dev/null
+/*
+ * gpio_backlight.c - Simple GPIO-controlled backlight
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/backlight.h>
+#include <linux/err.h>
+#include <linux/fb.h>
+#include <linux/gpio.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/platform_data/gpio_backlight.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+
+struct gpio_backlight {
+ struct device *dev;
+ struct device *fbdev;
+
+ int gpio;
+ int active;
+};
+
+static int gpio_backlight_update_status(struct backlight_device *bl)
+{
+ struct gpio_backlight *gbl = bl_get_data(bl);
+ int brightness = bl->props.brightness;
+
+ if (bl->props.power != FB_BLANK_UNBLANK ||
+ bl->props.fb_blank != FB_BLANK_UNBLANK ||
+ bl->props.state & (BL_CORE_SUSPENDED | BL_CORE_FBBLANK))
+ brightness = 0;
+
+ gpio_set_value(gbl->gpio, brightness ? gbl->active : !gbl->active);
+
+ return 0;
+}
+
+static int gpio_backlight_get_brightness(struct backlight_device *bl)
+{
+ return bl->props.brightness;
+}
+
+static int gpio_backlight_check_fb(struct backlight_device *bl,
+ struct fb_info *info)
+{
+ struct gpio_backlight *gbl = bl_get_data(bl);
+
+ return gbl->fbdev == NULL || gbl->fbdev == info->dev;
+}
+
+static const struct backlight_ops gpio_backlight_ops = {
+ .options = BL_CORE_SUSPENDRESUME,
+ .update_status = gpio_backlight_update_status,
+ .get_brightness = gpio_backlight_get_brightness,
+ .check_fb = gpio_backlight_check_fb,
+};
+
+static int gpio_backlight_probe(struct platform_device *pdev)
+{
+ struct gpio_backlight_platform_data *pdata = pdev->dev.platform_data;
+ struct backlight_properties props;
+ struct backlight_device *bl;
+ struct gpio_backlight *gbl;
+ int ret;
+
+ if (!pdata) {
+ dev_err(&pdev->dev, "failed to find platform data\n");
+ return -ENODEV;
+ }
+
+ gbl = devm_kzalloc(&pdev->dev, sizeof(*gbl), GFP_KERNEL);
+ if (gbl == NULL)
+ return -ENOMEM;
+
+ gbl->dev = &pdev->dev;
+ gbl->fbdev = pdata->fbdev;
+ gbl->gpio = pdata->gpio;
+ gbl->active = pdata->active_low ? 0 : 1;
+
+ ret = devm_gpio_request_one(gbl->dev, gbl->gpio, GPIOF_DIR_OUT |
+ (gbl->active ? GPIOF_INIT_LOW
+ : GPIOF_INIT_HIGH),
+ pdata->name);
+ if (ret < 0) {
+ dev_err(&pdev->dev, "unable to request GPIO\n");
+ return ret;
+ }
+
+ memset(&props, 0, sizeof(props));
+ props.type = BACKLIGHT_RAW;
+ props.max_brightness = 1;
+ bl = backlight_device_register(dev_name(&pdev->dev), &pdev->dev, gbl,
+ &gpio_backlight_ops, &props);
+ if (IS_ERR(bl)) {
+ dev_err(&pdev->dev, "failed to register backlight\n");
+ return PTR_ERR(bl);
+ }
+
+ bl->props.brightness = pdata->def_value;
+ backlight_update_status(bl);
+
+ platform_set_drvdata(pdev, bl);
+ return 0;
+}
+
+static int gpio_backlight_remove(struct platform_device *pdev)
+{
+ struct backlight_device *bl = platform_get_drvdata(pdev);
+
+ backlight_device_unregister(bl);
+ return 0;
+}
+
+static struct platform_driver gpio_backlight_driver = {
+ .driver = {
+ .name = "gpio-backlight",
+ .owner = THIS_MODULE,
+ },
+ .probe = gpio_backlight_probe,
+ .remove = gpio_backlight_remove,
+};
+
+module_platform_driver(gpio_backlight_driver);
+
+MODULE_AUTHOR("Laurent Pinchart <laurent.pinchart@ideasonboard.com>");
+MODULE_DESCRIPTION("GPIO-based Backlight Driver");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:gpio-backlight");
--- /dev/null
+/*
+ * Sanyo LV5207LP LED Driver
+ *
+ * Copyright (C) 2013 Ideas on board SPRL
+ *
+ * Contact: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/backlight.h>
+#include <linux/err.h>
+#include <linux/fb.h>
+#include <linux/i2c.h>
+#include <linux/module.h>
+#include <linux/platform_data/lv5207lp.h>
+#include <linux/slab.h>
+
+#define LV5207LP_CTRL1 0x00
+#define LV5207LP_CPSW (1 << 7)
+#define LV5207LP_SCTEN (1 << 6)
+#define LV5207LP_C10 (1 << 5)
+#define LV5207LP_CKSW (1 << 4)
+#define LV5207LP_RSW (1 << 3)
+#define LV5207LP_GSW (1 << 2)
+#define LV5207LP_BSW (1 << 1)
+#define LV5207LP_CTRL2 0x01
+#define LV5207LP_MSW (1 << 7)
+#define LV5207LP_MLED4 (1 << 6)
+#define LV5207LP_RED 0x02
+#define LV5207LP_GREEN 0x03
+#define LV5207LP_BLUE 0x04
+
+#define LV5207LP_MAX_BRIGHTNESS 32
+
+struct lv5207lp {
+ struct i2c_client *client;
+ struct backlight_device *backlight;
+ struct lv5207lp_platform_data *pdata;
+};
+
+static int lv5207lp_write(struct lv5207lp *lv, u8 reg, u8 data)
+{
+ return i2c_smbus_write_byte_data(lv->client, reg, data);
+}
+
+static int lv5207lp_backlight_update_status(struct backlight_device *backlight)
+{
+ struct lv5207lp *lv = bl_get_data(backlight);
+ int brightness = backlight->props.brightness;
+
+ if (backlight->props.power != FB_BLANK_UNBLANK ||
+ backlight->props.fb_blank != FB_BLANK_UNBLANK ||
+ backlight->props.state & (BL_CORE_SUSPENDED | BL_CORE_FBBLANK))
+ brightness = 0;
+
+ if (brightness) {
+ lv5207lp_write(lv, LV5207LP_CTRL1,
+ LV5207LP_CPSW | LV5207LP_C10 | LV5207LP_CKSW);
+ lv5207lp_write(lv, LV5207LP_CTRL2,
+ LV5207LP_MSW | LV5207LP_MLED4 |
+ (brightness - 1));
+ } else {
+ lv5207lp_write(lv, LV5207LP_CTRL1, 0);
+ lv5207lp_write(lv, LV5207LP_CTRL2, 0);
+ }
+
+ return 0;
+}
+
+static int lv5207lp_backlight_get_brightness(struct backlight_device *backlight)
+{
+ return backlight->props.brightness;
+}
+
+static int lv5207lp_backlight_check_fb(struct backlight_device *backlight,
+ struct fb_info *info)
+{
+ struct lv5207lp *lv = bl_get_data(backlight);
+
+ return lv->pdata->fbdev == NULL || lv->pdata->fbdev == info->dev;
+}
+
+static const struct backlight_ops lv5207lp_backlight_ops = {
+ .options = BL_CORE_SUSPENDRESUME,
+ .update_status = lv5207lp_backlight_update_status,
+ .get_brightness = lv5207lp_backlight_get_brightness,
+ .check_fb = lv5207lp_backlight_check_fb,
+};
+
+static int lv5207lp_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ struct lv5207lp_platform_data *pdata = client->dev.platform_data;
+ struct backlight_device *backlight;
+ struct backlight_properties props;
+ struct lv5207lp *lv;
+
+ if (pdata == NULL) {
+ dev_err(&client->dev, "No platform data supplied\n");
+ return -EINVAL;
+ }
+
+ if (!i2c_check_functionality(client->adapter,
+ I2C_FUNC_SMBUS_BYTE_DATA)) {
+ dev_warn(&client->dev,
+ "I2C adapter doesn't support I2C_FUNC_SMBUS_BYTE\n");
+ return -EIO;
+ }
+
+ lv = devm_kzalloc(&client->dev, sizeof(*lv), GFP_KERNEL);
+ if (!lv)
+ return -ENOMEM;
+
+ lv->client = client;
+ lv->pdata = pdata;
+
+ memset(&props, 0, sizeof(props));
+ props.type = BACKLIGHT_RAW;
+ props.max_brightness = min_t(unsigned int, pdata->max_value,
+ LV5207LP_MAX_BRIGHTNESS);
+ props.brightness = clamp_t(unsigned int, pdata->def_value, 0,
+ props.max_brightness);
+
+ backlight = backlight_device_register(dev_name(&client->dev),
+ &lv->client->dev, lv,
+ &lv5207lp_backlight_ops, &props);
+ if (IS_ERR(backlight)) {
+ dev_err(&client->dev, "failed to register backlight\n");
+ return PTR_ERR(backlight);
+ }
+
+ backlight_update_status(backlight);
+ i2c_set_clientdata(client, backlight);
+
+ return 0;
+}
+
+static int lv5207lp_remove(struct i2c_client *client)
+{
+ struct backlight_device *backlight = i2c_get_clientdata(client);
+
+ backlight->props.brightness = 0;
+ backlight_update_status(backlight);
+ backlight_device_unregister(backlight);
+
+ return 0;
+}
+
+static const struct i2c_device_id lv5207lp_ids[] = {
+ { "lv5207lp", 0 },
+ { }
+};
+MODULE_DEVICE_TABLE(i2c, lv5207lp_ids);
+
+static struct i2c_driver lv5207lp_driver = {
+ .driver = {
+ .name = "lv5207lp",
+ },
+ .probe = lv5207lp_probe,
+ .remove = lv5207lp_remove,
+ .id_table = lv5207lp_ids,
+};
+
+module_i2c_driver(lv5207lp_driver);
+
+MODULE_DESCRIPTION("Sanyo LV5207LP Backlight Driver");
+MODULE_AUTHOR("Laurent Pinchart <laurent.pinchart@ideasonboard.com>");
+MODULE_LICENSE("GPL");
--- /dev/null
+/*
+ * bd6107.h - Rohm BD6107 LEDs Driver
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __BD6107_H__
+#define __BD6107_H__
+
+struct device;
+
+struct bd6107_platform_data {
+ struct device *fbdev;
+ int reset; /* Reset GPIO */
+ unsigned int def_value;
+};
+
+#endif
--- /dev/null
+/*
+ * gpio_backlight.h - Simple GPIO-controlled backlight
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __GPIO_BACKLIGHT_H__
+#define __GPIO_BACKLIGHT_H__
+
+struct device;
+
+struct gpio_backlight_platform_data {
+ struct device *fbdev;
+ int gpio;
+ int def_value;
+ bool active_low;
+ const char *name;
+};
+
+#endif
+++ /dev/null
-#ifndef __LEDS_RENESAS_TPU_H__
-#define __LEDS_RENESAS_TPU_H__
-
-struct led_renesas_tpu_config {
- char *name;
- unsigned pin_gpio_fn;
- unsigned pin_gpio;
- unsigned int channel_offset;
- unsigned int timer_bit;
- unsigned int max_brightness;
- unsigned int refresh_rate;
-};
-
-#endif /* __LEDS_RENESAS_TPU_H__ */
--- /dev/null
+/*
+ * lv5207lp.h - Sanyo LV5207LP LEDs Driver
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __LV5207LP_H__
+#define __LV5207LP_H__
+
+struct device;
+
+struct lv5207lp_platform_data {
+ struct device *fbdev;
+ unsigned int max_value;
+ unsigned int def_value;
+};
+
+#endif
projects / karo-tx-linux.git / commitdiff