Merge remote-tracking branch 'arm-soc/for-next'
authorStephen Rothwell <sfr@canb.auug.org.au>
Wed, 4 Nov 2015 23:11:31 +0000 (10:11 +1100)
committerStephen Rothwell <sfr@canb.auug.org.au>
Wed, 4 Nov 2015 23:11:31 +0000 (10:11 +1100)
21 files changed:
1  2 
Documentation/devicetree/bindings/vendor-prefixes.txt
MAINTAINERS
arch/arm/Kconfig
arch/arm/boot/dts/am437x-sk-evm.dts
arch/arm/boot/dts/dra7.dtsi
arch/arm/boot/dts/rk3288-veyron.dtsi
arch/arm/boot/dts/rk3288.dtsi
arch/arm/boot/dts/sama5d2.dtsi
arch/arm/boot/dts/stih407-family.dtsi
arch/arm/configs/exynos_defconfig
arch/arm/configs/lpc18xx_defconfig
arch/arm/mach-exynos/suspend.c
arch/arm/mach-imx/gpc.c
arch/arm/mach-omap2/omap-wakeupgen.c
arch/arm/mm/Kconfig
arch/arm64/boot/dts/apm/apm-storm.dtsi
drivers/clocksource/Kconfig
drivers/clocksource/Makefile
drivers/hwmon/Kconfig
drivers/hwmon/Makefile
include/linux/platform_data/atmel.h

diff --cc MAINTAINERS
Simple merge
@@@ -621,31 -621,8 +621,9 @@@ config ARCH_PX
        help
          Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
  
- config ARCH_SHMOBILE_LEGACY
-       bool "Renesas ARM SoCs (non-multiplatform)"
-       select ARCH_SHMOBILE
-       select ARM_PATCH_PHYS_VIRT if MMU
-       select CLKDEV_LOOKUP
-       select CPU_V7
-       select GENERIC_CLOCKEVENTS
-       select HAVE_ARM_SCU if SMP
-       select HAVE_ARM_TWD if SMP
-       select HAVE_SMP
-       select MIGHT_HAVE_CACHE_L2X0
-       select MULTI_IRQ_HANDLER
-       select NO_IOPORT_MAP
-       select PINCTRL
-       select PM_GENERIC_DOMAINS if PM
-       select SH_CLK_CPG
-       select SPARSE_IRQ
-       help
-         Support for Renesas ARM SoC platforms using a non-multiplatform
-         kernel. This includes the SH-Mobile, R-Mobile, EMMA-Mobile, R-Car
-         and RZ families.
  config ARCH_RPC
        bool "RiscPC"
 +      depends on MMU
        select ARCH_ACORN
        select ARCH_MAY_HAVE_PC_FDC
        select ARCH_SPARSEMEM_ENABLE
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                                status = "disabled";
                        };
  
+                       tdes@fc044000 {
+                               compatible = "atmel,at91sam9g46-tdes";
+                               reg = <0xfc044000 0x100>;
+                               interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>;
+                               dmas = <&dma0
+                                       (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
+                                        AT91_XDMAC_DT_PERID(28))>,
+                                      <&dma0
+                                       (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
+                                        AT91_XDMAC_DT_PERID(29))>;
+                               dma-names = "tx", "rx";
+                               clocks = <&tdes_clk>;
+                               clock-names = "tdes_clk";
+                               status = "okay";
+                       };
++
 +                      pioA: pinctrl@fc038000 {
 +                              compatible = "atmel,sama5d2-pinctrl";
 +                              reg = <0xfc038000 0x600>;
 +                              interrupts = <18 IRQ_TYPE_LEVEL_HIGH 7>,
 +                                           <68 IRQ_TYPE_LEVEL_HIGH 7>,
 +                                           <69 IRQ_TYPE_LEVEL_HIGH 7>,
 +                                           <70 IRQ_TYPE_LEVEL_HIGH 7>;
 +                              interrupt-controller;
 +                              #interrupt-cells = <2>;
 +                              gpio-controller;
 +                              #gpio-cells = <2>;
 +                              clocks = <&pioA_clk>;
 +                      };
                };
        };
  };
                        clock-names     = "pwm";
                        clocks          = <&clk_sysin>;
                        st,pwm-num-chan = <4>;
+                       status          = "disabled";
+               };
+               rng10: rng@08a89000 {
+                       compatible      = "st,rng";
+                       reg             = <0x08a89000 0x1000>;
+                       clocks          = <&clk_sysin>;
+                       status          = "okay";
+               };
+               rng11: rng@08a8a000 {
+                       compatible      = "st,rng";
+                       reg             = <0x08a8a000 0x1000>;
+                       clocks          = <&clk_sysin>;
+                       status          = "okay";
+               };
+               ethernet0: dwmac@9630000 {
+                       device_type = "network";
+                       status = "disabled";
+                       compatible = "st,stih407-dwmac", "snps,dwmac", "snps,dwmac-3.710";
+                       reg = <0x9630000 0x8000>, <0x80 0x4>;
+                       reg-names = "stmmaceth", "sti-ethconf";
+                       st,syscon = <&syscfg_sbc_reg 0x80>;
+                       st,gmac_en;
+                       resets = <&softreset STIH407_ETH1_SOFTRESET>;
+                       reset-names = "stmmaceth";
+                       interrupts = <GIC_SPI 98 IRQ_TYPE_NONE>,
+                                    <GIC_SPI 99 IRQ_TYPE_NONE>;
+                       interrupt-names = "macirq", "eth_wake_irq";
+                       /* DMA Bus Mode */
+                       snps,pbl = <8>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_rgmii1>;
+                       clock-names = "stmmaceth", "sti-ethclk";
+                       clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>,
+                                <&clk_s_c0_flexgen CLK_ETH_PHY>;
                };
 +
 +              rng10: rng@08a89000 {
 +                      compatible      = "st,rng";
 +                      reg             = <0x08a89000 0x1000>;
 +                      clocks          = <&clk_sysin>;
 +                      status          = "okay";
 +              };
 +
 +              rng11: rng@08a8a000 {
 +                      compatible      = "st,rng";
 +                      reg             = <0x08a8a000 0x1000>;
 +                      clocks          = <&clk_sysin>;
 +                      status          = "okay";
 +              };
        };
  };
@@@ -166,7 -172,14 +172,13 @@@ CONFIG_MMC_SDHCI=
  CONFIG_MMC_SDHCI_S3C=y
  CONFIG_MMC_SDHCI_S3C_DMA=y
  CONFIG_MMC_DW=y
 -CONFIG_MMC_DW_IDMAC=y
  CONFIG_MMC_DW_EXYNOS=y
+ CONFIG_NEW_LEDS=y
+ CONFIG_LEDS_CLASS=y
+ CONFIG_LEDS_GPIO=y
+ CONFIG_LEDS_PWM=y
+ CONFIG_LEDS_TRIGGERS=y
+ CONFIG_LEDS_TRIGGER_HEARTBEAT=y
  CONFIG_RTC_CLASS=y
  CONFIG_RTC_DRV_MAX77686=y
  CONFIG_RTC_DRV_MAX77802=y
@@@ -117,8 -127,11 +127,10 @@@ CONFIG_FB_ARMCLCD=
  CONFIG_USB=y
  CONFIG_USB_EHCI_HCD=y
  CONFIG_USB_EHCI_ROOT_HUB_TT=y
+ CONFIG_USB_EHCI_HCD_PLATFORM=y
+ CONFIG_USB_STORAGE=y
  CONFIG_MMC=y
  CONFIG_MMC_DW=y
 -CONFIG_MMC_DW_IDMAC=y
  CONFIG_NEW_LEDS=y
  CONFIG_LEDS_CLASS=y
  CONFIG_LEDS_PCA9532=y
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