powerpc/85xx: Add missing config option for CACHE SRAM code

fsl_85xx_l2ctlr.o and fsl_85xx_cache_sram.o are built only
if CONFIG_FSL_85XX_CACHE_SRAM is defined. The driver that
qualifies and wants to make use of the CACHE SRAM's exported
API (i.e. a freescale net driver) should (be able to) select
this config option.

Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig
index 4c91ea97d885a24a6c52ef4833ce159a04302890..fd6f3c06a0dc5e87b33d333caa432f2d47e14669 100644 (file)
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -14,6 +14,15 @@ if FSL_SOC_BOOKE
 
 if PPC32
 
+config FSL_85XX_CACHE_SRAM
+       bool
+       select PPC_LIB_RHEAP
+       help
+         When selected, this option enables cache-sram support
+         for memory allocation on P1/P2 QorIQ platforms.
+         cache-sram-size and cache-sram-offset kernel boot
+         parameters should be passed when this option is enabled.
+
 config MPC8540_ADS
        bool "Freescale MPC8540 ADS"
        select DEFAULT_UIMAGE