karo-tx-linux.git
10 years agoinit: Remove CONFIG_PPC_ISERIES
Stephen Rothwell [Thu, 15 Mar 2012 18:19:08 +0000 (18:19 +0000)]
init: Remove CONFIG_PPC_ISERIES

It is no longer selectable, so remove the check for it.

Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
10 years agopowerpc: Remove FW_FEATURE ISERIES from arch code
Stephen Rothwell [Thu, 15 Mar 2012 18:18:00 +0000 (18:18 +0000)]
powerpc: Remove FW_FEATURE ISERIES from arch code

This is no longer selectable, so just remove all the dependent code.

Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
10 years agotty/hvc_vio: FW_FEATURE_ISERIES is no longer selectable
Stephen Rothwell [Thu, 15 Mar 2012 18:16:54 +0000 (18:16 +0000)]
tty/hvc_vio: FW_FEATURE_ISERIES is no longer selectable

so remove the code that tests for it.

Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
10 years agopowerpc/spufs: Fix double unlocks
Benjamin Herrenschmidt [Wed, 7 Mar 2012 11:01:35 +0000 (11:01 +0000)]
powerpc/spufs: Fix double unlocks

spufs return path has a bug where it could end up trying to
unlock an inode mutex twice. Fix it.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
10 years agoMerge remote-tracking branch 'kumar/next' into next
Benjamin Herrenschmidt [Tue, 20 Mar 2012 23:56:04 +0000 (10:56 +1100)]
Merge remote-tracking branch 'kumar/next' into next

10 years agoMerge remote-tracking branch 'jwb/next' into next
Benjamin Herrenschmidt [Tue, 20 Mar 2012 23:56:00 +0000 (10:56 +1100)]
Merge remote-tracking branch 'jwb/next' into next

10 years agopowerpc/5200: convert mpc5200 to use of_platform_populate()
Grant Likely [Tue, 21 Jun 2011 08:45:13 +0000 (08:45 +0000)]
powerpc/5200: convert mpc5200 to use of_platform_populate()

of_platform_populate() also handles nodes at the root of the tree,
which is wanted for things like describing the sound complex.  This
patch converts mpc5200 support to use of_platform_populate() instead
of of_platform_bus_probe().

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
10 years agopowerpc/mpc5200: add options to mpc5200_defconfig
Heiko Schocher [Sun, 18 Mar 2012 22:20:06 +0000 (23:20 +0100)]
powerpc/mpc5200: add options to mpc5200_defconfig

Add the following options to the mpc5200_defconfig, needed
for the a4m072 board support:

CONFIG_AMD_PHY=y
CONFIG_GPIO_SYSFS=y
CONFIG_SENSORS_LM87=m
CONFIG_RTC_DRV_PCF8563=m

Signed-off-by: Heiko Schocher <hs@denx.de>
cc: Wolfgang Denk <wd@denx.de>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
10 years agopowerpc/mpc52xx: add a4m072 board support
Heiko Schocher [Sun, 18 Mar 2012 22:00:44 +0000 (23:00 +0100)]
powerpc/mpc52xx: add a4m072 board support

Add DTS file for a4m072 board and add its name to the list
of the supported boards.

Signed-off-by: Heiko Schocher <hs@denx.de>
cc: Grant Likely <grant.likely@secretlab.ca>
cc: devicetree-discuss@ozlabs.org
cc: Wolfgang Denk <wd@denx.de>
cc: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
10 years agopowerpc/mpc5200: update mpc5200_defconfig to fit for charon board
Heiko Schocher [Sat, 17 Mar 2012 09:30:30 +0000 (10:30 +0100)]
powerpc/mpc5200: update mpc5200_defconfig to fit for charon board

Add following options to mpc5200_defconfig:

- CONFIG_MTD_PLATRAM=y
  (selects CONFIG_MTD_RAM, so this is removed)
- CONFIG_FIXED_PHY=y
- CONFIG_SENSORS_LM80=y
- CONFIG_FB_FOREIGN_ENDIAN=y
- CONFIG_FB_SM501=m
- CONFIG_RTC_DRV_DS1374=y

Signed-off-by: Heiko Schocher <hs@denx.de>
cc: Grant Likely <grant.likely@secretlab.ca>
cc: Wolfgang Denk <wd@denx.de>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
10 years agoDocumentation/powerpc/mpc52xx.txt: Checkpatch cleanup
Andrea Gelmini [Sat, 17 Mar 2012 00:33:23 +0000 (01:33 +0100)]
Documentation/powerpc/mpc52xx.txt: Checkpatch cleanup

Fix all trailing whitespace errors reported by checkpatch.

Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
10 years agopowerpc/44x: Add additional device support for APM821xx SoC and Bluestone board
Vinh Nguyen Huu Tuong [Thu, 15 Mar 2012 00:56:32 +0000 (00:56 +0000)]
powerpc/44x: Add additional device support for APM821xx SoC and Bluestone board

This patch updates the dts file for bluestone board with support:
- UART1
- L2 cache
- NAND with NDFC
- PCI-E

Signed-off-by: Vinh Nguyen Huu Tuong <vhtnguyen@apm.com>
Signed-off-by: Josh Boyer <jwboyer@gmail.com>
10 years agopowerpc/44x: Add support PCI-E for APM821xx SoC and Bluestone board
Vinh Nguyen Huu Tuong [Thu, 15 Mar 2012 00:57:19 +0000 (00:57 +0000)]
powerpc/44x: Add support PCI-E for APM821xx SoC and Bluestone board

This patch extends PCI-E driver to support PCI-E for APM821xx SoC on Bluestone
board.

Signed-off-by: Vinh Nguyen Huu Tuong <vhtnguyen@apm.com>
Signed-off-by: Josh Boyer <jwboyer@gmail.com>
10 years agoMAINTAINERS: Update PowerPC 4xx tree
Josh Boyer [Thu, 1 Mar 2012 14:07:54 +0000 (09:07 -0500)]
MAINTAINERS: Update PowerPC 4xx tree

Move the powerpc-4xx.git tree back to kernel.org

Signed-off-by: Josh Boyer <jwboyer@gmail.com>
10 years agopowerpc/44x: The bug fixed support for APM821xx SoC and Bluestone board
Vinh Nguyen Huu Tuong [Tue, 20 Dec 2011 02:43:34 +0000 (02:43 +0000)]
powerpc/44x: The bug fixed support for APM821xx SoC and Bluestone board

This patch consists of:
- Fix the pvr mask for checking pvr in cputable.c
- Fix the cpu name as consistent with cpu name is describled in dts file

Signed-off-by: Vinh Nguyen Huu Tuong <vhtnguyen@apm.com>
Signed-off-by: Josh Boyer <jwboyer@gmail.com>
10 years agopowerpc: document the FSL MPIC message register binding
Jia Hongtao [Thu, 1 Mar 2012 09:32:34 +0000 (17:32 +0800)]
powerpc: document the FSL MPIC message register binding

This binding documents how the message register blocks found in some FSL
MPIC implementations shall be represented in a device tree.

Signed-off-by: Meador Inge <meador_inge@mentor.com>
Signed-off-by: Jia Hongtao <B38951@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
10 years agopowerpc: add support for MPIC message register API
Jia Hongtao [Fri, 17 Feb 2012 02:49:03 +0000 (10:49 +0800)]
powerpc: add support for MPIC message register API

Some MPIC implementations contain one or more blocks of message registers
that are used to send messages between cores via IPIs.  A simple API has
been added to access (get/put, read, write, etc ...) these message registers.
The available message registers are initially discovered via nodes in the
device tree.  A separate commit contains a binding for the message register
nodes.

Signed-off-by: Meador Inge <meador_inge@mentor.com>
Signed-off-by: Jia Hongtao <B38951@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
10 years agopowerpc/fsl: Added aliased MSIIR register address to MSI node in dts
Diana CRACIUN [Wed, 1 Feb 2012 15:50:34 +0000 (17:50 +0200)]
powerpc/fsl: Added aliased MSIIR register address to MSI node in dts

The MSIIR register for each MSI bank is aliased to a different
address. The MSI node reg property was updated to contain this
address:

e.g. reg = <0x41600 0x200 0x44140 4>;

The first region contains the address and length of the MSI
register set and the second region contains the address of
the aliased MSIIR register at 0x44140.

Signed-off-by: Diana CRACIUN <Diana.Craciun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
10 years agopowerpc/85xx: mpc8548cds - add 36-bit dts
Zhao Chenhui [Tue, 6 Mar 2012 09:06:45 +0000 (17:06 +0800)]
powerpc/85xx: mpc8548cds - add 36-bit dts

Create mpc8548cds_36b.dts. Support 36-bit mode.

Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
10 years agopowerpc/85xx: Refactor mpc8548cds device tree
Zhao Chenhui [Tue, 6 Mar 2012 09:06:44 +0000 (17:06 +0800)]
powerpc/85xx: Refactor mpc8548cds device tree

* Create mpc8548cds.dtsi
* Move lbc, soc and pci0 nodes to mpc8548cds_32b.dtsi
* Change cuImage.mpc8548cds to cuImage.mpc8548cds_32b
* Rename mpc8548cds.dts to mpc8548cds_32b.dts

Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
10 years agopowerpc/85xx: mpc8548cds - Add FPGA node to dts
chenhui zhao [Tue, 6 Mar 2012 09:06:42 +0000 (17:06 +0800)]
powerpc/85xx: mpc8548cds - Add FPGA node to dts

Remove FPGA(CADMUS) macros in code. Move it to dts.

Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
Acked-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
10 years agopowerpc/85xx: mpc8548cds - fix alias in mpc8548si-pre.dtsi
Zhao Chenhui [Tue, 6 Mar 2012 09:06:43 +0000 (17:06 +0800)]
powerpc/85xx: mpc8548cds - fix alias in mpc8548si-pre.dtsi

Correct ethernet1 and add ethernet2 and ethernet3.

Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
10 years agopowerpc/85xx: mpc8548cds - Add RapidIO node to dts
chenhui zhao [Tue, 6 Mar 2012 09:06:41 +0000 (17:06 +0800)]
powerpc/85xx: mpc8548cds - Add RapidIO node to dts

Enable RapidIO and add rapidio and rmu nodes to dts.

Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
10 years agopowerpc/85xx: mpc8548cds - Add NOR flash node to dts
chenhui zhao [Tue, 6 Mar 2012 09:06:40 +0000 (17:06 +0800)]
powerpc/85xx: mpc8548cds - Add NOR flash node to dts

Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
10 years agopowerpc/85xx: mpc85xxcds - Fix PCI I/O space resource of PCI bridge
chenhui zhao [Wed, 14 Mar 2012 10:15:27 +0000 (18:15 +0800)]
powerpc/85xx: mpc85xxcds - Fix PCI I/O space resource of PCI bridge

There is a PCI bridge(Tsi310) between the MPC8548 and a VIA
southbridge chip.

The bootloader sets the PCI bridge to open a window from 0x0000
to 0x1fff on the PCI I/O space. But the kernel can't set the I/O
resource. In the routine pci_read_bridge_io(), if the base which
is read from PCI_IO_BASE is equal to zero, the routine don't set
the I/O resource of the child bus.

To allow the legacy I/O space on the VIA southbridge to be accessed,
use the fixup to fix the PCI I/O space of the PCI bridge.

Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
10 years agopowerpc/85xx: Add Quicc Engine support for p1025rdb
Zhicheng Fan [Wed, 22 Feb 2012 05:44:06 +0000 (13:44 +0800)]
powerpc/85xx: Add Quicc Engine support for p1025rdb

Signed-off-by: Zhicheng Fan <b32736@freescale.com>
Acked-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
10 years agopowerpc/85xx: Abstract common define of signal multiplex control for qe
Zhicheng Fan [Wed, 22 Feb 2012 05:44:07 +0000 (13:44 +0800)]
powerpc/85xx: Abstract common define of signal multiplex control for qe

The mpc85xx_rdb and mpc85xx_mds have commom define of signal multiplex for qe, so
they need to go in common header, the patch abstract them to fsl_guts.h

Signed-off-by: Zhicheng Fan <b32736@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
10 years agopowerpc/85xx: allow CONFIG_PHYS_64BIT to be selectable
Timur Tabi [Tue, 21 Feb 2012 19:53:15 +0000 (13:53 -0600)]
powerpc/85xx: allow CONFIG_PHYS_64BIT to be selectable

Remove the "select PHYS_64BIT" from the Kconfig entry for the P1022DS,
so that large physical address support is a selectable option for non-CoreNet
reference boards.

The option is enabled in mpc85xx_[smp_]defconfig so that the default is
unchanged.  However, now it can be deselected.

The P1022DS had this option defined because the default device tree for
this board uses 36-bit addresses.  This had the side-effect of forcing
this option on for all boards that use mpc85xx_[smp_]defconfig.  Some
users may want to disable this feature to create an optimized configuration
for boards with <= 2GB of RAM.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
10 years agopowerpc/85xx: l2sram - Add compatible entry for mpc8548 L2 controller
chenhui zhao [Wed, 22 Feb 2012 10:20:13 +0000 (18:20 +0800)]
powerpc/85xx: l2sram - Add compatible entry for mpc8548 L2 controller

Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
10 years agopowerpc/dts: fix the compatible string of sec 4.0
Liu Shuo [Wed, 7 Mar 2012 05:20:06 +0000 (13:20 +0800)]
powerpc/dts: fix the compatible string of sec 4.0

Fix the compatible string of sec 4.0 to match with CAAM driver according
to Documentation/devicetree/bindings/crypto/fsl-sec4.txt

Signed-off-by: Liu Shuo <shuo.liu@freescale.com>
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
10 years agopowerpc/85xx: Add missing config option for CACHE SRAM code
Claudiu Manoil [Tue, 31 Jan 2012 10:15:20 +0000 (12:15 +0200)]
powerpc/85xx: Add missing config option for CACHE SRAM code

fsl_85xx_l2ctlr.o and fsl_85xx_cache_sram.o are built only
if CONFIG_FSL_85XX_CACHE_SRAM is defined. The driver that
qualifies and wants to make use of the CACHE SRAM's exported
API (i.e. a freescale net driver) should (be able to) select
this config option.

Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
10 years agopowerpc/85xx: Fix compiler error with THIS_MODULE and related
Claudiu Manoil [Wed, 1 Feb 2012 17:05:15 +0000 (19:05 +0200)]
powerpc/85xx: Fix compiler error with THIS_MODULE and related

CC      arch/powerpc/sysdev/fsl_85xx_l2ctlr.o
arch/powerpc/sysdev/fsl_85xx_l2ctlr.c:209:13: error: 'THIS_MODULE' undeclared here (not in a function)
arch/powerpc/sysdev/fsl_85xx_l2ctlr.c:229:20: error: expected declaration specifiers or '...' before string constant
cc1: warnings being treated as errors
arch/powerpc/sysdev/fsl_85xx_l2ctlr.c:229:1: error: data definition has no type or storage class
arch/powerpc/sysdev/fsl_85xx_l2ctlr.c:229:1: error: type defaults to 'int' in declaration of 'MODULE_DESCRIPTION'
arch/powerpc/sysdev/fsl_85xx_l2ctlr.c:229:20: error: function declaration isn't a prototype
arch/powerpc/sysdev/fsl_85xx_l2ctlr.c:230:16: error: expected declaration specifiers or '...' before string constant
arch/powerpc/sysdev/fsl_85xx_l2ctlr.c:230:1: error: data definition has no type or storage class
arch/powerpc/sysdev/fsl_85xx_l2ctlr.c:230:1: error: type defaults to 'int' in declaration of 'MODULE_LICENSE'
arch/powerpc/sysdev/fsl_85xx_l2ctlr.c:230:16: error: function declaration isn't a prototype
make[1]: *** [arch/powerpc/sysdev/fsl_85xx_l2ctlr.o] Error 1

...

  CC      arch/powerpc/sysdev/fsl_85xx_cache_sram.o
cc1: warnings being treated as errors
arch/powerpc/sysdev/fsl_85xx_cache_sram.c:69:1: error: data definition has no type or storage class
arch/powerpc/sysdev/fsl_85xx_cache_sram.c:69:1: error: type defaults to 'int' in declaration of 'EXPORT_SYMBOL'
arch/powerpc/sysdev/fsl_85xx_cache_sram.c:69:1: error: parameter names (without types) in function declaration
arch/powerpc/sysdev/fsl_85xx_cache_sram.c:80:1: error: data definition has no type or storage class
arch/powerpc/sysdev/fsl_85xx_cache_sram.c:80:1: error: type defaults to 'int' in declaration of 'EXPORT_SYMBOL'
arch/powerpc/sysdev/fsl_85xx_cache_sram.c:80:1: error: parameter names (without types) in function declaration
make[1]: *** [arch/powerpc/sysdev/fsl_85xx_cache_sram.o] Error 1

Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com>
Acked-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
10 years agopowerpc/83xx: mpc836x - fix failed phy detection for ucc ethernet on MDS
Paul Gortmaker [Mon, 27 Feb 2012 12:25:01 +0000 (07:25 -0500)]
powerpc/83xx: mpc836x - fix failed phy detection for ucc ethernet on MDS

The mpc836x_mds platform has been broken since the commit
6fe3264945ee63292cdfb27b6e95bc52c603bb09

  "netdev/phy: Use mdiobus_read() so that proper locks are taken"

which caused the fsl_pq_mdio TBI autoprobe to oops.  The oops
was "fixed" in commit 28d8ea2d568534026ccda3e8936f5ea1e04a86a1

  "fsl_pq_mdio: Clean up tbi address configuration"

by simply removing the the autoscan code, and making tbi nodes
mandatory.  Some of the newer reference platforms were updated
to have tbi nodes in 220669495bf8b68130a8218607147c7b74c28d2b

  "powerpc: Add TBI PHY node to first MDIO bus"

but the older mpc836x didn't get one and hence was just failing
with -EBUSY as follows:

 fsl-pq_mdio: probe of e0102120.mdio failed with error -16
   ...
 net eth0: Could not attach to PHY
 eth0: Cannot initialize PHY, aborting.

Add a TBI node and use the 1st free address for it.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
10 years agopowerpc/85xx: p1022ds: enable monitor switching via pixis indirect mode
Timur Tabi [Fri, 18 Nov 2011 07:50:01 +0000 (07:50 +0000)]
powerpc/85xx: p1022ds: enable monitor switching via pixis indirect mode

When the P1022's DIU video controller is active, the pixis must be accessed
in "indirect" mode, which uses localbus chip select addresses.

Switching between the DVI and LVDS monitor ports is handled by the pixis,
so that switching needs to be done via indirect mode.

This has the side-effect of no longer requiring U-Boot to enable the DIU.
Now Linux can enable the DIU all by itself.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
10 years agopowerpc/85xx: Board support for GE IMP3A
Martyn Welch [Mon, 12 Mar 2012 17:13:00 +0000 (17:13 +0000)]
powerpc/85xx: Board support for GE IMP3A

Initial board support for the GE IMP3A, a 3U compactPCI card with a p2020
processor.

Signed-off-by: Martyn Welch <martyn.welch@ge.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
10 years agopowerpc: Move GE PIC drivers
Martyn Welch [Mon, 12 Mar 2012 17:12:59 +0000 (17:12 +0000)]
powerpc: Move GE PIC drivers

Move the GE PIC drivers to allow these to be used by non-86xx boards.

Signed-off-by: Martyn Welch <martyn.welch@ge.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
10 years agogpio: Move GE GPIO driver to reside within GPIO subsystem
Martyn Welch [Mon, 12 Mar 2012 17:12:58 +0000 (17:12 +0000)]
gpio: Move GE GPIO driver to reside within GPIO subsystem

The GE GPIO driver provides basic support (set direction, read/write state)
for the GPIO provided on some GE single board computers. This patch moves
the driver from the 86xx specific platform directrory to the GPIO subsystem
so that it can be used on non-86xx boards.

Signed-off-by: Martyn Welch <martyn.welch@ge.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
10 years agopowerpc: Add GE FPGA config option
Martyn Welch [Mon, 12 Mar 2012 17:12:57 +0000 (17:12 +0000)]
powerpc: Add GE FPGA config option

This patch adds the GE_FPGA configuration option. This is being carried
out as ground work to allow the PIC and GPIO drivers to be move from the
powerpc 86xx platform directory to more general locations to allow them to
be used on non-86xx boards and to reduce churn when further boards using
these drivers are added.

Signed-off-by: Martyn Welch <martyn.welch@ge.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
10 years agopowerpc/85xx: Add dts for p1020rdb-pc board
Zhicheng Fan [Fri, 10 Feb 2012 06:48:16 +0000 (14:48 +0800)]
powerpc/85xx: Add dts for p1020rdb-pc board

P1020RDB-PC Overview
------------------
1Gbyte DDR3 SDRAM
32 Mbyte NAND flash
10 16Mbyte NOR flash
16 Mbyte SPI flash
SD connector to interface with the SD memory card
Real-time clock on I2C bus

PCIe:
- x1 PCIe slot
- x1 mini-PCIe slot

10/100/1000 BaseT Ethernet ports:
- eTSEC1, RGMII: one 10/100/1000 port using VitesseTM VSC7385 L2 switch
- eTSEC2, SGMII: one 10/100/1000 port using VitesseTM VSC8221
- eTSEC3, RGMII: one 10/100/1000 port using AtherosTM AR8021

USB 2.0 port:
- Two USB2.0 Type A receptacles
- One USB2.0 signal to Mini PCIe slot

Dual RJ45 UART ports:
- DUART interface: supports two UARTs up to 115200 bps for console display

Signed-off-by: Zhicheng Fan <b32736@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
10 years agopowerpc/85xx: Add p1020rdb-pc platform support
Zhicheng Fan [Fri, 10 Feb 2012 06:48:15 +0000 (14:48 +0800)]
powerpc/85xx: Add p1020rdb-pc platform support

Signed-off-by: Zhicheng Fan <b32736@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
10 years agopowerpc/85xx: add P1020UTM-PC platform support
Jerry Huang [Wed, 14 Mar 2012 09:08:28 +0000 (17:08 +0800)]
powerpc/85xx: add P1020UTM-PC platform support

The p1020utm-pc has the similar feature as the p1020rdb.
Therefore, p1020utm-pc use the same platform file as the p1/p2 rdb board.
Overview of P1020UTM-PC platform:
        - DDR3 1GB
        - NOR flash 32MB
        - I2C EEPROM 256Kb
        - eTSEC1 (RGMII PHY Atheros AR8021)
        - eTSEC2 (SGMII PHY Vitesse VSC8221)
        - eTSEC3 (RGMII PHY Atheros AR8021)
        - SDHC
        - 2 USB ports
        - PCIe (Lane1 to dual SATA controller)

Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
10 years agopowerpc/85xx: add P1020MBG-PC platform support
Jerry Huang [Wed, 14 Mar 2012 09:08:27 +0000 (17:08 +0800)]
powerpc/85xx: add P1020MBG-PC platform support

The p1020mbg-pc has the similar feature as the p1020rdb.
Therefore, p1020mbg-pc use the same platform file as the p1/p2 rdb board.
Overview of P1020MBG-PC platform:
        - DDR3 2GB
        - NOR flash 64MB
        - I2C EEPROM 256Kb
        - eTSEC1 (RGMII PHY) connected to VSC7385 L2 switch
        - eTSEC2 (SGMII PHY)
        - eTSEC3 (RGMII PHY)
        - SDHC
        - 2 USB ports
        - 4 TDM ports
        - PCIe (Lane1 to dual SATA controller)

Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
10 years agoNAND Machine support for Integrated Flash Controller
Prabhakar Kushwaha [Thu, 15 Mar 2012 05:34:23 +0000 (11:04 +0530)]
NAND Machine support for Integrated Flash Controller

Integrated Flash Controller(IFC) can be used to hook NAND Flash
chips using NAND Flash Machine available on it.

Signed-off-by: Dipen Dudhat <Dipen.Dudhat@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Liu Shuo <b35362@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
10 years agopowerpc/85xx: Clean up partition nodes in dts for MPC8572DS
Jia Hongtao [Tue, 21 Feb 2012 02:11:23 +0000 (10:11 +0800)]
powerpc/85xx: Clean up partition nodes in dts for MPC8572DS

Signed-off-by: Jin Qing <b24347@freescale.com>
Signed-off-by: Jia Hongtao <B38951@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
10 years agopowerpc/85xx: p1022ds: disable the NOR flash node if video is enabled
Timur Tabi [Thu, 16 Feb 2012 00:25:47 +0000 (18:25 -0600)]
powerpc/85xx: p1022ds: disable the NOR flash node if video is enabled

The Freescale P1022 has a unique pin muxing "feature" where the DIU video
controller's video signals are muxed with 24 of the local bus address signals.
When the DIU is enabled, the bulk of the local bus is disabled, preventing
access to memory-mapped devices like NOR flash and the pixis FPGA.

Therefore, if the DIU is going to be enabled, then memory-mapped devices on
the localbus, like NOR flash, need to be disabled.

This also means that the localbus is not a 'simple-bus' any more, so remove
that string from the compatible node.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
10 years agopowerpc/85xx: create 32-bit DTS for the P1022DS
Timur Tabi [Thu, 16 Feb 2012 00:25:48 +0000 (18:25 -0600)]
powerpc/85xx: create 32-bit DTS for the P1022DS

Create a 32-bit address space version of p1022ds.dts.  To avoid confusion,
p1022ds.dts is renamed to p1022ds_36b.dts.  We also create p1022ds.dtsi
to store some common nodes.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
10 years agopowerpc/85xx: Add magic-packet properties for etsec
Xie Xiaobo [Tue, 17 Jan 2012 09:59:51 +0000 (17:59 +0800)]
powerpc/85xx: Add magic-packet properties for etsec

The properties indicates that the hardware supports waking up via magic
packet.

Signed-off-by: Xie Xiaobo <X.Xie@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
10 years agopowerpc/85xx: Add some DTS nodes and attributes for mpc8536ds
Xie Xiaobo [Tue, 17 Jan 2012 09:59:50 +0000 (17:59 +0800)]
powerpc/85xx: Add some DTS nodes and attributes for mpc8536ds

Add partitions for NOR and NAND Flash.

Signed-off-by: Xie Xiaobo <X.Xie@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
10 years agopowerpc/fsl_msi: return proper error value when ioremap failed.
Liu Shuo [Thu, 8 Mar 2012 22:47:37 +0000 (14:47 -0800)]
powerpc/fsl_msi: return proper error value when ioremap failed.

Signed-off-by: Liu Shuo <soniccat.liu@gmail.com>
Acked-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
10 years agopowerpc/85xx: fix typo in p1010rdb.dtsi
Gustavo Zacarias [Tue, 28 Feb 2012 19:43:08 +0000 (16:43 -0300)]
powerpc/85xx: fix typo in p1010rdb.dtsi

Fix typo introduced by "powerpc: Add TBI PHY node to first MDIO bus"
from Andy Fleming.
It's device_type rather than device-type, which causes the mdio probe to
fail thus making all gianfar ethernet interfaces unusable.

Signed-off-by: Gustavo Zacarias <gustavo@zacarias.com.ar>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
10 years agopowerpc/85xx: p2020rdb & p1010rdb - lower spi flash freq to 40Mhz
Sebastian Andrzej Siewior [Thu, 15 Mar 2012 17:40:28 +0000 (18:40 +0100)]
powerpc/85xx: p2020rdb & p1010rdb - lower spi flash freq to 40Mhz

This is here most likely since the FSL bsp. Back in the FSL bsp it was
set to 50Mhz and working. However the driver divided the SoC freq. only
by 2. According to the TRM the platform clock (which the manual refers
in its formula) is the system clock divided by two. So in the end it has
to divide by 4 and this is what the fsl-spi driver in tree is doing.
Since then the flash is not wokring I guess. After chaning the freq from
50Mhz to 40Mhz like others do then I can access the flash.

Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
10 years agopowerpc/85xx: p2020rdb - move the NAND address.
Sebastian Andrzej Siewior [Thu, 15 Mar 2012 17:40:27 +0000 (18:40 +0100)]
powerpc/85xx: p2020rdb - move the NAND address.

It is not at 0xffa00000. According to current u-boot source the NAND
controller is always at 0xff800000 and it is either at CS0 or CS1
depending on NAND or NAND+NOR mode. In 36bit mode it is shifted to
0xfff800000 but it has always an eight there and never an A.

Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
10 years agopowerpc/srio: Fix the compile errors when building with 64bit
Liu Gang [Fri, 9 Mar 2012 08:10:38 +0000 (16:10 +0800)]
powerpc/srio: Fix the compile errors when building with 64bit

For the file "arch/powerpc/sysdev/fsl_rmu.c", there will be some compile
errors while using the corenet64_smp_defconfig:

.../fsl_rmu.c:315: error: cast from pointer to integer of different size
.../fsl_rmu.c:320: error: cast to pointer from integer of different size
.../fsl_rmu.c:320: error: cast to pointer from integer of different size
.../fsl_rmu.c:320: error: cast to pointer from integer of different size
.../fsl_rmu.c:330: error: cast to pointer from integer of different size
.../fsl_rmu.c:332: error: cast to pointer from integer of different size
.../fsl_rmu.c:339: error: cast to pointer from integer of different size
.../fsl_rmu.c:340: error: cast to pointer from integer of different size
.../fsl_rmu.c:341: error: cast to pointer from integer of different size
.../fsl_rmu.c:348: error: cast to pointer from integer of different size
.../fsl_rmu.c:348: error: cast to pointer from integer of different size
.../fsl_rmu.c:348: error: cast to pointer from integer of different size
.../fsl_rmu.c:659: error: cast from pointer to integer of different size
.../fsl_rmu.c:659: error: format '%8.8x' expects type 'unsigned int',
                   but argument 5 has type 'size_t'
.../fsl_rmu.c:985: error: cast from pointer to integer of different size
.../fsl_rmu.c:997: error: cast to pointer from integer of different size

Rewrote the corresponding code with the support of 64bit building.

Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Reported-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
10 years agopowerpc/srio: Fix the relocation errors when building with 64bit
Liu Gang [Tue, 6 Mar 2012 02:58:12 +0000 (10:58 +0800)]
powerpc/srio: Fix the relocation errors when building with 64bit

For the file "arch/powerpc/sysdev/fsl_rio.c", there will be some relocation
errors while using the corenet64_smp_defconfig:

WARNING: modpost: Found 6 section mismatch(es).
To see full details build your kernel with:
'make CONFIG_DEBUG_SECTION_MISMATCH=y'
  GEN     .version
  CHK     include/generated/compile.h
  UPD     include/generated/compile.h
  CC      init/version.o
  LD      init/built-in.o
  LD      .tmp_vmlinux1
arch/powerpc/sysdev/built-in.o:(__ex_table+0x0):
relocation truncated to fit: R_PPC64_ADDR16 against `.text'+3208
arch/powerpc/sysdev/built-in.o:(__ex_table+0x2):
relocation truncated to fit: R_PPC64_ADDR16 against `.fixup'
arch/powerpc/sysdev/built-in.o:(__ex_table+0x4):
relocation truncated to fit: R_PPC64_ADDR16 against `.text'+3230
arch/powerpc/sysdev/built-in.o:(__ex_table+0x6):
relocation truncated to fit: R_PPC64_ADDR16 against `.fixup'+c
arch/powerpc/sysdev/built-in.o:(__ex_table+0x8):
relocation truncated to fit: R_PPC64_ADDR16 against `.text'+3250
arch/powerpc/sysdev/built-in.o:(__ex_table+0xa):
relocation truncated to fit: R_PPC64_ADDR16 against `.fixup'+18

Rewrote the corresponding code with the support of 64bit building.

Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
10 years agopowerpc/85xx: Add dts for p1025rdb board
Zhicheng Fan [Mon, 13 Feb 2012 22:06:23 +0000 (22:06 +0000)]
powerpc/85xx: Add dts for p1025rdb board

P1025RDB Overview
------------------
1Gbyte DDR3 SDRAM
32 Mbyte NAND flash
16Mbyte NOR flash
16 Mbyte SPI flash
SD connector to interface with the SD memory card
Real-time clock on I2C bus

PCIe:
- x1 PCIe slot
- x1 mini-PCIe slot

10/100/1000 BaseT Ethernet ports:
- eTSEC1, RGMII: one 10/100/1000 port using AtherosTM AR8021
- eTSEC2, SGMII: one 10/100/1000 port using VitesseTM VSC8221
- eTSEC3, RGMII: one 10/100/1000 port using AtherosTM AR8021

USB 2.0 port:
- Two USB2.0 Type A receptacles
- One USB2.0 signal to Mini PCIe slot

Dual RJ45 UART ports:
- DUART interface: supports two UARTs up to 115200 bps for console display

Signed-off-by: Zhicheng Fan <b32736@freescale.com>
Acked-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
10 years agopowerpc/85xx: Add p1025rdb platform support
Zhicheng Fan [Mon, 13 Feb 2012 22:06:22 +0000 (22:06 +0000)]
powerpc/85xx: Add p1025rdb platform support

Signed-off-by: Zhicheng Fan <b32736@freescale.com>
Acked-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
10 years agopowerpc/85xx: Add usb controller version info
Ramneek Mehresh [Wed, 18 Jan 2012 05:40:48 +0000 (11:10 +0530)]
powerpc/85xx: Add usb controller version info

Add usb controller version info for the following:
MPC8536, P1010, P1020, P1021, P1022, P1023, P2020, P2041,
P3041, P3060, P5020

Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
10 years agopowerpc/85xx: Add p2020rdb-pc dts support
Tang Yuantian [Thu, 9 Feb 2012 21:59:57 +0000 (21:59 +0000)]
powerpc/85xx: Add p2020rdb-pc dts support

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Tang Yuantian <b29983@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
10 years agopowerpc/85xx: Adds Support for P2020RDB-PC board
Tang Yuantian [Wed, 28 Dec 2011 03:41:47 +0000 (11:41 +0800)]
powerpc/85xx: Adds Support for P2020RDB-PC board

P2020RDB-PC Board shares the same design(PCB) as P102x RDB style platforms.
The difference between this platform and the already existing P2020RDB
is mainly with respect to DDR. The P2020RDB-PC has a DDR3 memory.
The P2020RDB-PC also has a CPLD device connected to local bus.

The main differences from the P102x RDB-PC is 64-bit DDR and SYSCLK of
100Mhz.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Tang Yuantian <b29983@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
10 years agopowerpc/85xx: Added P1021RDB-PC Platform support
Xu Jiucheng [Tue, 17 Jan 2012 08:01:30 +0000 (16:01 +0800)]
powerpc/85xx: Added P1021RDB-PC Platform support

Signed-off-by: Xu Jiucheng <B37781@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
10 years agopowerpc/85xx: Added dts for P1021RDB-PC board
Xu Jiucheng [Tue, 17 Jan 2012 08:01:29 +0000 (16:01 +0800)]
powerpc/85xx: Added dts for P1021RDB-PC board

P1021RDB-PC Overview
-----------------
1Gbyte DDR3 (on board DDR)
16Mbyte NOR flash
32Mbyte eSLC NAND Flash
256 Kbit M24256 I2C EEPROM
128 Mbit SPI Flash memory
Real-time clock on I2C bus
SD/MMC connector to interface with the SD memory card
PCIex
    - x1 PCIe slot or x1 PCIe to dual SATA controller
    - x1 mini-PCIe slot
USB 2.0
    - ULPI PHY interface: SMSC USB3300 USB PHY and Genesys Logic’s GL850A
    - Two USB2.0 Type A receptacles
    - One USB2.0 signal to Mini PCIe slot
eTSEC1: Connected to RGMII PHY VSC7385
eTSEC2: Connected to SGMII PHY VSC8221
eTSEC3: Connected to SGMII PHY AR8021
DUART interface: supports two UARTs up to 115200 bps for console display

Signed-off-by: Matthew McClintock <msm@freescale.com>
Signed-off-by: Xu Jiucheng <B37781@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
10 years agopowerpc: Fix power4/970 idle code regression with lockdep
Benjamin Herrenschmidt [Thu, 15 Mar 2012 22:26:59 +0000 (09:26 +1100)]
powerpc: Fix power4/970 idle code regression with lockdep

in commit 7230c5644188cd9e3fb380cc97dde00c464a3ba7
"powerpc: Rework lazy-interrupt handling"

I introduced a regression, accidentally calling irq tracing twice
and not properly restoring a clobbered register (r7) later used
for writing to the MSR.

This caused lockups when booting on a G5 with lockdep enabled.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
10 years agopowerpc/hvc_udbg: Don't crash when udbg_putc is NULL
Benjamin Herrenschmidt [Wed, 14 Mar 2012 07:37:04 +0000 (18:37 +1100)]
powerpc/hvc_udbg: Don't crash when udbg_putc is NULL

Also while at it, add some help text indicating why you shouldn't
enable that driver under normal circumstances

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
10 years agopowerpc: Remove some of the legacy iSeries specific device drivers
Stephen Rothwell [Thu, 8 Mar 2012 04:32:52 +0000 (15:32 +1100)]
powerpc: Remove some of the legacy iSeries specific device drivers

These drivers are specific to the PowerPC legacy iSeries platform and
their Kconfig is specified in arch/powerpc.  Legacy iSeries is being
removed, so these drivers can no longer be selected.

Cc: Jens Axboe <axboe@kernel.dk>
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
10 years agopowerpc: Add initial e6500 cpu support
Kumar Gala [Sun, 6 Nov 2011 17:51:07 +0000 (11:51 -0600)]
powerpc: Add initial e6500 cpu support

Add basic support for e6500 core in its single threaded mode.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
10 years agopowerpc/fsl-booke: Fixup calc_cam_sz to support MMU v2
Kumar Gala [Thu, 5 Jan 2012 18:37:16 +0000 (12:37 -0600)]
powerpc/fsl-booke: Fixup calc_cam_sz to support MMU v2

The registers that describe size supported by TLB are different on MMU
v2 as well as we support power of two page sizes.  For now we continue
to assume that FSL variable size array supports all page sizes up to the
maximum one reported in TLB1PS.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
10 years agopowerpc/85xx: fix Kconfig warning about missing 8250 dependency
Paul Gortmaker [Fri, 20 Jan 2012 01:23:20 +0000 (20:23 -0500)]
powerpc/85xx: fix Kconfig warning about missing 8250 dependency

The SERIAL_8250_EXTENDED option just enables access to other
less regularly used options, like SERIAL_8250_SHARE_IRQ.
Select it to get rid of this warning when selecting the child
option living underneath it.

  warning: (FSL_SOC_BOOKE && SERIAL_8250_RM9K) selects
  SERIAL_8250_SHARE_IRQ which has unmet direct dependencies
  (HAS_IOMEM && SERIAL_8250_EXTENDED)

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
10 years agoMerge branch 'eeh' into next
Benjamin Herrenschmidt [Mon, 12 Mar 2012 23:15:35 +0000 (10:15 +1100)]
Merge branch 'eeh' into next

10 years agopowerpc: Rework lazy-interrupt handling
Benjamin Herrenschmidt [Tue, 6 Mar 2012 07:27:59 +0000 (18:27 +1100)]
powerpc: Rework lazy-interrupt handling

The current implementation of lazy interrupts handling has some
issues that this tries to address.

We don't do the various workarounds we need to do when re-enabling
interrupts in some cases such as when returning from an interrupt
and thus we may still lose or get delayed decrementer or doorbell
interrupts.

The current scheme also makes it much harder to handle the external
"edge" interrupts provided by some BookE processors when using the
EPR facility (External Proxy) and the Freescale Hypervisor.

Additionally, we tend to keep interrupts hard disabled in a number
of cases, such as decrementer interrupts, external interrupts, or
when a masked decrementer interrupt is pending. This is sub-optimal.

This is an attempt at fixing it all in one go by reworking the way
we do the lazy interrupt disabling from the ground up.

The base idea is to replace the "hard_enabled" field with a
"irq_happened" field in which we store a bit mask of what interrupt
occurred while soft-disabled.

When re-enabling, either via arch_local_irq_restore() or when returning
from an interrupt, we can now decide what to do by testing bits in that
field.

We then implement replaying of the missed interrupts either by
re-using the existing exception frame (in exception exit case) or via
the creation of a new one from an assembly trampoline (in the
arch_local_irq_enable case).

This removes the need to play with the decrementer to try to create
fake interrupts, among others.

In addition, this adds a few refinements:

 - We no longer  hard disable decrementer interrupts that occur
while soft-disabled. We now simply bump the decrementer back to max
(on BookS) or leave it stopped (on BookE) and continue with hard interrupts
enabled, which means that we'll potentially get better sample quality from
performance monitor interrupts.

 - Timer, decrementer and doorbell interrupts now hard-enable
shortly after removing the source of the interrupt, which means
they no longer run entirely hard disabled. Again, this will improve
perf sample quality.

 - On Book3E 64-bit, we now make the performance monitor interrupt
act as an NMI like Book3S (the necessary C code for that to work
appear to already be present in the FSL perf code, notably calling
nmi_enter instead of irq_enter). (This also fixes a bug where BookE
perfmon interrupts could clobber r14 ... oops)

 - We could make "masked" decrementer interrupts act as NMIs when doing
timer-based perf sampling to improve the sample quality.

Signed-off-by-yet: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---

v2:

- Add hard-enable to decrementer, timer and doorbells
- Fix CR clobber in masked irq handling on BookE
- Make embedded perf interrupt act as an NMI
- Add a PACA_HAPPENED_EE_EDGE for use by FSL if they want
  to retrigger an interrupt without preventing hard-enable

v3:

 - Fix or vs. ori bug on Book3E
 - Fix enabling of interrupts for some exceptions on Book3E

v4:

 - Fix resend of doorbells on return from interrupt on Book3E

v5:

 - Rebased on top of my latest series, which involves some significant
rework of some aspects of the patch.

v6:
 - 32-bit compile fix
 - more compile fixes with various .config combos
 - factor out the asm code to soft-disable interrupts
 - remove the C wrapper around preempt_schedule_irq

v7:
 - Fix a bug with hard irq state tracking on native power7

10 years agopowerpc/eeh: pseries platform config space access in EEH
Gavin Shan [Mon, 27 Feb 2012 20:04:11 +0000 (20:04 +0000)]
powerpc/eeh: pseries platform config space access in EEH

With the original EEH implementation, the access to config space of
the corresponding PCI device is done by RTAS sensitive function. That
depends on pci_dn heavily. That would limit EEH extension to other
platforms like powernv because other platforms might have different
ways to access PCI config space.

The patch splits those functions used to access PCI config space
and implement them in platform related EEH component. It would be
helpful to support EEH on multiple platforms simutaneously in future.

Signed-off-by: Gavin Shan <shangw@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
10 years agopowerpc/eeh: Introduce struct eeh_stats for EEH
Gavin Shan [Wed, 29 Feb 2012 15:47:45 +0000 (15:47 +0000)]
powerpc/eeh: Introduce struct eeh_stats for EEH

With the original EEH implementation, the EEH global statistics
are maintained by individual global variables. That makes the
code a little hard to maintain.

The patch introduces extra struct eeh_stats for the EEH global
statistics so that it can be maintained in collective fashion.

It's the rework on the corresponding v5 patch. According to
the comments from David Laight, the EEH global statistics have
been changed for a litte bit so that they have fixed-type of
"u64". Also, the format used to print them has been changed to
"%llu" based on David's suggestion. Also, the output format of
EEH global statistics should be kept as intacted according to
Michael's suggestion that there might be tools parsing them.

Signed-off-by: Gavin Shan <shangw@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
10 years agopowerpc/eeh: Replace pci_dn with eeh_dev for EEH on pSeries
Gavin Shan [Mon, 27 Feb 2012 20:04:09 +0000 (20:04 +0000)]
powerpc/eeh: Replace pci_dn with eeh_dev for EEH on pSeries

The pci_dn has been replaced with eeh_dev. In order to comply with
the rule, the EEH platform implementation on pSeries should also
be adjusted for a little bit so that it will depend on eeh_dev instead
of pci_dn.

The patch replaces pci_dn with eeh_dev. The corresponding information
will be retrieved from eeh_dev instead of pci_dn.

Signed-off-by: Gavin Shan <shangw@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
10 years agopowerpc/eeh: Replace pci_dn with eeh_dev for EEH aux components
Gavin Shan [Mon, 27 Feb 2012 20:04:08 +0000 (20:04 +0000)]
powerpc/eeh: Replace pci_dn with eeh_dev for EEH aux components

The original EEH implementation is heavily depending on struct pci_dn.
We have to put EEH related information to pci_dn. Actually, we could
split struct pci_dn so that the EEH sensitive information to form an
individual struct, then EEH looks more independent.

The patch replaces pci_dn with eeh_dev for EEH aux components like
event and driver. Also, the eeh_event struct has been adjusted for
a little bit since eeh_dev has linked the associated FDT (Flat Device
Tree) node and PCI device. It's not necessary for eeh_event struct to
trace FDT node and PCI device. We can just simply to trace eeh_dev in
eeh_event.

The patch also renames function pcid_name() to eeh_pcid_name(), which
should be missed in the previous patch where the EEH aux components
have been cleaned up.

Signed-off-by: Gavin Shan <shangw@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
10 years agopowerpc/eeh: Replace pci_dn with eeh_dev for EEH core
Gavin Shan [Mon, 27 Feb 2012 20:04:07 +0000 (20:04 +0000)]
powerpc/eeh: Replace pci_dn with eeh_dev for EEH core

The original EEH implementation is heavily depending on struct pci_dn.
We have to put EEH related information to pci_dn. Actually, we could
split struct pci_dn so that the EEH sensitive information to form an
individual struct, then EEH looks more independent.

The patch replaces pci_dn with eeh_dev for EEH core.

Signed-off-by: Gavin Shan <shangw@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
10 years agopowerpc/eeh: Replace pci_dn with eeh_dev for EEH address cache
Gavin Shan [Mon, 27 Feb 2012 20:04:06 +0000 (20:04 +0000)]
powerpc/eeh: Replace pci_dn with eeh_dev for EEH address cache

With original EEH implementation, struct pci_dn is used while building
PCI I/O address cache, which helps on searching the corresponding
PCI device according to the given physical I/O address. Besides, pci_dn
is associated with the corresponding PCI device while building its
I/O cache.

The patch replaces struct pci_dn with struct eeh_dev so that EEH address
cache won't depend on struct pci_dn. That will help EEH to become an
independent module in future. Besides, the binding of eeh_dev and PCI
device is done while building PCI device I/O cache.

Signed-off-by: Gavin Shan <shangw@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
10 years agopowerpc/eeh: Replace pci_dn with eeh_dev for EEH sysfs
Gavin Shan [Mon, 27 Feb 2012 20:04:05 +0000 (20:04 +0000)]
powerpc/eeh: Replace pci_dn with eeh_dev for EEH sysfs

With original EEH implementation, all EEH related statistics have
been put into struct pci_dn. We've introduced struct eeh_dev to
replace struct pci_dn in EEH core components, including EEH sysfs
component.

The patch shows EEH statistics from struct eeh_dev instead of struct
pci_dn in EEH sysfs component. Besides, it also fixed the EEH device
retrieval from PCI device, which was introduced by the previous patch
in the series of patch.

Signed-off-by: Gavin Shan <shangw@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
10 years agopowerpc/eeh: Introduce EEH device
Gavin Shan [Mon, 27 Feb 2012 20:04:04 +0000 (20:04 +0000)]
powerpc/eeh: Introduce EEH device

Original EEH implementation depends on struct pci_dn heavily. However,
EEH shouldn't depend on that actually because EEH needn't share much
information with other PCI components. That's to say, EEH should have
worked independently.

The patch introduces struct eeh_dev so that EEH core components needn't
be working based on struct pci_dn in future. Also, struct pci_dn, struct
eeh_dev instances are created in dynamic fasion and the binding with EEH
device, OF node, PCI device is implemented as well.

The EEH devices are created after PHBs are detected and initialized, but
PCI emunation hasn't started yet. Apart from that, PHB might be created
dynamically through DLPAR component and the EEH devices should be creatd
as well. Another case might be OF node is created dynamically by DR
(Dynamic Reconfiguration), which has been defined by PAPR. For those OF
nodes created by DR, EEH devices should be also created accordingly. The
binding between EEH device and OF node is done while the EEH device is
initially created.

The binding between EEH device and PCI device should be done after PCI
emunation is done. Besides, PCI hotplug also needs the binding so that
the EEH devices could be traced from the newly coming PCI buses or PCI
devices.

Signed-off-by: Gavin Shan <shangw@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
10 years agopowerpc/eeh: Cleanup function names in EEH aux components
Gavin Shan [Mon, 27 Feb 2012 20:04:03 +0000 (20:04 +0000)]
powerpc/eeh: Cleanup function names in EEH aux components

The patch does some cleanup on the function names of EEH
aux components. Currently, only couple of function names from
eeh_cache have been adjusted so that:

        * The function name has prefix "eeh_addr_cache".
        * Move around pci_addr_cache_build() in the header file
          to reflect function call sequence.

Signed-off-by: Gavin Shan <shangw@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
10 years agopowerpc/pseries: Cleanup comments in EEH aux components
Gavin Shan [Mon, 27 Feb 2012 20:04:02 +0000 (20:04 +0000)]
powerpc/pseries: Cleanup comments in EEH aux components

There're several EEH aux components and the patch does some cleanup
for them so that they look more clean.

        * Duplicated comments have been removed from the header file.
        * Comments have been reorganized so that it looks more clean.
        * The leading comments of functions are adjusted for a little
          bit so that the result of "make pdfdocs" would be more
          unified.
        * Function calls "xxx ()" has been replaced by "xxx()".

Signed-off-by: Gavin Shan <shangw@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
10 years agopowerpc/eeh: pseries platform EEH configure bridge
Gavin Shan [Mon, 27 Feb 2012 20:04:01 +0000 (20:04 +0000)]
powerpc/eeh: pseries platform EEH configure bridge

In order to enable particular PCI device, which has been included
in the parent PE. The involved PCI bridges should be enabled explicitly
if there has. On pSeries platform, there're dedicated RTAS calls
to fulfil the purpose.

The patch implements the function of configuring PCI bridges through
the dedicated RTAS calls. Besides, the function has been abstracted
by struct eeh_ops::configure_bridge so that the EEH core components
could support multiple platforms in future.

Signed-off-by: Gavin Shan <shangw@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
10 years agopowerpc/eeh: pseries platform EEH error log retrieval
Gavin Shan [Mon, 27 Feb 2012 20:04:00 +0000 (20:04 +0000)]
powerpc/eeh: pseries platform EEH error log retrieval

On RTAS compliant pSeries platform, one dedicated RTAS call has
been introduced to retrieve EEH temporary or permanent error log.

The patch implements the function of retriving EEH error log through
RTAS call. Besides, it has been abstracted by struct eeh_ops::get_log
so that EEH core components could support multiple platforms in future.

Signed-off-by: Gavin Shan <shangw@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
10 years agopowerpc/eeh: pseries platform EEH reset PE
Gavin Shan [Mon, 27 Feb 2012 20:03:59 +0000 (20:03 +0000)]
powerpc/eeh: pseries platform EEH reset PE

On RTAS compliant pSeries platform, there is a dedicated RTAS call
(ibm,set-slot-reset) to reset the specified PE. Furthermore, two
types of resets are supported: hot and fundamental. the type of
reset is to be used actually depends on the included PCI device's
requirements.

The patch implements resetting PE on pSeries platform through RTAS
call. Besides, it has been abstracted through struct eeh_ops::reset
so that EEH core components could support multiple platforms in future.

Signed-off-by: Gavin Shan <shangw@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
10 years agopowerpc/eeh: pseries platform EEH wait PE state
Gavin Shan [Mon, 27 Feb 2012 20:03:58 +0000 (20:03 +0000)]
powerpc/eeh: pseries platform EEH wait PE state

On pSeries platform, the PE state might be temporarily unavailable.
In that case, the firmware will return the corresponding wait time.
That means the kernel has to wait for appropriate time in order to
get the PE state.

The patch does the implementation for that. Besides, the function
has been abstracted through struct eeh_ops::wait_state so that EEH core
components could support multiple platforms in future.

Signed-off-by: Gavin Shan <shangw@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
10 years agopowerpc/eeh: pseries platform PE state retrieval
Gavin Shan [Mon, 27 Feb 2012 20:03:57 +0000 (20:03 +0000)]
powerpc/eeh: pseries platform PE state retrieval

On pSeries platform, there're 2 dedicated RTAS calls introduced to
retrieve the corresponding PE's state: ibm,read-slot-reset-state and
ibm,read-slot-reset-state2.

The patch implements the retrieval of PE's state according to the
given PE address. Besides, the implementation has been abstracted by
struct eeh_ops::get_state so that EEH core components could support
multiple platforms in future.

Signed-off-by: Gavin Shan <shangw@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
10 years agopowerpc/eeh: pseries platform EEH PE address retrieval
Gavin Shan [Mon, 27 Feb 2012 20:03:56 +0000 (20:03 +0000)]
powerpc/eeh: pseries platform EEH PE address retrieval

There're 2 types of addresses used for EEH operations. The first
one would be BDF (Bus/Device/Function) address which is retrieved
from the reg property of the corresponding FDT node. Another one
is PE address that should be enquired from firmware through RTAS
call on pSeries platform. When issuing EEH operation, the PE address
has precedence over BDF address.

The patch implements retrieving PE address according to the given
BDF address on pSeries platform. Also, the struct eeh_early_enable_info
has been removed since the information can be figured out from
dn->pdn->phb->buid directly and that simplifies the code.

Signed-off-by: Gavin Shan <shangw@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
10 years agopowerpc/eeh: pseries platform EEH operations
Gavin Shan [Mon, 27 Feb 2012 20:03:55 +0000 (20:03 +0000)]
powerpc/eeh: pseries platform EEH operations

There're 4 EEH operations that are covered by the dedicated RTAS
call <ibm,set-eeh-option>: enable or disable EEH, enable MMIO and
enable DMA. At early stage of system boot, the EEH would be tried
to enable on PCI device related device node. MMIO and DMA for
particular PE should be enabled when doing recovery on EEH errors
so that the PE could function properly again.

The patch implements it and abstract that through struct
eeh_ops::set_eeh. It would be help for EEH to support multiple
platforms in future.

Signed-off-by: Gavin Shan <shangw@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
10 years agopowerpc/eeh: pseries platform EEH initialization
Gavin Shan [Mon, 27 Feb 2012 20:03:54 +0000 (20:03 +0000)]
powerpc/eeh: pseries platform EEH initialization

The platform specific EEH operations have been abstracted by
struct eeh_ops. The individual platroms, including pSeries, needs
doing necessary initialization before the platform dependent EEH
operations work properly.

The patch is addressing that and do necessary platform initialization
for pSeries platform. More specificly, it will figure out the tokens
of EEH related RTAS calls.

Signed-off-by: Gavin Shan <shangw@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
10 years agopowerpc/eeh: Platform dependent EEH operations
Gavin Shan [Mon, 27 Feb 2012 20:03:53 +0000 (20:03 +0000)]
powerpc/eeh: Platform dependent EEH operations

EEH has been implemented on RTAS-compliant pSeries platform.
That's to say, the EEH operations will be implemented through RTAS
calls eventually. The situation limited feasible extension on EEH.
In order to support EEH on multiple platforms like pseries and powernv
simutaneously. We have to split the platform dependent EEH options
up out of current implementation.

The patch addresses supporting EEH on multiple platforms. The pseries
platform dependent EEH operations will be abstracted by struct eeh_ops.
EEH core components will be built based on the registered EEH operations.
With the mechanism, what the individual platform needs to do is implement
platform dependent EEH operations.

For now, the pseries platform is covered under the mechanism. That means
we have to think about other platforms to support EEH, like powernv.
Besides, we only have framework for the mechanism and we have to implement
it for pseries platform later.

Signed-off-by: Gavin Shan <shangw@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
10 years agopowerpc/eeh: Cleanup function names in the EEH core
Gavin Shan [Mon, 27 Feb 2012 20:03:52 +0000 (20:03 +0000)]
powerpc/eeh: Cleanup function names in the EEH core

The EEH has been implemented on pSeries platform. The original
code looks a little bit nasty. The patch does cleanup on the
current EEH implementation so that it looks more clean.

        * Try adding prefix "eeh" for functions.
        * Some function names have been adjusted so that they looks
          shorter and meaningful.

Signed-off-by: Gavin Shan <shangw@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
10 years agopowerpc/eeh: Cleanup comments in the EEH core
Gavin Shan [Mon, 27 Feb 2012 20:03:51 +0000 (20:03 +0000)]
powerpc/eeh: Cleanup comments in the EEH core

The EEH has been implemented on pSeries platform. The original
code looks a little bit nasty. The patch does cleanup on the
current EEH implementation so that it looks more clean.

        * Duplicated comments have been removed from the corresponding
          header files.
        * Comments have been reorganized so that it looks more clean.
        * The leading comments of functions are adjusted for a little
          bit so that the result of "make pdfdocs" would be more
          unified.
        * Function definitions and calls have unified format as "xxx()".
          That means the format "xxx ()" has been replaced by "xxx()".
        * There're multiple functions implemented for resetting PE. The
          position of those functions have been move around so that they
          are adjacent to each other to reflect their relationship.

Signed-off-by: Gavin Shan <shangw@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
10 years agopowerpc: Replace mfmsr instructions with load from PACA kernel_msr field
Benjamin Herrenschmidt [Fri, 2 Mar 2012 00:33:52 +0000 (11:33 +1100)]
powerpc: Replace mfmsr instructions with load from PACA kernel_msr field

On 64-bit, the mfmsr instruction can be quite slow, slower
than loading a field from the cache-hot PACA, which happens
to already contain the value we want in most cases.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
10 years agopowerpc: Fix 64-bit BookE FP unavailable exceptions
Benjamin Herrenschmidt [Sun, 4 Mar 2012 23:55:04 +0000 (10:55 +1100)]
powerpc: Fix 64-bit BookE FP unavailable exceptions

We were using CR0.EQ after EXCEPTION_COMMON, hoping it still
contained whether we came from userspace or kernel space.

However, under some circumstances, EXCEPTION_COMMON will
call C code and clobber non-volatile registers, so we really
need to re-load the previous MSR from the stackframe and
re-test.

While there, invert the condition to make the fast path more
obvious and remove the BUG_OPCODE which was a debugging
leftover and call .ret_from_except as we should.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
10 years agopowerpc: Fix register clobbering when accumulating stolen time
Benjamin Herrenschmidt [Fri, 2 Mar 2012 00:01:31 +0000 (11:01 +1100)]
powerpc: Fix register clobbering when accumulating stolen time

When running under a hypervisor that supports stolen time accounting,
we may call C code from the macro EXCEPTION_PROLOG_COMMON in the
exception entry path, which clobbers CR0.

However, the FPU and vector traps rely on CR0 indicating whether we
are coming from userspace or kernel to decide what to do.

So we need to restore that value after the C call

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
10 years agopowerpc/xmon: Add display of soft & hard irq states
Benjamin Herrenschmidt [Thu, 1 Mar 2012 23:10:09 +0000 (10:10 +1100)]
powerpc/xmon: Add display of soft & hard irq states

Also use local_paca instead of get_paca() to avoid getting into
the smp_processor_id() debugging code from the debugger

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
10 years agopowerpc: Add support for page fault retry and fatal signals
Benjamin Herrenschmidt [Thu, 1 Mar 2012 07:14:45 +0000 (18:14 +1100)]
powerpc: Add support for page fault retry and fatal signals

Other architectures such as x86 and ARM have been growing
new support for features like retrying page faults after
dropping the mm semaphore to break contention, or being
able to return from a stuck page fault when a SIGKILL is
pending.

This refactors our implementation of do_page_fault() to
move the error handling out of line in a way similar to
x86 and adds support for those two features.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
10 years agopowerpc: Disable interrupts in 64-bit kernel FP and vector faults
Benjamin Herrenschmidt [Thu, 1 Mar 2012 04:47:44 +0000 (15:47 +1100)]
powerpc: Disable interrupts in 64-bit kernel FP and vector faults

If we get a floating point, altivec or vsx unavaible interrupt in
kernel, we trigger a kernel error. There is no point preserving
the interrupt state, in fact, that can even make debugging harder
as the processor state might change (we may even preempt) between
taking the exception and landing in a debugger.

So just make those 3 disable interrupts unconditionally.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---

v2: On BookE only disable when hitting the kernel unavailable
    path, otherwise it will fail to restore softe as
    fast_exception_return doesn't do it.

10 years agopowerpc: Call do_page_fault() with interrupts off
Benjamin Herrenschmidt [Wed, 7 Mar 2012 05:48:45 +0000 (16:48 +1100)]
powerpc: Call do_page_fault() with interrupts off

We currently turn interrupts back to their previous state before
calling do_page_fault(). This can be annoying when debugging as
a bad fault will potentially have lost some processor state before
getting into the debugger.

We also end up calling some generic code with interrupts enabled
such as notify_page_fault() with interrupts enabled, which could
be unexpected.

This changes our code to behave more like other architectures,
and make the assembly entry code call into do_page_faults() with
interrupts disabled. They are conditionally re-enabled from
within do_page_fault() in the same spot x86 does it.

While there, add the might_sleep() test in the case of a successful
trylock of the mmap semaphore, again like x86.

Also fix a bug in the existing assembly where r12 (_MSR) could get
clobbered by C calls (the DTL accounting in the exception common
macro and DISABLE_INTS) in some cases.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---

v2. Add the r12 clobber fix

10 years agopowerpc: Improve behaviour of irq tracing on 64-bit exception entry
Benjamin Herrenschmidt [Thu, 1 Mar 2012 04:42:56 +0000 (15:42 +1100)]
powerpc: Improve behaviour of irq tracing on 64-bit exception entry

Some exceptions would unconditionally disable interrupts on entry,
which is fine, but calling lockdep every time not only adds more
overhead than strictly needed, but also means we get quite a few
"redudant" disable logged, which makes it hard to spot the really
bad ones.

So instead, split the macro used by the exception code into a
normal one and a separate one used when CONFIG_TRACE_IRQFLAGS is
enabled, and make the later skip th tracing if interrupts were
already disabled.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
10 years agopowerpc: Improve 64-bit syscall entry/exit
Benjamin Herrenschmidt [Thu, 1 Mar 2012 04:40:23 +0000 (15:40 +1100)]
powerpc: Improve 64-bit syscall entry/exit

We unconditionally hard enable interrupts. This is unnecessary as
syscalls are expected to always be called with interrupts enabled.

While at it, we add a WARN_ON if that is not the case and
CONFIG_TRACE_IRQFLAGS is enabled (we don't want to add overhead
to the fast path when this is not set though).

Thus let's remove the enabling (and associated irq tracing) from
the syscall entry path. Also on Book3S, replace a few mfmsr
instructions with loads of PACAMSR from the PACA, which should be
faster & schedule better.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
10 years agopowerpc: Rework runlatch code
Benjamin Herrenschmidt [Thu, 1 Mar 2012 01:45:27 +0000 (12:45 +1100)]
powerpc: Rework runlatch code

This moves the inlines into system.h and changes the runlatch
code to use the thread local flags (non-atomic) rather than
the TIF flags (atomic) to keep track of the latch state.

The code to turn it back on in an asynchronous interrupt is
now simplified and partially inlined.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>