1 //==========================================================================
5 // Ethernet device driver for NS DP83902a ethernet controller
7 //==========================================================================
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9 // -------------------------------------------
10 // This file is part of eCos, the Embedded Configurable Operating System.
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40 //####BSDCOPYRIGHTBEGIN####
42 // -------------------------------------------
44 // Portions of this software may have been derived from OpenBSD or other sources,
45 // and are covered by the appropriate copyright disclaimers included herein.
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49 //####BSDCOPYRIGHTEND####
50 //==========================================================================
51 //#####DESCRIPTIONBEGIN####
59 //####DESCRIPTIONEND####
61 //==========================================================================
63 #include <pkgconf/system.h>
64 #include <pkgconf/io_eth_drivers.h>
66 #include <cyg/infra/cyg_type.h>
67 #include <cyg/hal/hal_arch.h>
68 #include <cyg/infra/diag.h>
69 #include <cyg/hal/drv_api.h>
70 #include <cyg/io/eth/eth_drv.h>
71 #include <cyg/io/eth/netdev.h>
73 #include <cyg/io/dp83902a.h>
80 void cyg_ax88796_eth_init(dp83902a_priv_data_t *dp)
84 #if defined(CYGSEM_DEVS_ETH_PDK403_ETH0_SET_ESA)
86 unsigned char _esa[6];
90 DP_IN(dp->base, 0x1f, x);
92 /* Wait (but not indefinitely) for RST bit in ISR */
93 for (i=0; i < 10000; i++) {
94 DP_IN(dp->base, DP_ISR, x);
97 CYGACC_CALL_IF_DELAY_US(1);
99 diag_printf("AX88796 at %p not ready after 10ms. Giving up\n",
105 diag_printf("AX88796 at %p, interrupt: %x\n", dp->base, dp->interrupt);
107 /* Wait for 2s for link, else power cycle the PHY */
108 for (i=0; i<2000; i++) {
109 DP_IN(dp->base, 0x17, x);
111 diag_printf("Link OK: %dMbps %s duplex (after %d ms)\n",
112 x&4?100:10, x&2?"full":"half", i);
115 CYGACC_CALL_IF_DELAY_US(1000);
117 diag_printf("No Ethernet link after 2s, power cycle PHY...");
119 // Assert PPDSET to turn off internal PHY, wait 2s, turn it back on again.
120 DP_OUT(dp->base, 0x17, 0x40);
121 CYGACC_CALL_IF_DELAY_US(2000000);
122 DP_OUT(dp->base, 0x17, 0x00);
123 diag_printf("done.\n");
125 // Maybe we're not actually connected. Don't wait.
128 #if defined(CYGSEM_DEVS_ETH_PDK403_ETH0_SET_ESA)
129 esa_ok = CYGACC_CALL_IF_FLASH_CFG_OP(CYGNUM_CALL_IF_FLASH_CFG_GET,
130 "lan_esa", _esa, CONFIG_ESA);
132 memcpy(dp->esa, _esa, sizeof(_esa));
135 // Send 13 bits of EEPROM read command 0.0110.0000.0000.
136 for (i=0; i < 13; i++) {
138 if (i == 2 || i == 3)
141 DP_OUT(dp->base, 0x14, x);
142 CYGACC_CALL_IF_DELAY_US(10);
144 DP_OUT(dp->base, 0x14, x | _EECLK);
145 CYGACC_CALL_IF_DELAY_US(10);
149 for (i=0; i<6; i++) {
153 for (j=0; j<8; j++) {
154 DP_OUT(dp->base, 0x14, _EECS);
155 CYGACC_CALL_IF_DELAY_US(10);
157 DP_OUT(dp->base, 0x14, _EECS | _EECLK);
158 CYGACC_CALL_IF_DELAY_US(10);
160 DP_IN(dp->base, 0x14, x);
163 dp->esa[i] |= !!(x & _EEO);
166 DP_OUT(dp->base, 0x14, _EECS);
167 CYGACC_CALL_IF_DELAY_US(20);
168 DP_OUT(dp->base, 0x14, 0);
169 CYGACC_CALL_IF_DELAY_US(20);
170 if (dp->esa[0] != 0 || dp->esa[1] != 0x0e ||
171 dp->esa[2] != 0 || dp->esa[3] != 0x50) {
172 /* Bad MAC address. PDK docs say these four bytes should always
174 diag_printf("Bad EEPROM MAC address %02x:02x:%02x:%02x:%02x:%02x. Disabling AX88796\n",
175 dp->esa[0], dp->esa[1], dp->esa[2], dp->esa[3], dp->esa[4], dp->esa[5]);
176 // Turn off PHY and stop chip
177 DP_OUT(dp->base, 0x17, 0x40);
183 DP_OUT(dp->base, DP_CR, DP_CR_NODMA | DP_CR_PAGE1); // Select page 1
184 for (i = 0; i < 6; i++)
185 DP_OUT(dp->base, DP_P1_PAR0+i, dp->esa[i]);
187 DP_OUT(dp->base, DP_CR, DP_CR_NODMA | DP_CR_PAGE0); // Select page 0