1 #ifndef CYGONCE_HAL_PLATFORM_SETUP_H
2 #define CYGONCE_HAL_PLATFORM_SETUP_H
4 /*=============================================================================
6 // hal_platform_setup.h
8 // Platform specific support for HAL (assembly code)
10 //=============================================================================
11 //####ECOSGPLCOPYRIGHTBEGIN####
12 // -------------------------------------------
13 // This file is part of eCos, the Embedded Configurable Operating System.
14 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
15 // Copyright (C) 2003 Nick Garnett <nickg@calivar.com>
17 // eCos is free software; you can redistribute it and/or modify it under
18 // the terms of the GNU General Public License as published by the Free
19 // Software Foundation; either version 2 or (at your option) any later version.
21 // eCos is distributed in the hope that it will be useful, but WITHOUT ANY
22 // WARRANTY; without even the implied warranty of MERCHANTABILITY or
23 // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
26 // You should have received a copy of the GNU General Public License along
27 // with eCos; if not, write to the Free Software Foundation, Inc.,
28 // 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
30 // As a special exception, if other files instantiate templates or use macros
31 // or inline functions from this file, or you compile this file and link it
32 // with other works to produce a work based on this file, this file does not
33 // by itself cause the resulting work to be covered by the GNU General Public
34 // License. However the source code for this file must still be made available
35 // in accordance with section (3) of the GNU General Public License.
37 // This exception does not invalidate any other reasons why a work based on
38 // this file might be covered by the GNU General Public License.
40 // Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
41 // at http://sources.redhat.com/ecos/ecos-license/
42 // -------------------------------------------
43 //####ECOSGPLCOPYRIGHTEND####
44 //=============================================================================
45 //#####DESCRIPTIONBEGIN####
48 // Contributors:gthomas, tdrury, nickg
50 // Purpose: AT91/EB42 platform specific support routines
52 // Usage: #include <cyg/hal/hal_platform_setup.h>
54 //####DESCRIPTIONEND####
56 //===========================================================================*/
58 #include <cyg/hal/var_io.h>
60 //===========================================================================*/
65 str r1,[r0,#AT91_PIO_PER]
66 str r1,[r0,#AT91_PIO_OER]
74 str r1,[r0,#AT91_PIO_SODR]
76 str r1,[r0,#AT91_PIO_CODR]
86 ldr r0,=AT91_PMC // Power saving interface
87 ldr r1,=0xFFFFFFFF // Enable all peripheral [clocks]
88 str r1,[r0,#AT91_PMC_PCER]
92 ldr r0,=AT91_PIOA // Disable PIO (so peripherals can use bits)
93 ldr r1,=0x000007E0 // Enable UARTS
94 str r1,[r0,#AT91_PIO_PDR]
97 #define CYGHWR_LED_MACRO _led \x
99 //===========================================================================*/
101 #if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_ROMRAM)
104 #define AT91_PMC_CGMR_INIT0 AT91_PMC_CGMR_PRES_NONE | \
105 AT91_PMC_CGMR_PLLB | \
106 AT91_PMC_CGMR_PLL_MUL(999) | \
107 AT91_PMC_CGMR_PLL_CNT(197)
109 #define AT91_PMC_CGMR_INIT1 AT91_PMC_CGMR_INIT0 | \
110 AT91_PMC_CGMR_MCKO_ENA | \
111 AT91_PMC_CGMR_MCK_MCK | \
112 AT91_PMC_CGMR_CSS_PLL
120 ldr r10,=_InitMemory // Initialize memory controller
121 movs r0,pc,lsr #20 // If ROM startup, PC < 0x100000
122 moveq r10,r10,lsl #12 // mask address to low 20 bits
123 moveq r10,r10,lsr #12
124 ldmia r10!,{r0-r9,r11-r12} // Table of initialization constants
125 #if defined(CYG_HAL_STARTUP_ROMRAM)
131 stmia r11!,{r0-r9} // Write to controller
132 mov pc,r12 // Change address space, break pipeline
134 .long 0x01002535 // 0x01000000, 16MB, 2 cycles after transfer, 16-bit, 6 wait states
135 .long 0x02002121 // 0x02000000, 16MB, 0 cycles after transfer, 16-bit, 1 wait state
136 .long 0x20003E3E // 0x20000000, 1MB, 7 cycles after transfer, 8-bit, 8 wait states
137 .long 0x30000000 // unused
138 .long 0x40000000 // unused
139 .long 0x50000000 // unused
140 .long 0x60000000 // unused
141 .long 0x70000000 // unused
142 .long 0x00000001 // REMAP commande
143 .long 0x00000006 // 7 memory regions, standard read
144 .long AT91_EBI // External Bus Interface address
145 .long 10f // address where to jump
148 // Change system frequency from 32kHz to 32MHz.
150 // First enable the PLL
152 ldr r3,=AT91_PMC_CGMR_INIT0
153 str r3,[r2,#AT91_PMC_CGMR]
155 // Wait for PLL to stabilize
156 mov r4,#AT91_PMC_SR_LOCK
158 ldr r3,[r2,#AT91_PMC_SR]
162 // Now, switch CPU clock from Slow Clock to PLL
163 ldr r3,=AT91_PMC_CGMR_INIT1
164 str r3,[r2,#AT91_PMC_CGMR]
166 // All done, we should be running at 32MHz now
168 #if defined(CYG_HAL_STARTUP_ROMRAM)
169 ldr r0,=0x01000000 // Relocate FLASH/ROM to on-chip RAM
170 ldr r1,=0x02000000 // RAM base & length
184 #define CYGSEM_HAL_ROM_RESET_USES_JUMP
196 #define PLATFORM_SETUP1 _setup
199 //-----------------------------------------------------------------------------
200 // end of hal_platform_setup.h
201 #endif // CYGONCE_HAL_PLATFORM_SETUP_H