1 #ifndef CYGONCE_HAL_PLATFORM_SETUP_H
2 #define CYGONCE_HAL_PLATFORM_SETUP_H
3 /*=============================================================================
5 // hal_platform_setup.h
7 // Platform specific support for HAL (assembly code)
9 //=============================================================================
10 //####ECOSGPLCOPYRIGHTBEGIN####
11 // -------------------------------------------
12 // This file is part of eCos, the Embedded Configurable Operating System.
13 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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21 // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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26 // 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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29 // or inline functions from this file, or you compile this file and link it
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32 // License. However the source code for this file must still be made available
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40 // -------------------------------------------
41 //####ECOSGPLCOPYRIGHTEND####
42 //=============================================================================
43 //#####DESCRIPTIONBEGIN####
46 // Contributors: amichelotti
48 // Purpose: JTST platform specific support routines
50 // Usage: #include <cyg/hal/hal_platform_setup.h>
52 //####DESCRIPTIONEND####
54 //===========================================================================*/
56 #include <cyg/hal/var_io.h>
57 #include <cyg/hal/hal_misc.h>
59 .macro __pio_clkgen_init
61 ldr r1,=BIT21|BIT22|BIT23|BIT24|BIT25|BIT26|BIT27
62 str r1,[r0,#AT91_PIO_SODR] // set this bit must be always 1,
64 ldr r1,=BIT21|BIT22|BIT23|BIT24|BIT25|BIT26|BIT27
65 str r1,[r0,#AT91_PIO_OER] // set to output
66 str r1,[r0,#AT91_PIO_PER] // software control
67 ldr r1,=BIT21|BIT22|BIT23|BIT24|BIT25|BIT26|BIT27
68 str r1,[r0,#AT91_PIO_CODR] // leds all on
70 ldr r1,[r0,#AT91_PIO_PDR] // (BIT30) usb interrupt line in
71 // (BIT3) active watchdog reset line
74 str r1,[r0,#AT91_CLKGEN_CPTMAX0]
75 str r1,[r0,#AT91_CLKGEN_CPTMAX1]
77 str r1,[r0,#AT91_CLKGEN_CPTMAX2] //watch dog divider1
79 str r1,[r0,#AT91_CLKGEN_CPTMAX3] //watch dog divider2
81 str r1,[r0,#AT91_CLKGEN_CPTMAX4] //watch dog divider3 (max accepted value)
84 str r1,[r0,#AT91_CLKGEN_CLKENABLE]
86 #if defined(CYG_HAL_STARTUP_RAM)
87 // set internal ram as interrupt stack and other
89 ldr r1,=__startup_stack
90 ldr r2,=__startup_stack_base
92 ldr r1,=.__startup_stack
95 #ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK
96 ldr r1,=__interrupt_stack
97 ldr r2,=__interrupt_stack_base
99 ldr r1,=.__interrupt_stack
105 #if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_ROMRAM)
108 ldr r10,=_InitMemory // Initialize memory controller
109 movs r0,pc,lsr #20 // If ROM startup, PC < 0x100000
110 moveq r10,r10,lsl #12 // mask address to low 20 bits
111 moveq r10,r10,lsr #12
112 ldmia r10!,{r0-r9,r11-r12} // Table of initialization constants
113 #if defined(CYG_HAL_STARTUP_ROMRAM)
119 stmia r11!,{r0-r9} // Write to controller
120 mov pc,r12 // Change address space, break pipeline
122 .long 0x00502031 // FLASH
123 .long 0x00602021 // RAM
124 .long 0x00702021 // unused
125 .long 0x00802021 // unused
126 .long 0x00902021 // unused
127 .long 0x00A02021 // unused
128 .long 0x00b02021 // unused
129 .long 0x00c02021 // unused
130 .long 0x00000001 // REMAP commande
131 .long 0x00000006 // 7 memory regions, standard read
132 .long AT91_EBI // External Bus Interface address
133 .long 10f // address where to jump
136 #if defined(CYG_HAL_STARTUP_ROMRAM)
137 ldr r0,=0x00510000 // Relocate FLASH/ROM to on-chip RAM
138 ldr r1,=0x00600000 // RAM base & length
153 #define CYGSEM_HAL_ROM_RESET_USES_JUMP
154 #define PLATFORM_SETUP1 _setup
157 #define PLATFORM_SETUP1 __pio_clkgen_init
161 //-----------------------------------------------------------------------------
162 // end of hal_platform_setup.h
163 #endif // CYGONCE_HAL_PLATFORM_SETUP_H