1 //==========================================================================
5 // HAL misc board support code for ARM E7T
7 //==========================================================================
8 //####ECOSGPLCOPYRIGHTBEGIN####
9 // -------------------------------------------
10 // This file is part of eCos, the Embedded Configurable Operating System.
11 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
13 // eCos is free software; you can redistribute it and/or modify it under
14 // the terms of the GNU General Public License as published by the Free
15 // Software Foundation; either version 2 or (at your option) any later version.
17 // eCos is distributed in the hope that it will be useful, but WITHOUT ANY
18 // WARRANTY; without even the implied warranty of MERCHANTABILITY or
19 // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
22 // You should have received a copy of the GNU General Public License along
23 // with eCos; if not, write to the Free Software Foundation, Inc.,
24 // 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
26 // As a special exception, if other files instantiate templates or use macros
27 // or inline functions from this file, or you compile this file and link it
28 // with other works to produce a work based on this file, this file does not
29 // by itself cause the resulting work to be covered by the GNU General Public
30 // License. However the source code for this file must still be made available
31 // in accordance with section (3) of the GNU General Public License.
33 // This exception does not invalidate any other reasons why a work based on
34 // this file might be covered by the GNU General Public License.
36 // Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
37 // at http://sources.redhat.com/ecos/ecos-license/
38 // -------------------------------------------
39 //####ECOSGPLCOPYRIGHTEND####
40 //==========================================================================
41 //#####DESCRIPTIONBEGIN####
44 // Contributors: gthomas, jskov
46 // Purpose: HAL board support
47 // Description: Implementations of HAL board interfaces
49 //####DESCRIPTIONEND####
51 //========================================================================*/
53 #include <pkgconf/hal.h>
55 #include <cyg/infra/cyg_type.h> // base types
56 #include <cyg/infra/cyg_trac.h> // tracing macros
57 #include <cyg/infra/cyg_ass.h> // assertion macros
59 #include <cyg/hal/hal_io.h> // IO macros
60 #include <cyg/hal/hal_arch.h> // Register state info
61 #include <cyg/hal/hal_diag.h>
62 #include <cyg/hal/hal_intr.h> // necessary?
63 #include <cyg/hal/hal_cache.h>
64 #include <cyg/hal/hal_if.h> // calling interface
65 #include <cyg/hal/hal_misc.h> // helper functions
66 #ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT
67 #include <cyg/hal/drv_api.h> // HAL ISR support
69 #include <cyg/hal/plf_io.h> // platform registers
71 static cyg_uint32 _period;
73 #ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT
74 static cyg_interrupt abort_interrupt;
75 static cyg_handle_t abort_interrupt_handle;
77 // This ISR is called only for the Abort button interrupt
79 e7t_abort_isr(cyg_vector_t vector, cyg_addrword_t data, HAL_SavedRegisters *regs)
81 cyg_hal_user_break((CYG_ADDRWORD*)regs);
82 cyg_drv_interrupt_acknowledge(CYGNUM_HAL_INTERRUPT_EXT0);
83 return 0; // No need to run DSR
87 void hal_clock_initialize(cyg_uint32 period)
92 HAL_READ_UINT32(E7T_TMOD, tmod);
93 tmod &= ~(E7T_TMOD_TE0);
94 HAL_WRITE_UINT32(E7T_TMOD, 0);
96 tmod &= ~(E7T_TMOD_TMD0 | E7T_TMOD_TCLR0);
100 HAL_WRITE_UINT32(E7T_TDATA0, period);
103 HAL_WRITE_UINT32(E7T_TMOD, tmod);
107 #ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT
108 cyg_drv_interrupt_create(CYGNUM_HAL_INTERRUPT_EXT0,
110 0, // Data item passed to interrupt handler
113 &abort_interrupt_handle,
115 cyg_drv_interrupt_attach(abort_interrupt_handle);
116 cyg_drv_interrupt_unmask(CYGNUM_HAL_INTERRUPT_EXT0);
120 void hal_clock_reset(cyg_uint32 vector, cyg_uint32 period)
125 void hal_clock_read(cyg_uint32 *pvalue)
129 HAL_READ_UINT32(E7T_TCNT0, value);
130 *pvalue = _period - value;
133 // -------------------------------------------------------------------------
135 // Delay for some number of micro-seconds
137 void hal_delay_us(cyg_int32 usecs)
140 cyg_uint32 ticks = ((CYGNUM_HAL_RTC_PERIOD*CYGNUM_HAL_RTC_DENOMINATOR)/1000000) * usecs;
144 HAL_READ_UINT32(E7T_TMOD, tmod);
145 tmod &= ~(E7T_TMOD_TE1);
146 HAL_WRITE_UINT32(E7T_TMOD, tmod);
148 tmod &= ~(E7T_TMOD_TMD1 | E7T_TMOD_TCLR1);
149 tmod |= E7T_TMOD_TE1;
151 // Clear pending flag
152 HAL_WRITE_UINT32(E7T_INTPND, (1 << CYGNUM_HAL_INTERRUPT_TIMER1));
155 HAL_WRITE_UINT32(E7T_TDATA1, ticks);
158 HAL_WRITE_UINT32(E7T_TMOD, tmod);
160 // Wait for timer to underflow. Can't test the timer completion
161 // bit without actually enabling the interrupt. So instead watch
163 ticks /= 2; // wait for this threshold
165 // Wait till timer counts below threshold
167 HAL_READ_UINT32(E7T_TCNT1, count);
168 } while (count >= ticks);
169 // then wait for it to be reloaded
171 HAL_READ_UINT32(E7T_TCNT1, count);
172 } while (count < ticks);
174 // Then disable timer 1 again
175 tmod &= ~E7T_TMOD_TE1;
176 HAL_WRITE_UINT32(E7T_TMOD, tmod);
179 // -------------------------------------------------------------------------
181 void hal_hardware_init(void)
185 // Set up eCos/ROM interfaces
189 HAL_WRITE_UINT32(E7T_SYSCFG,
190 0x07FFFF80|E7T_SYSCFG_CM_0R_8C|E7T_SYSCFG_WE);
191 HAL_UCACHE_INVALIDATE_ALL();
194 // Clear global interrupt mask bit
195 HAL_READ_UINT32(E7T_INTMSK, intmask);
196 intmask &= ~E7T_INTMSK_GLOBAL;
197 HAL_WRITE_UINT32(E7T_INTMSK, intmask);
201 // This routine is called to respond to a hardware interrupt (IRQ). It
202 // should interrogate the hardware and return the IRQ vector number.
204 int hal_IRQ_handler(void)
206 // Do hardware-level IRQ handling
207 cyg_uint32 irq_status;
208 HAL_READ_UINT32(E7T_INTOFFSET_IRQ, irq_status);
209 irq_status = irq_status / 4;
210 if (CYGNUM_HAL_ISR_MAX >= irq_status)
212 // It's a bit bogus to test for FIQs after IRQs, but we use the
213 // latter more, so don't impose the overhead of checking for FIQs
214 HAL_READ_UINT32(E7T_INTOFFSET_FIQ, irq_status);
215 irq_status = irq_status / 4;
216 if (CYGNUM_HAL_ISR_MAX >= irq_status)
218 return CYGNUM_HAL_INTERRUPT_NONE;
225 void hal_interrupt_mask(int vector)
227 cyg_uint32 mask, old_mask;
228 HAL_READ_UINT32(E7T_INTMSK, mask);
231 HAL_WRITE_UINT32(E7T_INTMSK, mask);
234 void hal_interrupt_unmask(int vector)
236 cyg_uint32 mask, old_mask;
237 HAL_READ_UINT32(E7T_INTMSK, mask);
239 mask &= ~(1<<vector);
240 HAL_WRITE_UINT32(E7T_INTMSK, mask);
243 void hal_interrupt_acknowledge(int vector)
245 HAL_WRITE_UINT32(E7T_INTPND, (1<<vector));
248 void hal_interrupt_configure(int vector, int level, int up)
252 void hal_interrupt_set_level(int vector, int level)
256 void hal_show_IRQ(int vector, int data, int handler)
260 //--------------------------------------------------------------------------