dm: exynos: dts: Adjust device tree files for U-Boot
[karo-tx-uboot.git] / arch / arm / dts / exynos4210.dtsi
1 /*
2  * Samsung's Exynos4210 SoC device tree source
3  *
4  * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
5  *              http://www.samsung.com
6  * Copyright (c) 2010-2011 Linaro Ltd.
7  *              www.linaro.org
8  *
9  * Samsung's Exynos4210 SoC device nodes are listed in this file. Exynos4210
10  * based board files can include this file and provide values for board specfic
11  * bindings.
12  *
13  * Note: This file does not include device nodes for all the controllers in
14  * Exynos4210 SoC. As device tree coverage for Exynos4210 increases, additional
15  * nodes can be added to this file.
16  *
17  * This program is free software; you can redistribute it and/or modify
18  * it under the terms of the GNU General Public License version 2 as
19  * published by the Free Software Foundation.
20 */
21
22 #include "exynos4.dtsi"
23 #include "exynos4210-pinctrl.dtsi"
24 #include "exynos4210-pinctrl-uboot.dtsi"
25
26 / {
27         compatible = "samsung,exynos4210";
28
29         aliases {
30                 pinctrl0 = &pinctrl_0;
31                 pinctrl1 = &pinctrl_1;
32                 pinctrl2 = &pinctrl_2;
33         };
34
35         pd_lcd1: lcd1-power-domain@10023CA0 {
36                 compatible = "samsung,exynos4210-pd";
37                 reg = <0x10023CA0 0x20>;
38         };
39
40         gic: interrupt-controller@10490000 {
41                 cpu-offset = <0x8000>;
42         };
43
44         combiner: interrupt-controller@10440000 {
45                 samsung,combiner-nr = <16>;
46                 interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
47                              <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,
48                              <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,
49                              <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>;
50         };
51
52         mct@10050000 {
53                 compatible = "samsung,exynos4210-mct";
54                 reg = <0x10050000 0x800>;
55                 interrupt-parent = <&mct_map>;
56                 interrupts = <0>, <1>, <2>, <3>, <4>, <5>;
57                 clocks = <&clock 3>, <&clock 344>;
58                 clock-names = "fin_pll", "mct";
59
60                 mct_map: mct-map {
61                         #interrupt-cells = <1>;
62                         #address-cells = <0>;
63                         #size-cells = <0>;
64                         interrupt-map = <0 &gic 0 57 0>,
65                                         <1 &gic 0 69 0>,
66                                         <2 &combiner 12 6>,
67                                         <3 &combiner 12 7>,
68                                         <4 &gic 0 42 0>,
69                                         <5 &gic 0 48 0>;
70                 };
71         };
72
73         clock: clock-controller@10030000 {
74                 compatible = "samsung,exynos4210-clock";
75                 reg = <0x10030000 0x20000>;
76                 #clock-cells = <1>;
77         };
78
79         pmu {
80                 compatible = "arm,cortex-a9-pmu";
81                 interrupt-parent = <&combiner>;
82                 interrupts = <2 2>, <3 2>;
83         };
84
85         pinctrl_0: pinctrl@11400000 {
86                 compatible = "samsung,exynos4210-pinctrl";
87                 reg = <0x11400000 0x1000>;
88                 interrupts = <0 47 0>;
89         };
90
91         pinctrl_1: pinctrl@11000000 {
92                 compatible = "samsung,exynos4210-pinctrl";
93                 reg = <0x11000000 0x1000>;
94                 interrupts = <0 46 0>;
95
96                 wakup_eint: wakeup-interrupt-controller {
97                         compatible = "samsung,exynos4210-wakeup-eint";
98                         interrupt-parent = <&gic>;
99                         interrupts = <0 32 0>;
100                 };
101         };
102
103         pinctrl_2: pinctrl@03860000 {
104                 compatible = "samsung,exynos4210-pinctrl";
105                 reg = <0x03860000 0x1000>;
106         };
107
108         tmu@100C0000 {
109                 compatible = "samsung,exynos4210-tmu";
110                 interrupt-parent = <&combiner>;
111                 reg = <0x100C0000 0x100>;
112                 interrupts = <2 4>;
113                 clocks = <&clock 383>;
114                 clock-names = "tmu_apbif";
115                 status = "disabled";
116         };
117
118         g2d@12800000 {
119                 compatible = "samsung,s5pv210-g2d";
120                 reg = <0x12800000 0x1000>;
121                 interrupts = <0 89 0>;
122                 clocks = <&clock 177>, <&clock 277>;
123                 clock-names = "sclk_fimg2d", "fimg2d";
124                 status = "disabled";
125         };
126
127         camera {
128                 clocks = <&clock 132>, <&clock 133>, <&clock 351>, <&clock 352>;
129                 clock-names = "sclk_cam0", "sclk_cam1", "pxl_async0", "pxl_async1";
130
131                 fimc_0: fimc@11800000 {
132                         samsung,pix-limits = <4224 8192 1920 4224>;
133                         samsung,mainscaler-ext;
134                         samsung,cam-if;
135                 };
136
137                 fimc_1: fimc@11810000 {
138                         samsung,pix-limits = <4224 8192 1920 4224>;
139                         samsung,mainscaler-ext;
140                         samsung,cam-if;
141                 };
142
143                 fimc_2: fimc@11820000 {
144                         samsung,pix-limits = <4224 8192 1920 4224>;
145                         samsung,mainscaler-ext;
146                         samsung,lcd-wb;
147                 };
148
149                 fimc_3: fimc@11830000 {
150                         samsung,pix-limits = <1920 8192 1366 1920>;
151                         samsung,rotators = <0>;
152                         samsung,mainscaler-ext;
153                         samsung,lcd-wb;
154                 };
155         };
156 };