arch/arm/dts/tegra30.dtsi

   1 /include/ "skeleton.dtsi"
   2
   3 / {
   4         compatible = "nvidia,tegra30";
   5
   6         tegra_car: clock@60006000 {
   7                 compatible = "nvidia,tegra30-car", "nvidia,tegra20-car";
   8                 reg = <0x60006000 0x1000>;
   9                 #clock-cells = <1>;
  10         };
  11
  12         apbdma: dma {
  13                 compatible = "nvidia,tegra30-apbdma", "nvidia,tegra20-apbdma";
  14                 reg = <0x6000a000 0x1400>;
  15                 interrupts = <0 104 0x04
  16                               0 105 0x04
  17                               0 106 0x04
  18                               0 107 0x04
  19                               0 108 0x04
  20                               0 109 0x04
  21                               0 110 0x04
  22                               0 111 0x04
  23                               0 112 0x04
  24                               0 113 0x04
  25                               0 114 0x04
  26                               0 115 0x04
  27                               0 116 0x04
  28                               0 117 0x04
  29                               0 118 0x04
  30                               0 119 0x04
  31                               0 128 0x04
  32                               0 129 0x04
  33                               0 130 0x04
  34                               0 131 0x04
  35                               0 132 0x04
  36                               0 133 0x04
  37                               0 134 0x04
  38                               0 135 0x04
  39                               0 136 0x04
  40                               0 137 0x04
  41                               0 138 0x04
  42                               0 139 0x04
  43                               0 140 0x04
  44                               0 141 0x04
  45                               0 142 0x04
  46                               0 143 0x04>;
  47         };
  48
  49         i2c@7000c000 {
  50                 #address-cells = <1>;
  51                 #size-cells = <0>;
  52                 compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
  53                 reg = <0x7000C000 0x100>;
  54                 /* PERIPH_ID_I2C1, CLK_M */
  55                 clocks = <&tegra_car 12>;
  56         };
  57
  58         i2c@7000c400 {
  59                 #address-cells = <1>;
  60                 #size-cells = <0>;
  61                 compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
  62                 reg = <0x7000C400 0x100>;
  63                 /* PERIPH_ID_I2C2, CLK_M */
  64                 clocks = <&tegra_car 54>;
  65         };
  66
  67         i2c@7000c500 {
  68                 #address-cells = <1>;
  69                 #size-cells = <0>;
  70                 compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
  71                 reg = <0x7000C500 0x100>;
  72                 /* PERIPH_ID_I2C3, CLK_M */
  73                 clocks = <&tegra_car 67>;
  74         };
  75
  76         i2c@7000c700 {
  77                 #address-cells = <1>;
  78                 #size-cells = <0>;
  79                 compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
  80                 reg = <0x7000C700 0x100>;
  81                 /* PERIPH_ID_I2C4, CLK_M */
  82                 clocks = <&tegra_car 103>;
  83         };
  84
  85         i2c@7000d000 {
  86                 #address-cells = <1>;
  87                 #size-cells = <0>;
  88                 compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
  89                 reg = <0x7000D000 0x100>;
  90                 /* PERIPH_ID_I2C_DVC, CLK_M */
  91                 clocks = <&tegra_car 47>;
  92         };
  93 };