arch/arm/include/asm/arch-davinci/aintc_defs.h

   1 /*
   2  * Copyright (C) 2011
   3  * Heiko Schocher, DENX Software Engineering, hs@denx.de.
   4  *
   5  * SPDX-License-Identifier:     GPL-2.0+
   6  */
   7 #ifndef _DV_AINTC_DEFS_H_
   8 #define _DV_AINTC_DEFS_H_
   9
  10 struct dv_aintc_regs {
  11         unsigned int    fiq0;           /* 0x00 */
  12         unsigned int    fiq1;           /* 0x04 */
  13         unsigned int    irq0;           /* 0x08 */
  14         unsigned int    irq1;           /* 0x0c */
  15         unsigned int    fiqentry;       /* 0x10 */
  16         unsigned int    irqentry;       /* 0x14 */
  17         unsigned int    eint0;          /* 0x18 */
  18         unsigned int    eint1;          /* 0x1c */
  19         unsigned int    intctl;         /* 0x20 */
  20         unsigned int    eabase;         /* 0x24 */
  21         unsigned char   rsvd0[8];       /* 0x28 */
  22         unsigned int    intpri0;        /* 0x30 */
  23         unsigned int    intpri1;        /* 0x34 */
  24         unsigned int    intpri2;        /* 0x38 */
  25         unsigned int    intpri3;        /* 0x3c */
  26         unsigned int    intpri4;        /* 0x40 */
  27         unsigned int    intpri5;        /* 0x44 */
  28         unsigned int    intpri6;        /* 0x48 */
  29         unsigned int    intpri7;        /* 0x4c */
  30 };
  31
  32 #define dv_aintc_regs ((struct dv_aintc_regs *)DAVINCI_ARM_INTC_BASE)
  33
  34 #define DV_AINTC_INTCTL_IDMODE  (1 << 2)
  35
  36 #endif /* _DV_AINTC_DEFS_H_ */