2 * Adapted from Linux v2.6.36 kernel: arch/powerpc/kernel/asm-offsets.c
4 * This program is used to generate definitions needed by
5 * assembly language modules.
7 * We use the technique used in the OSF Mach kernel code:
8 * generate asm statements containing #defines,
9 * compile this file to assembler, and then extract the
10 * #defines from the assembly-language output.
12 * SPDX-License-Identifier: GPL-2.0+
16 #include <linux/kbuild.h>
18 #if defined(CONFIG_SOC_MX25) || defined(CONFIG_SOC_MX27) || defined(CONFIG_SOC_MX35) \
19 || defined(CONFIG_SOC_MX51) || defined(CONFIG_SOC_MX53) || defined(CONFIG_ARCH_MX6)
20 #include <asm/arch/imx-regs.h>
22 #if defined(CONFIG_ARCH_MX6)
23 #include <asm/arch/crm_regs.h>
29 * TODO : Check if each entry in this file is really necessary.
30 * - struct esdramc_regs
36 * are used only for generating asm-offsets.h.
37 * It means their offset addresses are referenced only from assembly
38 * code. Is it better to define the macros directly in headers?
41 #if defined(CONFIG_SOC_MX25)
42 /* Clock Control Module */
43 DEFINE(CCM_CCTL, offsetof(struct ccm_regs, cctl));
44 DEFINE(CCM_CGCR0, offsetof(struct ccm_regs, cgr0));
45 DEFINE(CCM_CGCR1, offsetof(struct ccm_regs, cgr1));
46 DEFINE(CCM_CGCR2, offsetof(struct ccm_regs, cgr2));
47 DEFINE(CCM_PCDR2, offsetof(struct ccm_regs, pcdr[2]));
48 DEFINE(CCM_MCR, offsetof(struct ccm_regs, mcr));
50 /* Enhanced SDRAM Controller */
51 DEFINE(ESDRAMC_ESDCTL0, offsetof(struct esdramc_regs, ctl0));
52 DEFINE(ESDRAMC_ESDCFG0, offsetof(struct esdramc_regs, cfg0));
53 DEFINE(ESDRAMC_ESDMISC, offsetof(struct esdramc_regs, misc));
55 /* Multi-Layer AHB Crossbar Switch */
56 DEFINE(MAX_MPR0, offsetof(struct max_regs, mpr0));
57 DEFINE(MAX_SGPCR0, offsetof(struct max_regs, sgpcr0));
58 DEFINE(MAX_MPR1, offsetof(struct max_regs, mpr1));
59 DEFINE(MAX_SGPCR1, offsetof(struct max_regs, sgpcr1));
60 DEFINE(MAX_MPR2, offsetof(struct max_regs, mpr2));
61 DEFINE(MAX_SGPCR2, offsetof(struct max_regs, sgpcr2));
62 DEFINE(MAX_MPR3, offsetof(struct max_regs, mpr3));
63 DEFINE(MAX_SGPCR3, offsetof(struct max_regs, sgpcr3));
64 DEFINE(MAX_MPR4, offsetof(struct max_regs, mpr4));
65 DEFINE(MAX_SGPCR4, offsetof(struct max_regs, sgpcr4));
66 DEFINE(MAX_MGPCR0, offsetof(struct max_regs, mgpcr0));
67 DEFINE(MAX_MGPCR1, offsetof(struct max_regs, mgpcr1));
68 DEFINE(MAX_MGPCR2, offsetof(struct max_regs, mgpcr2));
69 DEFINE(MAX_MGPCR3, offsetof(struct max_regs, mgpcr3));
70 DEFINE(MAX_MGPCR4, offsetof(struct max_regs, mgpcr4));
72 /* AHB <-> IP-Bus Interface */
73 DEFINE(AIPS_MPR_0_7, offsetof(struct aips_regs, mpr_0_7));
74 DEFINE(AIPS_MPR_8_15, offsetof(struct aips_regs, mpr_8_15));
77 #if defined(CONFIG_SOC_MX27)
78 DEFINE(AIPI1_PSR0, IMX_AIPI1_BASE + offsetof(struct aipi_regs, psr0));
79 DEFINE(AIPI1_PSR1, IMX_AIPI1_BASE + offsetof(struct aipi_regs, psr1));
80 DEFINE(AIPI2_PSR0, IMX_AIPI2_BASE + offsetof(struct aipi_regs, psr0));
81 DEFINE(AIPI2_PSR1, IMX_AIPI2_BASE + offsetof(struct aipi_regs, psr1));
83 DEFINE(CSCR, IMX_PLL_BASE + offsetof(struct pll_regs, cscr));
84 DEFINE(MPCTL0, IMX_PLL_BASE + offsetof(struct pll_regs, mpctl0));
85 DEFINE(SPCTL0, IMX_PLL_BASE + offsetof(struct pll_regs, spctl0));
86 DEFINE(PCDR0, IMX_PLL_BASE + offsetof(struct pll_regs, pcdr0));
87 DEFINE(PCDR1, IMX_PLL_BASE + offsetof(struct pll_regs, pcdr1));
88 DEFINE(PCCR0, IMX_PLL_BASE + offsetof(struct pll_regs, pccr0));
89 DEFINE(PCCR1, IMX_PLL_BASE + offsetof(struct pll_regs, pccr1));
91 DEFINE(ESDCTL0_ROF, offsetof(struct esdramc_regs, esdctl0));
92 DEFINE(ESDCFG0_ROF, offsetof(struct esdramc_regs, esdcfg0));
93 DEFINE(ESDCTL1_ROF, offsetof(struct esdramc_regs, esdctl1));
94 DEFINE(ESDCFG1_ROF, offsetof(struct esdramc_regs, esdcfg1));
95 DEFINE(ESDMISC_ROF, offsetof(struct esdramc_regs, esdmisc));
97 DEFINE(GPCR, IMX_SYSTEM_CTL_BASE +
98 offsetof(struct system_control_regs, gpcr));
99 DEFINE(FMCR, IMX_SYSTEM_CTL_BASE +
100 offsetof(struct system_control_regs, fmcr));
103 #if defined(CONFIG_SOC_MX35)
104 /* Round up to make sure size gives nice stack alignment */
105 DEFINE(CLKCTL_CCMR, offsetof(struct ccm_regs, ccmr));
106 DEFINE(CLKCTL_PDR0, offsetof(struct ccm_regs, pdr0));
107 DEFINE(CLKCTL_PDR1, offsetof(struct ccm_regs, pdr1));
108 DEFINE(CLKCTL_PDR2, offsetof(struct ccm_regs, pdr2));
109 DEFINE(CLKCTL_PDR3, offsetof(struct ccm_regs, pdr3));
110 DEFINE(CLKCTL_PDR4, offsetof(struct ccm_regs, pdr4));
111 DEFINE(CLKCTL_RCSR, offsetof(struct ccm_regs, rcsr));
112 DEFINE(CLKCTL_MPCTL, offsetof(struct ccm_regs, mpctl));
113 DEFINE(CLKCTL_PPCTL, offsetof(struct ccm_regs, ppctl));
114 DEFINE(CLKCTL_ACMR, offsetof(struct ccm_regs, acmr));
115 DEFINE(CLKCTL_COSR, offsetof(struct ccm_regs, cosr));
116 DEFINE(CLKCTL_CGR0, offsetof(struct ccm_regs, cgr0));
117 DEFINE(CLKCTL_CGR1, offsetof(struct ccm_regs, cgr1));
118 DEFINE(CLKCTL_CGR2, offsetof(struct ccm_regs, cgr2));
119 DEFINE(CLKCTL_CGR3, offsetof(struct ccm_regs, cgr3));
121 /* Multi-Layer AHB Crossbar Switch */
122 DEFINE(MAX_MPR0, offsetof(struct max_regs, mpr0));
123 DEFINE(MAX_SGPCR0, offsetof(struct max_regs, sgpcr0));
124 DEFINE(MAX_MPR1, offsetof(struct max_regs, mpr1));
125 DEFINE(MAX_SGPCR1, offsetof(struct max_regs, sgpcr1));
126 DEFINE(MAX_MPR2, offsetof(struct max_regs, mpr2));
127 DEFINE(MAX_SGPCR2, offsetof(struct max_regs, sgpcr2));
128 DEFINE(MAX_MPR3, offsetof(struct max_regs, mpr3));
129 DEFINE(MAX_SGPCR3, offsetof(struct max_regs, sgpcr3));
130 DEFINE(MAX_MPR4, offsetof(struct max_regs, mpr4));
131 DEFINE(MAX_SGPCR4, offsetof(struct max_regs, sgpcr4));
132 DEFINE(MAX_MGPCR0, offsetof(struct max_regs, mgpcr0));
133 DEFINE(MAX_MGPCR1, offsetof(struct max_regs, mgpcr1));
134 DEFINE(MAX_MGPCR2, offsetof(struct max_regs, mgpcr2));
135 DEFINE(MAX_MGPCR3, offsetof(struct max_regs, mgpcr3));
136 DEFINE(MAX_MGPCR4, offsetof(struct max_regs, mgpcr4));
137 DEFINE(MAX_MGPCR5, offsetof(struct max_regs, mgpcr5));
139 /* AHB <-> IP-Bus Interface */
140 DEFINE(AIPS_MPR_0_7, offsetof(struct aips_regs, mpr_0_7));
141 DEFINE(AIPS_MPR_8_15, offsetof(struct aips_regs, mpr_8_15));
142 DEFINE(AIPS_PACR_0_7, offsetof(struct aips_regs, pacr_0_7));
143 DEFINE(AIPS_PACR_8_15, offsetof(struct aips_regs, pacr_8_15));
144 DEFINE(AIPS_PACR_16_23, offsetof(struct aips_regs, pacr_16_23));
145 DEFINE(AIPS_PACR_24_31, offsetof(struct aips_regs, pacr_24_31));
146 DEFINE(AIPS_OPACR_0_7, offsetof(struct aips_regs, opacr_0_7));
147 DEFINE(AIPS_OPACR_8_15, offsetof(struct aips_regs, opacr_8_15));
148 DEFINE(AIPS_OPACR_16_23, offsetof(struct aips_regs, opacr_16_23));
149 DEFINE(AIPS_OPACR_24_31, offsetof(struct aips_regs, opacr_24_31));
150 DEFINE(AIPS_OPACR_32_39, offsetof(struct aips_regs, opacr_32_39));
153 #if defined(CONFIG_SOC_MX51) || defined(CONFIG_SOC_MX53)
154 /* Round up to make sure size gives nice stack alignment */
155 DEFINE(CLKCTL_CCMR, offsetof(struct clkctl, ccr));
156 DEFINE(CLKCTL_CCDR, offsetof(struct clkctl, ccdr));
157 DEFINE(CLKCTL_CSR, offsetof(struct clkctl, csr));
158 DEFINE(CLKCTL_CCSR, offsetof(struct clkctl, ccsr));
159 DEFINE(CLKCTL_CACRR, offsetof(struct clkctl, cacrr));
160 DEFINE(CLKCTL_CBCDR, offsetof(struct clkctl, cbcdr));
161 DEFINE(CLKCTL_CBCMR, offsetof(struct clkctl, cbcmr));
162 DEFINE(CLKCTL_CSCMR1, offsetof(struct clkctl, cscmr1));
163 DEFINE(CLKCTL_CSCMR2, offsetof(struct clkctl, cscmr2));
164 DEFINE(CLKCTL_CSCDR1, offsetof(struct clkctl, cscdr1));
165 DEFINE(CLKCTL_CS1CDR, offsetof(struct clkctl, cs1cdr));
166 DEFINE(CLKCTL_CS2CDR, offsetof(struct clkctl, cs2cdr));
167 DEFINE(CLKCTL_CDCDR, offsetof(struct clkctl, cdcdr));
168 DEFINE(CLKCTL_CHSCCDR, offsetof(struct clkctl, chsccdr));
169 DEFINE(CLKCTL_CSCDR2, offsetof(struct clkctl, cscdr2));
170 DEFINE(CLKCTL_CSCDR3, offsetof(struct clkctl, cscdr3));
171 DEFINE(CLKCTL_CSCDR4, offsetof(struct clkctl, cscdr4));
172 DEFINE(CLKCTL_CWDR, offsetof(struct clkctl, cwdr));
173 DEFINE(CLKCTL_CDHIPR, offsetof(struct clkctl, cdhipr));
174 DEFINE(CLKCTL_CDCR, offsetof(struct clkctl, cdcr));
175 DEFINE(CLKCTL_CTOR, offsetof(struct clkctl, ctor));
176 DEFINE(CLKCTL_CLPCR, offsetof(struct clkctl, clpcr));
177 DEFINE(CLKCTL_CISR, offsetof(struct clkctl, cisr));
178 DEFINE(CLKCTL_CIMR, offsetof(struct clkctl, cimr));
179 DEFINE(CLKCTL_CCOSR, offsetof(struct clkctl, ccosr));
180 DEFINE(CLKCTL_CGPR, offsetof(struct clkctl, cgpr));
181 DEFINE(CLKCTL_CCGR0, offsetof(struct clkctl, ccgr0));
182 DEFINE(CLKCTL_CCGR1, offsetof(struct clkctl, ccgr1));
183 DEFINE(CLKCTL_CCGR2, offsetof(struct clkctl, ccgr2));
184 DEFINE(CLKCTL_CCGR3, offsetof(struct clkctl, ccgr3));
185 DEFINE(CLKCTL_CCGR4, offsetof(struct clkctl, ccgr4));
186 DEFINE(CLKCTL_CCGR5, offsetof(struct clkctl, ccgr5));
187 DEFINE(CLKCTL_CCGR6, offsetof(struct clkctl, ccgr6));
188 DEFINE(CLKCTL_CMEOR, offsetof(struct clkctl, cmeor));
189 #if defined(CONFIG_SOC_MX53)
190 DEFINE(CLKCTL_CCGR7, offsetof(struct clkctl, ccgr7));
194 DEFINE(PLL_DP_CTL, offsetof(struct dpll, dp_ctl));
195 DEFINE(PLL_DP_CONFIG, offsetof(struct dpll, dp_config));
196 DEFINE(PLL_DP_OP, offsetof(struct dpll, dp_op));
197 DEFINE(PLL_DP_MFD, offsetof(struct dpll, dp_mfd));
198 DEFINE(PLL_DP_MFN, offsetof(struct dpll, dp_mfn));
199 DEFINE(PLL_DP_HFS_OP, offsetof(struct dpll, dp_hfs_op));
200 DEFINE(PLL_DP_HFS_MFD, offsetof(struct dpll, dp_hfs_mfd));
201 DEFINE(PLL_DP_HFS_MFN, offsetof(struct dpll, dp_hfs_mfn));
203 #if defined(CONFIG_ARCH_MX6)
204 DEFINE(CCM_CCR, offsetof(struct mxc_ccm_reg, ccr));
205 DEFINE(CCM_CCDR, offsetof(struct mxc_ccm_reg, ccdr));
206 DEFINE(CCM_CSR, offsetof(struct mxc_ccm_reg, csr));
207 DEFINE(CCM_CCSR, offsetof(struct mxc_ccm_reg, ccsr));
208 DEFINE(CCM_CACRR, offsetof(struct mxc_ccm_reg, cacrr));
209 DEFINE(CCM_CBCDR, offsetof(struct mxc_ccm_reg, cbcdr));
210 DEFINE(CCM_CBCMR, offsetof(struct mxc_ccm_reg, cbcmr));
211 DEFINE(CCM_CSCMR1, offsetof(struct mxc_ccm_reg, cscmr1));
212 DEFINE(CCM_CSCMR2, offsetof(struct mxc_ccm_reg, cscmr2));
213 DEFINE(CCM_CSCDR1, offsetof(struct mxc_ccm_reg, cscdr1));
214 DEFINE(CCM_CS1CDR, offsetof(struct mxc_ccm_reg, cs1cdr));
215 DEFINE(CCM_CS2CDR, offsetof(struct mxc_ccm_reg, cs2cdr));
216 DEFINE(CCM_CDCDR, offsetof(struct mxc_ccm_reg, cdcdr));
217 DEFINE(CCM_CHSCCDR, offsetof(struct mxc_ccm_reg, chsccdr));
218 DEFINE(CCM_CSCDR2, offsetof(struct mxc_ccm_reg, cscdr2));
219 DEFINE(CCM_CSCDR3, offsetof(struct mxc_ccm_reg, cscdr3));
220 DEFINE(CCM_CSCDR4, offsetof(struct mxc_ccm_reg, cscdr4));
221 DEFINE(CCM_CDHIPR, offsetof(struct mxc_ccm_reg, cdhipr));
222 DEFINE(CCM_CDCR, offsetof(struct mxc_ccm_reg, cdcr));
223 DEFINE(CCM_CTOR, offsetof(struct mxc_ccm_reg, ctor));
224 DEFINE(CCM_CLPCR, offsetof(struct mxc_ccm_reg, clpcr));
225 DEFINE(CCM_CISR, offsetof(struct mxc_ccm_reg, cisr));
226 DEFINE(CCM_CIMR, offsetof(struct mxc_ccm_reg, cimr));
227 DEFINE(CCM_CCOSR, offsetof(struct mxc_ccm_reg, ccosr));
228 DEFINE(CCM_CGPR, offsetof(struct mxc_ccm_reg, cgpr));
229 DEFINE(CCM_CCGR0, offsetof(struct mxc_ccm_reg, CCGR0));
230 DEFINE(CCM_CCGR1, offsetof(struct mxc_ccm_reg, CCGR1));
231 DEFINE(CCM_CCGR2, offsetof(struct mxc_ccm_reg, CCGR2));
232 DEFINE(CCM_CCGR3, offsetof(struct mxc_ccm_reg, CCGR3));
233 DEFINE(CCM_CCGR4, offsetof(struct mxc_ccm_reg, CCGR4));
234 DEFINE(CCM_CCGR5, offsetof(struct mxc_ccm_reg, CCGR5));
235 DEFINE(CCM_CCGR6, offsetof(struct mxc_ccm_reg, CCGR6));
236 DEFINE(CCM_CCGR7, offsetof(struct mxc_ccm_reg, CCGR7));
237 DEFINE(CCM_CMEOR, offsetof(struct mxc_ccm_reg, cmeor));
239 DEFINE(ANATOP_PLL_ENET, offsetof(struct anatop_regs, pll_enet));