arch/powerpc/cpu/mpc8xx/kgdb.S

   1 /*
   2  *  Copyright (C) 2000  Murray Jensen <Murray.Jensen@cmst.csiro.au>
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 #include <config.h>
   8 #include <command.h>
   9 #include <mpc8xx.h>
  10 #include <version.h>
  11
  12 #include <ppc_asm.tmpl>
  13 #include <ppc_defs.h>
  14
  15 #include <asm/cache.h>
  16 #include <asm/mmu.h>
  17
  18 #if defined(CONFIG_CMD_KGDB)
  19
  20  /*
  21  * cache flushing routines for kgdb
  22  */
  23
  24         .globl  kgdb_flush_cache_all
  25 kgdb_flush_cache_all:
  26         lis     r3, IDC_INVALL@h
  27         mtspr   DC_CST, r3
  28         sync
  29         lis     r3, IDC_INVALL@h
  30         mtspr   IC_CST, r3
  31         SYNC
  32         blr
  33
  34         .globl  kgdb_flush_cache_range
  35 kgdb_flush_cache_range:
  36         li      r5,CONFIG_SYS_CACHELINE_SIZE-1
  37         andc    r3,r3,r5
  38         subf    r4,r3,r4
  39         add     r4,r4,r5
  40         srwi.   r4,r4,CONFIG_SYS_CACHELINE_SHIFT
  41         beqlr
  42         mtctr   r4
  43         mr      r6,r3
  44 1:      dcbst   0,r3
  45         addi    r3,r3,CONFIG_SYS_CACHELINE_SIZE
  46         bdnz    1b
  47         sync                            /* wait for dcbst's to get to ram */
  48         mtctr   r4
  49 2:      icbi    0,r6
  50         addi    r6,r6,CONFIG_SYS_CACHELINE_SIZE
  51         bdnz    2b
  52         SYNC
  53         blr
  54
  55 #endif