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x86: Enable multi-core init for Minnowboard MAX
[karo-tx-uboot.git] / arch / x86 / dts / galileo.dts
1 /*
2  * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
3  *
4  * SPDX-License-Identifier:     GPL-2.0+
5  */
6
7 /dts-v1/;
8
9 #include <dt-bindings/mrc/quark.h>
10
11 /include/ "skeleton.dtsi"
12
13 / {
14         model = "Intel Galileo";
15         compatible = "intel,galileo", "intel,quark";
16
17         aliases {
18                 spi0 = "/spi";
19         };
20
21         config {
22                 silent_console = <0>;
23         };
24
25         chosen {
26                 stdout-path = &pciuart0;
27         };
28
29         mrc {
30                 compatible = "intel,quark-mrc";
31                 flags = <MRC_FLAG_SCRAMBLE_EN>;
32                 dram-width = <DRAM_WIDTH_X8>;
33                 dram-speed = <DRAM_FREQ_800>;
34                 dram-type = <DRAM_TYPE_DDR3>;
35                 rank-mask = <DRAM_RANK(0)>;
36                 chan-mask = <DRAM_CHANNEL(0)>;
37                 chan-width = <DRAM_CHANNEL_WIDTH_X16>;
38                 addr-mode = <DRAM_ADDR_MODE0>;
39                 refresh-rate = <DRAM_REFRESH_RATE_785US>;
40                 sr-temp-range = <DRAM_SRT_RANGE_NORMAL>;
41                 ron-value = <DRAM_RON_34OHM>;
42                 rtt-nom-value = <DRAM_RTT_NOM_120OHM>;
43                 rd-odt-value = <DRAM_RD_ODT_OFF>;
44                 dram-density = <DRAM_DENSITY_1G>;
45                 dram-cl = <6>;
46                 dram-ras = <0x0000927c>;
47                 dram-wtr = <0x00002710>;
48                 dram-rrd = <0x00002710>;
49                 dram-faw = <0x00009c40>;
50         };
51
52         pci {
53                 #address-cells = <3>;
54                 #size-cells = <2>;
55                 compatible = "intel,pci";
56                 device_type = "pci";
57
58                 pciuart0: uart@14,5 {
59                         compatible = "pci8086,0936.00",
60                                         "pci8086,0936",
61                                         "pciclass,070002",
62                                         "pciclass,0700",
63                                         "x86-uart";
64                         reg = <0x0000a500 0x0 0x0 0x0 0x0
65                                0x0200a510 0x0 0x0 0x0 0x0>;
66                         reg-shift = <2>;
67                         clock-frequency = <44236800>;
68                         current-speed = <115200>;
69                 };
70         };
71
72         gpioa {
73                 compatible = "intel,ich6-gpio";
74                 u-boot,dm-pre-reloc;
75                 reg = <0 0x20>;
76                 bank-name = "A";
77         };
78
79         gpiob {
80                 compatible = "intel,ich6-gpio";
81                 u-boot,dm-pre-reloc;
82                 reg = <0x20 0x20>;
83                 bank-name = "B";
84         };
85
86         spi {
87                 #address-cells = <1>;
88                 #size-cells = <0>;
89                 compatible = "intel,ich-spi";
90                 spi-flash@0 {
91                         #size-cells = <1>;
92                         #address-cells = <1>;
93                         reg = <0>;
94                         compatible = "winbond,w25q64", "spi-flash";
95                         memory-map = <0xff800000 0x00800000>;
96                 };
97         };
98
99 };