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x86: minnowmax: Correct pad-offset value for host_en1
[karo-tx-uboot.git] / arch / x86 / dts / qemu-x86_q35.dts
1 /*
2  * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
3  *
4  * SPDX-License-Identifier:     GPL-2.0+
5  */
6
7 /dts-v1/;
8
9 #include <dt-bindings/interrupt-router/intel-irq.h>
10
11 /* ICH9 IRQ router has discrete PIRQ control registers */
12 #undef PIRQE
13 #undef PIRQF
14 #undef PIRQG
15 #undef PIRQH
16 #define PIRQE   8
17 #define PIRQF   9
18 #define PIRQG   10
19 #define PIRQH   11
20
21 /include/ "skeleton.dtsi"
22 /include/ "serial.dtsi"
23 /include/ "rtc.dtsi"
24
25 / {
26         model = "QEMU x86 (Q35)";
27         compatible = "qemu,x86";
28
29         config {
30                 silent_console = <0>;
31                 u-boot,no-apm-finalize;
32         };
33
34         chosen {
35                 stdout-path = "/serial";
36         };
37
38         cpus {
39                 #address-cells = <1>;
40                 #size-cells = <0>;
41
42                 cpu@0 {
43                         device_type = "cpu";
44                         compatible = "cpu-x86";
45                         reg = <0>;
46                         intel,apic-id = <0>;
47                 };
48
49                 cpu@1 {
50                         device_type = "cpu";
51                         compatible = "cpu-x86";
52                         reg = <1>;
53                         intel,apic-id = <1>;
54                 };
55         };
56
57         pci {
58                 compatible = "pci-x86";
59                 #address-cells = <3>;
60                 #size-cells = <2>;
61                 u-boot,dm-pre-reloc;
62                 ranges = <0x02000000 0x0 0xc0000000 0xc0000000 0 0x10000000
63                         0x42000000 0x0 0xd0000000 0xd0000000 0 0x10000000
64                         0x01000000 0x0 0x2000 0x2000 0 0xe000>;
65
66                 irq-router@1f,0 {
67                         reg = <0x0000f800 0 0 0 0>;
68                         compatible = "intel,irq-router";
69                         intel,pirq-config = "pci";
70                         intel,pirq-link = <0x60 8>;
71                         intel,pirq-mask = <0x0e40>;
72                         intel,pirq-routing = <
73                                 /* e1000 NIC */
74                                 PCI_BDF(0, 2, 0) INTA PIRQG
75                                 /* ICH9 UHCI */
76                                 PCI_BDF(0, 29, 0) INTA PIRQA
77                                 PCI_BDF(0, 29, 1) INTB PIRQB
78                                 PCI_BDF(0, 29, 2) INTC PIRQC
79                                 /* ICH9 EHCI */
80                                 PCI_BDF(0, 29, 7) INTD PIRQD
81                                 /* ICH9 SATA */
82                                 PCI_BDF(0, 31, 2) INTA PIRQA
83                         >;
84                 };
85         };
86
87 };