board/afeb9260/afeb9260.c

   1 /*
   2  * (C) Copyright 2007-2008
   3  * Stelian Pop <stelian@popies.net>
   4  * Lead Tech Design <www.leadtechdesign.com>
   5  * (C) Copyright 2008 Sergey Lapin <slapin@ossfans.org>
   6  *
   7  * SPDX-License-Identifier:     GPL-2.0+
   8  */
   9
  10 #include <common.h>
  11 #include <asm/arch/at91sam9260.h>
  12 #include <asm/arch/at91sam9260_matrix.h>
  13 #include <asm/arch/at91sam9_smc.h>
  14 #include <asm/arch/at91_common.h>
  15 #include <asm/arch/at91_pmc.h>
  16 #include <asm/arch/gpio.h>
  17 #include <asm/io.h>
  18 #include <asm/arch/hardware.h>
  19 #if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB)
  20 #include <netdev.h>
  21 #include <net.h>
  22 #endif
  23
  24 DECLARE_GLOBAL_DATA_PTR;
  25
  26 /* ------------------------------------------------------------------------- */
  27 /*
  28  * Miscelaneous platform dependent initialisations
  29  */
  30
  31 static void afeb9260_nand_hw_init(void)
  32 {
  33         unsigned long csa;
  34         struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
  35         struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
  36
  37         /* Assign CS3 to NAND/SmartMedia Interface */
  38         csa = readl(&matrix->ebicsa);
  39         csa |= AT91_MATRIX_CS3A_SMC_SMARTMEDIA;
  40         writel(csa, &matrix->ebicsa);
  41
  42         /* Configure SMC CS3 for NAND/SmartMedia */
  43         writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
  44                 AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0),
  45                 &smc->cs[3].setup);
  46         writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) |
  47                 AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3),
  48                 &smc->cs[3].pulse);
  49         writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5),
  50                 &smc->cs[3].cycle);
  51         writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
  52                 AT91_SMC_MODE_EXNW_DISABLE |
  53                 AT91_SMC_MODE_DBW_8 |
  54                 AT91_SMC_MODE_TDF_CYCLE(2),
  55                 &smc->cs[3].mode);
  56
  57         /* Configure RDY/BSY */
  58         at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
  59
  60         /* Enable NandFlash */
  61         at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
  62 }
  63
  64 #ifdef CONFIG_MACB
  65 static void afeb9260_macb_hw_init(void)
  66 {
  67         struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
  68         struct at91_port *pioa = (struct at91_port *)ATMEL_BASE_PIOA;
  69
  70
  71         /* Enable EMAC clock */
  72         writel(1 << ATMEL_ID_EMAC0, &pmc->pcer);
  73
  74
  75         /*
  76          * Disable pull-up on:
  77          *      RXDV (PA17) => PHY normal mode (not Test mode)
  78          *      ERX0 (PA14) => PHY ADDR0
  79          *      ERX1 (PA15) => PHY ADDR1
  80          *      ERX2 (PA25) => PHY ADDR2
  81          *      ERX3 (PA26) => PHY ADDR3
  82          *      ECRS (PA28) => PHY ADDR4  => PHYADDR = 0x0
  83          *
  84          * PHY has internal pull-down
  85          */
  86         writel(pin_to_mask(AT91_PIN_PA14) |
  87                pin_to_mask(AT91_PIN_PA15) |
  88                pin_to_mask(AT91_PIN_PA17) |
  89                pin_to_mask(AT91_PIN_PA25) |
  90                pin_to_mask(AT91_PIN_PA26) |
  91                pin_to_mask(AT91_PIN_PA28),
  92                &pioa->pudr);
  93
  94         at91_phy_reset();
  95
  96         /* Re-enable pull-up */
  97         writel(pin_to_mask(AT91_PIN_PA14) |
  98                pin_to_mask(AT91_PIN_PA15) |
  99                pin_to_mask(AT91_PIN_PA17) |
 100                pin_to_mask(AT91_PIN_PA25) |
 101                pin_to_mask(AT91_PIN_PA26) |
 102                pin_to_mask(AT91_PIN_PA28),
 103                &pioa->puer);
 104
 105         at91_macb_hw_init();
 106 }
 107 #endif
 108 int board_early_init_f(void)
 109 {
 110         struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
 111         /* Enable clocks for all PIOs */
 112         writel((1 << ATMEL_ID_PIOA) |
 113                 (1 << ATMEL_ID_PIOB) |
 114                 (1 << ATMEL_ID_PIOC),
 115                 &pmc->pcer);
 116         return 0;
 117 }
 118 int board_init(void)
 119 {
 120         /* arch number of AT91SAM9260EK-Board */
 121         gd->bd->bi_arch_number = MACH_TYPE_AFEB9260;
 122         /* adress of boot parameters */
 123         gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
 124
 125         at91_seriald_hw_init();
 126 #ifdef CONFIG_CMD_NAND
 127         afeb9260_nand_hw_init();
 128 #endif
 129         at91_spi0_hw_init((1 << 0) | (1 << 1));
 130 #ifdef CONFIG_MACB
 131         afeb9260_macb_hw_init();
 132 #endif
 133
 134         return 0;
 135 }
 136
 137 int dram_init(void)
 138 {
 139         gd->ram_size = get_ram_size(
 140         (void *)CONFIG_SYS_SDRAM_BASE,
 141                 CONFIG_SYS_SDRAM_SIZE);
 142
 143         return 0;
 144 }
 145
 146 #ifdef CONFIG_RESET_PHY_R
 147 void reset_phy(void)
 148 {
 149 }
 150 #endif
 151
 152 int board_eth_init(bd_t *bis)
 153 {
 154         int rc = 0;
 155 #ifdef CONFIG_MACB
 156         rc = macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC0, 0x01);
 157 #endif
 158         return rc;
 159 }