board/freescale/t208xrdb/t208xrdb.c

   1 /*
   2  * Copyright 2009-2013 Freescale Semiconductor, Inc.
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 #include <common.h>
   8 #include <command.h>
   9 #include <i2c.h>
  10 #include <netdev.h>
  11 #include <linux/compiler.h>
  12 #include <asm/mmu.h>
  13 #include <asm/processor.h>
  14 #include <asm/immap_85xx.h>
  15 #include <asm/fsl_law.h>
  16 #include <asm/fsl_serdes.h>
  17 #include <asm/fsl_portals.h>
  18 #include <asm/fsl_liodn.h>
  19 #include <fm_eth.h>
  20 #include "t208xrdb.h"
  21 #include "cpld.h"
  22
  23 DECLARE_GLOBAL_DATA_PTR;
  24
  25 int checkboard(void)
  26 {
  27         struct cpu_type *cpu = gd->arch.cpu;
  28         static const char *freq[3] = {"100.00MHZ", "125.00MHz", "156.25MHZ"};
  29
  30         printf("Board: %sRDB, ", cpu->name);
  31         printf("Board rev: 0x%02x CPLD ver: 0x%02x, boot from ",
  32                CPLD_READ(hw_ver), CPLD_READ(sw_ver));
  33
  34 #ifdef CONFIG_SDCARD
  35         puts("SD/MMC\n");
  36 #elif CONFIG_SPIFLASH
  37         puts("SPI\n");
  38 #else
  39         u8 reg;
  40
  41         reg = CPLD_READ(flash_csr);
  42
  43         if (reg & CPLD_BOOT_SEL) {
  44                 puts("NAND\n");
  45         } else {
  46                 reg = ((reg & CPLD_LBMAP_MASK) >> CPLD_LBMAP_SHIFT);
  47                 printf("NOR vBank%d\n", reg);
  48         }
  49 #endif
  50
  51         puts("SERDES Reference Clocks:\n");
  52         printf("SD1_CLK1=%s, SD1_CLK2=%s\n", freq[2], freq[0]);
  53         printf("SD2_CLK1=%s, SD2_CLK2=%s\n", freq[0], freq[0]);
  54
  55         return 0;
  56 }
  57
  58 int board_early_init_r(void)
  59 {
  60         const unsigned int flashbase = CONFIG_SYS_FLASH_BASE;
  61         int flash_esel = find_tlb_idx((void *)flashbase, 1);
  62         /*
  63          * Remap Boot flash + PROMJET region to caching-inhibited
  64          * so that flash can be erased properly.
  65          */
  66
  67         /* Flush d-cache and invalidate i-cache of any FLASH data */
  68         flush_dcache();
  69         invalidate_icache();
  70         if (flash_esel == -1) {
  71                 /* very unlikely unless something is messed up */
  72                 puts("Error: Could not find TLB for FLASH BASE\n");
  73                 flash_esel = 2; /* give our best effort to continue */
  74         } else {
  75                 /* invalidate existing TLB entry for flash + promjet */
  76                 disable_tlb(flash_esel);
  77         }
  78
  79         set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS,
  80                 MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
  81                 0, flash_esel, BOOKE_PAGESZ_256M, 1);
  82
  83         set_liodns();
  84 #ifdef CONFIG_SYS_DPAA_QBMAN
  85         setup_portals();
  86 #endif
  87
  88         return 0;
  89 }
  90
  91 unsigned long get_board_sys_clk(void)
  92 {
  93         return CONFIG_SYS_CLK_FREQ;
  94 }
  95
  96 unsigned long get_board_ddr_clk(void)
  97 {
  98         return CONFIG_DDR_CLK_FREQ;
  99 }
 100
 101 int misc_init_r(void)
 102 {
 103         return 0;
 104 }
 105
 106 int ft_board_setup(void *blob, bd_t *bd)
 107 {
 108         phys_addr_t base;
 109         phys_size_t size;
 110
 111         ft_cpu_setup(blob, bd);
 112
 113         base = getenv_bootm_low();
 114         size = getenv_bootm_size();
 115
 116         fdt_fixup_memory(blob, (u64)base, (u64)size);
 117
 118 #ifdef CONFIG_PCI
 119         pci_of_setup(blob, bd);
 120 #endif
 121
 122         fdt_fixup_liodn(blob);
 123         fdt_fixup_dr_usb(blob, bd);
 124
 125 #ifdef CONFIG_SYS_DPAA_FMAN
 126         fdt_fixup_fman_ethernet(blob);
 127         fdt_fixup_board_enet(blob);
 128 #endif
 129
 130         return 0;
 131 }