2 *(C) Copyright 2005-2007 Netstal Maschinen AG
3 * Niklaus Giger (Niklaus.Giger@netstal.com)
5 * This source code is free software; you can redistribute it
6 * and/or modify it in source code form under the terms of the GNU
7 * General Public License as published by the Free Software
8 * Foundation; either version 2 of the License, or (at your option)
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
23 #include <asm/processor.h>
25 #include <asm-ppc/u-boot.h>
26 #include "../common/nm.h"
28 DECLARE_GLOBAL_DATA_PTR;
30 #define HCU_MACH_VERSIONS_REGISTER (0x7C000000 + 0xF00000)
31 #define SYS_SLOT_ADDRESS (0x7C000000 + 0x400000)
32 #define HCU3_DIGITAL_IO_REGISTER (0x7C000000 + 0x500000)
33 #define HCU_SW_INSTALL_REQUESTED 0x10
38 void show_sdram_registers(void);
42 * This function is run very early, out of flash, and before devices are
43 * initialized. It is called by lib_ppc/board.c:board_init_f by virtue
44 * of being in the init_sequence array.
46 * The SDRAM has been initialized already -- start.S:start called
47 * init.S:init_sdram early on -- but it is not yet being used for
48 * anything, not even stack. So be careful.
51 #define CPC0_CR0 0xb1 /* Chip control register 0 */
52 #define CPC0_CR1 0xb2 /* Chip control register 1 */
53 /* Attention: If you want 1 microsecs times from the external oscillator
54 * use 0x00804051. But this causes problems with u-boot and linux!
56 #define CPC0_CR0_VALUE 0x0030103c
57 #define CPC0_CR1_VALUE 0x00004051
58 #define CPC0_ECR 0xaa /* Edge condition register */
59 #define EBC0_CFG 0x23 /* External Peripheral Control Register */
60 #define CPC0_EIRR 0xb6 /* External Interrupt Register */
63 int board_early_init_f (void)
66 * Interrupt controller setup for the HCU4 board.
67 * Note: IRQ 0-15 405GP internally generated; high; level sensitive
68 * IRQ 16 405GP internally generated; low; level sensitive
69 * IRQ 17-24 RESERVED/UNUSED
70 * IRQ 31 (EXT IRQ 6) (unused)
72 mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
73 mtdcr (uicer, 0x00000000); /* disable all ints */
74 mtdcr (uiccr, 0x00000000); /* set all to be non-critical */
75 mtdcr (uicpr, 0xFFFFE000); /* set int polarities */
76 mtdcr (uictr, 0x00000000); /* set int trigger levels */
77 mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
79 mtdcr(CPC0_CR1, CPC0_CR1_VALUE);
80 mtdcr(CPC0_ECR, 0x60606000);
81 mtdcr(CPC0_EIRR, 0x7c000000);
86 #ifdef CONFIG_BOARD_PRE_INIT
87 int board_pre_init (void)
89 return board_early_init_f ();
93 int sys_install_requested(void)
95 u16 *ioValuePtr = (u16 *)HCU3_DIGITAL_IO_REGISTER;
96 return (in_be16(ioValuePtr) & HCU_SW_INSTALL_REQUESTED) != 0;
101 u16 *boardVersReg = (u16 *)HCU_MACH_VERSIONS_REGISTER;
102 u16 generation = in_be16(boardVersReg) & 0xf0;
103 u16 index = in_be16(boardVersReg) & 0x0f;
105 /* Cannot be done, in board_early_init */
106 mtdcr(CPC0_CR0, CPC0_CR0_VALUE);
107 /* Force /RTS to active. The board it not wired quite
108 * correctly to use cts/rtc flow control, so just force the
109 * /RST active and forget about it.
111 writeb (readb (0xef600404) | 0x03, 0xef600404);
112 nm_show_print(generation, index, 0);
117 u32 hcu_led_get(void)
119 return (~(in_be32((u32 *)GPIO0_OR)) >> 23) & 0xff;
123 * hcu_led_set value to be placed into the LEDs (max 6 bit)
125 void hcu_led_set(u32 value)
129 tmp = (tmp << 23) | 0x7FFFFF;
130 out_be32((u32 *)GPIO0_OR, tmp);
134 * sdram_init - Dummy implementation for start.S, spd_sdram or initdram
137 void sdram_init(void)
145 u32 hcu_get_slot(void)
147 u16 *slot = (u16 *)SYS_SLOT_ADDRESS;
148 return in_be16(slot) & 0x7f;
154 u32 get_serial_number(void)
156 u32 *serial = (u32 *)CFG_FLASH_BASE;
158 if (in_be32(serial) == 0xffffffff)
161 return in_be32(serial);
169 int misc_init_r(void)
171 common_misc_init_r();
172 set_params_for_sw_install( sys_install_requested(), "hcu4" );
176 long int initdram(int board_type)
179 u16 *boardVersReg = (u16 *) HCU_MACH_VERSIONS_REGISTER;
180 u16 generation = in_be16(boardVersReg) & 0xf0;
181 if (generation == HW_GENERATION_HCU3)
182 dram_size = 32*1024*1024;
183 else dram_size = 64*1024*1024;
184 fixed_hcu4_sdram(dram_size);
187 show_sdram_registers();
193 #if defined(CONFIG_POST)
195 * Returns 1 if keys pressed to start the power-on long-running tests
196 * Called from board_init_f().
198 int post_hotkeys_pressed(void)
200 return 0; /* No hotkeys supported */
202 #endif /* CONFIG_POST */
204 #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
205 void ft_board_setup(void *blob, bd_t *bd)
207 ft_cpu_setup(blob, bd);
210 #endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */