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EXYNOS5: Enable SPI
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1 /*
2  * Copyright (C) 2012 Samsung Electronics
3  *
4  * See file CREDITS for list of people who contributed to this
5  * project.
6  *
7  * This program is free software; you can redistribute it and/or
8  * modify it under the terms of the GNU General Public License as
9  * published by the Free Software Foundation; either version 2 of
10  * the License, or (at your option) any later version.
11  *
12  * This program is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15  * GNU General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License
18  * along with this program; if not, write to the Free Software
19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
20  * MA 02111-1307 USA
21  */
22
23 #include <common.h>
24 #include <asm/io.h>
25 #include <i2c.h>
26 #include <netdev.h>
27 #include <spi.h>
28 #include <asm/arch/cpu.h>
29 #include <asm/arch/gpio.h>
30 #include <asm/arch/mmc.h>
31 #include <asm/arch/pinmux.h>
32 #include <asm/arch/sromc.h>
33 #include <pmic.h>
34
35 DECLARE_GLOBAL_DATA_PTR;
36
37 #ifdef CONFIG_SMC911X
38 static int smc9115_pre_init(void)
39 {
40         u32 smc_bw_conf, smc_bc_conf;
41         int err;
42
43         /* Ethernet needs data bus width of 16 bits */
44         smc_bw_conf = SROMC_DATA16_WIDTH(CONFIG_ENV_SROM_BANK)
45                         | SROMC_BYTE_ENABLE(CONFIG_ENV_SROM_BANK);
46
47         smc_bc_conf = SROMC_BC_TACS(0x01) | SROMC_BC_TCOS(0x01)
48                         | SROMC_BC_TACC(0x06) | SROMC_BC_TCOH(0x01)
49                         | SROMC_BC_TAH(0x0C)  | SROMC_BC_TACP(0x09)
50                         | SROMC_BC_PMC(0x01);
51
52         /* Select and configure the SROMC bank */
53         err = exynos_pinmux_config(PERIPH_ID_SROMC,
54                                 CONFIG_ENV_SROM_BANK | PINMUX_FLAG_16BIT);
55         if (err) {
56                 debug("SROMC not configured\n");
57                 return err;
58         }
59
60         s5p_config_sromc(CONFIG_ENV_SROM_BANK, smc_bw_conf, smc_bc_conf);
61         return 0;
62 }
63 #endif
64
65 int board_init(void)
66 {
67         gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
68 #if defined(CONFIG_PMIC)
69         pmic_init();
70 #endif
71 #ifdef CONFIG_EXYNOS_SPI
72         spi_init();
73 #endif
74         return 0;
75 }
76
77 int dram_init(void)
78 {
79         gd->ram_size    = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE)
80                         + get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE)
81                         + get_ram_size((long *)PHYS_SDRAM_3, PHYS_SDRAM_3_SIZE)
82                         + get_ram_size((long *)PHYS_SDRAM_4, PHYS_SDRAM_4_SIZE)
83                         + get_ram_size((long *)PHYS_SDRAM_5, PHYS_SDRAM_7_SIZE)
84                         + get_ram_size((long *)PHYS_SDRAM_6, PHYS_SDRAM_7_SIZE)
85                         + get_ram_size((long *)PHYS_SDRAM_7, PHYS_SDRAM_7_SIZE)
86                         + get_ram_size((long *)PHYS_SDRAM_8, PHYS_SDRAM_8_SIZE);
87         return 0;
88 }
89
90 void dram_init_banksize(void)
91 {
92         gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
93         gd->bd->bi_dram[0].size = get_ram_size((long *)PHYS_SDRAM_1,
94                                                         PHYS_SDRAM_1_SIZE);
95         gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
96         gd->bd->bi_dram[1].size = get_ram_size((long *)PHYS_SDRAM_2,
97                                                         PHYS_SDRAM_2_SIZE);
98         gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
99         gd->bd->bi_dram[2].size = get_ram_size((long *)PHYS_SDRAM_3,
100                                                         PHYS_SDRAM_3_SIZE);
101         gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
102         gd->bd->bi_dram[3].size = get_ram_size((long *)PHYS_SDRAM_4,
103                                                         PHYS_SDRAM_4_SIZE);
104         gd->bd->bi_dram[4].start = PHYS_SDRAM_5;
105         gd->bd->bi_dram[4].size = get_ram_size((long *)PHYS_SDRAM_5,
106                                                         PHYS_SDRAM_5_SIZE);
107         gd->bd->bi_dram[5].start = PHYS_SDRAM_6;
108         gd->bd->bi_dram[5].size = get_ram_size((long *)PHYS_SDRAM_6,
109                                                         PHYS_SDRAM_6_SIZE);
110         gd->bd->bi_dram[6].start = PHYS_SDRAM_7;
111         gd->bd->bi_dram[6].size = get_ram_size((long *)PHYS_SDRAM_7,
112                                                         PHYS_SDRAM_7_SIZE);
113         gd->bd->bi_dram[7].start = PHYS_SDRAM_8;
114         gd->bd->bi_dram[7].size = get_ram_size((long *)PHYS_SDRAM_8,
115                                                         PHYS_SDRAM_8_SIZE);
116 }
117
118 int board_eth_init(bd_t *bis)
119 {
120 #ifdef CONFIG_SMC911X
121         if (smc9115_pre_init())
122                 return -1;
123         return smc911x_initialize(0, CONFIG_SMC911X_BASE);
124 #endif
125         return 0;
126 }
127
128 #ifdef CONFIG_DISPLAY_BOARDINFO
129 int checkboard(void)
130 {
131         printf("\nBoard: SMDK5250\n");
132
133         return 0;
134 }
135 #endif
136
137 #ifdef CONFIG_GENERIC_MMC
138 int board_mmc_init(bd_t *bis)
139 {
140         int err;
141
142         err = exynos_pinmux_config(PERIPH_ID_SDMMC0, PINMUX_FLAG_8BIT_MODE);
143         if (err) {
144                 debug("SDMMC0 not configured\n");
145                 return err;
146         }
147
148         err = s5p_mmc_init(0, 8);
149         return err;
150 }
151 #endif
152
153 static int board_uart_init(void)
154 {
155         int err;
156
157         err = exynos_pinmux_config(PERIPH_ID_UART0, PINMUX_FLAG_NONE);
158         if (err) {
159                 debug("UART0 not configured\n");
160                 return err;
161         }
162
163         err = exynos_pinmux_config(PERIPH_ID_UART1, PINMUX_FLAG_NONE);
164         if (err) {
165                 debug("UART1 not configured\n");
166                 return err;
167         }
168
169         err = exynos_pinmux_config(PERIPH_ID_UART2, PINMUX_FLAG_NONE);
170         if (err) {
171                 debug("UART2 not configured\n");
172                 return err;
173         }
174
175         err = exynos_pinmux_config(PERIPH_ID_UART3, PINMUX_FLAG_NONE);
176         if (err) {
177                 debug("UART3 not configured\n");
178                 return err;
179         }
180
181         return 0;
182 }
183
184 #ifdef CONFIG_SYS_I2C_INIT_BOARD
185 static int board_i2c_init(void)
186 {
187         int i, err;
188
189         for (i = 0; i < CONFIG_MAX_I2C_NUM; i++) {
190                 err = exynos_pinmux_config((PERIPH_ID_I2C0 + i),
191                                                 PINMUX_FLAG_NONE);
192                 if (err) {
193                         debug("I2C%d not configured\n", (PERIPH_ID_I2C0 + i));
194                         return err;
195                 }
196         }
197         i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
198         return 0;
199 }
200 #endif
201
202 #ifdef CONFIG_BOARD_EARLY_INIT_F
203 int board_early_init_f(void)
204 {
205         int err;
206         err = board_uart_init();
207         if (err) {
208                 debug("UART init failed\n");
209                 return err;
210         }
211 #ifdef CONFIG_SYS_I2C_INIT_BOARD
212         err = board_i2c_init();
213 #endif
214         return err;
215 }
216 #endif