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1 /*
2  * (C) Copyright 2010
3  * Texas Instruments Incorporated, <www.ti.com>
4  * Aneesh V       <aneesh@ti.com>
5  * Steve Sakoman  <steve@sakoman.com>
6  *
7  * SPDX-License-Identifier:     GPL-2.0+
8  */
9 #include <common.h>
10 #include <palmas.h>
11 #include <asm/arch/sys_proto.h>
12 #include <asm/arch/mmc_host_def.h>
13 #include <tca642x.h>
14
15 #include "mux_data.h"
16
17 #if defined(CONFIG_USB_EHCI) || defined(CONFIG_USB_XHCI_OMAP)
18 #include <sata.h>
19 #include <usb.h>
20 #include <asm/gpio.h>
21 #include <asm/arch/clock.h>
22 #include <asm/arch/ehci.h>
23 #include <asm/ehci-omap.h>
24 #include <asm/arch/sata.h>
25
26 #define DIE_ID_REG_BASE     (OMAP54XX_L4_CORE_BASE + 0x2000)
27 #define DIE_ID_REG_OFFSET       0x200
28
29 #endif
30
31 DECLARE_GLOBAL_DATA_PTR;
32
33 const struct omap_sysinfo sysinfo = {
34         "Board: OMAP5432 uEVM\n"
35 };
36
37 /**
38  * @brief tca642x_init - uEVM default values for the GPIO expander
39  * input reg, output reg, polarity reg, configuration reg
40  */
41 struct tca642x_bank_info tca642x_init[] = {
42         { .input_reg = 0x00,
43           .output_reg = 0x04,
44           .polarity_reg = 0x00,
45           .configuration_reg = 0x80 },
46         { .input_reg = 0x00,
47           .output_reg = 0x00,
48           .polarity_reg = 0x00,
49           .configuration_reg = 0xff },
50         { .input_reg = 0x00,
51           .output_reg = 0x00,
52           .polarity_reg = 0x00,
53           .configuration_reg = 0x40 },
54 };
55
56 /**
57  * @brief board_init
58  *
59  * @return 0
60  */
61 int board_init(void)
62 {
63         gpmc_init();
64         gd->bd->bi_arch_number = MACH_TYPE_OMAP5_SEVM;
65         gd->bd->bi_boot_params = (0x80000000 + 0x100); /* boot param addr */
66
67         tca642x_set_inital_state(CONFIG_SYS_I2C_TCA642X_ADDR, tca642x_init);
68
69         return 0;
70 }
71
72 int board_late_init(void)
73 {
74         init_sata(0);
75         return 0;
76 }
77
78 int board_eth_init(bd_t *bis)
79 {
80         return 0;
81 }
82
83 #if defined(CONFIG_USB_EHCI) || defined(CONFIG_USB_XHCI_OMAP)
84 static void enable_host_clocks(void)
85 {
86         int auxclk;
87         int hs_clk_ctrl_val = (OPTFCLKEN_HSIC60M_P3_CLK |
88                                 OPTFCLKEN_HSIC480M_P3_CLK |
89                                 OPTFCLKEN_HSIC60M_P2_CLK |
90                                 OPTFCLKEN_HSIC480M_P2_CLK |
91                                 OPTFCLKEN_UTMI_P3_CLK | OPTFCLKEN_UTMI_P2_CLK);
92
93         /* Enable port 2 and 3 clocks*/
94         setbits_le32((*prcm)->cm_l3init_hsusbhost_clkctrl, hs_clk_ctrl_val);
95
96         /* Enable port 2 and 3 usb host ports tll clocks*/
97         setbits_le32((*prcm)->cm_l3init_hsusbtll_clkctrl,
98                         (OPTFCLKEN_USB_CH1_CLK_ENABLE | OPTFCLKEN_USB_CH2_CLK_ENABLE));
99 #ifdef CONFIG_USB_XHCI_OMAP
100         /* Enable the USB OTG Super speed clocks */
101         setbits_le32((*prcm)->cm_l3init_usb_otg_ss_clkctrl,
102                         (OPTFCLKEN_REFCLK960M | OTG_SS_CLKCTRL_MODULEMODE_HW));
103 #endif
104
105         auxclk = readl((*prcm)->scrm_auxclk1);
106         /* Request auxilary clock */
107         auxclk |= AUXCLK_ENABLE_MASK;
108         writel(auxclk, (*prcm)->scrm_auxclk1);
109 }
110 #endif
111
112 /**
113  * @brief misc_init_r - Configure EVM board specific configurations
114  * such as power configurations, ethernet initialization as phase2 of
115  * boot sequence
116  *
117  * @return 0
118  */
119 int misc_init_r(void)
120 {
121         int reg;
122         uint8_t device_mac[6];
123
124 #ifdef CONFIG_PALMAS_POWER
125         palmas_init_settings();
126 #endif
127
128         if (!getenv("usbethaddr")) {
129                 reg = DIE_ID_REG_BASE + DIE_ID_REG_OFFSET;
130
131                 /*
132                  * create a fake MAC address from the processor ID code.
133                  * first byte is 0x02 to signify locally administered.
134                  */
135                 device_mac[0] = 0x02;
136                 device_mac[1] = readl(reg + 0x10) & 0xff;
137                 device_mac[2] = readl(reg + 0xC) & 0xff;
138                 device_mac[3] = readl(reg + 0x8) & 0xff;
139                 device_mac[4] = readl(reg) & 0xff;
140                 device_mac[5] = (readl(reg) >> 8) & 0xff;
141
142                 eth_setenv_enetaddr("usbethaddr", device_mac);
143         }
144
145         return 0;
146 }
147
148 void set_muxconf_regs_essential(void)
149 {
150         do_set_mux((*ctrl)->control_padconf_core_base,
151                    core_padconf_array_essential,
152                    sizeof(core_padconf_array_essential) /
153                    sizeof(struct pad_conf_entry));
154
155         do_set_mux((*ctrl)->control_padconf_wkup_base,
156                    wkup_padconf_array_essential,
157                    sizeof(wkup_padconf_array_essential) /
158                    sizeof(struct pad_conf_entry));
159 }
160
161 #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_GENERIC_MMC)
162 int board_mmc_init(bd_t *bis)
163 {
164         omap_mmc_init(0, 0, 0, -1, -1);
165         omap_mmc_init(1, 0, 0, -1, -1);
166         return 0;
167 }
168 #endif
169
170 #ifdef CONFIG_USB_EHCI
171 static struct omap_usbhs_board_data usbhs_bdata = {
172         .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
173         .port_mode[1] = OMAP_EHCI_PORT_MODE_HSIC,
174         .port_mode[2] = OMAP_EHCI_PORT_MODE_HSIC,
175 };
176
177 int ehci_hcd_init(int index, enum usb_init_type init,
178                 struct ehci_hccr **hccr, struct ehci_hcor **hcor)
179 {
180         int ret;
181
182         enable_host_clocks();
183
184         ret = omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor);
185         if (ret < 0) {
186                 puts("Failed to initialize ehci\n");
187                 return ret;
188         }
189
190         return 0;
191 }
192
193 int ehci_hcd_stop(void)
194 {
195         int ret;
196
197         ret = omap_ehci_hcd_stop();
198         return ret;
199 }
200
201 void usb_hub_reset_devices(int port)
202 {
203         /* The LAN9730 needs to be reset after the port power has been set. */
204         if (port == 3) {
205                 gpio_direction_output(CONFIG_OMAP_EHCI_PHY3_RESET_GPIO, 0);
206                 udelay(10);
207                 gpio_direction_output(CONFIG_OMAP_EHCI_PHY3_RESET_GPIO, 1);
208         }
209 }
210 #endif
211
212 #ifdef CONFIG_USB_XHCI_OMAP
213 /**
214  * @brief board_usb_init - Configure EVM board specific configurations
215  * for the LDO's and clocks for the USB blocks.
216  *
217  * @return 0
218  */
219 int board_usb_init(int index, enum usb_init_type init)
220 {
221         int ret;
222 #ifdef CONFIG_PALMAS_USB_SS_PWR
223         ret = palmas_enable_ss_ldo();
224 #endif
225
226         enable_host_clocks();
227
228         return 0;
229 }
230 #endif