drivers/misc/mxc_ocotp.c

   1 /*
   2  * (C) Copyright 2013 ADVANSEE
   3  * Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
   4  *
   5  * Based on Dirk Behme's
   6  * https://github.com/dirkbehme/u-boot-imx6/blob/28b17e9/drivers/misc/imx_otp.c,
   7  * which is based on Freescale's
   8  * http://git.freescale.com/git/cgit.cgi/imx/uboot-imx.git/tree/drivers/misc/imx_otp.c?h=imx_v2009.08_1.1.0&id=9aa74e6,
   9  * which is:
  10  * Copyright (C) 2011 Freescale Semiconductor, Inc.
  11  *
  12  * SPDX-License-Identifier:     GPL-2.0+
  13  */
  14
  15 #include <common.h>
  16 #include <fuse.h>
  17 #include <asm/errno.h>
  18 #include <asm/io.h>
  19 #include <asm/arch/clock.h>
  20 #include <asm/arch/imx-regs.h>
  21
  22 #define BO_CTRL_WR_UNLOCK               16
  23 #define BM_CTRL_WR_UNLOCK               0xffff0000
  24 #define BV_CTRL_WR_UNLOCK_KEY           0x3e77
  25 #define BM_CTRL_ERROR                   0x00000200
  26 #define BM_CTRL_BUSY                    0x00000100
  27 #define BO_CTRL_ADDR                    0
  28 #define BM_CTRL_ADDR                    0x0000007f
  29
  30 #define BO_TIMING_STROBE_READ           16
  31 #define BM_TIMING_STROBE_READ           0x003f0000
  32 #define BV_TIMING_STROBE_READ_NS        37
  33 #define BO_TIMING_RELAX                 12
  34 #define BM_TIMING_RELAX                 0x0000f000
  35 #define BV_TIMING_RELAX_NS              17
  36 #define BO_TIMING_STROBE_PROG           0
  37 #define BM_TIMING_STROBE_PROG           0x00000fff
  38 #define BV_TIMING_STROBE_PROG_US        10
  39
  40 #define BM_READ_CTRL_READ_FUSE          0x00000001
  41
  42 #define BF(value, field)                (((value) << BO_##field) & BM_##field)
  43
  44 #define WRITE_POSTAMBLE_US              2
  45 #define MXC_OTP_BUSY_TIMEOUT            1000
  46
  47 static bool wait_busy(struct ocotp_regs *regs, unsigned int delay_us)
  48 {
  49         unsigned long start;
  50         u32 reg;
  51
  52         start = get_timer_masked();
  53         while ((reg = readl(&regs->ctrl)) & BM_CTRL_BUSY) {
  54                 udelay(delay_us);
  55                 if (get_timer(start) > MXC_OTP_BUSY_TIMEOUT)
  56                         break;
  57         }
  58         if (!(reg & BM_CTRL_BUSY))
  59                 return 1;
  60         return !(readl(&regs->ctrl) & BM_CTRL_BUSY);
  61 }
  62
  63 static void clear_error(struct ocotp_regs *regs)
  64 {
  65         writel(BM_CTRL_ERROR, &regs->ctrl_clr);
  66 }
  67
  68 static int prepare_access(struct ocotp_regs **regs, u32 bank, u32 word,
  69                                 int assert, const char *caller)
  70 {
  71         *regs = (struct ocotp_regs *)OCOTP_BASE_ADDR;
  72
  73         if (bank >= ARRAY_SIZE((*regs)->bank) ||
  74                         word >= ARRAY_SIZE((*regs)->bank[0].fuse_regs) ||
  75                         !assert) {
  76                 printf("mxc_ocotp %s(): Invalid argument\n", caller);
  77                 return -EINVAL;
  78         }
  79
  80         enable_ocotp_clk(1);
  81
  82         if (wait_busy(*regs, 1))
  83                 clear_error(*regs);
  84         else
  85                 return -ETIMEDOUT;
  86
  87         return 0;
  88 }
  89
  90 static int finish_access(struct ocotp_regs *regs, const char *caller)
  91 {
  92         u32 err;
  93
  94         err = !!(readl(&regs->ctrl) & BM_CTRL_ERROR);
  95         clear_error(regs);
  96         enable_ocotp_clk(0);
  97
  98         if (err) {
  99                 printf("mxc_ocotp %s(): Access protect error\n", caller);
 100                 return -EIO;
 101         }
 102
 103         return 0;
 104 }
 105
 106 static int prepare_read(struct ocotp_regs **regs, u32 bank, u32 word, u32 *val,
 107                         const char *caller)
 108 {
 109         return prepare_access(regs, bank, word, val != NULL, caller);
 110 }
 111
 112 int fuse_read(u32 bank, u32 word, u32 *val)
 113 {
 114         struct ocotp_regs *regs;
 115         int ret;
 116
 117         ret = prepare_read(&regs, bank, word, val, __func__);
 118         if (ret)
 119                 return ret;
 120
 121         *val = readl(&regs->bank[bank].fuse_regs[word << 2]);
 122
 123         return finish_access(regs, __func__);
 124 }
 125
 126 static void set_timing(struct ocotp_regs *regs)
 127 {
 128         u32 ipg_clk;
 129         u32 relax, strobe_read, strobe_prog;
 130         u32 timing;
 131
 132         ipg_clk = mxc_get_clock(MXC_IPG_CLK);
 133
 134         relax = DIV_ROUND_UP(ipg_clk * BV_TIMING_RELAX_NS, 1000000000) - 1;
 135         strobe_read = DIV_ROUND_UP(ipg_clk * BV_TIMING_STROBE_READ_NS,
 136                                         1000000000) + 2 * (relax + 1) - 1;
 137         strobe_prog = DIV_ROUND_CLOSEST(ipg_clk * BV_TIMING_STROBE_PROG_US,
 138                                                 1000000) + 2 * (relax + 1) - 1;
 139
 140         timing = BF(strobe_read, TIMING_STROBE_READ) |
 141                         BF(relax, TIMING_RELAX) |
 142                         BF(strobe_prog, TIMING_STROBE_PROG);
 143
 144         clrsetbits_le32(&regs->timing, BM_TIMING_STROBE_READ | BM_TIMING_RELAX |
 145                         BM_TIMING_STROBE_PROG, timing);
 146 }
 147
 148 static void setup_direct_access(struct ocotp_regs *regs, u32 bank, u32 word,
 149                                 int write)
 150 {
 151         u32 wr_unlock = write ? BV_CTRL_WR_UNLOCK_KEY : 0;
 152         u32 addr = bank << 3 | word;
 153
 154         set_timing(regs);
 155         clrsetbits_le32(&regs->ctrl, BM_CTRL_WR_UNLOCK | BM_CTRL_ADDR,
 156                         BF(wr_unlock, CTRL_WR_UNLOCK) |
 157                         BF(addr, CTRL_ADDR));
 158 }
 159
 160 int fuse_sense(u32 bank, u32 word, u32 *val)
 161 {
 162         struct ocotp_regs *regs;
 163         int ret;
 164
 165         ret = prepare_read(&regs, bank, word, val, __func__);
 166         if (ret)
 167                 return ret;
 168
 169         setup_direct_access(regs, bank, word, false);
 170         writel(BM_READ_CTRL_READ_FUSE, &regs->read_ctrl);
 171         if (wait_busy(regs, 1))
 172                 *val = readl(&regs->read_fuse_data);
 173         else
 174                 *val = ~0;
 175
 176         return finish_access(regs, __func__);
 177 }
 178
 179 static int prepare_write(struct ocotp_regs **regs, u32 bank, u32 word,
 180                                 const char *caller)
 181 {
 182         return prepare_access(regs, bank, word, true, caller);
 183 }
 184
 185 int fuse_prog(u32 bank, u32 word, u32 val)
 186 {
 187         struct ocotp_regs *regs;
 188         int ret;
 189
 190         ret = prepare_write(&regs, bank, word, __func__);
 191         if (ret)
 192                 return ret;
 193
 194         setup_direct_access(regs, bank, word, true);
 195         writel(val, &regs->data);
 196         wait_busy(regs, BV_TIMING_STROBE_PROG_US);
 197         udelay(WRITE_POSTAMBLE_US);
 198
 199         return finish_access(regs, __func__);
 200 }
 201
 202 int fuse_override(u32 bank, u32 word, u32 val)
 203 {
 204         struct ocotp_regs *regs;
 205         int ret;
 206
 207         ret = prepare_write(&regs, bank, word, __func__);
 208         if (ret)
 209                 return ret;
 210
 211         writel(val, &regs->bank[bank].fuse_regs[word << 2]);
 212
 213         return finish_access(regs, __func__);
 214 }