2 * Copyright 2008, Freescale Semiconductor, Inc
5 * Based vaguely on the Linux code
7 * SPDX-License-Identifier: GPL-2.0+
17 #include <linux/list.h>
19 #include "mmc_private.h"
21 static struct list_head mmc_devices;
22 static int cur_dev_num = -1;
23 static int mmc_dev_count;
25 __weak int board_mmc_getwp(struct mmc *mmc)
30 int mmc_getwp(struct mmc *mmc)
34 wp = board_mmc_getwp(mmc);
37 if (mmc->cfg->ops->getwp)
38 wp = mmc->cfg->ops->getwp(mmc);
46 __weak int board_mmc_getcd(struct mmc *mmc)
51 int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
55 #ifdef CONFIG_MMC_TRACE
59 printf("CMD_SEND:%d\n", cmd->cmdidx);
60 printf("\t\tARG\t\t\t 0x%08X\n", cmd->cmdarg);
61 ret = mmc->cfg->ops->send_cmd(mmc, cmd, data);
62 switch (cmd->resp_type) {
64 printf("\t\tMMC_RSP_NONE\n");
67 printf("\t\tMMC_RSP_R1,5,6,7 \t 0x%08X \n",
71 printf("\t\tMMC_RSP_R1b\t\t 0x%08X \n",
75 printf("\t\tMMC_RSP_R2\t\t 0x%08X \n",
77 printf("\t\t \t\t 0x%08X \n",
79 printf("\t\t \t\t 0x%08X \n",
81 printf("\t\t \t\t 0x%08X \n",
84 printf("\t\t\t\t\tDUMPING DATA\n");
85 for (i = 0; i < 4; i++) {
87 printf("\t\t\t\t\t%03d - ", i*4);
88 ptr = (u8 *)&cmd->response[i];
90 for (j = 0; j < 4; j++)
91 printf("%02X ", *ptr--);
96 printf("\t\tMMC_RSP_R3,4\t\t 0x%08X \n",
100 printf("\t\tERROR MMC rsp not supported\n");
104 ret = mmc->cfg->ops->send_cmd(mmc, cmd, data);
109 int mmc_send_status(struct mmc *mmc, int timeout)
112 int err, retries = 5;
113 #ifdef CONFIG_MMC_TRACE
117 cmd.cmdidx = MMC_CMD_SEND_STATUS;
118 cmd.resp_type = MMC_RSP_R1;
119 if (!mmc_host_is_spi(mmc))
120 cmd.cmdarg = mmc->rca << 16;
123 err = mmc_send_cmd(mmc, &cmd, NULL);
125 if ((cmd.response[0] & MMC_STATUS_RDY_FOR_DATA) &&
126 (cmd.response[0] & MMC_STATUS_CURR_STATE) !=
129 else if (cmd.response[0] & MMC_STATUS_MASK) {
130 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
131 printf("Status Error: 0x%08X\n",
136 } else if (--retries < 0)
143 #ifdef CONFIG_MMC_TRACE
144 status = (cmd.response[0] & MMC_STATUS_CURR_STATE) >> 9;
145 printf("CURR STATE:%d\n", status);
148 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
149 printf("Timeout waiting card ready\n");
153 if (cmd.response[0] & MMC_STATUS_SWITCH_ERROR)
159 int mmc_set_blocklen(struct mmc *mmc, int len)
166 cmd.cmdidx = MMC_CMD_SET_BLOCKLEN;
167 cmd.resp_type = MMC_RSP_R1;
170 return mmc_send_cmd(mmc, &cmd, NULL);
173 struct mmc *find_mmc_device(int dev_num)
176 struct list_head *entry;
178 list_for_each(entry, &mmc_devices) {
179 m = list_entry(entry, struct mmc, link);
181 if (m->block_dev.dev == dev_num)
185 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
186 printf("MMC Device %d not found\n", dev_num);
192 static int mmc_read_blocks(struct mmc *mmc, void *dst, lbaint_t start,
196 struct mmc_data data;
199 cmd.cmdidx = MMC_CMD_READ_MULTIPLE_BLOCK;
201 cmd.cmdidx = MMC_CMD_READ_SINGLE_BLOCK;
203 if (mmc->high_capacity)
206 cmd.cmdarg = start * mmc->read_bl_len;
208 cmd.resp_type = MMC_RSP_R1;
211 data.blocks = blkcnt;
212 data.blocksize = mmc->read_bl_len;
213 data.flags = MMC_DATA_READ;
215 if (mmc_send_cmd(mmc, &cmd, &data))
219 cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION;
221 cmd.resp_type = MMC_RSP_R1b;
222 if (mmc_send_cmd(mmc, &cmd, NULL)) {
223 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
224 printf("mmc fail to send stop cmd\n");
233 static ulong mmc_bread(int dev_num, lbaint_t start, lbaint_t blkcnt, void *dst)
235 lbaint_t cur, blocks_todo = blkcnt;
240 struct mmc *mmc = find_mmc_device(dev_num);
244 if ((start + blkcnt) > mmc->block_dev.lba) {
245 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
246 printf("MMC: block number 0x" LBAF " exceeds max(0x" LBAF ")\n",
247 start + blkcnt, mmc->block_dev.lba);
252 if (mmc_set_blocklen(mmc, mmc->read_bl_len))
256 cur = (blocks_todo > mmc->cfg->b_max) ?
257 mmc->cfg->b_max : blocks_todo;
258 if(mmc_read_blocks(mmc, dst, start, cur) != cur)
262 dst += cur * mmc->read_bl_len;
263 } while (blocks_todo > 0);
268 static int mmc_go_idle(struct mmc *mmc)
275 cmd.cmdidx = MMC_CMD_GO_IDLE_STATE;
277 cmd.resp_type = MMC_RSP_NONE;
279 err = mmc_send_cmd(mmc, &cmd, NULL);
289 static int sd_send_op_cond(struct mmc *mmc)
296 cmd.cmdidx = MMC_CMD_APP_CMD;
297 cmd.resp_type = MMC_RSP_R1;
300 err = mmc_send_cmd(mmc, &cmd, NULL);
305 cmd.cmdidx = SD_CMD_APP_SEND_OP_COND;
306 cmd.resp_type = MMC_RSP_R3;
309 * Most cards do not answer if some reserved bits
310 * in the ocr are set. However, Some controller
311 * can set bit 7 (reserved for low voltages), but
312 * how to manage low voltages SD card is not yet
315 cmd.cmdarg = mmc_host_is_spi(mmc) ? 0 :
316 (mmc->cfg->voltages & 0xff8000);
318 if (mmc->version == SD_VERSION_2)
319 cmd.cmdarg |= OCR_HCS;
321 err = mmc_send_cmd(mmc, &cmd, NULL);
327 } while ((!(cmd.response[0] & OCR_BUSY)) && timeout--);
328 if (!(cmd.response[0] & OCR_BUSY))
331 if (mmc->version != SD_VERSION_2)
332 mmc->version = SD_VERSION_1_0;
334 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
335 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
336 cmd.resp_type = MMC_RSP_R3;
339 err = mmc_send_cmd(mmc, &cmd, NULL);
345 mmc->ocr = cmd.response[0];
347 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
353 /* We pass in the cmd since otherwise the init seems to fail */
354 static int mmc_send_op_cond_iter(struct mmc *mmc, struct mmc_cmd *cmd,
359 cmd->cmdidx = MMC_CMD_SEND_OP_COND;
360 cmd->resp_type = MMC_RSP_R3;
362 if (use_arg && !mmc_host_is_spi(mmc)) {
364 (mmc->cfg->voltages &
365 (mmc->op_cond_response & OCR_VOLTAGE_MASK)) |
366 (mmc->op_cond_response & OCR_ACCESS_MODE);
368 if (mmc->cfg->host_caps & MMC_MODE_HC)
369 cmd->cmdarg |= OCR_HCS;
371 err = mmc_send_cmd(mmc, cmd, NULL);
374 mmc->op_cond_response = cmd->response[0];
378 static int mmc_send_op_cond(struct mmc *mmc)
383 /* Some cards seem to need this */
386 /* Asking to the card its capabilities */
387 mmc->op_cond_pending = 1;
388 for (i = 0; i < 2; i++) {
389 err = mmc_send_op_cond_iter(mmc, &cmd, i != 0);
393 /* exit if not busy (flag seems to be inverted) */
394 if (mmc->op_cond_response & OCR_BUSY)
400 static int mmc_complete_op_cond(struct mmc *mmc)
407 mmc->op_cond_pending = 0;
408 start = get_timer(0);
410 err = mmc_send_op_cond_iter(mmc, &cmd, 1);
413 if (get_timer(start) > timeout)
416 } while (!(mmc->op_cond_response & OCR_BUSY));
417 if (!(mmc->op_cond_response & OCR_BUSY)) {
418 debug("%s: timeout\n", __func__);
422 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
423 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
424 cmd.resp_type = MMC_RSP_R3;
427 err = mmc_send_cmd(mmc, &cmd, NULL);
433 mmc->version = MMC_VERSION_UNKNOWN;
434 mmc->ocr = cmd.response[0];
436 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
443 static int mmc_send_ext_csd(struct mmc *mmc, u8 *ext_csd)
446 struct mmc_data data;
449 /* Get the Card Status Register */
450 cmd.cmdidx = MMC_CMD_SEND_EXT_CSD;
451 cmd.resp_type = MMC_RSP_R1;
454 data.dest = (char *)ext_csd;
456 data.blocksize = MMC_MAX_BLOCK_LEN;
457 data.flags = MMC_DATA_READ;
459 err = mmc_send_cmd(mmc, &cmd, &data);
465 static int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value)
471 cmd.cmdidx = MMC_CMD_SWITCH;
472 cmd.resp_type = MMC_RSP_R1b;
473 cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) |
477 ret = mmc_send_cmd(mmc, &cmd, NULL);
479 /* Waiting for the ready status */
481 ret = mmc_send_status(mmc, timeout);
487 static int mmc_change_freq(struct mmc *mmc)
489 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
495 if (mmc_host_is_spi(mmc))
498 /* Only version 4 supports high-speed */
499 if (mmc->version < MMC_VERSION_4)
502 mmc->card_caps |= MMC_MODE_4BIT | MMC_MODE_8BIT;
504 err = mmc_send_ext_csd(mmc, ext_csd);
509 cardtype = ext_csd[EXT_CSD_CARD_TYPE] & 0xf;
511 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, 1);
514 return err == SWITCH_ERR ? 0 : err;
516 /* Now check to see that it worked */
517 err = mmc_send_ext_csd(mmc, ext_csd);
522 /* No high-speed support */
523 if (!ext_csd[EXT_CSD_HS_TIMING])
526 /* High Speed is set, there are two types: 52MHz and 26MHz */
527 if (cardtype & EXT_CSD_CARD_TYPE_52) {
528 if (cardtype & EXT_CSD_CARD_TYPE_DDR_1_8V)
529 mmc->card_caps |= MMC_MODE_DDR_52MHz;
530 mmc->card_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
532 mmc->card_caps |= MMC_MODE_HS;
538 static int mmc_set_capacity(struct mmc *mmc, int part_num)
542 mmc->capacity = mmc->capacity_user;
546 mmc->capacity = mmc->capacity_boot;
549 mmc->capacity = mmc->capacity_rpmb;
555 mmc->capacity = mmc->capacity_gp[part_num - 4];
561 mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len);
566 int mmc_select_hwpart(int dev_num, int hwpart)
568 struct mmc *mmc = find_mmc_device(dev_num);
574 if (mmc->part_num == hwpart)
577 if (mmc->part_config == MMCPART_NOAVAILABLE) {
578 printf("Card doesn't support part_switch\n");
582 ret = mmc_switch_part(dev_num, hwpart);
586 mmc->part_num = hwpart;
592 int mmc_switch_part(int dev_num, unsigned int part_num)
594 struct mmc *mmc = find_mmc_device(dev_num);
600 ret = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
601 (mmc->part_config & ~PART_ACCESS_MASK)
602 | (part_num & PART_ACCESS_MASK));
605 * Set the capacity if the switch succeeded or was intended
606 * to return to representing the raw device.
608 if ((ret == 0) || ((ret == -ENODEV) && (part_num == 0)))
609 ret = mmc_set_capacity(mmc, part_num);
614 int mmc_hwpart_config(struct mmc *mmc,
615 const struct mmc_hwpart_conf *conf,
616 enum mmc_hwpart_conf_mode mode)
622 u32 max_enh_size_mult;
623 u32 tot_enh_size_mult = 0;
626 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
628 if (mode < MMC_HWPART_CONF_CHECK || mode > MMC_HWPART_CONF_COMPLETE)
631 if (IS_SD(mmc) || (mmc->version < MMC_VERSION_4_41)) {
632 printf("eMMC >= 4.4 required for enhanced user data area\n");
636 if (!(mmc->part_support & PART_SUPPORT)) {
637 printf("Card does not support partitioning\n");
641 if (!mmc->hc_wp_grp_size) {
642 printf("Card does not define HC WP group size\n");
646 /* check partition alignment and total enhanced size */
647 if (conf->user.enh_size) {
648 if (conf->user.enh_size % mmc->hc_wp_grp_size ||
649 conf->user.enh_start % mmc->hc_wp_grp_size) {
650 printf("User data enhanced area not HC WP group "
654 part_attrs |= EXT_CSD_ENH_USR;
655 enh_size_mult = conf->user.enh_size / mmc->hc_wp_grp_size;
656 if (mmc->high_capacity) {
657 enh_start_addr = conf->user.enh_start;
659 enh_start_addr = (conf->user.enh_start << 9);
665 tot_enh_size_mult += enh_size_mult;
667 for (pidx = 0; pidx < 4; pidx++) {
668 if (conf->gp_part[pidx].size % mmc->hc_wp_grp_size) {
669 printf("GP%i partition not HC WP group size "
670 "aligned\n", pidx+1);
673 gp_size_mult[pidx] = conf->gp_part[pidx].size / mmc->hc_wp_grp_size;
674 if (conf->gp_part[pidx].size && conf->gp_part[pidx].enhanced) {
675 part_attrs |= EXT_CSD_ENH_GP(pidx);
676 tot_enh_size_mult += gp_size_mult[pidx];
680 if (part_attrs && ! (mmc->part_support & ENHNCD_SUPPORT)) {
681 printf("Card does not support enhanced attribute\n");
685 err = mmc_send_ext_csd(mmc, ext_csd);
690 (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+2] << 16) +
691 (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+1] << 8) +
692 ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT];
693 if (tot_enh_size_mult > max_enh_size_mult) {
694 printf("Total enhanced size exceeds maximum (%u > %u)\n",
695 tot_enh_size_mult, max_enh_size_mult);
699 /* The default value of EXT_CSD_WR_REL_SET is device
700 * dependent, the values can only be changed if the
701 * EXT_CSD_HS_CTRL_REL bit is set. The values can be
702 * changed only once and before partitioning is completed. */
703 wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET];
704 if (conf->user.wr_rel_change) {
705 if (conf->user.wr_rel_set)
706 wr_rel_set |= EXT_CSD_WR_DATA_REL_USR;
708 wr_rel_set &= ~EXT_CSD_WR_DATA_REL_USR;
710 for (pidx = 0; pidx < 4; pidx++) {
711 if (conf->gp_part[pidx].wr_rel_change) {
712 if (conf->gp_part[pidx].wr_rel_set)
713 wr_rel_set |= EXT_CSD_WR_DATA_REL_GP(pidx);
715 wr_rel_set &= ~EXT_CSD_WR_DATA_REL_GP(pidx);
719 if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET] &&
720 !(ext_csd[EXT_CSD_WR_REL_PARAM] & EXT_CSD_HS_CTRL_REL)) {
721 puts("Card does not support host controlled partition write "
722 "reliability settings\n");
726 if (ext_csd[EXT_CSD_PARTITION_SETTING] &
727 EXT_CSD_PARTITION_SETTING_COMPLETED) {
728 printf("Card already partitioned\n");
732 if (mode == MMC_HWPART_CONF_CHECK)
735 /* Partitioning requires high-capacity size definitions */
736 if (!(ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01)) {
737 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
738 EXT_CSD_ERASE_GROUP_DEF, 1);
743 ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1;
745 /* update erase group size to be high-capacity */
746 mmc->erase_grp_size =
747 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024;
751 /* all OK, write the configuration */
752 for (i = 0; i < 4; i++) {
753 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
754 EXT_CSD_ENH_START_ADDR+i,
755 (enh_start_addr >> (i*8)) & 0xFF);
759 for (i = 0; i < 3; i++) {
760 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
761 EXT_CSD_ENH_SIZE_MULT+i,
762 (enh_size_mult >> (i*8)) & 0xFF);
766 for (pidx = 0; pidx < 4; pidx++) {
767 for (i = 0; i < 3; i++) {
768 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
769 EXT_CSD_GP_SIZE_MULT+pidx*3+i,
770 (gp_size_mult[pidx] >> (i*8)) & 0xFF);
775 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
776 EXT_CSD_PARTITIONS_ATTRIBUTE, part_attrs);
780 if (mode == MMC_HWPART_CONF_SET)
783 /* The WR_REL_SET is a write-once register but shall be
784 * written before setting PART_SETTING_COMPLETED. As it is
785 * write-once we can only write it when completing the
787 if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET]) {
788 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
789 EXT_CSD_WR_REL_SET, wr_rel_set);
794 /* Setting PART_SETTING_COMPLETED confirms the partition
795 * configuration but it only becomes effective after power
796 * cycle, so we do not adjust the partition related settings
797 * in the mmc struct. */
799 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
800 EXT_CSD_PARTITION_SETTING,
801 EXT_CSD_PARTITION_SETTING_COMPLETED);
808 int mmc_getcd(struct mmc *mmc)
812 cd = board_mmc_getcd(mmc);
815 if (mmc->cfg->ops->getcd)
816 cd = mmc->cfg->ops->getcd(mmc);
824 static int sd_switch(struct mmc *mmc, int mode, int group, u8 value, u8 *resp)
827 struct mmc_data data;
829 /* Switch the frequency */
830 cmd.cmdidx = SD_CMD_SWITCH_FUNC;
831 cmd.resp_type = MMC_RSP_R1;
832 cmd.cmdarg = (mode << 31) | 0xffffff;
833 cmd.cmdarg &= ~(0xf << (group * 4));
834 cmd.cmdarg |= value << (group * 4);
836 data.dest = (char *)resp;
839 data.flags = MMC_DATA_READ;
841 return mmc_send_cmd(mmc, &cmd, &data);
845 static int sd_change_freq(struct mmc *mmc)
849 ALLOC_CACHE_ALIGN_BUFFER(uint, scr, 2);
850 ALLOC_CACHE_ALIGN_BUFFER(uint, switch_status, 16);
851 struct mmc_data data;
856 if (mmc_host_is_spi(mmc))
859 /* Read the SCR to find out if this card supports higher speeds */
860 cmd.cmdidx = MMC_CMD_APP_CMD;
861 cmd.resp_type = MMC_RSP_R1;
862 cmd.cmdarg = mmc->rca << 16;
864 err = mmc_send_cmd(mmc, &cmd, NULL);
869 cmd.cmdidx = SD_CMD_APP_SEND_SCR;
870 cmd.resp_type = MMC_RSP_R1;
876 data.dest = (char *)scr;
879 data.flags = MMC_DATA_READ;
881 err = mmc_send_cmd(mmc, &cmd, &data);
890 mmc->scr[0] = __be32_to_cpu(scr[0]);
891 mmc->scr[1] = __be32_to_cpu(scr[1]);
893 switch ((mmc->scr[0] >> 24) & 0xf) {
895 mmc->version = SD_VERSION_1_0;
898 mmc->version = SD_VERSION_1_10;
901 mmc->version = SD_VERSION_2;
902 if ((mmc->scr[0] >> 15) & 0x1)
903 mmc->version = SD_VERSION_3;
906 mmc->version = SD_VERSION_1_0;
910 if (mmc->scr[0] & SD_DATA_4BIT)
911 mmc->card_caps |= MMC_MODE_4BIT;
913 /* Version 1.0 doesn't support switching */
914 if (mmc->version == SD_VERSION_1_0)
919 err = sd_switch(mmc, SD_SWITCH_CHECK, 0, 1,
920 (u8 *)switch_status);
925 /* The high-speed function is busy. Try again */
926 if (!(__be32_to_cpu(switch_status[7]) & SD_HIGHSPEED_BUSY))
930 /* If high-speed isn't supported, we return */
931 if (!(__be32_to_cpu(switch_status[3]) & SD_HIGHSPEED_SUPPORTED))
935 * If the host doesn't support SD_HIGHSPEED, do not switch card to
936 * HIGHSPEED mode even if the card support SD_HIGHSPPED.
937 * This can avoid furthur problem when the card runs in different
938 * mode between the host.
940 if (!((mmc->cfg->host_caps & MMC_MODE_HS_52MHz) &&
941 (mmc->cfg->host_caps & MMC_MODE_HS)))
944 err = sd_switch(mmc, SD_SWITCH_SWITCH, 0, 1, (u8 *)switch_status);
949 if ((__be32_to_cpu(switch_status[4]) & 0x0f000000) == 0x01000000)
950 mmc->card_caps |= MMC_MODE_HS;
955 /* frequency bases */
956 /* divided by 10 to be nice to platforms without floating point */
957 static const int fbase[] = {
964 /* Multiplier values for TRAN_SPEED. Multiplied by 10 to be nice
965 * to platforms without floating point.
967 static const int multipliers[] = {
986 static void mmc_set_ios(struct mmc *mmc)
988 if (mmc->cfg->ops->set_ios)
989 mmc->cfg->ops->set_ios(mmc);
992 void mmc_set_clock(struct mmc *mmc, uint clock)
994 if (clock > mmc->cfg->f_max)
995 clock = mmc->cfg->f_max;
997 if (clock < mmc->cfg->f_min)
998 clock = mmc->cfg->f_min;
1005 static void mmc_set_bus_width(struct mmc *mmc, uint width)
1007 mmc->bus_width = width;
1012 static int mmc_startup(struct mmc *mmc)
1016 u64 cmult, csize, capacity;
1018 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
1019 ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, MMC_MAX_BLOCK_LEN);
1021 bool has_parts = false;
1022 bool part_completed;
1024 #ifdef CONFIG_MMC_SPI_CRC_ON
1025 if (mmc_host_is_spi(mmc)) { /* enable CRC check for spi */
1026 cmd.cmdidx = MMC_CMD_SPI_CRC_ON_OFF;
1027 cmd.resp_type = MMC_RSP_R1;
1029 err = mmc_send_cmd(mmc, &cmd, NULL);
1036 /* Put the Card in Identify Mode */
1037 cmd.cmdidx = mmc_host_is_spi(mmc) ? MMC_CMD_SEND_CID :
1038 MMC_CMD_ALL_SEND_CID; /* cmd not supported in spi */
1039 cmd.resp_type = MMC_RSP_R2;
1042 err = mmc_send_cmd(mmc, &cmd, NULL);
1047 memcpy(mmc->cid, cmd.response, 16);
1050 * For MMC cards, set the Relative Address.
1051 * For SD cards, get the Relatvie Address.
1052 * This also puts the cards into Standby State
1054 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
1055 cmd.cmdidx = SD_CMD_SEND_RELATIVE_ADDR;
1056 cmd.cmdarg = mmc->rca << 16;
1057 cmd.resp_type = MMC_RSP_R6;
1059 err = mmc_send_cmd(mmc, &cmd, NULL);
1065 mmc->rca = (cmd.response[0] >> 16) & 0xffff;
1068 /* Get the Card-Specific Data */
1069 cmd.cmdidx = MMC_CMD_SEND_CSD;
1070 cmd.resp_type = MMC_RSP_R2;
1071 cmd.cmdarg = mmc->rca << 16;
1073 err = mmc_send_cmd(mmc, &cmd, NULL);
1075 /* Waiting for the ready status */
1076 mmc_send_status(mmc, timeout);
1081 mmc->csd[0] = cmd.response[0];
1082 mmc->csd[1] = cmd.response[1];
1083 mmc->csd[2] = cmd.response[2];
1084 mmc->csd[3] = cmd.response[3];
1086 if (mmc->version == MMC_VERSION_UNKNOWN) {
1087 int version = (cmd.response[0] >> 26) & 0xf;
1091 mmc->version = MMC_VERSION_1_2;
1094 mmc->version = MMC_VERSION_1_4;
1097 mmc->version = MMC_VERSION_2_2;
1100 mmc->version = MMC_VERSION_3;
1103 mmc->version = MMC_VERSION_4;
1106 mmc->version = MMC_VERSION_1_2;
1111 /* divide frequency by 10, since the mults are 10x bigger */
1112 freq = fbase[(cmd.response[0] & 0x7)];
1113 mult = multipliers[((cmd.response[0] >> 3) & 0xf)];
1115 mmc->tran_speed = freq * mult;
1117 mmc->dsr_imp = ((cmd.response[1] >> 12) & 0x1);
1118 mmc->read_bl_len = 1 << ((cmd.response[1] >> 16) & 0xf);
1121 mmc->write_bl_len = mmc->read_bl_len;
1123 mmc->write_bl_len = 1 << ((cmd.response[3] >> 22) & 0xf);
1125 if (mmc->high_capacity) {
1126 csize = (mmc->csd[1] & 0x3f) << 16
1127 | (mmc->csd[2] & 0xffff0000) >> 16;
1130 csize = (mmc->csd[1] & 0x3ff) << 2
1131 | (mmc->csd[2] & 0xc0000000) >> 30;
1132 cmult = (mmc->csd[2] & 0x00038000) >> 15;
1135 mmc->capacity_user = (csize + 1) << (cmult + 2);
1136 mmc->capacity_user *= mmc->read_bl_len;
1137 mmc->capacity_boot = 0;
1138 mmc->capacity_rpmb = 0;
1139 for (i = 0; i < 4; i++)
1140 mmc->capacity_gp[i] = 0;
1142 if (mmc->read_bl_len > MMC_MAX_BLOCK_LEN)
1143 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
1145 if (mmc->write_bl_len > MMC_MAX_BLOCK_LEN)
1146 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
1148 if ((mmc->dsr_imp) && (0xffffffff != mmc->dsr)) {
1149 cmd.cmdidx = MMC_CMD_SET_DSR;
1150 cmd.cmdarg = (mmc->dsr & 0xffff) << 16;
1151 cmd.resp_type = MMC_RSP_NONE;
1152 if (mmc_send_cmd(mmc, &cmd, NULL))
1153 printf("MMC: SET_DSR failed\n");
1156 /* Select the card, and put it into Transfer Mode */
1157 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
1158 cmd.cmdidx = MMC_CMD_SELECT_CARD;
1159 cmd.resp_type = MMC_RSP_R1;
1160 cmd.cmdarg = mmc->rca << 16;
1161 err = mmc_send_cmd(mmc, &cmd, NULL);
1168 * For SD, its erase group is always one sector
1170 mmc->erase_grp_size = 1;
1171 mmc->part_config = MMCPART_NOAVAILABLE;
1172 if (!IS_SD(mmc) && (mmc->version >= MMC_VERSION_4)) {
1173 /* check ext_csd version and capacity */
1174 err = mmc_send_ext_csd(mmc, ext_csd);
1177 if (ext_csd[EXT_CSD_REV] >= 2) {
1179 * According to the JEDEC Standard, the value of
1180 * ext_csd's capacity is valid if the value is more
1183 capacity = ext_csd[EXT_CSD_SEC_CNT] << 0
1184 | ext_csd[EXT_CSD_SEC_CNT + 1] << 8
1185 | ext_csd[EXT_CSD_SEC_CNT + 2] << 16
1186 | ext_csd[EXT_CSD_SEC_CNT + 3] << 24;
1187 capacity *= MMC_MAX_BLOCK_LEN;
1188 if ((capacity >> 20) > 2 * 1024)
1189 mmc->capacity_user = capacity;
1192 switch (ext_csd[EXT_CSD_REV]) {
1194 mmc->version = MMC_VERSION_4_1;
1197 mmc->version = MMC_VERSION_4_2;
1200 mmc->version = MMC_VERSION_4_3;
1203 mmc->version = MMC_VERSION_4_41;
1206 mmc->version = MMC_VERSION_4_5;
1209 mmc->version = MMC_VERSION_5_0;
1213 /* The partition data may be non-zero but it is only
1214 * effective if PARTITION_SETTING_COMPLETED is set in
1215 * EXT_CSD, so ignore any data if this bit is not set,
1216 * except for enabling the high-capacity group size
1217 * definition (see below). */
1218 part_completed = !!(ext_csd[EXT_CSD_PARTITION_SETTING] &
1219 EXT_CSD_PARTITION_SETTING_COMPLETED);
1221 /* store the partition info of emmc */
1222 mmc->part_support = ext_csd[EXT_CSD_PARTITIONING_SUPPORT];
1223 if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) ||
1224 ext_csd[EXT_CSD_BOOT_MULT])
1225 mmc->part_config = ext_csd[EXT_CSD_PART_CONF];
1226 if (part_completed &&
1227 (ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & ENHNCD_SUPPORT))
1228 mmc->part_attr = ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE];
1230 mmc->capacity_boot = ext_csd[EXT_CSD_BOOT_MULT] << 17;
1232 mmc->capacity_rpmb = ext_csd[EXT_CSD_RPMB_MULT] << 17;
1234 for (i = 0; i < 4; i++) {
1235 int idx = EXT_CSD_GP_SIZE_MULT + i * 3;
1236 uint mult = (ext_csd[idx + 2] << 16) +
1237 (ext_csd[idx + 1] << 8) + ext_csd[idx];
1240 if (!part_completed)
1242 mmc->capacity_gp[i] = mult;
1243 mmc->capacity_gp[i] *=
1244 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
1245 mmc->capacity_gp[i] *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
1246 mmc->capacity_gp[i] <<= 19;
1249 if (part_completed) {
1250 mmc->enh_user_size =
1251 (ext_csd[EXT_CSD_ENH_SIZE_MULT+2] << 16) +
1252 (ext_csd[EXT_CSD_ENH_SIZE_MULT+1] << 8) +
1253 ext_csd[EXT_CSD_ENH_SIZE_MULT];
1254 mmc->enh_user_size *= ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
1255 mmc->enh_user_size *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
1256 mmc->enh_user_size <<= 19;
1257 mmc->enh_user_start =
1258 (ext_csd[EXT_CSD_ENH_START_ADDR+3] << 24) +
1259 (ext_csd[EXT_CSD_ENH_START_ADDR+2] << 16) +
1260 (ext_csd[EXT_CSD_ENH_START_ADDR+1] << 8) +
1261 ext_csd[EXT_CSD_ENH_START_ADDR];
1262 if (mmc->high_capacity)
1263 mmc->enh_user_start <<= 9;
1267 * Host needs to enable ERASE_GRP_DEF bit if device is
1268 * partitioned. This bit will be lost every time after a reset
1269 * or power off. This will affect erase size.
1273 if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) &&
1274 (ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE] & PART_ENH_ATTRIB))
1277 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1278 EXT_CSD_ERASE_GROUP_DEF, 1);
1283 ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1;
1286 if (ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01) {
1287 /* Read out group size from ext_csd */
1288 mmc->erase_grp_size =
1289 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024;
1291 * if high capacity and partition setting completed
1292 * SEC_COUNT is valid even if it is smaller than 2 GiB
1293 * JEDEC Standard JESD84-B45, 6.2.4
1295 if (mmc->high_capacity && part_completed) {
1296 capacity = (ext_csd[EXT_CSD_SEC_CNT]) |
1297 (ext_csd[EXT_CSD_SEC_CNT + 1] << 8) |
1298 (ext_csd[EXT_CSD_SEC_CNT + 2] << 16) |
1299 (ext_csd[EXT_CSD_SEC_CNT + 3] << 24);
1300 capacity *= MMC_MAX_BLOCK_LEN;
1301 mmc->capacity_user = capacity;
1304 /* Calculate the group size from the csd value. */
1305 int erase_gsz, erase_gmul;
1306 erase_gsz = (mmc->csd[2] & 0x00007c00) >> 10;
1307 erase_gmul = (mmc->csd[2] & 0x000003e0) >> 5;
1308 mmc->erase_grp_size = (erase_gsz + 1)
1312 mmc->hc_wp_grp_size = 1024
1313 * ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
1314 * ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
1316 mmc->wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET];
1319 err = mmc_set_capacity(mmc, mmc->part_num);
1324 err = sd_change_freq(mmc);
1326 err = mmc_change_freq(mmc);
1331 /* Restrict card's capabilities by what the host can do */
1332 mmc->card_caps &= mmc->cfg->host_caps;
1335 if (mmc->card_caps & MMC_MODE_4BIT) {
1336 cmd.cmdidx = MMC_CMD_APP_CMD;
1337 cmd.resp_type = MMC_RSP_R1;
1338 cmd.cmdarg = mmc->rca << 16;
1340 err = mmc_send_cmd(mmc, &cmd, NULL);
1344 cmd.cmdidx = SD_CMD_APP_SET_BUS_WIDTH;
1345 cmd.resp_type = MMC_RSP_R1;
1347 err = mmc_send_cmd(mmc, &cmd, NULL);
1351 mmc_set_bus_width(mmc, 4);
1354 if (mmc->card_caps & MMC_MODE_HS)
1355 mmc->tran_speed = 50000000;
1357 mmc->tran_speed = 25000000;
1358 } else if (mmc->version >= MMC_VERSION_4) {
1359 /* Only version 4 of MMC supports wider bus widths */
1362 /* An array of possible bus widths in order of preference */
1363 static unsigned ext_csd_bits[] = {
1364 EXT_CSD_DDR_BUS_WIDTH_8,
1365 EXT_CSD_DDR_BUS_WIDTH_4,
1366 EXT_CSD_BUS_WIDTH_8,
1367 EXT_CSD_BUS_WIDTH_4,
1368 EXT_CSD_BUS_WIDTH_1,
1371 /* An array to map CSD bus widths to host cap bits */
1372 static unsigned ext_to_hostcaps[] = {
1373 [EXT_CSD_DDR_BUS_WIDTH_4] =
1374 MMC_MODE_DDR_52MHz | MMC_MODE_4BIT,
1375 [EXT_CSD_DDR_BUS_WIDTH_8] =
1376 MMC_MODE_DDR_52MHz | MMC_MODE_8BIT,
1377 [EXT_CSD_BUS_WIDTH_4] = MMC_MODE_4BIT,
1378 [EXT_CSD_BUS_WIDTH_8] = MMC_MODE_8BIT,
1381 /* An array to map chosen bus width to an integer */
1382 static unsigned widths[] = {
1386 for (idx=0; idx < ARRAY_SIZE(ext_csd_bits); idx++) {
1387 unsigned int extw = ext_csd_bits[idx];
1388 unsigned int caps = ext_to_hostcaps[extw];
1391 * If the bus width is still not changed,
1392 * don't try to set the default again.
1393 * Otherwise, recover from switch attempts
1394 * by switching to 1-bit bus width.
1396 if (extw == EXT_CSD_BUS_WIDTH_1 &&
1397 mmc->bus_width == 1) {
1403 * Check to make sure the card and controller support
1404 * these capabilities
1406 if ((mmc->card_caps & caps) != caps)
1409 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1410 EXT_CSD_BUS_WIDTH, extw);
1415 mmc->ddr_mode = (caps & MMC_MODE_DDR_52MHz) ? 1 : 0;
1416 mmc_set_bus_width(mmc, widths[idx]);
1418 err = mmc_send_ext_csd(mmc, test_csd);
1423 /* Only compare read only fields */
1424 if (ext_csd[EXT_CSD_PARTITIONING_SUPPORT]
1425 == test_csd[EXT_CSD_PARTITIONING_SUPPORT] &&
1426 ext_csd[EXT_CSD_HC_WP_GRP_SIZE]
1427 == test_csd[EXT_CSD_HC_WP_GRP_SIZE] &&
1428 ext_csd[EXT_CSD_REV]
1429 == test_csd[EXT_CSD_REV] &&
1430 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
1431 == test_csd[EXT_CSD_HC_ERASE_GRP_SIZE] &&
1432 memcmp(&ext_csd[EXT_CSD_SEC_CNT],
1433 &test_csd[EXT_CSD_SEC_CNT], 4) == 0)
1442 if (mmc->card_caps & MMC_MODE_HS) {
1443 if (mmc->card_caps & MMC_MODE_HS_52MHz)
1444 mmc->tran_speed = 52000000;
1446 mmc->tran_speed = 26000000;
1450 mmc_set_clock(mmc, mmc->tran_speed);
1452 /* Fix the block length for DDR mode */
1453 if (mmc->ddr_mode) {
1454 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
1455 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
1458 /* fill in device description */
1459 mmc->block_dev.lun = 0;
1460 mmc->block_dev.type = 0;
1461 mmc->block_dev.blksz = mmc->read_bl_len;
1462 mmc->block_dev.log2blksz = LOG2(mmc->block_dev.blksz);
1463 mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len);
1464 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1465 sprintf(mmc->block_dev.vendor, "Man %06x Snr %04x%04x",
1466 mmc->cid[0] >> 24, (mmc->cid[2] & 0xffff),
1467 (mmc->cid[3] >> 16) & 0xffff);
1468 sprintf(mmc->block_dev.product, "%c%c%c%c%c%c", mmc->cid[0] & 0xff,
1469 (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff,
1470 (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff,
1471 (mmc->cid[2] >> 24) & 0xff);
1472 sprintf(mmc->block_dev.revision, "%d.%d", (mmc->cid[2] >> 20) & 0xf,
1473 (mmc->cid[2] >> 16) & 0xf);
1475 mmc->block_dev.vendor[0] = 0;
1476 mmc->block_dev.product[0] = 0;
1477 mmc->block_dev.revision[0] = 0;
1479 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBDISK_SUPPORT)
1480 init_part(&mmc->block_dev);
1486 static int mmc_send_if_cond(struct mmc *mmc)
1491 cmd.cmdidx = SD_CMD_SEND_IF_COND;
1492 /* We set the bit if the host supports voltages between 2.7 and 3.6 V */
1493 cmd.cmdarg = ((mmc->cfg->voltages & 0xff8000) != 0) << 8 | 0xaa;
1494 cmd.resp_type = MMC_RSP_R7;
1496 err = mmc_send_cmd(mmc, &cmd, NULL);
1501 if ((cmd.response[0] & 0xff) != 0xaa)
1502 return UNUSABLE_ERR;
1504 mmc->version = SD_VERSION_2;
1509 /* not used any more */
1510 int __deprecated mmc_register(struct mmc *mmc)
1512 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1513 printf("%s is deprecated! use mmc_create() instead.\n", __func__);
1518 struct mmc *mmc_create(const struct mmc_config *cfg, void *priv)
1522 /* quick validation */
1523 if (cfg == NULL || cfg->ops == NULL || cfg->ops->send_cmd == NULL ||
1524 cfg->f_min == 0 || cfg->f_max == 0 || cfg->b_max == 0)
1527 mmc = calloc(1, sizeof(*mmc));
1534 /* the following chunk was mmc_register() */
1536 /* Setup dsr related values */
1538 mmc->dsr = 0xffffffff;
1539 /* Setup the universal parts of the block interface just once */
1540 mmc->block_dev.if_type = IF_TYPE_MMC;
1541 mmc->block_dev.dev = cur_dev_num++;
1542 mmc->block_dev.removable = 1;
1543 mmc->block_dev.block_read = mmc_bread;
1544 mmc->block_dev.block_write = mmc_bwrite;
1545 mmc->block_dev.block_erase = mmc_berase;
1547 /* setup initial part type */
1548 mmc->block_dev.part_type = mmc->cfg->part_type;
1550 INIT_LIST_HEAD(&mmc->link);
1552 list_add_tail(&mmc->link, &mmc_devices);
1558 void mmc_destroy(struct mmc *mmc)
1560 /* only freeing memory for now */
1564 #ifdef CONFIG_PARTITIONS
1565 block_dev_desc_t *mmc_get_dev(int dev)
1567 struct mmc *mmc = find_mmc_device(dev);
1568 if (!mmc || mmc_init(mmc))
1571 return &mmc->block_dev;
1575 /* board-specific MMC power initializations. */
1576 __weak void board_mmc_power_init(void)
1580 int mmc_start_init(struct mmc *mmc)
1584 /* we pretend there's no card when init is NULL */
1585 if (mmc_getcd(mmc) == 0 || mmc->cfg->ops->init == NULL) {
1587 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1588 printf("MMC: no card present\n");
1596 board_mmc_power_init();
1598 /* made sure it's not NULL earlier */
1599 err = mmc->cfg->ops->init(mmc);
1605 mmc_set_bus_width(mmc, 1);
1606 mmc_set_clock(mmc, 1);
1608 /* Reset the Card */
1609 err = mmc_go_idle(mmc);
1614 /* The internal partition reset to user partition(0) at every CMD0*/
1617 /* Test for SD version 2 */
1618 err = mmc_send_if_cond(mmc);
1620 /* Now try to get the SD card's operating condition */
1621 err = sd_send_op_cond(mmc);
1623 /* If the command timed out, we check for an MMC card */
1624 if (err == TIMEOUT) {
1625 err = mmc_send_op_cond(mmc);
1627 if (err && err != IN_PROGRESS) {
1628 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1629 printf("Card did not respond to voltage select!\n");
1631 return UNUSABLE_ERR;
1635 if (err == IN_PROGRESS)
1636 mmc->init_in_progress = 1;
1641 static int mmc_complete_init(struct mmc *mmc)
1645 if (mmc->op_cond_pending)
1646 err = mmc_complete_op_cond(mmc);
1649 err = mmc_startup(mmc);
1654 mmc->init_in_progress = 0;
1658 int mmc_init(struct mmc *mmc)
1660 int err = IN_PROGRESS;
1666 start = get_timer(0);
1668 if (!mmc->init_in_progress)
1669 err = mmc_start_init(mmc);
1671 if (!err || err == IN_PROGRESS)
1672 err = mmc_complete_init(mmc);
1673 debug("%s: %d, time %lu\n", __func__, err, get_timer(start));
1677 int mmc_set_dsr(struct mmc *mmc, u16 val)
1683 /* CPU-specific MMC initializations */
1684 __weak int cpu_mmc_init(bd_t *bis)
1689 /* board-specific MMC initializations. */
1690 __weak int board_mmc_init(bd_t *bis)
1695 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1697 void print_mmc_devices(char separator)
1700 struct list_head *entry;
1702 list_for_each(entry, &mmc_devices) {
1703 m = list_entry(entry, struct mmc, link);
1705 printf("%s: %d", m->cfg->name, m->block_dev.dev);
1707 if (entry->next != &mmc_devices) {
1708 printf("%c", separator);
1709 if (separator != '\n')
1718 void print_mmc_devices(char separator) { }
1721 int get_mmc_num(void)
1726 int get_mmc_dev_count(void)
1728 return mmc_dev_count;
1731 void mmc_set_preinit(struct mmc *mmc, int preinit)
1733 mmc->preinit = preinit;
1736 static void do_preinit(void)
1739 struct list_head *entry;
1741 list_for_each(entry, &mmc_devices) {
1742 m = list_entry(entry, struct mmc, link);
1750 int mmc_initialize(bd_t *bis)
1752 INIT_LIST_HEAD (&mmc_devices);
1755 if (board_mmc_init(bis) < 0)
1758 #ifndef CONFIG_SPL_BUILD
1759 print_mmc_devices(',');
1766 #ifdef CONFIG_SUPPORT_EMMC_BOOT
1768 * This function changes the size of boot partition and the size of rpmb
1769 * partition present on EMMC devices.
1772 * struct *mmc: pointer for the mmc device strcuture
1773 * bootsize: size of boot partition
1774 * rpmbsize: size of rpmb partition
1776 * Returns 0 on success.
1779 int mmc_boot_partition_size_change(struct mmc *mmc, unsigned long bootsize,
1780 unsigned long rpmbsize)
1785 /* Only use this command for raw EMMC moviNAND. Enter backdoor mode */
1786 cmd.cmdidx = MMC_CMD_RES_MAN;
1787 cmd.resp_type = MMC_RSP_R1b;
1788 cmd.cmdarg = MMC_CMD62_ARG1;
1790 err = mmc_send_cmd(mmc, &cmd, NULL);
1792 debug("mmc_boot_partition_size_change: Error1 = %d\n", err);
1796 /* Boot partition changing mode */
1797 cmd.cmdidx = MMC_CMD_RES_MAN;
1798 cmd.resp_type = MMC_RSP_R1b;
1799 cmd.cmdarg = MMC_CMD62_ARG2;
1801 err = mmc_send_cmd(mmc, &cmd, NULL);
1803 debug("mmc_boot_partition_size_change: Error2 = %d\n", err);
1806 /* boot partition size is multiple of 128KB */
1807 bootsize = (bootsize * 1024) / 128;
1809 /* Arg: boot partition size */
1810 cmd.cmdidx = MMC_CMD_RES_MAN;
1811 cmd.resp_type = MMC_RSP_R1b;
1812 cmd.cmdarg = bootsize;
1814 err = mmc_send_cmd(mmc, &cmd, NULL);
1816 debug("mmc_boot_partition_size_change: Error3 = %d\n", err);
1819 /* RPMB partition size is multiple of 128KB */
1820 rpmbsize = (rpmbsize * 1024) / 128;
1821 /* Arg: RPMB partition size */
1822 cmd.cmdidx = MMC_CMD_RES_MAN;
1823 cmd.resp_type = MMC_RSP_R1b;
1824 cmd.cmdarg = rpmbsize;
1826 err = mmc_send_cmd(mmc, &cmd, NULL);
1828 debug("mmc_boot_partition_size_change: Error4 = %d\n", err);
1835 * Modify EXT_CSD[177] which is BOOT_BUS_WIDTH
1836 * based on the passed in values for BOOT_BUS_WIDTH, RESET_BOOT_BUS_WIDTH
1839 * Returns 0 on success.
1841 int mmc_set_boot_bus_width(struct mmc *mmc, u8 width, u8 reset, u8 mode)
1845 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BOOT_BUS_WIDTH,
1846 EXT_CSD_BOOT_BUS_WIDTH_MODE(mode) |
1847 EXT_CSD_BOOT_BUS_WIDTH_RESET(reset) |
1848 EXT_CSD_BOOT_BUS_WIDTH_WIDTH(width));
1856 * Modify EXT_CSD[179] which is PARTITION_CONFIG (formerly BOOT_CONFIG)
1857 * based on the passed in values for BOOT_ACK, BOOT_PARTITION_ENABLE and
1860 * Returns 0 on success.
1862 int mmc_set_part_conf(struct mmc *mmc, u8 ack, u8 part_num, u8 access)
1866 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
1867 EXT_CSD_BOOT_ACK(ack) |
1868 EXT_CSD_BOOT_PART_NUM(part_num) |
1869 EXT_CSD_PARTITION_ACCESS(access));
1877 * Modify EXT_CSD[162] which is RST_n_FUNCTION based on the given value
1878 * for enable. Note that this is a write-once field for non-zero values.
1880 * Returns 0 on success.
1882 int mmc_set_rst_n_function(struct mmc *mmc, u8 enable)
1884 return mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_RST_N_FUNCTION,