drivers/mtd/spi/spi_flash_ops.c

   1 /*
   2  * SPI flash operations
   3  *
   4  * Copyright (C) 2008 Atmel Corporation
   5  * Copyright (C) 2010 Reinhard Meyer, EMK Elektronik
   6  * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc.
   7  *
   8  * Licensed under the GPL-2 or later.
   9  */
  10
  11 #include <common.h>
  12 #include <spi.h>
  13 #include <spi_flash.h>
  14 #include <watchdog.h>
  15
  16 #include "spi_flash_internal.h"
  17
  18 static void spi_flash_addr(u32 addr, u8 *cmd)
  19 {
  20         /* cmd[0] is actual command */
  21         cmd[1] = addr >> 16;
  22         cmd[2] = addr >> 8;
  23         cmd[3] = addr >> 0;
  24 }
  25
  26 int spi_flash_cmd_write_status(struct spi_flash *flash, u8 sr)
  27 {
  28         u8 cmd;
  29         int ret;
  30
  31         cmd = CMD_WRITE_STATUS;
  32         ret = spi_flash_write_common(flash, &cmd, 1, &sr, 1);
  33         if (ret < 0) {
  34                 debug("SF: fail to write status register\n");
  35                 return ret;
  36         }
  37
  38         return 0;
  39 }
  40
  41 #ifdef CONFIG_SPI_FLASH_BAR
  42 int spi_flash_cmd_bankaddr_write(struct spi_flash *flash, u8 bank_sel)
  43 {
  44         u8 cmd;
  45         int ret;
  46
  47         if (flash->bank_curr == bank_sel) {
  48                 debug("SF: not require to enable bank%d\n", bank_sel);
  49                 return 0;
  50         }
  51
  52         cmd = flash->bank_write_cmd;
  53         ret = spi_flash_write_common(flash, &cmd, 1, &bank_sel, 1);
  54         if (ret < 0) {
  55                 debug("SF: fail to write bank register\n");
  56                 return ret;
  57         }
  58         flash->bank_curr = bank_sel;
  59
  60         return 0;
  61 }
  62 #endif
  63
  64 int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout)
  65 {
  66         struct spi_slave *spi = flash->spi;
  67         unsigned long timebase;
  68         int ret;
  69         u8 status;
  70         u8 check_status = 0x0;
  71         u8 poll_bit = STATUS_WIP;
  72         u8 cmd = flash->poll_cmd;
  73
  74         if (cmd == CMD_FLAG_STATUS) {
  75                 poll_bit = STATUS_PEC;
  76                 check_status = poll_bit;
  77         }
  78
  79         ret = spi_xfer(spi, 8, &cmd, NULL, SPI_XFER_BEGIN);
  80         if (ret) {
  81                 debug("SF: fail to read %s status register\n",
  82                       cmd == CMD_READ_STATUS ? "read" : "flag");
  83                 return ret;
  84         }
  85
  86         timebase = get_timer(0);
  87         do {
  88                 WATCHDOG_RESET();
  89
  90                 ret = spi_xfer(spi, 8, NULL, &status, 0);
  91                 if (ret)
  92                         return -1;
  93
  94                 if ((status & poll_bit) == check_status)
  95                         break;
  96
  97         } while (get_timer(timebase) < timeout);
  98
  99         spi_xfer(spi, 0, NULL, NULL, SPI_XFER_END);
 100
 101         if ((status & poll_bit) == check_status)
 102                 return 0;
 103
 104         /* Timed out */
 105         debug("SF: time out!\n");
 106         return -1;
 107 }
 108
 109 int spi_flash_write_common(struct spi_flash *flash, const u8 *cmd,
 110                 size_t cmd_len, const void *buf, size_t buf_len)
 111 {
 112         struct spi_slave *spi = flash->spi;
 113         unsigned long timeout = SPI_FLASH_PROG_TIMEOUT;
 114         int ret;
 115
 116         if (buf == NULL)
 117                 timeout = SPI_FLASH_PAGE_ERASE_TIMEOUT;
 118
 119         ret = spi_claim_bus(flash->spi);
 120         if (ret) {
 121                 debug("SF: unable to claim SPI bus\n");
 122                 return ret;
 123         }
 124
 125         ret = spi_flash_cmd_write_enable(flash);
 126         if (ret < 0) {
 127                 debug("SF: enabling write failed\n");
 128                 return ret;
 129         }
 130
 131         ret = spi_flash_cmd_write(spi, cmd, cmd_len, buf, buf_len);
 132         if (ret < 0) {
 133                 debug("SF: write cmd failed\n");
 134                 return ret;
 135         }
 136
 137         ret = spi_flash_cmd_wait_ready(flash, timeout);
 138         if (ret < 0) {
 139                 debug("SF: write %s timed out\n",
 140                       timeout == SPI_FLASH_PROG_TIMEOUT ?
 141                         "program" : "page erase");
 142                 return ret;
 143         }
 144
 145         spi_release_bus(spi);
 146
 147         return ret;
 148 }
 149
 150 int spi_flash_cmd_erase(struct spi_flash *flash, u32 offset, size_t len)
 151 {
 152         u32 erase_size;
 153         u8 cmd[4];
 154         int ret = -1;
 155
 156         erase_size = flash->sector_size;
 157         if (offset % erase_size || len % erase_size) {
 158                 debug("SF: Erase offset/length not multiple of erase size\n");
 159                 return -1;
 160         }
 161
 162         if (erase_size == 4096)
 163                 cmd[0] = CMD_ERASE_4K;
 164         else
 165                 cmd[0] = CMD_ERASE_64K;
 166
 167         while (len) {
 168 #ifdef CONFIG_SPI_FLASH_BAR
 169                 u8 bank_sel;
 170
 171                 bank_sel = offset / SPI_FLASH_16MB_BOUN;
 172
 173                 ret = spi_flash_cmd_bankaddr_write(flash, bank_sel);
 174                 if (ret) {
 175                         debug("SF: fail to set bank%d\n", bank_sel);
 176                         return ret;
 177                 }
 178 #endif
 179                 spi_flash_addr(offset, cmd);
 180
 181                 debug("SF: erase %2x %2x %2x %2x (%x)\n", cmd[0], cmd[1],
 182                       cmd[2], cmd[3], offset);
 183
 184                 ret = spi_flash_write_common(flash, cmd, sizeof(cmd), NULL, 0);
 185                 if (ret < 0) {
 186                         debug("SF: erase failed\n");
 187                         break;
 188                 }
 189
 190                 offset += erase_size;
 191                 len -= erase_size;
 192         }
 193
 194         return ret;
 195 }
 196
 197 int spi_flash_cmd_write_multi(struct spi_flash *flash, u32 offset,
 198                 size_t len, const void *buf)
 199 {
 200         unsigned long byte_addr, page_size;
 201         size_t chunk_len, actual;
 202         u8 cmd[4];
 203         int ret = -1;
 204
 205         page_size = flash->page_size;
 206
 207         cmd[0] = CMD_PAGE_PROGRAM;
 208         for (actual = 0; actual < len; actual += chunk_len) {
 209 #ifdef CONFIG_SPI_FLASH_BAR
 210                 u8 bank_sel;
 211
 212                 bank_sel = offset / SPI_FLASH_16MB_BOUN;
 213
 214                 ret = spi_flash_cmd_bankaddr_write(flash, bank_sel);
 215                 if (ret) {
 216                         debug("SF: fail to set bank%d\n", bank_sel);
 217                         return ret;
 218                 }
 219 #endif
 220                 byte_addr = offset % page_size;
 221                 chunk_len = min(len - actual, page_size - byte_addr);
 222
 223                 if (flash->spi->max_write_size)
 224                         chunk_len = min(chunk_len, flash->spi->max_write_size);
 225
 226                 spi_flash_addr(offset, cmd);
 227
 228                 debug("PP: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x } chunk_len = %zu\n",
 229                       buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], chunk_len);
 230
 231                 ret = spi_flash_write_common(flash, cmd, sizeof(cmd),
 232                                         buf + actual, chunk_len);
 233                 if (ret < 0) {
 234                         debug("SF: write failed\n");
 235                         break;
 236                 }
 237
 238                 offset += chunk_len;
 239         }
 240
 241         return ret;
 242 }
 243
 244 int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd,
 245                 size_t cmd_len, void *data, size_t data_len)
 246 {
 247         struct spi_slave *spi = flash->spi;
 248         int ret;
 249
 250         ret = spi_claim_bus(flash->spi);
 251         if (ret) {
 252                 debug("SF: unable to claim SPI bus\n");
 253                 return ret;
 254         }
 255
 256         ret = spi_flash_cmd_read(spi, cmd, cmd_len, data, data_len);
 257         if (ret < 0) {
 258                 debug("SF: read cmd failed\n");
 259                 return ret;
 260         }
 261
 262         spi_release_bus(spi);
 263
 264         return ret;
 265 }
 266
 267 int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset,
 268                 size_t len, void *data)
 269 {
 270         u8 cmd[5], bank_sel = 0;
 271         u32 remain_len, read_len;
 272         int ret = -1;
 273
 274         /* Handle memory-mapped SPI */
 275         if (flash->memory_map) {
 276                 memcpy(data, flash->memory_map + offset, len);
 277                 return 0;
 278         }
 279
 280         cmd[0] = CMD_READ_ARRAY_FAST;
 281         cmd[4] = 0x00;
 282
 283         while (len) {
 284 #ifdef CONFIG_SPI_FLASH_BAR
 285                 bank_sel = offset / SPI_FLASH_16MB_BOUN;
 286
 287                 ret = spi_flash_cmd_bankaddr_write(flash, bank_sel);
 288                 if (ret) {
 289                         debug("SF: fail to set bank%d\n", bank_sel);
 290                         return ret;
 291                 }
 292 #endif
 293                 remain_len = (SPI_FLASH_16MB_BOUN * (bank_sel + 1) - offset);
 294                 if (len < remain_len)
 295                         read_len = len;
 296                 else
 297                         read_len = remain_len;
 298
 299                 spi_flash_addr(offset, cmd);
 300
 301                 ret = spi_flash_read_common(flash, cmd, sizeof(cmd),
 302                                                         data, read_len);
 303                 if (ret < 0) {
 304                         debug("SF: read failed\n");
 305                         break;
 306                 }
 307
 308                 offset += read_len;
 309                 len -= read_len;
 310                 data += read_len;
 311         }
 312
 313         return ret;
 314 }
 315
 316 #ifdef CONFIG_SPI_FLASH_SST
 317 static int sst_byte_write(struct spi_flash *flash, u32 offset, const void *buf)
 318 {
 319         int ret;
 320         u8 cmd[4] = {
 321                 CMD_SST_BP,
 322                 offset >> 16,
 323                 offset >> 8,
 324                 offset,
 325         };
 326
 327         debug("BP[%02x]: 0x%p => cmd = { 0x%02x 0x%06x }\n",
 328               spi_w8r8(flash->spi, CMD_READ_STATUS), buf, cmd[0], offset);
 329
 330         ret = spi_flash_cmd_write_enable(flash);
 331         if (ret)
 332                 return ret;
 333
 334         ret = spi_flash_cmd_write(flash->spi, cmd, sizeof(cmd), buf, 1);
 335         if (ret)
 336                 return ret;
 337
 338         return spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
 339 }
 340
 341 int sst_write_wp(struct spi_flash *flash, u32 offset, size_t len,
 342                 const void *buf)
 343 {
 344         size_t actual, cmd_len;
 345         int ret;
 346         u8 cmd[4];
 347
 348         ret = spi_claim_bus(flash->spi);
 349         if (ret) {
 350                 debug("SF: Unable to claim SPI bus\n");
 351                 return ret;
 352         }
 353
 354         /* If the data is not word aligned, write out leading single byte */
 355         actual = offset % 2;
 356         if (actual) {
 357                 ret = sst_byte_write(flash, offset, buf);
 358                 if (ret)
 359                         goto done;
 360         }
 361         offset += actual;
 362
 363         ret = spi_flash_cmd_write_enable(flash);
 364         if (ret)
 365                 goto done;
 366
 367         cmd_len = 4;
 368         cmd[0] = CMD_SST_AAI_WP;
 369         cmd[1] = offset >> 16;
 370         cmd[2] = offset >> 8;
 371         cmd[3] = offset;
 372
 373         for (; actual < len - 1; actual += 2) {
 374                 debug("WP[%02x]: 0x%p => cmd = { 0x%02x 0x%06x }\n",
 375                       spi_w8r8(flash->spi, CMD_READ_STATUS), buf + actual,
 376                       cmd[0], offset);
 377
 378                 ret = spi_flash_cmd_write(flash->spi, cmd, cmd_len,
 379                                         buf + actual, 2);
 380                 if (ret) {
 381                         debug("SF: sst word program failed\n");
 382                         break;
 383                 }
 384
 385                 ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
 386                 if (ret)
 387                         break;
 388
 389                 cmd_len = 1;
 390                 offset += 2;
 391         }
 392
 393         if (!ret)
 394                 ret = spi_flash_cmd_write_disable(flash);
 395
 396         /* If there is a single trailing byte, write it out */
 397         if (!ret && actual != len)
 398                 ret = sst_byte_write(flash, offset, buf + actual);
 399
 400  done:
 401         debug("SF: sst: program %s %zu bytes @ 0x%zx\n",
 402               ret ? "failure" : "success", len, offset - actual);
 403
 404         spi_release_bus(flash->spi);
 405         return ret;
 406 }
 407 #endif