2 * Copyright (C) 2005-2006 Atmel Corporation
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 * The u-boot networking stack is a little weird. It seems like the
22 * networking core allocates receive buffers up front without any
23 * regard to the hardware that's supposed to actually receive those
26 * The MACB receives packets into 128-byte receive buffers, so the
27 * buffers allocated by the core isn't very practical to use. We'll
28 * allocate our own, but we need one such buffer in case a packet
29 * wraps around the DMA ring so that we have to copy it.
31 * Therefore, define CONFIG_SYS_RX_ETH_BUFFER to 1 in the board-specific
32 * configuration header. This way, the core allocates one RX buffer
33 * and one TX buffer, each of which can hold a ethernet packet of
36 * For some reason, the networking core unconditionally specifies a
37 * 32-byte packet "alignment" (which really should be called
38 * "padding"). MACB shouldn't need that, but we'll refrain from any
39 * core modifications here...
47 #include <linux/mii.h>
49 #include <asm/dma-mapping.h>
50 #include <asm/arch/clk.h>
54 #define CONFIG_SYS_MACB_RX_BUFFER_SIZE 4096
55 #define CONFIG_SYS_MACB_RX_RING_SIZE (CONFIG_SYS_MACB_RX_BUFFER_SIZE / 128)
56 #define CONFIG_SYS_MACB_TX_RING_SIZE 16
57 #define CONFIG_SYS_MACB_TX_TIMEOUT 1000
58 #define CONFIG_SYS_MACB_AUTONEG_TIMEOUT 5000000
60 struct macb_dma_desc {
65 #define RXADDR_USED 0x00000001
66 #define RXADDR_WRAP 0x00000002
68 #define RXBUF_FRMLEN_MASK 0x00000fff
69 #define RXBUF_FRAME_START 0x00004000
70 #define RXBUF_FRAME_END 0x00008000
71 #define RXBUF_TYPEID_MATCH 0x00400000
72 #define RXBUF_ADDR4_MATCH 0x00800000
73 #define RXBUF_ADDR3_MATCH 0x01000000
74 #define RXBUF_ADDR2_MATCH 0x02000000
75 #define RXBUF_ADDR1_MATCH 0x04000000
76 #define RXBUF_BROADCAST 0x80000000
78 #define TXBUF_FRMLEN_MASK 0x000007ff
79 #define TXBUF_FRAME_END 0x00008000
80 #define TXBUF_NOCRC 0x00010000
81 #define TXBUF_EXHAUSTED 0x08000000
82 #define TXBUF_UNDERRUN 0x10000000
83 #define TXBUF_MAXRETRY 0x20000000
84 #define TXBUF_WRAP 0x40000000
85 #define TXBUF_USED 0x80000000
96 struct macb_dma_desc *rx_ring;
97 struct macb_dma_desc *tx_ring;
99 unsigned long rx_buffer_dma;
100 unsigned long rx_ring_dma;
101 unsigned long tx_ring_dma;
103 const struct device *dev;
104 struct eth_device netdev;
105 unsigned short phy_addr;
108 #define to_macb(_nd) container_of(_nd, struct macb_device, netdev)
110 static void macb_mdio_write(struct macb_device *macb, u8 reg, u16 value)
112 unsigned long netctl;
113 unsigned long netstat;
116 netctl = macb_readl(macb, NCR);
117 netctl |= MACB_BIT(MPE);
118 macb_writel(macb, NCR, netctl);
120 frame = (MACB_BF(SOF, 1)
122 | MACB_BF(PHYA, macb->phy_addr)
125 | MACB_BF(DATA, value));
126 macb_writel(macb, MAN, frame);
129 netstat = macb_readl(macb, NSR);
130 } while (!(netstat & MACB_BIT(IDLE)));
132 netctl = macb_readl(macb, NCR);
133 netctl &= ~MACB_BIT(MPE);
134 macb_writel(macb, NCR, netctl);
137 static u16 macb_mdio_read(struct macb_device *macb, u8 reg)
139 unsigned long netctl;
140 unsigned long netstat;
143 netctl = macb_readl(macb, NCR);
144 netctl |= MACB_BIT(MPE);
145 macb_writel(macb, NCR, netctl);
147 frame = (MACB_BF(SOF, 1)
149 | MACB_BF(PHYA, macb->phy_addr)
152 macb_writel(macb, MAN, frame);
155 netstat = macb_readl(macb, NSR);
156 } while (!(netstat & MACB_BIT(IDLE)));
158 frame = macb_readl(macb, MAN);
160 netctl = macb_readl(macb, NCR);
161 netctl &= ~MACB_BIT(MPE);
162 macb_writel(macb, NCR, netctl);
164 return MACB_BFEXT(DATA, frame);
167 void __weak arch_get_mdio_control(const char *name)
172 #if defined(CONFIG_CMD_MII) || defined(CONFIG_PHYLIB)
174 int macb_miiphy_read(const char *devname, u8 phy_adr, u8 reg, u16 *value)
176 struct eth_device *dev = eth_get_dev_by_name(devname);
177 struct macb_device *macb = to_macb(dev);
179 if ( macb->phy_addr != phy_adr )
182 arch_get_mdio_control(devname);
183 *value = macb_mdio_read(macb, reg);
188 int macb_miiphy_write(const char *devname, u8 phy_adr, u8 reg, u16 value)
190 struct eth_device *dev = eth_get_dev_by_name(devname);
191 struct macb_device *macb = to_macb(dev);
193 if ( macb->phy_addr != phy_adr )
196 arch_get_mdio_control(devname);
197 macb_mdio_write(macb, reg, value);
204 #if defined(CONFIG_CMD_NET)
206 static int macb_send(struct eth_device *netdev, void *packet, int length)
208 struct macb_device *macb = to_macb(netdev);
209 unsigned long paddr, ctrl;
210 unsigned int tx_head = macb->tx_head;
213 paddr = dma_map_single(packet, length, DMA_TO_DEVICE);
215 ctrl = length & TXBUF_FRMLEN_MASK;
216 ctrl |= TXBUF_FRAME_END;
217 if (tx_head == (CONFIG_SYS_MACB_TX_RING_SIZE - 1)) {
223 macb->tx_ring[tx_head].ctrl = ctrl;
224 macb->tx_ring[tx_head].addr = paddr;
226 macb_writel(macb, NCR, MACB_BIT(TE) | MACB_BIT(RE) | MACB_BIT(TSTART));
229 * I guess this is necessary because the networking core may
230 * re-use the transmit buffer as soon as we return...
232 for (i = 0; i <= CONFIG_SYS_MACB_TX_TIMEOUT; i++) {
234 ctrl = macb->tx_ring[tx_head].ctrl;
235 if (ctrl & TXBUF_USED)
240 dma_unmap_single(packet, length, paddr);
242 if (i <= CONFIG_SYS_MACB_TX_TIMEOUT) {
243 if (ctrl & TXBUF_UNDERRUN)
244 printf("%s: TX underrun\n", netdev->name);
245 if (ctrl & TXBUF_EXHAUSTED)
246 printf("%s: TX buffers exhausted in mid frame\n",
249 printf("%s: TX timeout\n", netdev->name);
252 /* No one cares anyway */
256 static void reclaim_rx_buffers(struct macb_device *macb,
257 unsigned int new_tail)
262 while (i > new_tail) {
263 macb->rx_ring[i].addr &= ~RXADDR_USED;
265 if (i > CONFIG_SYS_MACB_RX_RING_SIZE)
269 while (i < new_tail) {
270 macb->rx_ring[i].addr &= ~RXADDR_USED;
275 macb->rx_tail = new_tail;
278 static int macb_recv(struct eth_device *netdev)
280 struct macb_device *macb = to_macb(netdev);
281 unsigned int rx_tail = macb->rx_tail;
288 if (!(macb->rx_ring[rx_tail].addr & RXADDR_USED))
291 status = macb->rx_ring[rx_tail].ctrl;
292 if (status & RXBUF_FRAME_START) {
293 if (rx_tail != macb->rx_tail)
294 reclaim_rx_buffers(macb, rx_tail);
298 if (status & RXBUF_FRAME_END) {
299 buffer = macb->rx_buffer + 128 * macb->rx_tail;
300 length = status & RXBUF_FRMLEN_MASK;
302 unsigned int headlen, taillen;
304 headlen = 128 * (CONFIG_SYS_MACB_RX_RING_SIZE
306 taillen = length - headlen;
307 memcpy((void *)NetRxPackets[0],
309 memcpy((void *)NetRxPackets[0] + headlen,
310 macb->rx_buffer, taillen);
311 buffer = (void *)NetRxPackets[0];
314 NetReceive(buffer, length);
315 if (++rx_tail >= CONFIG_SYS_MACB_RX_RING_SIZE)
317 reclaim_rx_buffers(macb, rx_tail);
319 if (++rx_tail >= CONFIG_SYS_MACB_RX_RING_SIZE) {
330 static void macb_phy_reset(struct macb_device *macb)
332 struct eth_device *netdev = &macb->netdev;
336 adv = ADVERTISE_CSMA | ADVERTISE_ALL;
337 macb_mdio_write(macb, MII_ADVERTISE, adv);
338 printf("%s: Starting autonegotiation...\n", netdev->name);
339 macb_mdio_write(macb, MII_BMCR, (BMCR_ANENABLE
342 for (i = 0; i < CONFIG_SYS_MACB_AUTONEG_TIMEOUT / 100; i++) {
343 status = macb_mdio_read(macb, MII_BMSR);
344 if (status & BMSR_ANEGCOMPLETE)
349 if (status & BMSR_ANEGCOMPLETE)
350 printf("%s: Autonegotiation complete\n", netdev->name);
352 printf("%s: Autonegotiation timed out (status=0x%04x)\n",
353 netdev->name, status);
356 #ifdef CONFIG_MACB_SEARCH_PHY
357 static int macb_phy_find(struct macb_device *macb)
362 /* Search for PHY... */
363 for (i = 0; i < 32; i++) {
365 phy_id = macb_mdio_read(macb, MII_PHYSID1);
366 if (phy_id != 0xffff) {
367 printf("%s: PHY present at %d\n", macb->netdev.name, i);
372 /* PHY isn't up to snuff */
373 printf("%s: PHY not found\n", macb->netdev.name);
377 #endif /* CONFIG_MACB_SEARCH_PHY */
380 static int macb_phy_init(struct macb_device *macb)
382 struct eth_device *netdev = &macb->netdev;
384 struct phy_device *phydev;
387 u16 phy_id, status, adv, lpa;
388 int media, speed, duplex;
391 arch_get_mdio_control(netdev->name);
392 #ifdef CONFIG_MACB_SEARCH_PHY
393 /* Auto-detect phy_addr */
394 if (!macb_phy_find(macb)) {
397 #endif /* CONFIG_MACB_SEARCH_PHY */
399 /* Check if the PHY is up to snuff... */
400 phy_id = macb_mdio_read(macb, MII_PHYSID1);
401 if (phy_id == 0xffff) {
402 printf("%s: No PHY present\n", netdev->name);
407 phydev->bus = macb->bus;
408 phydev->dev = netdev;
409 phydev->addr = macb->phy_addr;
413 status = macb_mdio_read(macb, MII_BMSR);
414 if (!(status & BMSR_LSTATUS)) {
415 /* Try to re-negotiate if we don't have link already. */
416 macb_phy_reset(macb);
418 for (i = 0; i < CONFIG_SYS_MACB_AUTONEG_TIMEOUT / 100; i++) {
419 status = macb_mdio_read(macb, MII_BMSR);
420 if (status & BMSR_LSTATUS)
426 if (!(status & BMSR_LSTATUS)) {
427 printf("%s: link down (status: 0x%04x)\n",
428 netdev->name, status);
431 adv = macb_mdio_read(macb, MII_ADVERTISE);
432 lpa = macb_mdio_read(macb, MII_LPA);
433 media = mii_nway_result(lpa & adv);
434 speed = (media & (ADVERTISE_100FULL | ADVERTISE_100HALF)
436 duplex = (media & ADVERTISE_FULL) ? 1 : 0;
437 printf("%s: link up, %sMbps %s-duplex (lpa: 0x%04x)\n",
439 speed ? "100" : "10",
440 duplex ? "full" : "half",
443 ncfgr = macb_readl(macb, NCFGR);
444 ncfgr &= ~(MACB_BIT(SPD) | MACB_BIT(FD));
446 ncfgr |= MACB_BIT(SPD);
448 ncfgr |= MACB_BIT(FD);
449 macb_writel(macb, NCFGR, ncfgr);
454 static int macb_init(struct eth_device *netdev, bd_t *bd)
456 struct macb_device *macb = to_macb(netdev);
461 * macb_halt should have been called at some point before now,
462 * so we'll assume the controller is idle.
465 /* initialize DMA descriptors */
466 paddr = macb->rx_buffer_dma;
467 for (i = 0; i < CONFIG_SYS_MACB_RX_RING_SIZE; i++) {
468 if (i == (CONFIG_SYS_MACB_RX_RING_SIZE - 1))
469 paddr |= RXADDR_WRAP;
470 macb->rx_ring[i].addr = paddr;
471 macb->rx_ring[i].ctrl = 0;
474 for (i = 0; i < CONFIG_SYS_MACB_TX_RING_SIZE; i++) {
475 macb->tx_ring[i].addr = 0;
476 if (i == (CONFIG_SYS_MACB_TX_RING_SIZE - 1))
477 macb->tx_ring[i].ctrl = TXBUF_USED | TXBUF_WRAP;
479 macb->tx_ring[i].ctrl = TXBUF_USED;
481 macb->rx_tail = macb->tx_head = macb->tx_tail = 0;
483 macb_writel(macb, RBQP, macb->rx_ring_dma);
484 macb_writel(macb, TBQP, macb->tx_ring_dma);
486 /* choose RMII or MII mode. This depends on the board */
488 #ifdef CONFIG_AT91FAMILY
489 macb_writel(macb, USRIO, MACB_BIT(RMII) | MACB_BIT(CLKEN));
491 macb_writel(macb, USRIO, 0);
494 #ifdef CONFIG_AT91FAMILY
495 macb_writel(macb, USRIO, MACB_BIT(CLKEN));
497 macb_writel(macb, USRIO, MACB_BIT(MII));
499 #endif /* CONFIG_RMII */
501 if (!macb_phy_init(macb))
504 /* Enable TX and RX */
505 macb_writel(macb, NCR, MACB_BIT(TE) | MACB_BIT(RE));
510 static void macb_halt(struct eth_device *netdev)
512 struct macb_device *macb = to_macb(netdev);
515 /* Halt the controller and wait for any ongoing transmission to end. */
516 ncr = macb_readl(macb, NCR);
517 ncr |= MACB_BIT(THALT);
518 macb_writel(macb, NCR, ncr);
521 tsr = macb_readl(macb, TSR);
522 } while (tsr & MACB_BIT(TGO));
524 /* Disable TX and RX, and clear statistics */
525 macb_writel(macb, NCR, MACB_BIT(CLRSTAT));
528 static int macb_write_hwaddr(struct eth_device *dev)
530 struct macb_device *macb = to_macb(dev);
534 /* set hardware address */
535 hwaddr_bottom = dev->enetaddr[0] | dev->enetaddr[1] << 8 |
536 dev->enetaddr[2] << 16 | dev->enetaddr[3] << 24;
537 macb_writel(macb, SA1B, hwaddr_bottom);
538 hwaddr_top = dev->enetaddr[4] | dev->enetaddr[5] << 8;
539 macb_writel(macb, SA1T, hwaddr_top);
543 int macb_eth_initialize(int id, void *regs, unsigned int phy_addr)
545 struct macb_device *macb;
546 struct eth_device *netdev;
547 unsigned long macb_hz;
550 macb = malloc(sizeof(struct macb_device));
552 printf("Error: Failed to allocate memory for MACB%d\n", id);
555 memset(macb, 0, sizeof(struct macb_device));
557 netdev = &macb->netdev;
559 macb->rx_buffer = dma_alloc_coherent(CONFIG_SYS_MACB_RX_BUFFER_SIZE,
560 &macb->rx_buffer_dma);
561 macb->rx_ring = dma_alloc_coherent(CONFIG_SYS_MACB_RX_RING_SIZE
562 * sizeof(struct macb_dma_desc),
564 macb->tx_ring = dma_alloc_coherent(CONFIG_SYS_MACB_TX_RING_SIZE
565 * sizeof(struct macb_dma_desc),
569 macb->phy_addr = phy_addr;
571 sprintf(netdev->name, "macb%d", id);
572 netdev->init = macb_init;
573 netdev->halt = macb_halt;
574 netdev->send = macb_send;
575 netdev->recv = macb_recv;
576 netdev->write_hwaddr = macb_write_hwaddr;
579 * Do some basic initialization so that we at least can talk
582 macb_hz = get_macb_pclk_rate(id);
583 if (macb_hz < 20000000)
584 ncfgr = MACB_BF(CLK, MACB_CLK_DIV8);
585 else if (macb_hz < 40000000)
586 ncfgr = MACB_BF(CLK, MACB_CLK_DIV16);
587 else if (macb_hz < 80000000)
588 ncfgr = MACB_BF(CLK, MACB_CLK_DIV32);
590 ncfgr = MACB_BF(CLK, MACB_CLK_DIV64);
592 macb_writel(macb, NCFGR, ncfgr);
594 eth_register(netdev);
596 #if defined(CONFIG_CMD_MII) || defined(CONFIG_PHYLIB)
597 miiphy_register(netdev->name, macb_miiphy_read, macb_miiphy_write);
598 macb->bus = miiphy_get_dev_by_name(netdev->name);