2 * Copyright (C) 2005-2006 Atmel Corporation
4 * Configuration settings for the ATSTK1002 CPU daughterboard
6 * SPDX-License-Identifier: GPL-2.0+
11 #include <asm/arch/hardware.h>
14 #define CONFIG_AT32AP7000
15 #define CONFIG_ATSTK1006
16 #define CONFIG_ATSTK1000
20 * Set up the PLL to run at 140 MHz, the CPU to run at the PLL
21 * frequency, the HSB and PBB at 1/2, and the PBA to run at 1/4 the
23 * (CONFIG_SYS_OSC0_HZ * CONFIG_SYS_PLL0_MUL) / CONFIG_SYS_PLL0_DIV = PLL MHz
26 #define CONFIG_SYS_POWER_MANAGER
27 #define CONFIG_SYS_OSC0_HZ 20000000
28 #define CONFIG_SYS_PLL0_DIV 1
29 #define CONFIG_SYS_PLL0_MUL 7
30 #define CONFIG_SYS_PLL0_SUPPRESS_CYCLES 16
32 * Set the CPU running at:
33 * PLL / (2^CONFIG_SYS_CLKDIV_CPU) = CPU MHz
35 #define CONFIG_SYS_CLKDIV_CPU 0
37 * Set the HSB running at:
38 * PLL / (2^CONFIG_SYS_CLKDIV_HSB) = HSB MHz
40 #define CONFIG_SYS_CLKDIV_HSB 1
42 * Set the PBA running at:
43 * PLL / (2^CONFIG_SYS_CLKDIV_PBA) = PBA MHz
45 #define CONFIG_SYS_CLKDIV_PBA 2
47 * Set the PBB running at:
48 * PLL / (2^CONFIG_SYS_CLKDIV_PBB) = PBB MHz
50 #define CONFIG_SYS_CLKDIV_PBB 1
52 /* Reserve VM regions for SDRAM and NOR flash */
53 #define CONFIG_SYS_NR_VM_REGIONS 2
56 * The PLLOPT register controls the PLL like this:
60 * We want icp=1 (default) and ivco=0 (80-160 MHz) or ivco=2 (150-240MHz).
62 #define CONFIG_SYS_PLL0_OPT 0x04
64 #define CONFIG_USART_BASE ATMEL_BASE_USART1
65 #define CONFIG_USART_ID 1
67 /* User serviceable stuff */
68 #define CONFIG_DOS_PARTITION
70 #define CONFIG_CMDLINE_TAG
71 #define CONFIG_SETUP_MEMORY_TAGS
72 #define CONFIG_INITRD_TAG
74 #define CONFIG_STACKSIZE (2048)
76 #define CONFIG_BAUDRATE 115200
77 #define CONFIG_BOOTARGS \
78 "console=ttyS0 root=mtd3 fbmem=2400k"
80 #define CONFIG_BOOTCOMMAND \
81 "fsload; bootm $(fileaddr)"
83 #define CONFIG_BOOTDELAY 1
86 * After booting the board for the first time, new ethernet addresses
87 * should be generated and assigned to the environment variables
88 * "ethaddr" and "eth1addr". This is normally done during production.
90 #define CONFIG_OVERWRITE_ETHADDR_ONCE
95 #define CONFIG_BOOTP_SUBNETMASK
96 #define CONFIG_BOOTP_GATEWAY
100 * Command line configuration.
102 #include <config_cmd_default.h>
104 #define CONFIG_CMD_ASKENV
105 #define CONFIG_CMD_DHCP
106 #define CONFIG_CMD_EXT2
107 #define CONFIG_CMD_FAT
108 #define CONFIG_CMD_JFFS2
109 #define CONFIG_CMD_MMC
111 #undef CONFIG_CMD_FPGA
112 #undef CONFIG_CMD_SETGETDCR
113 #undef CONFIG_CMD_SOURCE
114 #undef CONFIG_CMD_XIMG
116 #define CONFIG_ATMEL_USART
118 #define CONFIG_PORTMUX_PIO
119 #define CONFIG_SYS_NR_PIOS 5
120 #define CONFIG_SYS_HSDRAMC
122 #define CONFIG_GENERIC_ATMEL_MCI
123 #define CONFIG_GENERIC_MMC
125 #define CONFIG_SYS_DCACHE_LINESZ 32
126 #define CONFIG_SYS_ICACHE_LINESZ 32
128 #define CONFIG_NR_DRAM_BANKS 1
130 #define CONFIG_SYS_FLASH_CFI
131 #define CONFIG_FLASH_CFI_DRIVER
133 #define CONFIG_SYS_FLASH_BASE 0x00000000
134 #define CONFIG_SYS_FLASH_SIZE 0x800000
135 #define CONFIG_SYS_MAX_FLASH_BANKS 1
136 #define CONFIG_SYS_MAX_FLASH_SECT 135
138 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
139 #define CONFIG_SYS_TEXT_BASE 0x00000000
141 #define CONFIG_SYS_INTRAM_BASE INTERNAL_SRAM_BASE
142 #define CONFIG_SYS_INTRAM_SIZE INTERNAL_SRAM_SIZE
143 #define CONFIG_SYS_SDRAM_BASE EBI_SDRAM_BASE
145 #define CONFIG_ENV_IS_IN_FLASH
146 #define CONFIG_ENV_SIZE 65536
147 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE - CONFIG_ENV_SIZE)
149 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INTRAM_BASE + CONFIG_SYS_INTRAM_SIZE)
151 #define CONFIG_SYS_MALLOC_LEN (256*1024)
153 /* Allow 4MB for the kernel run-time image */
154 #define CONFIG_SYS_LOAD_ADDR (EBI_SDRAM_BASE + 0x00400000)
155 #define CONFIG_SYS_BOOTPARAMS_LEN (16 * 1024)
157 /* Other configuration settings that shouldn't have to change all that often */
158 #define CONFIG_SYS_PROMPT "U-Boot> "
159 #define CONFIG_SYS_CBSIZE 256
160 #define CONFIG_SYS_MAXARGS 16
161 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
162 #define CONFIG_SYS_LONGHELP
164 #define CONFIG_SYS_MEMTEST_START EBI_SDRAM_BASE
165 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x3f00000)
166 #define CONFIG_SYS_BAUDRATE_TABLE { 115200, 38400, 19200, 9600, 2400 }
168 #endif /* __CONFIG_H */