include/configs/imx31_phycore.h

   1 /*
   2  * (C) Copyright 2004
   3  * Texas Instruments.
   4  * Richard Woodruff <r-woodruff2@ti.com>
   5  * Kshitij Gupta <kshitij@ti.com>
   6  *
   7  * Configuration settings for the phyCORE-i.MX31 board.
   8  *
   9  * SPDX-License-Identifier:     GPL-2.0+
  10  */
  11
  12 #ifndef __CONFIG_H
  13 #define __CONFIG_H
  14
  15 #include <asm/arch/imx-regs.h>
  16
  17 /* High Level Configuration Options */
  18 #define CONFIG_MX31_CLK32       32000
  19
  20 #define CONFIG_DISPLAY_CPUINFO
  21 #define CONFIG_DISPLAY_BOARDINFO
  22
  23 #define CONFIG_CMDLINE_TAG              /* enable passing of ATAGs */
  24 #define CONFIG_SETUP_MEMORY_TAGS
  25 #define CONFIG_INITRD_TAG
  26
  27 /*
  28  * Size of malloc() pool
  29  */
  30 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + 512 * 1024)
  31
  32 /*
  33  * Hardware drivers
  34  */
  35
  36 #define CONFIG_SYS_I2C
  37 #define CONFIG_SYS_I2C_MXC
  38 #define CONFIG_SYS_I2C_CLK_OFFSET       I2C2_CLK_OFFSET
  39
  40 #define CONFIG_MXC_UART
  41 #define CONFIG_MXC_UART_BASE            UART1_BASE
  42
  43 /* allow to overwrite serial and ethaddr */
  44 #define CONFIG_ENV_OVERWRITE
  45 #define CONFIG_CONS_INDEX       1
  46 #define CONFIG_BAUDRATE         115200
  47
  48 /***********************************************************
  49  * Command definition
  50  ***********************************************************/
  51
  52 #include <config_cmd_default.h>
  53
  54 #define CONFIG_CMD_PING
  55 #define CONFIG_CMD_EEPROM
  56 #define CONFIG_CMD_I2C
  57
  58 #define CONFIG_BOOTDELAY        3
  59
  60 #define MTDPARTS_DEFAULT        "mtdparts=physmap-flash.0:128k(uboot)ro," \
  61                                         "1536k(kernel),-(root)"
  62
  63 #define CONFIG_NETMASK          255.255.255.0
  64 #define CONFIG_IPADDR           192.168.23.168
  65 #define CONFIG_SERVERIP         192.168.23.2
  66
  67 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
  68         "bootargs_base=setenv bootargs console=ttySMX0,115200\0"        \
  69         "bootargs_nfs=setenv bootargs $(bootargs) root=/dev/nfs "       \
  70                 "ip=dhcp nfsroot=$(serverip):$(nfsrootfs),v3,tcp\0"     \
  71         "bootargs_flash=setenv bootargs $(bootargs) "                   \
  72                 "root=/dev/mtdblock2 rootfstype=jffs2\0"                \
  73         "bootargs_mtd=setenv bootargs $(bootargs) $(mtdparts)\0"        \
  74         "bootcmd=run bootcmd_net\0"                                     \
  75         "bootcmd_net=run bootargs_base bootargs_mtd bootargs_nfs;"      \
  76                 "tftpboot 0x80000000 $(uimage);bootm\0"                 \
  77         "bootcmd_flash=run bootargs_base bootargs_mtd bootargs_flash;"  \
  78                 "bootm 0x80000000\0"                                    \
  79         "unlock=yes\0"                                                  \
  80         "mtdparts=" MTDPARTS_DEFAULT "\0"                               \
  81         "prg_uboot=tftpboot 0x80000000 $(uboot);"                       \
  82                 "protect off 0xa0000000 +0x20000;"                      \
  83                 "erase 0xa0000000 +0x20000;"                            \
  84                 "cp.b 0x80000000 0xa0000000 $(filesize)\0"              \
  85         "prg_kernel=tftpboot 0x80000000 $(uimage);"                     \
  86                 "erase 0xa0040000 +0x180000;"                           \
  87                 "cp.b 0x80000000 0xa0040000 $(filesize)\0"              \
  88         "prg_jffs2=tftpboot 0x80000000 $(jffs2);"                       \
  89                 "erase 0xa01c0000 0xa1ffffff;"                          \
  90                 "cp.b 0x80000000 0xa01c0000 $(filesize)\0"              \
  91         "videomode=video=ctfb:x:240,y:320,depth:16,mode:0,"             \
  92                 "pclk:185925,le:9,ri:17,up:7,lo:10,hs:1,vs:1,"          \
  93                 "sync:1241513985,vmode:0\0"
  94
  95
  96 #define CONFIG_SMC911X
  97 #define CONFIG_SMC911X_BASE     0xa8000000
  98 #define CONFIG_SMC911X_32_BIT
  99
 100 /*
 101  * Miscellaneous configurable options
 102  */
 103 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
 104 #define CONFIG_SYS_PROMPT               "uboot> "
 105 /* Console I/O Buffer Size */
 106 #define CONFIG_SYS_CBSIZE               256
 107 /* Print Buffer Size */
 108 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
 109                                          sizeof(CONFIG_SYS_PROMPT) + 16)
 110 /* max number of command args */
 111 #define CONFIG_SYS_MAXARGS              16
 112 /* Boot Argument Buffer Size */
 113 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
 114
 115 #define CONFIG_SYS_MEMTEST_START        0  /* memtest works on */
 116 #define CONFIG_SYS_MEMTEST_END          0x10000
 117
 118 #define CONFIG_SYS_LOAD_ADDR            0 /* default load address */
 119
 120 #define CONFIG_CMDLINE_EDITING
 121
 122 /*
 123  * Physical Memory Map
 124  */
 125 #define CONFIG_NR_DRAM_BANKS            1
 126 #define PHYS_SDRAM_1                    0x80000000
 127 #define PHYS_SDRAM_1_SIZE               (128 * 1024 * 1024)
 128 #define CONFIG_BOARD_EARLY_INIT_F
 129 #define CONFIG_SYS_TEXT_BASE            0xA0000000
 130
 131 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
 132 #define CONFIG_SYS_INIT_RAM_ADDR        IRAM_BASE_ADDR
 133 #define CONFIG_SYS_INIT_RAM_SIZE        IRAM_SIZE
 134 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - \
 135                                                 GENERATED_GBL_DATA_SIZE)
 136 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
 137                                                 CONFIG_SYS_GBL_DATA_OFFSET)
 138
 139 /*
 140  * FLASH and environment organization
 141  */
 142 #define CONFIG_SYS_FLASH_BASE           0xa0000000
 143 #define CONFIG_SYS_MAX_FLASH_BANKS      1       /* max # of memory banks */
 144 #define CONFIG_SYS_MAX_FLASH_SECT       259     /* max # of sectors/chip */
 145 /* Monitor at beginning of flash */
 146 #define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_FLASH_BASE
 147
 148 #define CONFIG_ENV_IS_IN_EEPROM
 149 #define CONFIG_ENV_OFFSET                       0x00    /* env. starts here */
 150 #define CONFIG_ENV_SIZE                         4096
 151 #define CONFIG_SYS_I2C_EEPROM_ADDR              0x52
 152 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS       5       /* 5 bits = 32 octets */
 153 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS   10      /* 10 ms delay */
 154 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN          2       /* byte addr. lenght */
 155
 156 /*
 157  * CFI FLASH driver setup
 158  */
 159 #define CONFIG_SYS_FLASH_CFI            /* Flash memory is CFI compliant */
 160 #define CONFIG_FLASH_CFI_DRIVER         /* Use drivers/mtd/cfi_flash.c */
 161 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* buffered writes (~10x faster) */
 162 #define CONFIG_SYS_FLASH_PROTECTION     /* Use hardware sector protection */
 163
 164 /*
 165  * Timeout for Flash Erase and Flash Write
 166  * timeout values are in ticks
 167  */
 168 #define CONFIG_SYS_FLASH_ERASE_TOUT     (100*CONFIG_SYS_HZ)
 169 #define CONFIG_SYS_FLASH_WRITE_TOUT     (100*CONFIG_SYS_HZ)
 170
 171 /*
 172  * JFFS2 partitions
 173  */
 174 #undef CONFIG_CMD_MTDPARTS
 175 #define CONFIG_JFFS2_DEV        "nor0"
 176
 177 /* EET platform additions */
 178 #ifdef CONFIG_IMX31_PHYCORE_EET
 179 #define CONFIG_BOARD_LATE_INIT
 180
 181 #define CONFIG_MXC_GPIO
 182
 183 #define CONFIG_HARD_SPI
 184 #define CONFIG_MXC_SPI
 185 #define CONFIG_CMD_SPI
 186
 187 #define CONFIG_S6E63D6
 188
 189 #define CONFIG_VIDEO
 190 #define CONFIG_CFB_CONSOLE
 191 #define CONFIG_VIDEO_MX3
 192 #define CONFIG_VIDEO_LOGO
 193 #define CONFIG_VIDEO_SW_CURSOR
 194 #define CONFIG_VGA_AS_SINGLE_DEVICE
 195 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
 196 #define CONFIG_SPLASH_SCREEN
 197 #define CONFIG_CMD_BMP
 198 #define CONFIG_BMP_16BPP
 199 #endif
 200
 201 #endif /* __CONFIG_H */