include/configs/kvme080.h

   1 /*
   2  * (C) Copyright 2005
   3  * Sangmoon Kim, dogoil@etinsys.com.
   4  *
   5  * SPDX-License-Identifier:     GPL-2.0+
   6  */
   7
   8 #ifndef __CONFIG_H
   9 #define __CONFIG_H
  10
  11 #define CONFIG_MPC824X          1
  12 #define CONFIG_MPC8245          1
  13 #define CONFIG_KVME080          1
  14
  15 #define CONFIG_SYS_TEXT_BASE    0xFFF00000
  16
  17 #define CONFIG_CONS_INDEX       1
  18
  19 #define CONFIG_BAUDRATE         115200
  20
  21 #define CONFIG_BOOTDELAY        5
  22
  23 #define CONFIG_IPADDR           192.168.0.2
  24 #define CONFIG_NETMASK          255.255.255.0
  25 #define CONFIG_SERVERIP         192.168.0.1
  26
  27 #define CONFIG_BOOTARGS \
  28         "console=ttyS0,115200 " \
  29         "root=/dev/nfs rw nfsroot=192.168.0.1:/opt/eldk/ppc_82xx " \
  30         "ip=192.168.0.2:192.168.0.1:192.168.0.1:255.255.255.0:" \
  31         "kvme080:eth0:none " \
  32         "mtdparts=phys_mapped_flash:12m(root),-(kernel)"
  33
  34 #define CONFIG_BOOTCOMMAND \
  35         "tftp 800000 kvme080/uImage; " \
  36         "bootm 800000"
  37
  38 #define CONFIG_LOADADDR         800000
  39
  40 #define CONFIG_BOARD_EARLY_INIT_F
  41 #define CONFIG_BOARD_EARLY_INIT_R
  42 #define CONFIG_MISC_INIT_R
  43
  44 #define CONFIG_LOADS_ECHO       1
  45 #undef  CONFIG_SYS_LOADS_BAUD_CHANGE
  46
  47 #undef  CONFIG_WATCHDOG
  48
  49 /*
  50  * BOOTP options
  51  */
  52 #define CONFIG_BOOTP_SUBNETMASK
  53 #define CONFIG_BOOTP_GATEWAY
  54 #define CONFIG_BOOTP_HOSTNAME
  55 #define CONFIG_BOOTP_BOOTPATH
  56 #define CONFIG_BOOTP_BOOTFILESIZE
  57
  58
  59 #define CONFIG_MAC_PARTITION
  60 #define CONFIG_DOS_PARTITION
  61
  62 #define CONFIG_RTC_DS164x
  63
  64
  65 /*
  66  * Command line configuration.
  67  */
  68 #include <config_cmd_default.h>
  69
  70 #define CONFIG_CMD_ASKENV
  71 #define CONFIG_CMD_CACHE
  72 #define CONFIG_CMD_DATE
  73 #define CONFIG_CMD_DHCP
  74 #define CONFIG_CMD_DIAG
  75 #define CONFIG_CMD_EEPROM
  76 #define CONFIG_CMD_ELF
  77 #define CONFIG_CMD_I2C
  78 #define CONFIG_CMD_JFFS2
  79 #define CONFIG_CMD_NFS
  80 #define CONFIG_CMD_PCI
  81 #define CONFIG_CMD_PING
  82 #define CONFIG_CMD_SDRAM
  83 #define CONFIG_CMD_SNTP
  84
  85
  86 #define CONFIG_NETCONSOLE
  87
  88 #define CONFIG_SYS_LONGHELP
  89 #define CONFIG_SYS_PROMPT               "=> "
  90 #define CONFIG_SYS_CBSIZE               256
  91 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
  92 #define CONFIG_SYS_MAXARGS              16
  93 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
  94
  95 #define CONFIG_SYS_MEMTEST_START        0x00400000
  96 #define CONFIG_SYS_MEMTEST_END          0x07C00000
  97
  98 #define CONFIG_SYS_LOAD_ADDR            0x00100000
  99 #define CONFIG_SYS_HZ                   1000
 100
 101 #define CONFIG_SYS_INIT_RAM_ADDR        0x40000000
 102 #define CONFIG_SYS_INIT_RAM_SIZE        0x1000
 103 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 104
 105 #define CONFIG_SYS_SDRAM_BASE           0x00000000
 106 #define CONFIG_SYS_FLASH_BASE           0x7C000000
 107 #define CONFIG_SYS_EUMB_ADDR            0xFC000000
 108 #define CONFIG_SYS_NVRAM_BASE_ADDR      0xFF000000
 109 #define CONFIG_SYS_NS16550_COM1 0xFF080000
 110 #define CONFIG_SYS_NS16550_COM2 0xFF080010
 111 #define CONFIG_SYS_NS16550_COM3 0xFF080020
 112 #define CONFIG_SYS_NS16550_COM4 0xFF080030
 113 #define CONFIG_SYS_RESET_ADDRESS        0xFFF00100
 114
 115 #define CONFIG_SYS_MAX_RAM_SIZE 0x20000000
 116 #define CONFIG_SYS_FLASH_SIZE           (16 * 1024 * 1024)
 117 #define CONFIG_SYS_NVRAM_SIZE           0x7FFF8
 118
 119 #define CONFIG_VERY_BIG_RAM
 120
 121 #define CONFIG_SYS_MONITOR_LEN          0x00040000
 122 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
 123 #define CONFIG_SYS_MALLOC_LEN           (512 << 10)
 124
 125 #define CONFIG_SYS_BOOTMAPSZ            (8 << 20)
 126
 127 #define CONFIG_SYS_FLASH_CFI
 128 #define CONFIG_FLASH_CFI_DRIVER
 129 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
 130 #define CONFIG_SYS_FLASH_PROTECTION
 131 #define CONFIG_SYS_FLASH_EMPTY_INFO
 132 #define CONFIG_SYS_FLASH_PROTECT_CLEAR
 133
 134 #define CONFIG_SYS_MAX_FLASH_BANKS      1
 135 #define CONFIG_SYS_MAX_FLASH_SECT       256
 136
 137 #define CONFIG_SYS_FLASH_ERASE_TOUT     120000
 138 #define CONFIG_SYS_FLASH_WRITE_TOUT     500
 139
 140 #define CONFIG_SYS_JFFS2_FIRST_BANK     0
 141 #define CONFIG_SYS_JFFS2_NUM_BANKS      1
 142
 143 #define CONFIG_ENV_IS_IN_NVRAM  1
 144 #define CONFIG_ENV_OVERWRITE    1
 145 #define CONFIG_SYS_NVRAM_ACCESS_ROUTINE
 146 #define CONFIG_ENV_ADDR         CONFIG_SYS_NVRAM_BASE_ADDR
 147 #define CONFIG_ENV_SIZE         0x400
 148 #define CONFIG_ENV_OFFSET               0
 149
 150 #define CONFIG_SYS_NS16550
 151 #define CONFIG_SYS_NS16550_SERIAL
 152 #define CONFIG_SYS_NS16550_REG_SIZE     1
 153 #define CONFIG_SYS_NS16550_CLK          14745600
 154
 155 #define CONFIG_PCI
 156 #define CONFIG_PCI_INDIRECT_BRIDGE
 157 #define CONFIG_PCI_PNP
 158
 159 #define CONFIG_EEPRO100
 160 #define CONFIG_EEPRO100_SROM_WRITE
 161
 162 #define CONFIG_SYS_RX_ETH_BUFFER        8
 163
 164 #define CONFIG_HARD_I2C         1
 165 #define CONFIG_SYS_I2C_SPEED            400000
 166 #define CONFIG_SYS_I2C_SLAVE            0x7F
 167
 168 #define CONFIG_SYS_I2C_EEPROM_ADDR              0x57
 169 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN          1
 170 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS       3
 171 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS   10
 172
 173 #define CONFIG_SYS_CLK_FREQ     33333333
 174
 175 #define CONFIG_SYS_CACHELINE_SIZE       32
 176 #if defined(CONFIG_CMD_KGDB)
 177 #  define CONFIG_SYS_CACHELINE_SHIFT    5
 178 #endif
 179
 180 #define CONFIG_SYS_DLL_EXTEND           0x00
 181 #define CONFIG_SYS_PCI_HOLD_DEL 0x20
 182
 183 #define CONFIG_SYS_ROMNAL               15
 184 #define CONFIG_SYS_ROMFAL               31
 185
 186 #define CONFIG_SYS_REFINT               430
 187
 188 #define CONFIG_SYS_DBUS_SIZE2           1
 189
 190 #define CONFIG_SYS_BSTOPRE              121
 191 #define CONFIG_SYS_REFREC               8
 192 #define CONFIG_SYS_RDLAT                4
 193 #define CONFIG_SYS_PRETOACT             3
 194 #define CONFIG_SYS_ACTTOPRE             5
 195 #define CONFIG_SYS_ACTORW               3
 196 #define CONFIG_SYS_SDMODE_CAS_LAT       3
 197 #define CONFIG_SYS_SDMODE_WRAP          0
 198
 199 #define CONFIG_SYS_REGISTERD_TYPE_BUFFER        1
 200 #define CONFIG_SYS_EXTROM                       1
 201 #define CONFIG_SYS_REGDIMM                      0
 202
 203 #define CONFIG_SYS_BANK0_START          0x00000000
 204 #define CONFIG_SYS_BANK0_END            (0x4000000 - 1)
 205 #define CONFIG_SYS_BANK0_ENABLE 1
 206 #define CONFIG_SYS_BANK1_START          0x04000000
 207 #define CONFIG_SYS_BANK1_END            (0x8000000 - 1)
 208 #define CONFIG_SYS_BANK1_ENABLE 1
 209 #define CONFIG_SYS_BANK2_START          0x3ff00000
 210 #define CONFIG_SYS_BANK2_END            0x3fffffff
 211 #define CONFIG_SYS_BANK2_ENABLE 0
 212 #define CONFIG_SYS_BANK3_START          0x3ff00000
 213 #define CONFIG_SYS_BANK3_END            0x3fffffff
 214 #define CONFIG_SYS_BANK3_ENABLE 0
 215 #define CONFIG_SYS_BANK4_START          0x00000000
 216 #define CONFIG_SYS_BANK4_END            0x00000000
 217 #define CONFIG_SYS_BANK4_ENABLE 0
 218 #define CONFIG_SYS_BANK5_START          0x00000000
 219 #define CONFIG_SYS_BANK5_END            0x00000000
 220 #define CONFIG_SYS_BANK5_ENABLE 0
 221 #define CONFIG_SYS_BANK6_START          0x00000000
 222 #define CONFIG_SYS_BANK6_END            0x00000000
 223 #define CONFIG_SYS_BANK6_ENABLE 0
 224 #define CONFIG_SYS_BANK7_START          0x00000000
 225 #define CONFIG_SYS_BANK7_END            0x00000000
 226 #define CONFIG_SYS_BANK7_ENABLE 0
 227
 228 #define CONFIG_SYS_BANK_ENABLE          0x03
 229
 230 #define CONFIG_SYS_ODCR         0x75
 231 #define CONFIG_SYS_PGMAX                0x32
 232
 233 #define CONFIG_SYS_IBAT0L       (CONFIG_SYS_SDRAM_BASE | BATL_PP_10 | BATL_MEMCOHERENCE)
 234 #define CONFIG_SYS_IBAT0U       (CONFIG_SYS_SDRAM_BASE | BATU_BL_256M | BATU_VS | BATU_VP)
 235
 236 #define CONFIG_SYS_IBAT1L       (CONFIG_SYS_INIT_RAM_ADDR | BATL_PP_10 | BATL_MEMCOHERENCE)
 237 #define CONFIG_SYS_IBAT1U       (CONFIG_SYS_INIT_RAM_ADDR | BATU_BL_128K | BATU_VS | BATU_VP)
 238
 239 #define CONFIG_SYS_IBAT2L       (0x80000000 | BATL_PP_10 | BATL_CACHEINHIBIT)
 240 #define CONFIG_SYS_IBAT2U       (0x80000000 | BATU_BL_256M | BATU_VS | BATU_VP)
 241
 242 #define CONFIG_SYS_IBAT3L       (0xF0000000 | BATL_PP_10 | BATL_CACHEINHIBIT)
 243 #define CONFIG_SYS_IBAT3U       (0xF0000000 | BATU_BL_256M | BATU_VS | BATU_VP)
 244
 245 #define CONFIG_SYS_DBAT0L       CONFIG_SYS_IBAT0L
 246 #define CONFIG_SYS_DBAT0U       CONFIG_SYS_IBAT0U
 247 #define CONFIG_SYS_DBAT1L       CONFIG_SYS_IBAT1L
 248 #define CONFIG_SYS_DBAT1U       CONFIG_SYS_IBAT1U
 249 #define CONFIG_SYS_DBAT2L       CONFIG_SYS_IBAT2L
 250 #define CONFIG_SYS_DBAT2U       CONFIG_SYS_IBAT2U
 251 #define CONFIG_SYS_DBAT3L       CONFIG_SYS_IBAT3L
 252 #define CONFIG_SYS_DBAT3U       CONFIG_SYS_IBAT3U
 253
 254 #endif  /* __CONFIG_H */