include/configs/omap3_beagle.h

   1 /*
   2  * (C) Copyright 2006-2008
   3  * Texas Instruments.
   4  * Richard Woodruff <r-woodruff2@ti.com>
   5  * Syed Mohammed Khasim <x0khasim@ti.com>
   6  *
   7  * Configuration settings for the TI OMAP3530 Beagle board.
   8  *
   9  * See file CREDITS for list of people who contributed to this
  10  * project.
  11  *
  12  * This program is free software; you can redistribute it and/or
  13  * modify it under the terms of the GNU General Public License as
  14  * published by the Free Software Foundation; either version 2 of
  15  * the License, or (at your option) any later version.
  16  *
  17  * This program is distributed in the hope that it will be useful,
  18  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  20  * GNU General Public License for more details.
  21  *
  22  * You should have received a copy of the GNU General Public License
  23  * along with this program; if not, write to the Free Software
  24  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  25  * MA 02111-1307 USA
  26  */
  27
  28 #ifndef __CONFIG_H
  29 #define __CONFIG_H
  30
  31 /*
  32  * High Level Configuration Options
  33  */
  34 #define CONFIG_ARMCORTEXA8      1       /* This is an ARM V7 CPU core */
  35 #define CONFIG_OMAP             1       /* in a TI OMAP core */
  36 #define CONFIG_OMAP34XX         1       /* which is a 34XX */
  37 #define CONFIG_OMAP3430         1       /* which is in a 3430 */
  38 #define CONFIG_OMAP3_BEAGLE     1       /* working with BEAGLE */
  39
  40 #include <asm/arch/cpu.h>               /* get chip and board defs */
  41 #include <asm/arch/omap3.h>
  42
  43 /*
  44  * Display CPU and Board information
  45  */
  46 #define CONFIG_DISPLAY_CPUINFO          1
  47 #define CONFIG_DISPLAY_BOARDINFO        1
  48
  49 /* Clock Defines */
  50 #define V_OSCK                  26000000        /* Clock output from T2 */
  51 #define V_SCLK                  (V_OSCK >> 1)
  52
  53 #undef CONFIG_USE_IRQ                           /* no support for IRQs */
  54 #define CONFIG_MISC_INIT_R
  55
  56 #define CONFIG_CMDLINE_TAG              1       /* enable passing of ATAGs */
  57 #define CONFIG_SETUP_MEMORY_TAGS        1
  58 #define CONFIG_INITRD_TAG               1
  59 #define CONFIG_REVISION_TAG             1
  60
  61 /*
  62  * Size of malloc() pool
  63  */
  64 #define CONFIG_ENV_SIZE                 (128 << 10)     /* 128 KiB */
  65                                                 /* Sector */
  66 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + (128 << 10))
  67 #define CONFIG_SYS_GBL_DATA_SIZE        128     /* bytes reserved for */
  68                                                 /* initial data */
  69
  70 /*
  71  * Hardware drivers
  72  */
  73
  74 /*
  75  * NS16550 Configuration
  76  */
  77 #define V_NS16550_CLK                   48000000        /* 48MHz (APLL96/2) */
  78
  79 #define CONFIG_SYS_NS16550
  80 #define CONFIG_SYS_NS16550_SERIAL
  81 #define CONFIG_SYS_NS16550_REG_SIZE     (-4)
  82 #define CONFIG_SYS_NS16550_CLK          V_NS16550_CLK
  83
  84 /*
  85  * select serial console configuration
  86  */
  87 #define CONFIG_CONS_INDEX               3
  88 #define CONFIG_SYS_NS16550_COM3         OMAP34XX_UART3
  89 #define CONFIG_SERIAL3                  3       /* UART3 on Beagle Rev 2 */
  90
  91 /* allow to overwrite serial and ethaddr */
  92 #define CONFIG_ENV_OVERWRITE
  93 #define CONFIG_BAUDRATE                 115200
  94 #define CONFIG_SYS_BAUDRATE_TABLE       {4800, 9600, 19200, 38400, 57600,\
  95                                         115200}
  96 #define CONFIG_MMC                      1
  97 #define CONFIG_OMAP3_MMC                1
  98 #define CONFIG_DOS_PARTITION            1
  99
 100 /* commands to include */
 101 #include <config_cmd_default.h>
 102
 103 #define CONFIG_CMD_EXT2         /* EXT2 Support                 */
 104 #define CONFIG_CMD_FAT          /* FAT support                  */
 105 #define CONFIG_CMD_JFFS2        /* JFFS2 Support                */
 106 #define CONFIG_CMD_MTDPARTS     /* Enable MTD parts commands */
 107 #define CONFIG_MTD_DEVICE       /* needed for mtdparts commands */
 108 #define MTDIDS_DEFAULT                  "nand0=nand"
 109 #define MTDPARTS_DEFAULT                "mtdparts=nand:512k(x-loader),"\
 110                                         "1920k(u-boot),128k(u-boot-env),"\
 111                                         "4m(kernel),-(fs)"
 112
 113 #define CONFIG_CMD_I2C          /* I2C serial bus support       */
 114 #define CONFIG_CMD_MMC          /* MMC support                  */
 115 #define CONFIG_CMD_NAND         /* NAND support                 */
 116
 117 #undef CONFIG_CMD_FLASH         /* flinfo, erase, protect       */
 118 #undef CONFIG_CMD_FPGA          /* FPGA configuration Support   */
 119 #undef CONFIG_CMD_IMI           /* iminfo                       */
 120 #undef CONFIG_CMD_IMLS          /* List all found images        */
 121 #undef CONFIG_CMD_NET           /* bootp, tftpboot, rarpboot    */
 122 #undef CONFIG_CMD_NFS           /* NFS support                  */
 123
 124 #define CONFIG_SYS_NO_FLASH
 125 #define CONFIG_HARD_I2C                 1
 126 #define CONFIG_SYS_I2C_SPEED            100000
 127 #define CONFIG_SYS_I2C_SLAVE            1
 128 #define CONFIG_SYS_I2C_BUS              0
 129 #define CONFIG_SYS_I2C_BUS_SELECT       1
 130 #define CONFIG_DRIVER_OMAP34XX_I2C      1
 131
 132 /*
 133  * TWL4030
 134  */
 135 #define CONFIG_TWL4030_POWER            1
 136 #define CONFIG_TWL4030_LED              1
 137
 138 /*
 139  * Board NAND Info.
 140  */
 141 #define CONFIG_NAND_OMAP_GPMC
 142 #define CONFIG_SYS_NAND_ADDR            NAND_BASE       /* physical address */
 143                                                         /* to access nand */
 144 #define CONFIG_SYS_NAND_BASE            NAND_BASE       /* physical address */
 145                                                         /* to access nand at */
 146                                                         /* CS0 */
 147 #define GPMC_NAND_ECC_LP_x16_LAYOUT     1
 148
 149 #define CONFIG_SYS_MAX_NAND_DEVICE      1               /* Max number of NAND */
 150                                                         /* devices */
 151 #define CONFIG_SYS_64BIT_VSPRINTF               /* needed for nand_util.c */
 152
 153 #define CONFIG_JFFS2_NAND
 154 /* nand device jffs2 lives on */
 155 #define CONFIG_JFFS2_DEV                "nand0"
 156 /* start of jffs2 partition */
 157 #define CONFIG_JFFS2_PART_OFFSET        0x680000
 158 #define CONFIG_JFFS2_PART_SIZE          0xf980000       /* size of jffs2 */
 159                                                         /* partition */
 160
 161 /* Environment information */
 162 #define CONFIG_BOOTDELAY                10
 163
 164 #define CONFIG_EXTRA_ENV_SETTINGS \
 165         "loadaddr=0x82000000\0" \
 166         "console=ttyS2,115200n8\0" \
 167         "vram=12M\0" \
 168         "dvimode=1024x768MR-16@60\0" \
 169         "defaultdisplay=dvi\0" \
 170         "mmcroot=/dev/mmcblk0p2 rw\0" \
 171         "mmcrootfstype=ext3 rootwait\0" \
 172         "nandroot=/dev/mtdblock4 rw\0" \
 173         "nandrootfstype=jffs2\0" \
 174         "mmcargs=setenv bootargs console=${console} " \
 175                 "vram=${vram} " \
 176                 "omapfb.mode=dvi:${dvimode} " \
 177                 "omapfb.debug=y " \
 178                 "omapdss.def_disp=${defaultdisplay} " \
 179                 "root=${mmcroot} " \
 180                 "rootfstype=${mmcrootfstype}\0" \
 181         "nandargs=setenv bootargs console=${console} " \
 182                 "vram=${vram} " \
 183                 "omapfb.mode=dvi:${dvimode} " \
 184                 "omapfb.debug=y " \
 185                 "omapdss.def_disp=${defaultdisplay} " \
 186                 "root=${nandroot} " \
 187                 "rootfstype=${nandrootfstype}\0" \
 188         "loadbootscript=fatload mmc 0 ${loadaddr} boot.scr\0" \
 189         "bootscript=echo Running bootscript from mmc ...; " \
 190                 "source ${loadaddr}\0" \
 191         "loaduimage=fatload mmc 0 ${loadaddr} uImage\0" \
 192         "mmcboot=echo Booting from mmc ...; " \
 193                 "run mmcargs; " \
 194                 "bootm ${loadaddr}\0" \
 195         "nandboot=echo Booting from nand ...; " \
 196                 "run nandargs; " \
 197                 "nand read ${loadaddr} 280000 400000; " \
 198                 "bootm ${loadaddr}\0" \
 199
 200 #define CONFIG_BOOTCOMMAND \
 201         "if mmc init; then " \
 202                 "if run loadbootscript; then " \
 203                         "run bootscript; " \
 204                 "else " \
 205                         "if run loaduimage; then " \
 206                                 "run mmcboot; " \
 207                         "else run nandboot; " \
 208                         "fi; " \
 209                 "fi; " \
 210         "else run nandboot; fi"
 211
 212 #define CONFIG_AUTO_COMPLETE            1
 213 /*
 214  * Miscellaneous configurable options
 215  */
 216 #define V_PROMPT                        "OMAP3 beagleboard.org # "
 217
 218 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
 219 #define CONFIG_SYS_HUSH_PARSER          /* use "hush" command parser */
 220 #define CONFIG_SYS_PROMPT_HUSH_PS2      "> "
 221 #define CONFIG_SYS_PROMPT               V_PROMPT
 222 #define CONFIG_SYS_CBSIZE               256     /* Console I/O Buffer Size */
 223 /* Print Buffer Size */
 224 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
 225                                         sizeof(CONFIG_SYS_PROMPT) + 16)
 226 #define CONFIG_SYS_MAXARGS              16      /* max number of command args */
 227 /* Boot Argument Buffer Size */
 228 #define CONFIG_SYS_BARGSIZE             (CONFIG_SYS_CBSIZE)
 229
 230 #define CONFIG_SYS_MEMTEST_START        (OMAP34XX_SDRC_CS0)     /* memtest */
 231                                                                 /* works on */
 232 #define CONFIG_SYS_MEMTEST_END          (OMAP34XX_SDRC_CS0 + \
 233                                         0x01F00000) /* 31MB */
 234
 235 #define CONFIG_SYS_LOAD_ADDR            (OMAP34XX_SDRC_CS0)     /* default */
 236                                                         /* load address */
 237
 238 /*
 239  * OMAP3 has 12 GP timers, they can be driven by the system clock
 240  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
 241  * This rate is divided by a local divisor.
 242  */
 243 #define CONFIG_SYS_TIMERBASE            (OMAP34XX_GPT2)
 244 #define CONFIG_SYS_PTV                  2       /* Divisor: 2^(PTV+1) => 8 */
 245 #define CONFIG_SYS_HZ                   1000
 246
 247 /*-----------------------------------------------------------------------
 248  * Stack sizes
 249  *
 250  * The stack sizes are set up in start.S using the settings below
 251  */
 252 #define CONFIG_STACKSIZE        (128 << 10)     /* regular stack 128 KiB */
 253 #ifdef CONFIG_USE_IRQ
 254 #define CONFIG_STACKSIZE_IRQ    (4 << 10)       /* IRQ stack 4 KiB */
 255 #define CONFIG_STACKSIZE_FIQ    (4 << 10)       /* FIQ stack 4 KiB */
 256 #endif
 257
 258 /*-----------------------------------------------------------------------
 259  * Physical Memory Map
 260  */
 261 #define CONFIG_NR_DRAM_BANKS    2       /* CS1 may or may not be populated */
 262 #define PHYS_SDRAM_1            OMAP34XX_SDRC_CS0
 263 #define PHYS_SDRAM_1_SIZE       (32 << 20)      /* at least 32 MiB */
 264 #define PHYS_SDRAM_2            OMAP34XX_SDRC_CS1
 265
 266 /* SDRAM Bank Allocation method */
 267 #define SDRC_R_B_C              1
 268
 269 /*-----------------------------------------------------------------------
 270  * FLASH and environment organization
 271  */
 272
 273 /* **** PISMO SUPPORT *** */
 274
 275 /* Configure the PISMO */
 276 #define PISMO1_NAND_SIZE                GPMC_SIZE_128M
 277 #define PISMO1_ONEN_SIZE                GPMC_SIZE_128M
 278
 279 #define CONFIG_SYS_MAX_FLASH_SECT       520     /* max number of sectors on */
 280                                                 /* one chip */
 281 #define CONFIG_SYS_MAX_FLASH_BANKS      2       /* max number of flash banks */
 282 #define CONFIG_SYS_MONITOR_LEN          (256 << 10)     /* Reserve 2 sectors */
 283
 284 #define CONFIG_SYS_FLASH_BASE           boot_flash_base
 285
 286 /* Monitor at start of flash */
 287 #define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_FLASH_BASE
 288 #define CONFIG_SYS_ONENAND_BASE         ONENAND_MAP
 289
 290 #define CONFIG_ENV_IS_IN_NAND           1
 291 #define ONENAND_ENV_OFFSET              0x260000 /* environment starts here */
 292 #define SMNAND_ENV_OFFSET               0x260000 /* environment starts here */
 293
 294 #define CONFIG_SYS_ENV_SECT_SIZE        boot_flash_sec
 295 #define CONFIG_ENV_OFFSET               boot_flash_off
 296 #define CONFIG_ENV_ADDR                 SMNAND_ENV_OFFSET
 297
 298 /*-----------------------------------------------------------------------
 299  * CFI FLASH driver setup
 300  */
 301 /* timeout values are in ticks */
 302 #define CONFIG_SYS_FLASH_ERASE_TOUT     (100 * CONFIG_SYS_HZ)
 303 #define CONFIG_SYS_FLASH_WRITE_TOUT     (100 * CONFIG_SYS_HZ)
 304
 305 /* Flash banks JFFS2 should use */
 306 #define CONFIG_SYS_MAX_MTD_BANKS        (CONFIG_SYS_MAX_FLASH_BANKS + \
 307                                         CONFIG_SYS_MAX_NAND_DEVICE)
 308 #define CONFIG_SYS_JFFS2_MEM_NAND
 309 /* use flash_info[2] */
 310 #define CONFIG_SYS_JFFS2_FIRST_BANK     CONFIG_SYS_MAX_FLASH_BANKS
 311 #define CONFIG_SYS_JFFS2_NUM_BANKS      1
 312
 313 #ifndef __ASSEMBLY__
 314 extern struct gpmc *gpmc_cfg;
 315 extern unsigned int boot_flash_base;
 316 extern volatile unsigned int boot_flash_env_addr;
 317 extern unsigned int boot_flash_off;
 318 extern unsigned int boot_flash_sec;
 319 extern unsigned int boot_flash_type;
 320 #endif
 321
 322 #endif /* __CONFIG_H */